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5270 | serge | 1 | #ifndef _UAPI_ASM_X86_SIGCONTEXT_H |
2 | #define _UAPI_ASM_X86_SIGCONTEXT_H |
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3 | |||
6082 | serge | 4 | /* |
5 | * Linux signal context definitions. The sigcontext includes a complex |
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6 | * hierarchy of CPU and FPU state, available to user-space (on the stack) when |
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7 | * a signal handler is executed. |
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8 | * |
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9 | * As over the years this ABI grew from its very simple roots towards |
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10 | * supporting more and more CPU state organically, some of the details (which |
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11 | * were rather clever hacks back in the days) became a bit quirky by today. |
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12 | * |
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13 | * The current ABI includes flexible provisions for future extensions, so we |
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14 | * won't have to grow new quirks for quite some time. Promise! |
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15 | */ |
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16 | |||
5270 | serge | 17 | #include |
18 | #include |
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19 | |||
6082 | serge | 20 | #define FP_XSTATE_MAGIC1 0x46505853U |
21 | #define FP_XSTATE_MAGIC2 0x46505845U |
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22 | #define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2) |
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5270 | serge | 23 | |
24 | /* |
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6082 | serge | 25 | * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame |
26 | * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes are |
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27 | * used to extend the fpstate pointer in the sigcontext, which now includes the |
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28 | * extended state information along with fpstate information. |
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5270 | serge | 29 | * |
6082 | serge | 30 | * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a |
31 | * sw_reserved.extended_size bytes large extended context area present. (The |
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32 | * last 32-bit word of this extended area (at the |
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33 | * fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to |
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34 | * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.) |
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35 | * |
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36 | * This extended area typically grows with newer CPUs that have larger and |
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37 | * larger XSAVE areas. |
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5270 | serge | 38 | */ |
39 | struct _fpx_sw_bytes { |
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6082 | serge | 40 | /* |
41 | * If set to FP_XSTATE_MAGIC1 then this is an xstate context. |
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42 | * 0 if a legacy frame. |
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43 | */ |
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44 | __u32 magic1; |
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45 | |||
46 | /* |
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47 | * Total size of the fpstate area: |
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48 | * |
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49 | * - if magic1 == 0 then it's sizeof(struct _fpstate) |
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50 | * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) |
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51 | * plus extensions (if any) |
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52 | */ |
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53 | __u32 extended_size; |
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54 | |||
55 | /* |
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56 | * Feature bit mask (including FP/SSE/extended state) that is present |
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57 | * in the memory layout: |
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58 | */ |
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59 | __u64 xfeatures; |
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60 | |||
61 | /* |
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62 | * Actual XSAVE state size, based on the xfeatures saved in the layout. |
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63 | * 'extended_size' is greater than 'xstate_size': |
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64 | */ |
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65 | __u32 xstate_size; |
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66 | |||
67 | /* For future use: */ |
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68 | __u32 padding[7]; |
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5270 | serge | 69 | }; |
70 | |||
71 | /* |
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6082 | serge | 72 | * As documented in the iBCS2 standard: |
5270 | serge | 73 | * |
6082 | serge | 74 | * The first part of "struct _fpstate" is just the normal i387 hardware setup, |
75 | * the extra "status" word is used to save the coprocessor status word before |
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76 | * entering the handler. |
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5270 | serge | 77 | * |
6082 | serge | 78 | * The FPU state data structure has had to grow to accommodate the extended FPU |
79 | * state required by the Streaming SIMD Extensions. There is no documented |
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80 | * standard to accomplish this at the moment. |
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5270 | serge | 81 | */ |
6082 | serge | 82 | |
83 | /* 10-byte legacy floating point register: */ |
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5270 | serge | 84 | struct _fpreg { |
6082 | serge | 85 | __u16 significand[4]; |
86 | __u16 exponent; |
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5270 | serge | 87 | }; |
88 | |||
6082 | serge | 89 | /* 16-byte floating point register: */ |
5270 | serge | 90 | struct _fpxreg { |
6082 | serge | 91 | __u16 significand[4]; |
92 | __u16 exponent; |
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93 | __u16 padding[3]; |
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5270 | serge | 94 | }; |
95 | |||
6082 | serge | 96 | /* 16-byte XMM register: */ |
5270 | serge | 97 | struct _xmmreg { |
6082 | serge | 98 | __u32 element[4]; |
5270 | serge | 99 | }; |
100 | |||
6082 | serge | 101 | #define X86_FXSR_MAGIC 0x0000 |
5270 | serge | 102 | |
6082 | serge | 103 | /* |
104 | * The 32-bit FPU frame: |
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105 | */ |
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106 | struct _fpstate_32 { |
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107 | /* Legacy FPU environment: */ |
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108 | __u32 cw; |
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109 | __u32 sw; |
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110 | __u32 tag; |
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111 | __u32 ipoff; |
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112 | __u32 cssel; |
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113 | __u32 dataoff; |
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114 | __u32 datasel; |
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115 | struct _fpreg _st[8]; |
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116 | __u16 status; |
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117 | __u16 magic; /* 0xffff: regular FPU data only */ |
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118 | /* 0x0000: FXSR FPU data */ |
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119 | |||
5270 | serge | 120 | /* FXSR FPU environment */ |
6082 | serge | 121 | __u32 _fxsr_env[6]; /* FXSR FPU env is ignored */ |
122 | __u32 mxcsr; |
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123 | __u32 reserved; |
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124 | struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */ |
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125 | struct _xmmreg _xmm[8]; /* First 8 XMM registers */ |
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126 | union { |
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127 | __u32 padding1[44]; /* Second 8 XMM registers plus padding */ |
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128 | __u32 padding[44]; /* Alias name for old user-space */ |
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129 | }; |
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5270 | serge | 130 | |
131 | union { |
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6082 | serge | 132 | __u32 padding2[12]; |
133 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
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5270 | serge | 134 | }; |
135 | }; |
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136 | |||
137 | /* |
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6082 | serge | 138 | * The 64-bit FPU frame. (FXSAVE format and later) |
139 | * |
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140 | * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is |
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141 | * larger: 'struct _xstate'. Note that 'struct _xstate' embedds |
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142 | * 'struct _fpstate' so that you can always assume the _fpstate portion |
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143 | * exists so that you can check the magic value. |
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144 | * |
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145 | * Note2: Reserved fields may someday contain valuable data. Always |
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146 | * save/restore them when you change signal frames. |
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5270 | serge | 147 | */ |
6082 | serge | 148 | struct _fpstate_64 { |
149 | __u16 cwd; |
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150 | __u16 swd; |
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151 | /* Note this is not the same as the 32-bit/x87/FSAVE twd: */ |
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152 | __u16 twd; |
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153 | __u16 fop; |
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154 | __u64 rip; |
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155 | __u64 rdp; |
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156 | __u32 mxcsr; |
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157 | __u32 mxcsr_mask; |
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158 | __u32 st_space[32]; /* 8x FP registers, 16 bytes each */ |
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159 | __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */ |
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160 | __u32 reserved2[12]; |
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161 | union { |
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162 | __u32 reserved3[12]; |
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163 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
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164 | }; |
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5270 | serge | 165 | }; |
166 | |||
6082 | serge | 167 | #ifdef __i386__ |
168 | # define _fpstate _fpstate_32 |
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169 | #else |
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170 | # define _fpstate _fpstate_64 |
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171 | #endif |
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5270 | serge | 172 | |
6082 | serge | 173 | struct _header { |
174 | __u64 xfeatures; |
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175 | __u64 reserved1[2]; |
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176 | __u64 reserved2[5]; |
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5270 | serge | 177 | }; |
178 | |||
6082 | serge | 179 | struct _ymmh_state { |
180 | /* 16x YMM registers, 16 bytes each: */ |
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181 | __u32 ymmh_space[64]; |
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182 | }; |
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183 | |||
5270 | serge | 184 | /* |
6082 | serge | 185 | * Extended state pointed to by sigcontext::fpstate. |
186 | * |
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187 | * In addition to the fpstate, information encoded in _xstate::xstate_hdr |
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188 | * indicates the presence of other extended state information supported |
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189 | * by the CPU and kernel: |
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5270 | serge | 190 | */ |
6082 | serge | 191 | struct _xstate { |
192 | struct _fpstate fpstate; |
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193 | struct _header xstate_hdr; |
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194 | struct _ymmh_state ymmh; |
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195 | /* New processor state extensions go here: */ |
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5270 | serge | 196 | }; |
197 | |||
6082 | serge | 198 | /* |
199 | * The 32-bit signal frame: |
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200 | */ |
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201 | struct sigcontext_32 { |
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202 | __u16 gs, __gsh; |
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203 | __u16 fs, __fsh; |
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204 | __u16 es, __esh; |
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205 | __u16 ds, __dsh; |
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206 | __u32 di; |
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207 | __u32 si; |
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208 | __u32 bp; |
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209 | __u32 sp; |
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210 | __u32 bx; |
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211 | __u32 dx; |
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212 | __u32 cx; |
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213 | __u32 ax; |
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214 | __u32 trapno; |
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215 | __u32 err; |
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216 | __u32 ip; |
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217 | __u16 cs, __csh; |
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218 | __u32 flags; |
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219 | __u32 sp_at_signal; |
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220 | __u16 ss, __ssh; |
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5270 | serge | 221 | |
6082 | serge | 222 | /* |
223 | * fpstate is really (struct _fpstate *) or (struct _xstate *) |
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224 | * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved |
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225 | * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end |
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226 | * of extended memory layout. See comments at the definition of |
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227 | * (struct _fpx_sw_bytes) |
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228 | */ |
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229 | __u32 fpstate; /* Zero when no FPU/extended context */ |
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230 | __u32 oldmask; |
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231 | __u32 cr2; |
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5270 | serge | 232 | }; |
233 | |||
6082 | serge | 234 | /* |
235 | * The 64-bit signal frame: |
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236 | */ |
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237 | struct sigcontext_64 { |
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238 | __u64 r8; |
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239 | __u64 r9; |
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240 | __u64 r10; |
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241 | __u64 r11; |
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242 | __u64 r12; |
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243 | __u64 r13; |
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244 | __u64 r14; |
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245 | __u64 r15; |
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246 | __u64 di; |
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247 | __u64 si; |
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248 | __u64 bp; |
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249 | __u64 bx; |
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250 | __u64 dx; |
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251 | __u64 ax; |
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252 | __u64 cx; |
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253 | __u64 sp; |
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254 | __u64 ip; |
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255 | __u64 flags; |
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256 | __u16 cs; |
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257 | __u16 gs; |
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258 | __u16 fs; |
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7143 | serge | 259 | __u16 ss; |
6082 | serge | 260 | __u64 err; |
261 | __u64 trapno; |
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262 | __u64 oldmask; |
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263 | __u64 cr2; |
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264 | |||
265 | /* |
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266 | * fpstate is really (struct _fpstate *) or (struct _xstate *) |
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267 | * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved |
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268 | * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end |
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269 | * of extended memory layout. See comments at the definition of |
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270 | * (struct _fpx_sw_bytes) |
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271 | */ |
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272 | __u64 fpstate; /* Zero when no FPU/extended context */ |
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273 | __u64 reserved1[8]; |
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5270 | serge | 274 | }; |
275 | |||
276 | /* |
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6082 | serge | 277 | * Create the real 'struct sigcontext' type: |
5270 | serge | 278 | */ |
6082 | serge | 279 | #ifdef __KERNEL__ |
280 | # ifdef __i386__ |
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281 | # define sigcontext sigcontext_32 |
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282 | # else |
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283 | # define sigcontext sigcontext_64 |
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284 | # endif |
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285 | #endif |
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286 | |||
287 | /* |
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288 | * The old user-space sigcontext definition, just in case user-space still |
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289 | * relies on it. The kernel definition (in asm/sigcontext.h) has unified |
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290 | * field names but otherwise the same layout. |
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291 | */ |
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292 | #ifndef __KERNEL__ |
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293 | |||
294 | #define _fpstate_ia32 _fpstate_32 |
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295 | #define sigcontext_ia32 sigcontext_32 |
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296 | |||
297 | |||
298 | # ifdef __i386__ |
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299 | struct sigcontext { |
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300 | __u16 gs, __gsh; |
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301 | __u16 fs, __fsh; |
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302 | __u16 es, __esh; |
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303 | __u16 ds, __dsh; |
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304 | __u32 edi; |
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305 | __u32 esi; |
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306 | __u32 ebp; |
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307 | __u32 esp; |
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308 | __u32 ebx; |
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309 | __u32 edx; |
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310 | __u32 ecx; |
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311 | __u32 eax; |
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312 | __u32 trapno; |
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313 | __u32 err; |
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314 | __u32 eip; |
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315 | __u16 cs, __csh; |
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316 | __u32 eflags; |
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317 | __u32 esp_at_signal; |
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318 | __u16 ss, __ssh; |
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319 | struct _fpstate __user *fpstate; |
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320 | __u32 oldmask; |
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321 | __u32 cr2; |
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5270 | serge | 322 | }; |
6082 | serge | 323 | # else /* __x86_64__: */ |
324 | struct sigcontext { |
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325 | __u64 r8; |
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326 | __u64 r9; |
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327 | __u64 r10; |
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328 | __u64 r11; |
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329 | __u64 r12; |
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330 | __u64 r13; |
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331 | __u64 r14; |
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332 | __u64 r15; |
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333 | __u64 rdi; |
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334 | __u64 rsi; |
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335 | __u64 rbp; |
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336 | __u64 rbx; |
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337 | __u64 rdx; |
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338 | __u64 rax; |
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339 | __u64 rcx; |
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340 | __u64 rsp; |
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341 | __u64 rip; |
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342 | __u64 eflags; /* RFLAGS */ |
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343 | __u16 cs; |
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7143 | serge | 344 | |
345 | /* |
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346 | * Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"), |
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347 | * Linux saved and restored fs and gs in these slots. This |
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348 | * was counterproductive, as fsbase and gsbase were never |
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349 | * saved, so arch_prctl was presumably unreliable. |
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350 | * |
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351 | * These slots should never be reused without extreme caution: |
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352 | * |
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353 | * - Some DOSEMU versions stash fs and gs in these slots manually, |
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354 | * thus overwriting anything the kernel expects to be preserved |
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355 | * in these slots. |
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356 | * |
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357 | * - If these slots are ever needed for any other purpose, |
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358 | * there is some risk that very old 64-bit binaries could get |
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359 | * confused. I doubt that many such binaries still work, |
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360 | * though, since the same patch in 2.5.64 also removed the |
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361 | * 64-bit set_thread_area syscall, so it appears that there |
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362 | * is no TLS API beyond modify_ldt that works in both pre- |
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363 | * and post-2.5.64 kernels. |
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364 | * |
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365 | * If the kernel ever adds explicit fs, gs, fsbase, and gsbase |
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366 | * save/restore, it will most likely need to be opt-in and use |
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367 | * different context slots. |
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368 | */ |
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6082 | serge | 369 | __u16 gs; |
370 | __u16 fs; |
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7143 | serge | 371 | union { |
372 | __u16 ss; /* If UC_SIGCONTEXT_SS */ |
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373 | __u16 __pad0; /* Alias name for old (!UC_SIGCONTEXT_SS) user-space */ |
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374 | }; |
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6082 | serge | 375 | __u64 err; |
376 | __u64 trapno; |
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377 | __u64 oldmask; |
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378 | __u64 cr2; |
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379 | struct _fpstate __user *fpstate; /* Zero when no FPU context */ |
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380 | # ifdef __ILP32__ |
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381 | __u32 __fpstate_pad; |
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382 | # endif |
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383 | __u64 reserved1[8]; |
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384 | }; |
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385 | # endif /* __x86_64__ */ |
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386 | #endif /* !__KERNEL__ */ |
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5270 | serge | 387 | |
388 | #endif /* _UAPI_ASM_X86_SIGCONTEXT_H */ |