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5270 | serge | 1 | /* Atomic operations usable in machine independent code */ |
2 | #ifndef _LINUX_ATOMIC_H |
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3 | #define _LINUX_ATOMIC_H |
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4 | #include |
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6082 | serge | 5 | #include |
5270 | serge | 6 | |
6082 | serge | 7 | /* |
8 | * Relaxed variants of xchg, cmpxchg and some atomic operations. |
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9 | * |
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10 | * We support four variants: |
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11 | * |
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12 | * - Fully ordered: The default implementation, no suffix required. |
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13 | * - Acquire: Provides ACQUIRE semantics, _acquire suffix. |
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14 | * - Release: Provides RELEASE semantics, _release suffix. |
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15 | * - Relaxed: No ordering guarantees, _relaxed suffix. |
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16 | * |
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17 | * For compound atomics performing both a load and a store, ACQUIRE |
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18 | * semantics apply only to the load and RELEASE semantics only to the |
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19 | * store portion of the operation. Note that a failed cmpxchg_acquire |
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20 | * does -not- imply any memory ordering constraints. |
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21 | * |
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22 | * See Documentation/memory-barriers.txt for ACQUIRE/RELEASE definitions. |
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23 | */ |
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24 | |||
25 | #ifndef atomic_read_acquire |
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26 | #define atomic_read_acquire(v) smp_load_acquire(&(v)->counter) |
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27 | #endif |
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28 | |||
29 | #ifndef atomic_set_release |
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30 | #define atomic_set_release(v, i) smp_store_release(&(v)->counter, (i)) |
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31 | #endif |
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32 | |||
33 | /* |
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34 | * The idea here is to build acquire/release variants by adding explicit |
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35 | * barriers on top of the relaxed variant. In the case where the relaxed |
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36 | * variant is already fully ordered, no additional barriers are needed. |
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37 | */ |
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38 | #define __atomic_op_acquire(op, args...) \ |
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39 | ({ \ |
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40 | typeof(op##_relaxed(args)) __ret = op##_relaxed(args); \ |
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41 | smp_mb__after_atomic(); \ |
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42 | __ret; \ |
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43 | }) |
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44 | |||
45 | #define __atomic_op_release(op, args...) \ |
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46 | ({ \ |
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47 | smp_mb__before_atomic(); \ |
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48 | op##_relaxed(args); \ |
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49 | }) |
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50 | |||
51 | #define __atomic_op_fence(op, args...) \ |
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52 | ({ \ |
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53 | typeof(op##_relaxed(args)) __ret; \ |
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54 | smp_mb__before_atomic(); \ |
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55 | __ret = op##_relaxed(args); \ |
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56 | smp_mb__after_atomic(); \ |
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57 | __ret; \ |
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58 | }) |
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59 | |||
60 | /* atomic_add_return_relaxed */ |
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61 | #ifndef atomic_add_return_relaxed |
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62 | #define atomic_add_return_relaxed atomic_add_return |
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63 | #define atomic_add_return_acquire atomic_add_return |
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64 | #define atomic_add_return_release atomic_add_return |
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65 | |||
66 | #else /* atomic_add_return_relaxed */ |
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67 | |||
68 | #ifndef atomic_add_return_acquire |
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69 | #define atomic_add_return_acquire(...) \ |
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70 | __atomic_op_acquire(atomic_add_return, __VA_ARGS__) |
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71 | #endif |
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72 | |||
73 | #ifndef atomic_add_return_release |
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74 | #define atomic_add_return_release(...) \ |
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75 | __atomic_op_release(atomic_add_return, __VA_ARGS__) |
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76 | #endif |
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77 | |||
78 | #ifndef atomic_add_return |
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79 | #define atomic_add_return(...) \ |
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80 | __atomic_op_fence(atomic_add_return, __VA_ARGS__) |
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81 | #endif |
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82 | #endif /* atomic_add_return_relaxed */ |
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83 | |||
84 | /* atomic_inc_return_relaxed */ |
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85 | #ifndef atomic_inc_return_relaxed |
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86 | #define atomic_inc_return_relaxed atomic_inc_return |
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87 | #define atomic_inc_return_acquire atomic_inc_return |
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88 | #define atomic_inc_return_release atomic_inc_return |
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89 | |||
90 | #else /* atomic_inc_return_relaxed */ |
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91 | |||
92 | #ifndef atomic_inc_return_acquire |
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93 | #define atomic_inc_return_acquire(...) \ |
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94 | __atomic_op_acquire(atomic_inc_return, __VA_ARGS__) |
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95 | #endif |
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96 | |||
97 | #ifndef atomic_inc_return_release |
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98 | #define atomic_inc_return_release(...) \ |
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99 | __atomic_op_release(atomic_inc_return, __VA_ARGS__) |
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100 | #endif |
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101 | |||
102 | #ifndef atomic_inc_return |
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103 | #define atomic_inc_return(...) \ |
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104 | __atomic_op_fence(atomic_inc_return, __VA_ARGS__) |
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105 | #endif |
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106 | #endif /* atomic_inc_return_relaxed */ |
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107 | |||
108 | /* atomic_sub_return_relaxed */ |
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109 | #ifndef atomic_sub_return_relaxed |
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110 | #define atomic_sub_return_relaxed atomic_sub_return |
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111 | #define atomic_sub_return_acquire atomic_sub_return |
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112 | #define atomic_sub_return_release atomic_sub_return |
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113 | |||
114 | #else /* atomic_sub_return_relaxed */ |
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115 | |||
116 | #ifndef atomic_sub_return_acquire |
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117 | #define atomic_sub_return_acquire(...) \ |
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118 | __atomic_op_acquire(atomic_sub_return, __VA_ARGS__) |
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119 | #endif |
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120 | |||
121 | #ifndef atomic_sub_return_release |
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122 | #define atomic_sub_return_release(...) \ |
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123 | __atomic_op_release(atomic_sub_return, __VA_ARGS__) |
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124 | #endif |
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125 | |||
126 | #ifndef atomic_sub_return |
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127 | #define atomic_sub_return(...) \ |
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128 | __atomic_op_fence(atomic_sub_return, __VA_ARGS__) |
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129 | #endif |
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130 | #endif /* atomic_sub_return_relaxed */ |
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131 | |||
132 | /* atomic_dec_return_relaxed */ |
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133 | #ifndef atomic_dec_return_relaxed |
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134 | #define atomic_dec_return_relaxed atomic_dec_return |
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135 | #define atomic_dec_return_acquire atomic_dec_return |
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136 | #define atomic_dec_return_release atomic_dec_return |
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137 | |||
138 | #else /* atomic_dec_return_relaxed */ |
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139 | |||
140 | #ifndef atomic_dec_return_acquire |
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141 | #define atomic_dec_return_acquire(...) \ |
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142 | __atomic_op_acquire(atomic_dec_return, __VA_ARGS__) |
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143 | #endif |
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144 | |||
145 | #ifndef atomic_dec_return_release |
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146 | #define atomic_dec_return_release(...) \ |
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147 | __atomic_op_release(atomic_dec_return, __VA_ARGS__) |
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148 | #endif |
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149 | |||
150 | #ifndef atomic_dec_return |
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151 | #define atomic_dec_return(...) \ |
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152 | __atomic_op_fence(atomic_dec_return, __VA_ARGS__) |
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153 | #endif |
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154 | #endif /* atomic_dec_return_relaxed */ |
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155 | |||
156 | /* atomic_xchg_relaxed */ |
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157 | #ifndef atomic_xchg_relaxed |
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158 | #define atomic_xchg_relaxed atomic_xchg |
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159 | #define atomic_xchg_acquire atomic_xchg |
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160 | #define atomic_xchg_release atomic_xchg |
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161 | |||
162 | #else /* atomic_xchg_relaxed */ |
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163 | |||
164 | #ifndef atomic_xchg_acquire |
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165 | #define atomic_xchg_acquire(...) \ |
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166 | __atomic_op_acquire(atomic_xchg, __VA_ARGS__) |
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167 | #endif |
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168 | |||
169 | #ifndef atomic_xchg_release |
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170 | #define atomic_xchg_release(...) \ |
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171 | __atomic_op_release(atomic_xchg, __VA_ARGS__) |
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172 | #endif |
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173 | |||
174 | #ifndef atomic_xchg |
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175 | #define atomic_xchg(...) \ |
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176 | __atomic_op_fence(atomic_xchg, __VA_ARGS__) |
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177 | #endif |
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178 | #endif /* atomic_xchg_relaxed */ |
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179 | |||
180 | /* atomic_cmpxchg_relaxed */ |
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181 | #ifndef atomic_cmpxchg_relaxed |
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182 | #define atomic_cmpxchg_relaxed atomic_cmpxchg |
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183 | #define atomic_cmpxchg_acquire atomic_cmpxchg |
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184 | #define atomic_cmpxchg_release atomic_cmpxchg |
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185 | |||
186 | #else /* atomic_cmpxchg_relaxed */ |
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187 | |||
188 | #ifndef atomic_cmpxchg_acquire |
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189 | #define atomic_cmpxchg_acquire(...) \ |
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190 | __atomic_op_acquire(atomic_cmpxchg, __VA_ARGS__) |
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191 | #endif |
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192 | |||
193 | #ifndef atomic_cmpxchg_release |
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194 | #define atomic_cmpxchg_release(...) \ |
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195 | __atomic_op_release(atomic_cmpxchg, __VA_ARGS__) |
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196 | #endif |
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197 | |||
198 | #ifndef atomic_cmpxchg |
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199 | #define atomic_cmpxchg(...) \ |
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200 | __atomic_op_fence(atomic_cmpxchg, __VA_ARGS__) |
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201 | #endif |
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202 | #endif /* atomic_cmpxchg_relaxed */ |
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203 | |||
204 | #ifndef atomic64_read_acquire |
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205 | #define atomic64_read_acquire(v) smp_load_acquire(&(v)->counter) |
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206 | #endif |
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207 | |||
208 | #ifndef atomic64_set_release |
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209 | #define atomic64_set_release(v, i) smp_store_release(&(v)->counter, (i)) |
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210 | #endif |
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211 | |||
212 | /* atomic64_add_return_relaxed */ |
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213 | #ifndef atomic64_add_return_relaxed |
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214 | #define atomic64_add_return_relaxed atomic64_add_return |
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215 | #define atomic64_add_return_acquire atomic64_add_return |
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216 | #define atomic64_add_return_release atomic64_add_return |
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217 | |||
218 | #else /* atomic64_add_return_relaxed */ |
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219 | |||
220 | #ifndef atomic64_add_return_acquire |
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221 | #define atomic64_add_return_acquire(...) \ |
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222 | __atomic_op_acquire(atomic64_add_return, __VA_ARGS__) |
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223 | #endif |
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224 | |||
225 | #ifndef atomic64_add_return_release |
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226 | #define atomic64_add_return_release(...) \ |
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227 | __atomic_op_release(atomic64_add_return, __VA_ARGS__) |
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228 | #endif |
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229 | |||
230 | #ifndef atomic64_add_return |
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231 | #define atomic64_add_return(...) \ |
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232 | __atomic_op_fence(atomic64_add_return, __VA_ARGS__) |
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233 | #endif |
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234 | #endif /* atomic64_add_return_relaxed */ |
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235 | |||
236 | /* atomic64_inc_return_relaxed */ |
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237 | #ifndef atomic64_inc_return_relaxed |
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238 | #define atomic64_inc_return_relaxed atomic64_inc_return |
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239 | #define atomic64_inc_return_acquire atomic64_inc_return |
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240 | #define atomic64_inc_return_release atomic64_inc_return |
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241 | |||
242 | #else /* atomic64_inc_return_relaxed */ |
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243 | |||
244 | #ifndef atomic64_inc_return_acquire |
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245 | #define atomic64_inc_return_acquire(...) \ |
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246 | __atomic_op_acquire(atomic64_inc_return, __VA_ARGS__) |
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247 | #endif |
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248 | |||
249 | #ifndef atomic64_inc_return_release |
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250 | #define atomic64_inc_return_release(...) \ |
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251 | __atomic_op_release(atomic64_inc_return, __VA_ARGS__) |
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252 | #endif |
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253 | |||
254 | #ifndef atomic64_inc_return |
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255 | #define atomic64_inc_return(...) \ |
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256 | __atomic_op_fence(atomic64_inc_return, __VA_ARGS__) |
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257 | #endif |
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258 | #endif /* atomic64_inc_return_relaxed */ |
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259 | |||
260 | |||
261 | /* atomic64_sub_return_relaxed */ |
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262 | #ifndef atomic64_sub_return_relaxed |
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263 | #define atomic64_sub_return_relaxed atomic64_sub_return |
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264 | #define atomic64_sub_return_acquire atomic64_sub_return |
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265 | #define atomic64_sub_return_release atomic64_sub_return |
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266 | |||
267 | #else /* atomic64_sub_return_relaxed */ |
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268 | |||
269 | #ifndef atomic64_sub_return_acquire |
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270 | #define atomic64_sub_return_acquire(...) \ |
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271 | __atomic_op_acquire(atomic64_sub_return, __VA_ARGS__) |
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272 | #endif |
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273 | |||
274 | #ifndef atomic64_sub_return_release |
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275 | #define atomic64_sub_return_release(...) \ |
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276 | __atomic_op_release(atomic64_sub_return, __VA_ARGS__) |
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277 | #endif |
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278 | |||
279 | #ifndef atomic64_sub_return |
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280 | #define atomic64_sub_return(...) \ |
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281 | __atomic_op_fence(atomic64_sub_return, __VA_ARGS__) |
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282 | #endif |
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283 | #endif /* atomic64_sub_return_relaxed */ |
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284 | |||
285 | /* atomic64_dec_return_relaxed */ |
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286 | #ifndef atomic64_dec_return_relaxed |
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287 | #define atomic64_dec_return_relaxed atomic64_dec_return |
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288 | #define atomic64_dec_return_acquire atomic64_dec_return |
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289 | #define atomic64_dec_return_release atomic64_dec_return |
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290 | |||
291 | #else /* atomic64_dec_return_relaxed */ |
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292 | |||
293 | #ifndef atomic64_dec_return_acquire |
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294 | #define atomic64_dec_return_acquire(...) \ |
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295 | __atomic_op_acquire(atomic64_dec_return, __VA_ARGS__) |
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296 | #endif |
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297 | |||
298 | #ifndef atomic64_dec_return_release |
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299 | #define atomic64_dec_return_release(...) \ |
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300 | __atomic_op_release(atomic64_dec_return, __VA_ARGS__) |
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301 | #endif |
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302 | |||
303 | #ifndef atomic64_dec_return |
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304 | #define atomic64_dec_return(...) \ |
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305 | __atomic_op_fence(atomic64_dec_return, __VA_ARGS__) |
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306 | #endif |
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307 | #endif /* atomic64_dec_return_relaxed */ |
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308 | |||
309 | /* atomic64_xchg_relaxed */ |
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310 | #ifndef atomic64_xchg_relaxed |
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311 | #define atomic64_xchg_relaxed atomic64_xchg |
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312 | #define atomic64_xchg_acquire atomic64_xchg |
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313 | #define atomic64_xchg_release atomic64_xchg |
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314 | |||
315 | #else /* atomic64_xchg_relaxed */ |
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316 | |||
317 | #ifndef atomic64_xchg_acquire |
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318 | #define atomic64_xchg_acquire(...) \ |
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319 | __atomic_op_acquire(atomic64_xchg, __VA_ARGS__) |
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320 | #endif |
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321 | |||
322 | #ifndef atomic64_xchg_release |
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323 | #define atomic64_xchg_release(...) \ |
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324 | __atomic_op_release(atomic64_xchg, __VA_ARGS__) |
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325 | #endif |
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326 | |||
327 | #ifndef atomic64_xchg |
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328 | #define atomic64_xchg(...) \ |
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329 | __atomic_op_fence(atomic64_xchg, __VA_ARGS__) |
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330 | #endif |
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331 | #endif /* atomic64_xchg_relaxed */ |
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332 | |||
333 | /* atomic64_cmpxchg_relaxed */ |
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334 | #ifndef atomic64_cmpxchg_relaxed |
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335 | #define atomic64_cmpxchg_relaxed atomic64_cmpxchg |
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336 | #define atomic64_cmpxchg_acquire atomic64_cmpxchg |
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337 | #define atomic64_cmpxchg_release atomic64_cmpxchg |
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338 | |||
339 | #else /* atomic64_cmpxchg_relaxed */ |
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340 | |||
341 | #ifndef atomic64_cmpxchg_acquire |
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342 | #define atomic64_cmpxchg_acquire(...) \ |
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343 | __atomic_op_acquire(atomic64_cmpxchg, __VA_ARGS__) |
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344 | #endif |
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345 | |||
346 | #ifndef atomic64_cmpxchg_release |
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347 | #define atomic64_cmpxchg_release(...) \ |
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348 | __atomic_op_release(atomic64_cmpxchg, __VA_ARGS__) |
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349 | #endif |
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350 | |||
351 | #ifndef atomic64_cmpxchg |
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352 | #define atomic64_cmpxchg(...) \ |
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353 | __atomic_op_fence(atomic64_cmpxchg, __VA_ARGS__) |
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354 | #endif |
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355 | #endif /* atomic64_cmpxchg_relaxed */ |
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356 | |||
357 | /* cmpxchg_relaxed */ |
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358 | #ifndef cmpxchg_relaxed |
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359 | #define cmpxchg_relaxed cmpxchg |
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360 | #define cmpxchg_acquire cmpxchg |
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361 | #define cmpxchg_release cmpxchg |
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362 | |||
363 | #else /* cmpxchg_relaxed */ |
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364 | |||
365 | #ifndef cmpxchg_acquire |
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366 | #define cmpxchg_acquire(...) \ |
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367 | __atomic_op_acquire(cmpxchg, __VA_ARGS__) |
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368 | #endif |
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369 | |||
370 | #ifndef cmpxchg_release |
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371 | #define cmpxchg_release(...) \ |
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372 | __atomic_op_release(cmpxchg, __VA_ARGS__) |
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373 | #endif |
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374 | |||
375 | #ifndef cmpxchg |
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376 | #define cmpxchg(...) \ |
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377 | __atomic_op_fence(cmpxchg, __VA_ARGS__) |
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378 | #endif |
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379 | #endif /* cmpxchg_relaxed */ |
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380 | |||
381 | /* cmpxchg64_relaxed */ |
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382 | #ifndef cmpxchg64_relaxed |
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383 | #define cmpxchg64_relaxed cmpxchg64 |
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384 | #define cmpxchg64_acquire cmpxchg64 |
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385 | #define cmpxchg64_release cmpxchg64 |
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386 | |||
387 | #else /* cmpxchg64_relaxed */ |
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388 | |||
389 | #ifndef cmpxchg64_acquire |
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390 | #define cmpxchg64_acquire(...) \ |
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391 | __atomic_op_acquire(cmpxchg64, __VA_ARGS__) |
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392 | #endif |
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393 | |||
394 | #ifndef cmpxchg64_release |
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395 | #define cmpxchg64_release(...) \ |
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396 | __atomic_op_release(cmpxchg64, __VA_ARGS__) |
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397 | #endif |
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398 | |||
399 | #ifndef cmpxchg64 |
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400 | #define cmpxchg64(...) \ |
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401 | __atomic_op_fence(cmpxchg64, __VA_ARGS__) |
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402 | #endif |
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403 | #endif /* cmpxchg64_relaxed */ |
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404 | |||
405 | /* xchg_relaxed */ |
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406 | #ifndef xchg_relaxed |
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407 | #define xchg_relaxed xchg |
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408 | #define xchg_acquire xchg |
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409 | #define xchg_release xchg |
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410 | |||
411 | #else /* xchg_relaxed */ |
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412 | |||
413 | #ifndef xchg_acquire |
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414 | #define xchg_acquire(...) __atomic_op_acquire(xchg, __VA_ARGS__) |
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415 | #endif |
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416 | |||
417 | #ifndef xchg_release |
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418 | #define xchg_release(...) __atomic_op_release(xchg, __VA_ARGS__) |
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419 | #endif |
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420 | |||
421 | #ifndef xchg |
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422 | #define xchg(...) __atomic_op_fence(xchg, __VA_ARGS__) |
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423 | #endif |
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424 | #endif /* xchg_relaxed */ |
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425 | |||
5270 | serge | 426 | /** |
427 | * atomic_add_unless - add unless the number is already a given value |
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428 | * @v: pointer of type atomic_t |
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429 | * @a: the amount to add to v... |
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430 | * @u: ...unless v is equal to u. |
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431 | * |
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432 | * Atomically adds @a to @v, so long as @v was not already @u. |
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433 | * Returns non-zero if @v was not @u, and zero otherwise. |
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434 | */ |
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435 | static inline int atomic_add_unless(atomic_t *v, int a, int u) |
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436 | { |
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437 | return __atomic_add_unless(v, a, u) != u; |
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438 | } |
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439 | |||
440 | /** |
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441 | * atomic_inc_not_zero - increment unless the number is zero |
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442 | * @v: pointer of type atomic_t |
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443 | * |
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444 | * Atomically increments @v by 1, so long as @v is non-zero. |
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445 | * Returns non-zero if @v was non-zero, and zero otherwise. |
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446 | */ |
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447 | #ifndef atomic_inc_not_zero |
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448 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) |
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449 | #endif |
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450 | |||
6082 | serge | 451 | #ifndef atomic_andnot |
452 | static inline void atomic_andnot(int i, atomic_t *v) |
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453 | { |
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454 | atomic_and(~i, v); |
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455 | } |
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456 | #endif |
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457 | |||
458 | static inline __deprecated void atomic_clear_mask(unsigned int mask, atomic_t *v) |
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459 | { |
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460 | atomic_andnot(mask, v); |
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461 | } |
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462 | |||
463 | static inline __deprecated void atomic_set_mask(unsigned int mask, atomic_t *v) |
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464 | { |
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465 | atomic_or(mask, v); |
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466 | } |
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467 | |||
5270 | serge | 468 | /** |
469 | * atomic_inc_not_zero_hint - increment if not null |
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470 | * @v: pointer of type atomic_t |
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471 | * @hint: probable value of the atomic before the increment |
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472 | * |
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473 | * This version of atomic_inc_not_zero() gives a hint of probable |
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474 | * value of the atomic. This helps processor to not read the memory |
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475 | * before doing the atomic read/modify/write cycle, lowering |
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476 | * number of bus transactions on some arches. |
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477 | * |
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478 | * Returns: 0 if increment was not done, 1 otherwise. |
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479 | */ |
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480 | #ifndef atomic_inc_not_zero_hint |
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481 | static inline int atomic_inc_not_zero_hint(atomic_t *v, int hint) |
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482 | { |
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483 | int val, c = hint; |
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484 | |||
485 | /* sanity test, should be removed by compiler if hint is a constant */ |
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486 | if (!hint) |
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487 | return atomic_inc_not_zero(v); |
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488 | |||
489 | do { |
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490 | val = atomic_cmpxchg(v, c, c + 1); |
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491 | if (val == c) |
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492 | return 1; |
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493 | c = val; |
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494 | } while (c); |
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495 | |||
496 | return 0; |
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497 | } |
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498 | #endif |
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499 | |||
500 | #ifndef atomic_inc_unless_negative |
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501 | static inline int atomic_inc_unless_negative(atomic_t *p) |
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502 | { |
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503 | int v, v1; |
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504 | for (v = 0; v >= 0; v = v1) { |
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505 | v1 = atomic_cmpxchg(p, v, v + 1); |
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506 | if (likely(v1 == v)) |
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507 | return 1; |
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508 | } |
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509 | return 0; |
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510 | } |
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511 | #endif |
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512 | |||
513 | #ifndef atomic_dec_unless_positive |
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514 | static inline int atomic_dec_unless_positive(atomic_t *p) |
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515 | { |
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516 | int v, v1; |
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517 | for (v = 0; v <= 0; v = v1) { |
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518 | v1 = atomic_cmpxchg(p, v, v - 1); |
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519 | if (likely(v1 == v)) |
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520 | return 1; |
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521 | } |
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522 | return 0; |
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523 | } |
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524 | #endif |
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525 | |||
526 | /* |
||
527 | * atomic_dec_if_positive - decrement by 1 if old value positive |
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528 | * @v: pointer of type atomic_t |
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529 | * |
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530 | * The function returns the old value of *v minus 1, even if |
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531 | * the atomic variable, v, was not decremented. |
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532 | */ |
||
533 | #ifndef atomic_dec_if_positive |
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534 | static inline int atomic_dec_if_positive(atomic_t *v) |
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535 | { |
||
536 | int c, old, dec; |
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537 | c = atomic_read(v); |
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538 | for (;;) { |
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539 | dec = c - 1; |
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540 | if (unlikely(dec < 0)) |
||
541 | break; |
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542 | old = atomic_cmpxchg((v), c, dec); |
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543 | if (likely(old == c)) |
||
544 | break; |
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545 | c = old; |
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546 | } |
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547 | return dec; |
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548 | } |
||
549 | #endif |
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550 | |||
6082 | serge | 551 | #ifdef CONFIG_GENERIC_ATOMIC64 |
552 | #include |
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553 | #endif |
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554 | |||
555 | #ifndef atomic64_andnot |
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556 | static inline void atomic64_andnot(long long i, atomic64_t *v) |
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5270 | serge | 557 | { |
6082 | serge | 558 | atomic64_and(~i, v); |
5270 | serge | 559 | } |
6082 | serge | 560 | #endif |
5270 | serge | 561 | |
562 | #include |
||
6082 | serge | 563 | |
5270 | serge | 564 | #endif /* _LINUX_ATOMIC_H */>=> |