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1408 | serge | 1 | #ifndef _ASM_X86_ALTERNATIVE_H |
2 | #define _ASM_X86_ALTERNATIVE_H |
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3 | |||
4 | #include |
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5 | #include |
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6 | #include |
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7 | #include |
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8 | |||
9 | /* |
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10 | * Alternative inline assembly for SMP. |
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11 | * |
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12 | * The LOCK_PREFIX macro defined here replaces the LOCK and |
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13 | * LOCK_PREFIX macros used everywhere in the source tree. |
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14 | * |
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15 | * SMP alternatives use the same data structures as the other |
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16 | * alternatives and the X86_FEATURE_UP flag to indicate the case of a |
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17 | * UP system running a SMP kernel. The existing apply_alternatives() |
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18 | * works fine for patching a SMP kernel for UP. |
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19 | * |
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20 | * The SMP alternative tables can be kept after boot and contain both |
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21 | * UP and SMP versions of the instructions to allow switching back to |
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22 | * SMP at runtime, when hotplugging in a new CPU, which is especially |
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23 | * useful in virtualized environments. |
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24 | * |
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25 | * The very common lock prefix is handled as special case in a |
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26 | * separate table which is a pure address list without replacement ptr |
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27 | * and size information. That keeps the table sizes small. |
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28 | */ |
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29 | |||
30 | #ifdef CONFIG_SMP |
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31 | #define LOCK_PREFIX \ |
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32 | ".section .smp_locks,\"a\"\n" \ |
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33 | _ASM_ALIGN "\n" \ |
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34 | _ASM_PTR "661f\n" /* address */ \ |
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35 | ".previous\n" \ |
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36 | "661:\n\tlock; " |
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37 | |||
38 | #else /* ! CONFIG_SMP */ |
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39 | #define LOCK_PREFIX "" |
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40 | #endif |
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41 | |||
42 | /* This must be included *after* the definition of LOCK_PREFIX */ |
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43 | #include |
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44 | |||
45 | struct alt_instr { |
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46 | u8 *instr; /* original instruction */ |
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47 | u8 *replacement; |
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48 | u8 cpuid; /* cpuid bit set for replacement */ |
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49 | u8 instrlen; /* length of original instruction */ |
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50 | u8 replacementlen; /* length of new instruction, <= instrlen */ |
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51 | u8 pad1; |
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52 | #ifdef CONFIG_X86_64 |
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53 | u32 pad2; |
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54 | #endif |
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55 | }; |
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56 | |||
57 | extern void alternative_instructions(void); |
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58 | extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end); |
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59 | |||
60 | struct module; |
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61 | |||
62 | #ifdef CONFIG_SMP |
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63 | extern void alternatives_smp_module_add(struct module *mod, char *name, |
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64 | void *locks, void *locks_end, |
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65 | void *text, void *text_end); |
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66 | extern void alternatives_smp_module_del(struct module *mod); |
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67 | extern void alternatives_smp_switch(int smp); |
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68 | #else |
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69 | static inline void alternatives_smp_module_add(struct module *mod, char *name, |
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70 | void *locks, void *locks_end, |
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71 | void *text, void *text_end) {} |
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72 | static inline void alternatives_smp_module_del(struct module *mod) {} |
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73 | static inline void alternatives_smp_switch(int smp) {} |
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74 | #endif /* CONFIG_SMP */ |
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75 | |||
76 | /* alternative assembly primitive: */ |
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77 | #define ALTERNATIVE(oldinstr, newinstr, feature) \ |
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78 | \ |
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79 | "661:\n\t" oldinstr "\n662:\n" \ |
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80 | ".section .altinstructions,\"a\"\n" \ |
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81 | _ASM_ALIGN "\n" \ |
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82 | _ASM_PTR "661b\n" /* label */ \ |
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83 | _ASM_PTR "663f\n" /* new instruction */ \ |
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84 | " .byte " __stringify(feature) "\n" /* feature bit */ \ |
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85 | " .byte 662b-661b\n" /* sourcelen */ \ |
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86 | " .byte 664f-663f\n" /* replacementlen */ \ |
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87 | " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \ |
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88 | ".previous\n" \ |
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89 | ".section .altinstr_replacement, \"ax\"\n" \ |
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90 | "663:\n\t" newinstr "\n664:\n" /* replacement */ \ |
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91 | ".previous" |
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92 | |||
93 | /* |
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94 | * Alternative instructions for different CPU types or capabilities. |
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95 | * |
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96 | * This allows to use optimized instructions even on generic binary |
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97 | * kernels. |
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98 | * |
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99 | * length of oldinstr must be longer or equal the length of newinstr |
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100 | * It can be padded with nops as needed. |
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101 | * |
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102 | * For non barrier like inlines please define new variants |
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103 | * without volatile and memory clobber. |
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104 | */ |
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105 | #define alternative(oldinstr, newinstr, feature) \ |
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106 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory") |
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107 | |||
108 | /* |
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109 | * Alternative inline assembly with input. |
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110 | * |
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111 | * Pecularities: |
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112 | * No memory clobber here. |
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113 | * Argument numbers start with 1. |
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114 | * Best is to use constraints that are fixed size (like (%1) ... "r") |
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115 | * If you use variable sized constraints like "m" or "g" in the |
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116 | * replacement make sure to pad to the worst case length. |
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117 | * Leaving an unused argument 0 to keep API compatibility. |
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118 | */ |
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119 | #define alternative_input(oldinstr, newinstr, feature, input...) \ |
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120 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ |
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121 | : : "i" (0), ## input) |
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122 | |||
123 | /* Like alternative_input, but with a single output argument */ |
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124 | #define alternative_io(oldinstr, newinstr, feature, output, input...) \ |
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125 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ |
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126 | : output : "i" (0), ## input) |
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127 | |||
128 | /* |
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129 | * use this macro(s) if you need more than one output parameter |
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130 | * in alternative_io |
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131 | */ |
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3031 | serge | 132 | #define ASM_OUTPUT2(a) a |
1408 | serge | 133 | |
134 | struct paravirt_patch_site; |
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135 | #ifdef CONFIG_PARAVIRT |
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136 | void apply_paravirt(struct paravirt_patch_site *start, |
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137 | struct paravirt_patch_site *end); |
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138 | #else |
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139 | static inline void apply_paravirt(struct paravirt_patch_site *start, |
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140 | struct paravirt_patch_site *end) |
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141 | {} |
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142 | #define __parainstructions NULL |
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143 | #define __parainstructions_end NULL |
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144 | #endif |
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145 | |||
146 | /* |
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147 | * Clear and restore the kernel write-protection flag on the local CPU. |
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148 | * Allows the kernel to edit read-only pages. |
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149 | * Side-effect: any interrupt handler running between save and restore will have |
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150 | * the ability to write to read-only pages. |
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151 | * |
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152 | * Warning: |
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153 | * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and |
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154 | * no thread can be preempted in the instructions being modified (no iret to an |
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155 | * invalid instruction possible) or if the instructions are changed from a |
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156 | * consistent state to another consistent state atomically. |
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157 | * More care must be taken when modifying code in the SMP case because of |
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158 | * Intel's errata. |
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159 | * On the local CPU you need to be protected again NMI or MCE handlers seeing an |
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160 | * inconsistent instruction while you patch. |
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161 | */ |
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162 | extern void *text_poke(void *addr, const void *opcode, size_t len); |
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163 | |||
164 | #endif /* _ASM_X86_ALTERNATIVE_H */=>=> |