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Rev | Author | Line No. | Line |
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3031 | serge | 1 | /* |
2 | * Copyright (c) 2007 Dave Airlie |
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3 | * Copyright (c) 2007 Jakob Bornecrantz |
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4 | * Copyright (c) 2008 Red Hat Inc. |
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5 | * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA |
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6 | * Copyright (c) 2007-2008 Intel Corporation |
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7 | * |
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8 | * Permission is hereby granted, free of charge, to any person obtaining a |
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9 | * copy of this software and associated documentation files (the "Software"), |
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10 | * to deal in the Software without restriction, including without limitation |
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11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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12 | * and/or sell copies of the Software, and to permit persons to whom the |
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13 | * Software is furnished to do so, subject to the following conditions: |
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14 | * |
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15 | * The above copyright notice and this permission notice shall be included in |
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16 | * all copies or substantial portions of the Software. |
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17 | * |
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18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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21 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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23 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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24 | * IN THE SOFTWARE. |
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25 | */ |
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26 | |||
27 | #ifndef _DRM_MODE_H |
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28 | #define _DRM_MODE_H |
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29 | |||
30 | #include |
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31 | |||
32 | #define DRM_DISPLAY_INFO_LEN 32 |
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33 | #define DRM_CONNECTOR_NAME_LEN 32 |
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34 | #define DRM_DISPLAY_MODE_LEN 32 |
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35 | #define DRM_PROP_NAME_LEN 32 |
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36 | |||
37 | #define DRM_MODE_TYPE_BUILTIN (1<<0) |
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38 | #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) |
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39 | #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) |
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40 | #define DRM_MODE_TYPE_PREFERRED (1<<3) |
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41 | #define DRM_MODE_TYPE_DEFAULT (1<<4) |
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42 | #define DRM_MODE_TYPE_USERDEF (1<<5) |
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43 | #define DRM_MODE_TYPE_DRIVER (1<<6) |
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44 | |||
45 | /* Video mode flags */ |
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46 | /* bit compatible with the xorg definitions. */ |
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47 | #define DRM_MODE_FLAG_PHSYNC (1<<0) |
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48 | #define DRM_MODE_FLAG_NHSYNC (1<<1) |
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49 | #define DRM_MODE_FLAG_PVSYNC (1<<2) |
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50 | #define DRM_MODE_FLAG_NVSYNC (1<<3) |
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51 | #define DRM_MODE_FLAG_INTERLACE (1<<4) |
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52 | #define DRM_MODE_FLAG_DBLSCAN (1<<5) |
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53 | #define DRM_MODE_FLAG_CSYNC (1<<6) |
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54 | #define DRM_MODE_FLAG_PCSYNC (1<<7) |
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55 | #define DRM_MODE_FLAG_NCSYNC (1<<8) |
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56 | #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ |
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57 | #define DRM_MODE_FLAG_BCAST (1<<10) |
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58 | #define DRM_MODE_FLAG_PIXMUX (1<<11) |
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59 | #define DRM_MODE_FLAG_DBLCLK (1<<12) |
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60 | #define DRM_MODE_FLAG_CLKDIV2 (1<<13) |
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61 | |||
62 | /* DPMS flags */ |
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63 | /* bit compatible with the xorg definitions. */ |
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64 | #define DRM_MODE_DPMS_ON 0 |
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65 | #define DRM_MODE_DPMS_STANDBY 1 |
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66 | #define DRM_MODE_DPMS_SUSPEND 2 |
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67 | #define DRM_MODE_DPMS_OFF 3 |
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68 | |||
69 | /* Scaling mode options */ |
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70 | #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or |
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71 | software can still scale) */ |
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72 | #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ |
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73 | #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ |
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74 | #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ |
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75 | |||
76 | /* Dithering mode options */ |
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77 | #define DRM_MODE_DITHERING_OFF 0 |
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78 | #define DRM_MODE_DITHERING_ON 1 |
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79 | #define DRM_MODE_DITHERING_AUTO 2 |
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80 | |||
81 | /* Dirty info options */ |
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82 | #define DRM_MODE_DIRTY_OFF 0 |
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83 | #define DRM_MODE_DIRTY_ON 1 |
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84 | #define DRM_MODE_DIRTY_ANNOTATE 2 |
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85 | |||
86 | struct drm_mode_modeinfo { |
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87 | __u32 clock; |
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88 | __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; |
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89 | __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; |
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90 | |||
91 | __u32 vrefresh; |
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92 | |||
93 | __u32 flags; |
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94 | __u32 type; |
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95 | char name[DRM_DISPLAY_MODE_LEN]; |
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96 | }; |
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97 | |||
98 | struct drm_mode_card_res { |
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99 | __u64 fb_id_ptr; |
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100 | __u64 crtc_id_ptr; |
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101 | __u64 connector_id_ptr; |
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102 | __u64 encoder_id_ptr; |
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103 | __u32 count_fbs; |
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104 | __u32 count_crtcs; |
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105 | __u32 count_connectors; |
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106 | __u32 count_encoders; |
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107 | __u32 min_width, max_width; |
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108 | __u32 min_height, max_height; |
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109 | }; |
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110 | |||
111 | struct drm_mode_crtc { |
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112 | __u64 set_connectors_ptr; |
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113 | __u32 count_connectors; |
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114 | |||
115 | __u32 crtc_id; /**< Id */ |
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116 | __u32 fb_id; /**< Id of framebuffer */ |
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117 | |||
118 | __u32 x, y; /**< Position on the frameuffer */ |
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119 | |||
120 | __u32 gamma_size; |
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121 | __u32 mode_valid; |
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122 | struct drm_mode_modeinfo mode; |
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123 | }; |
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124 | |||
125 | #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) |
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126 | #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) |
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127 | |||
128 | /* Planes blend with or override other bits on the CRTC */ |
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129 | struct drm_mode_set_plane { |
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130 | __u32 plane_id; |
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131 | __u32 crtc_id; |
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132 | __u32 fb_id; /* fb object contains surface format type */ |
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133 | __u32 flags; /* see above flags */ |
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134 | |||
135 | /* Signed dest location allows it to be partially off screen */ |
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136 | __s32 crtc_x, crtc_y; |
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137 | __u32 crtc_w, crtc_h; |
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138 | |||
139 | /* Source values are 16.16 fixed point */ |
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140 | __u32 src_x, src_y; |
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141 | __u32 src_h, src_w; |
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142 | }; |
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143 | |||
144 | struct drm_mode_get_plane { |
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145 | __u32 plane_id; |
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146 | |||
147 | __u32 crtc_id; |
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148 | __u32 fb_id; |
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149 | |||
150 | __u32 possible_crtcs; |
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151 | __u32 gamma_size; |
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152 | |||
153 | __u32 count_format_types; |
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154 | __u64 format_type_ptr; |
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155 | }; |
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156 | |||
157 | struct drm_mode_get_plane_res { |
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158 | __u64 plane_id_ptr; |
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159 | __u32 count_planes; |
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160 | }; |
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161 | |||
162 | #define DRM_MODE_ENCODER_NONE 0 |
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163 | #define DRM_MODE_ENCODER_DAC 1 |
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164 | #define DRM_MODE_ENCODER_TMDS 2 |
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165 | #define DRM_MODE_ENCODER_LVDS 3 |
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166 | #define DRM_MODE_ENCODER_TVDAC 4 |
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167 | #define DRM_MODE_ENCODER_VIRTUAL 5 |
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168 | |||
169 | struct drm_mode_get_encoder { |
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170 | __u32 encoder_id; |
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171 | __u32 encoder_type; |
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172 | |||
173 | __u32 crtc_id; /**< Id of crtc */ |
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174 | |||
175 | __u32 possible_crtcs; |
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176 | __u32 possible_clones; |
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177 | }; |
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178 | |||
179 | /* This is for connectors with multiple signal types. */ |
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180 | /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ |
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181 | #define DRM_MODE_SUBCONNECTOR_Automatic 0 |
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182 | #define DRM_MODE_SUBCONNECTOR_Unknown 0 |
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183 | #define DRM_MODE_SUBCONNECTOR_DVID 3 |
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184 | #define DRM_MODE_SUBCONNECTOR_DVIA 4 |
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185 | #define DRM_MODE_SUBCONNECTOR_Composite 5 |
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186 | #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 |
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187 | #define DRM_MODE_SUBCONNECTOR_Component 8 |
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188 | #define DRM_MODE_SUBCONNECTOR_SCART 9 |
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189 | |||
190 | #define DRM_MODE_CONNECTOR_Unknown 0 |
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191 | #define DRM_MODE_CONNECTOR_VGA 1 |
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192 | #define DRM_MODE_CONNECTOR_DVII 2 |
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193 | #define DRM_MODE_CONNECTOR_DVID 3 |
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194 | #define DRM_MODE_CONNECTOR_DVIA 4 |
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195 | #define DRM_MODE_CONNECTOR_Composite 5 |
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196 | #define DRM_MODE_CONNECTOR_SVIDEO 6 |
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197 | #define DRM_MODE_CONNECTOR_LVDS 7 |
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198 | #define DRM_MODE_CONNECTOR_Component 8 |
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199 | #define DRM_MODE_CONNECTOR_9PinDIN 9 |
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200 | #define DRM_MODE_CONNECTOR_DisplayPort 10 |
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201 | #define DRM_MODE_CONNECTOR_HDMIA 11 |
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202 | #define DRM_MODE_CONNECTOR_HDMIB 12 |
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203 | #define DRM_MODE_CONNECTOR_TV 13 |
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204 | #define DRM_MODE_CONNECTOR_eDP 14 |
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205 | #define DRM_MODE_CONNECTOR_VIRTUAL 15 |
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206 | |||
207 | struct drm_mode_get_connector { |
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208 | |||
209 | __u64 encoders_ptr; |
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210 | __u64 modes_ptr; |
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211 | __u64 props_ptr; |
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212 | __u64 prop_values_ptr; |
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213 | |||
214 | __u32 count_modes; |
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215 | __u32 count_props; |
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216 | __u32 count_encoders; |
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217 | |||
218 | __u32 encoder_id; /**< Current Encoder */ |
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219 | __u32 connector_id; /**< Id */ |
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220 | __u32 connector_type; |
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221 | __u32 connector_type_id; |
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222 | |||
223 | __u32 connection; |
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224 | __u32 mm_width, mm_height; /**< HxW in millimeters */ |
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225 | __u32 subpixel; |
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226 | }; |
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227 | |||
228 | #define DRM_MODE_PROP_PENDING (1<<0) |
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229 | #define DRM_MODE_PROP_RANGE (1<<1) |
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230 | #define DRM_MODE_PROP_IMMUTABLE (1<<2) |
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231 | #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ |
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232 | #define DRM_MODE_PROP_BLOB (1<<4) |
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233 | #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ |
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234 | |||
235 | struct drm_mode_property_enum { |
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236 | __u64 value; |
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237 | char name[DRM_PROP_NAME_LEN]; |
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238 | }; |
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239 | |||
240 | struct drm_mode_get_property { |
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241 | __u64 values_ptr; /* values and blob lengths */ |
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242 | __u64 enum_blob_ptr; /* enum and blob id ptrs */ |
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243 | |||
244 | __u32 prop_id; |
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245 | __u32 flags; |
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246 | char name[DRM_PROP_NAME_LEN]; |
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247 | |||
248 | __u32 count_values; |
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249 | __u32 count_enum_blobs; |
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250 | }; |
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251 | |||
252 | struct drm_mode_connector_set_property { |
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253 | __u64 value; |
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254 | __u32 prop_id; |
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255 | __u32 connector_id; |
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256 | }; |
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257 | |||
258 | struct drm_mode_obj_get_properties { |
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259 | __u64 props_ptr; |
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260 | __u64 prop_values_ptr; |
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261 | __u32 count_props; |
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262 | __u32 obj_id; |
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263 | __u32 obj_type; |
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264 | }; |
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265 | |||
266 | struct drm_mode_obj_set_property { |
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267 | __u64 value; |
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268 | __u32 prop_id; |
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269 | __u32 obj_id; |
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270 | __u32 obj_type; |
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271 | }; |
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272 | |||
273 | struct drm_mode_get_blob { |
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274 | __u32 blob_id; |
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275 | __u32 length; |
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276 | __u64 data; |
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277 | }; |
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278 | |||
279 | struct drm_mode_fb_cmd { |
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280 | __u32 fb_id; |
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281 | __u32 width, height; |
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282 | __u32 pitch; |
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283 | __u32 bpp; |
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284 | __u32 depth; |
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285 | /* driver specific handle */ |
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286 | __u32 handle; |
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287 | }; |
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288 | |||
289 | #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ |
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290 | |||
291 | struct drm_mode_fb_cmd2 { |
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292 | __u32 fb_id; |
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293 | __u32 width, height; |
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294 | __u32 pixel_format; /* fourcc code from drm_fourcc.h */ |
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295 | __u32 flags; /* see above flags */ |
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296 | |||
297 | /* |
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298 | * In case of planar formats, this ioctl allows up to 4 |
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299 | * buffer objects with offets and pitches per plane. |
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300 | * The pitch and offset order is dictated by the fourcc, |
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301 | * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: |
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302 | * |
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303 | * YUV 4:2:0 image with a plane of 8 bit Y samples |
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304 | * followed by an interleaved U/V plane containing |
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305 | * 8 bit 2x2 subsampled colour difference samples. |
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306 | * |
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307 | * So it would consist of Y as offset[0] and UV as |
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308 | * offeset[1]. Note that offset[0] will generally |
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309 | * be 0. |
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310 | */ |
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311 | __u32 handles[4]; |
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312 | __u32 pitches[4]; /* pitch for each plane */ |
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313 | __u32 offsets[4]; /* offset of each plane */ |
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314 | }; |
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315 | |||
316 | #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 |
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317 | #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 |
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318 | #define DRM_MODE_FB_DIRTY_FLAGS 0x03 |
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319 | |||
320 | #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 |
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321 | |||
322 | /* |
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323 | * Mark a region of a framebuffer as dirty. |
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324 | * |
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325 | * Some hardware does not automatically update display contents |
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326 | * as a hardware or software draw to a framebuffer. This ioctl |
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327 | * allows userspace to tell the kernel and the hardware what |
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328 | * regions of the framebuffer have changed. |
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329 | * |
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330 | * The kernel or hardware is free to update more then just the |
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331 | * region specified by the clip rects. The kernel or hardware |
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332 | * may also delay and/or coalesce several calls to dirty into a |
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333 | * single update. |
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334 | * |
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335 | * Userspace may annotate the updates, the annotates are a |
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336 | * promise made by the caller that the change is either a copy |
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337 | * of pixels or a fill of a single color in the region specified. |
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338 | * |
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339 | * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then |
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340 | * the number of updated regions are half of num_clips given, |
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341 | * where the clip rects are paired in src and dst. The width and |
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342 | * height of each one of the pairs must match. |
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343 | * |
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344 | * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller |
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345 | * promises that the region specified of the clip rects is filled |
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346 | * completely with a single color as given in the color argument. |
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347 | */ |
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348 | |||
349 | struct drm_mode_fb_dirty_cmd { |
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350 | __u32 fb_id; |
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351 | __u32 flags; |
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352 | __u32 color; |
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353 | __u32 num_clips; |
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354 | __u64 clips_ptr; |
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355 | }; |
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356 | |||
357 | struct drm_mode_mode_cmd { |
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358 | __u32 connector_id; |
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359 | struct drm_mode_modeinfo mode; |
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360 | }; |
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361 | |||
362 | #define DRM_MODE_CURSOR_BO 0x01 |
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363 | #define DRM_MODE_CURSOR_MOVE 0x02 |
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364 | #define DRM_MODE_CURSOR_FLAGS 0x03 |
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365 | |||
366 | /* |
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367 | * depending on the value in flags different members are used. |
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368 | * |
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369 | * CURSOR_BO uses |
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370 | * crtc |
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371 | * width |
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372 | * height |
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373 | * handle - if 0 turns the cursor of |
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374 | * |
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375 | * CURSOR_MOVE uses |
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376 | * crtc |
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377 | * x |
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378 | * y |
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379 | */ |
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380 | struct drm_mode_cursor { |
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381 | __u32 flags; |
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382 | __u32 crtc_id; |
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383 | __s32 x; |
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384 | __s32 y; |
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385 | __u32 width; |
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386 | __u32 height; |
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387 | /* driver specific handle */ |
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388 | __u32 handle; |
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389 | }; |
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390 | |||
391 | struct drm_mode_crtc_lut { |
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392 | __u32 crtc_id; |
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393 | __u32 gamma_size; |
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394 | |||
395 | /* pointers to arrays */ |
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396 | __u64 red; |
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397 | __u64 green; |
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398 | __u64 blue; |
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399 | }; |
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400 | |||
401 | #define DRM_MODE_PAGE_FLIP_EVENT 0x01 |
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402 | #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT |
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403 | |||
404 | /* |
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405 | * Request a page flip on the specified crtc. |
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406 | * |
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407 | * This ioctl will ask KMS to schedule a page flip for the specified |
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408 | * crtc. Once any pending rendering targeting the specified fb (as of |
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409 | * ioctl time) has completed, the crtc will be reprogrammed to display |
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410 | * that fb after the next vertical refresh. The ioctl returns |
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411 | * immediately, but subsequent rendering to the current fb will block |
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412 | * in the execbuffer ioctl until the page flip happens. If a page |
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413 | * flip is already pending as the ioctl is called, EBUSY will be |
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414 | * returned. |
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415 | * |
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416 | * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will |
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417 | * request that drm sends back a vblank event (see drm.h: struct |
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418 | * drm_event_vblank) when the page flip is done. The user_data field |
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419 | * passed in with this ioctl will be returned as the user_data field |
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420 | * in the vblank event struct. |
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421 | * |
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422 | * The reserved field must be zero until we figure out something |
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423 | * clever to use it for. |
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424 | */ |
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425 | |||
426 | struct drm_mode_crtc_page_flip { |
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427 | __u32 crtc_id; |
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428 | __u32 fb_id; |
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429 | __u32 flags; |
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430 | __u32 reserved; |
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431 | __u64 user_data; |
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432 | }; |
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433 | |||
434 | /* create a dumb scanout buffer */ |
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435 | struct drm_mode_create_dumb { |
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436 | uint32_t height; |
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437 | uint32_t width; |
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438 | uint32_t bpp; |
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439 | uint32_t flags; |
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440 | /* handle, pitch, size will be returned */ |
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441 | uint32_t handle; |
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442 | uint32_t pitch; |
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443 | uint64_t size; |
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444 | }; |
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445 | |||
446 | /* set up for mmap of a dumb scanout buffer */ |
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447 | struct drm_mode_map_dumb { |
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448 | /** Handle for the object being mapped. */ |
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449 | __u32 handle; |
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450 | __u32 pad; |
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451 | /** |
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452 | * Fake offset to use for subsequent mmap call |
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453 | * |
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454 | * This is a fixed-size type for 32/64 compatibility. |
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455 | */ |
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456 | __u64 offset; |
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457 | }; |
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458 | |||
459 | struct drm_mode_destroy_dumb { |
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460 | uint32_t handle; |
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461 | }; |
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462 | |||
463 | #endif0)><0)>5)><5)>4) |