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Rev | Author | Line No. | Line |
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5270 | serge | 1 | #ifndef _ASM_X86_PGTABLE_DEFS_H |
2 | #define _ASM_X86_PGTABLE_DEFS_H |
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3 | |||
4 | #include |
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5 | #include |
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6 | |||
6082 | serge | 7 | #define FIRST_USER_ADDRESS 0UL |
5270 | serge | 8 | |
9 | #define _PAGE_BIT_PRESENT 0 /* is present */ |
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10 | #define _PAGE_BIT_RW 1 /* writeable */ |
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11 | #define _PAGE_BIT_USER 2 /* userspace addressable */ |
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12 | #define _PAGE_BIT_PWT 3 /* page write through */ |
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13 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ |
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14 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ |
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15 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ |
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16 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ |
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17 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ |
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18 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ |
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19 | #define _PAGE_BIT_SOFTW1 9 /* available for programmer */ |
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20 | #define _PAGE_BIT_SOFTW2 10 /* " */ |
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21 | #define _PAGE_BIT_SOFTW3 11 /* " */ |
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22 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ |
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23 | #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1 |
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24 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1 |
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25 | #define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */ |
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26 | #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */ |
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6936 | serge | 27 | #define _PAGE_BIT_SOFTW4 58 /* available for programmer */ |
28 | #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4 |
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5270 | serge | 29 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ |
30 | |||
31 | /* If _PAGE_BIT_PRESENT is clear, we use these: */ |
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32 | /* - if the user mapped it with PROT_NONE; pte_present gives true */ |
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33 | #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL |
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34 | |||
35 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) |
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36 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) |
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37 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) |
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38 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) |
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39 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) |
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40 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) |
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41 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) |
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42 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) |
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43 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) |
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44 | #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1) |
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45 | #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2) |
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46 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) |
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47 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) |
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48 | #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) |
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49 | #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) |
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50 | #define __HAVE_ARCH_PTE_SPECIAL |
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51 | |||
52 | #ifdef CONFIG_KMEMCHECK |
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53 | #define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN) |
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54 | #else |
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55 | #define _PAGE_HIDDEN (_AT(pteval_t, 0)) |
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56 | #endif |
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57 | |||
58 | /* |
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59 | * The same hidden bit is used by kmemcheck, but since kmemcheck |
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60 | * works on kernel pages while soft-dirty engine on user space, |
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61 | * they do not conflict with each other. |
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62 | */ |
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63 | |||
64 | #ifdef CONFIG_MEM_SOFT_DIRTY |
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65 | #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY) |
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66 | #else |
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67 | #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0)) |
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68 | #endif |
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69 | |||
70 | /* |
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71 | * Tracking soft dirty bit when a page goes to a swap is tricky. |
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72 | * We need a bit which can be stored in pte _and_ not conflict |
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73 | * with swap entry format. On x86 bits 6 and 7 are *not* involved |
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74 | * into swap entry computation, but bit 6 is used for nonlinear |
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75 | * file mapping, so we borrow bit 7 for soft dirty tracking. |
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76 | * |
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77 | * Please note that this bit must be treated as swap dirty page |
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78 | * mark if and only if the PTE has present bit clear! |
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79 | */ |
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80 | #ifdef CONFIG_MEM_SOFT_DIRTY |
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81 | #define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE |
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82 | #else |
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83 | #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0)) |
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84 | #endif |
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85 | |||
86 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
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87 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) |
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6936 | serge | 88 | #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP) |
89 | #define __HAVE_ARCH_PTE_DEVMAP |
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5270 | serge | 90 | #else |
91 | #define _PAGE_NX (_AT(pteval_t, 0)) |
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6936 | serge | 92 | #define _PAGE_DEVMAP (_AT(pteval_t, 0)) |
5270 | serge | 93 | #endif |
94 | |||
95 | #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) |
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96 | |||
97 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
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98 | _PAGE_ACCESSED | _PAGE_DIRTY) |
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99 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ |
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100 | _PAGE_DIRTY) |
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101 | |||
102 | /* Set of bits not changed in pte_modify */ |
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103 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ |
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104 | _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \ |
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6082 | serge | 105 | _PAGE_SOFT_DIRTY) |
106 | #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE) |
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5270 | serge | 107 | |
108 | /* |
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109 | * The cache modes defined here are used to translate between pure SW usage |
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110 | * and the HW defined cache mode bits and/or PAT entries. |
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111 | * |
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112 | * The resulting bits for PWT, PCD and PAT should be chosen in a way |
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113 | * to have the WB mode at index 0 (all bits clear). This is the default |
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114 | * right now and likely would break too much if changed. |
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115 | */ |
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116 | #ifndef __ASSEMBLY__ |
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117 | enum page_cache_mode { |
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118 | _PAGE_CACHE_MODE_WB = 0, |
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119 | _PAGE_CACHE_MODE_WC = 1, |
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120 | _PAGE_CACHE_MODE_UC_MINUS = 2, |
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121 | _PAGE_CACHE_MODE_UC = 3, |
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122 | _PAGE_CACHE_MODE_WT = 4, |
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123 | _PAGE_CACHE_MODE_WP = 5, |
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124 | _PAGE_CACHE_MODE_NUM = 8 |
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125 | }; |
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126 | #endif |
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127 | |||
128 | #define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT) |
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129 | #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC)) |
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130 | |||
131 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) |
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132 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
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133 | _PAGE_ACCESSED | _PAGE_NX) |
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134 | |||
135 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \ |
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136 | _PAGE_USER | _PAGE_ACCESSED) |
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137 | #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
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138 | _PAGE_ACCESSED | _PAGE_NX) |
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139 | #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
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140 | _PAGE_ACCESSED) |
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141 | #define PAGE_COPY PAGE_COPY_NOEXEC |
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142 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
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143 | _PAGE_ACCESSED | _PAGE_NX) |
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144 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
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145 | _PAGE_ACCESSED) |
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146 | |||
147 | #define __PAGE_KERNEL_EXEC \ |
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148 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) |
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149 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) |
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150 | |||
151 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) |
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152 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) |
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153 | #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_NOCACHE) |
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154 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) |
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155 | #define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO | _PAGE_USER) |
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156 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) |
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157 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) |
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158 | |||
159 | #define __PAGE_KERNEL_IO (__PAGE_KERNEL) |
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160 | #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE) |
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161 | |||
162 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) |
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163 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) |
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164 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) |
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165 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) |
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166 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) |
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167 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) |
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168 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) |
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169 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) |
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170 | #define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR) |
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171 | |||
172 | #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO) |
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173 | #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE) |
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174 | |||
175 | /* xwr */ |
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176 | #define __P000 PAGE_NONE |
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177 | #define __P001 PAGE_READONLY |
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178 | #define __P010 PAGE_COPY |
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179 | #define __P011 PAGE_COPY |
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180 | #define __P100 PAGE_READONLY_EXEC |
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181 | #define __P101 PAGE_READONLY_EXEC |
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182 | #define __P110 PAGE_COPY_EXEC |
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183 | #define __P111 PAGE_COPY_EXEC |
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184 | |||
185 | #define __S000 PAGE_NONE |
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186 | #define __S001 PAGE_READONLY |
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187 | #define __S010 PAGE_SHARED |
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188 | #define __S011 PAGE_SHARED |
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189 | #define __S100 PAGE_READONLY_EXEC |
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190 | #define __S101 PAGE_READONLY_EXEC |
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191 | #define __S110 PAGE_SHARED_EXEC |
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192 | #define __S111 PAGE_SHARED_EXEC |
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193 | |||
194 | /* |
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195 | * early identity mapping pte attrib macros. |
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196 | */ |
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197 | #ifdef CONFIG_X86_64 |
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198 | #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC |
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199 | #else |
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200 | #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ |
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201 | #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */ |
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202 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ |
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203 | #endif |
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204 | |||
205 | #ifdef CONFIG_X86_32 |
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206 | # include |
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207 | #else |
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208 | # include |
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209 | #endif |
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210 | |||
211 | #ifndef __ASSEMBLY__ |
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212 | |||
213 | #include |
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214 | |||
6082 | serge | 215 | /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */ |
5270 | serge | 216 | #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) |
217 | |||
6082 | serge | 218 | /* Extracts the flags from a (pte|pmd|pud|pgd)val_t of a 4KB page */ |
5270 | serge | 219 | #define PTE_FLAGS_MASK (~PTE_PFN_MASK) |
220 | |||
221 | typedef struct pgprot { pgprotval_t pgprot; } pgprot_t; |
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222 | |||
223 | typedef struct { pgdval_t pgd; } pgd_t; |
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224 | |||
225 | static inline pgd_t native_make_pgd(pgdval_t val) |
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226 | { |
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227 | return (pgd_t) { val }; |
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228 | } |
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229 | |||
230 | static inline pgdval_t native_pgd_val(pgd_t pgd) |
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231 | { |
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232 | return pgd.pgd; |
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233 | } |
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234 | |||
235 | static inline pgdval_t pgd_flags(pgd_t pgd) |
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236 | { |
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237 | return native_pgd_val(pgd) & PTE_FLAGS_MASK; |
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238 | } |
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239 | |||
6082 | serge | 240 | #if CONFIG_PGTABLE_LEVELS > 3 |
5270 | serge | 241 | typedef struct { pudval_t pud; } pud_t; |
242 | |||
243 | static inline pud_t native_make_pud(pmdval_t val) |
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244 | { |
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245 | return (pud_t) { val }; |
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246 | } |
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247 | |||
248 | static inline pudval_t native_pud_val(pud_t pud) |
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249 | { |
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250 | return pud.pud; |
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251 | } |
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252 | #else |
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253 | #include |
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254 | |||
255 | static inline pudval_t native_pud_val(pud_t pud) |
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256 | { |
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257 | return native_pgd_val(pud.pgd); |
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258 | } |
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259 | #endif |
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260 | |||
6082 | serge | 261 | #if CONFIG_PGTABLE_LEVELS > 2 |
5270 | serge | 262 | typedef struct { pmdval_t pmd; } pmd_t; |
263 | |||
264 | static inline pmd_t native_make_pmd(pmdval_t val) |
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265 | { |
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266 | return (pmd_t) { val }; |
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267 | } |
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268 | |||
269 | static inline pmdval_t native_pmd_val(pmd_t pmd) |
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270 | { |
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271 | return pmd.pmd; |
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272 | } |
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273 | #else |
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274 | #include |
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275 | |||
276 | static inline pmdval_t native_pmd_val(pmd_t pmd) |
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277 | { |
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278 | return native_pgd_val(pmd.pud.pgd); |
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279 | } |
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280 | #endif |
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281 | |||
6082 | serge | 282 | static inline pudval_t pud_pfn_mask(pud_t pud) |
283 | { |
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284 | if (native_pud_val(pud) & _PAGE_PSE) |
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285 | return PHYSICAL_PUD_PAGE_MASK; |
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286 | else |
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287 | return PTE_PFN_MASK; |
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288 | } |
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289 | |||
290 | static inline pudval_t pud_flags_mask(pud_t pud) |
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291 | { |
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292 | return ~pud_pfn_mask(pud); |
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293 | } |
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294 | |||
5270 | serge | 295 | static inline pudval_t pud_flags(pud_t pud) |
296 | { |
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6082 | serge | 297 | return native_pud_val(pud) & pud_flags_mask(pud); |
5270 | serge | 298 | } |
299 | |||
6082 | serge | 300 | static inline pmdval_t pmd_pfn_mask(pmd_t pmd) |
301 | { |
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302 | if (native_pmd_val(pmd) & _PAGE_PSE) |
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303 | return PHYSICAL_PMD_PAGE_MASK; |
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304 | else |
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305 | return PTE_PFN_MASK; |
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306 | } |
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307 | |||
308 | static inline pmdval_t pmd_flags_mask(pmd_t pmd) |
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309 | { |
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310 | return ~pmd_pfn_mask(pmd); |
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311 | } |
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312 | |||
5270 | serge | 313 | static inline pmdval_t pmd_flags(pmd_t pmd) |
314 | { |
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6082 | serge | 315 | return native_pmd_val(pmd) & pmd_flags_mask(pmd); |
5270 | serge | 316 | } |
317 | |||
318 | static inline pte_t native_make_pte(pteval_t val) |
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319 | { |
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320 | return (pte_t) { .pte = val }; |
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321 | } |
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322 | |||
323 | static inline pteval_t native_pte_val(pte_t pte) |
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324 | { |
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325 | return pte.pte; |
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326 | } |
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327 | |||
328 | static inline pteval_t pte_flags(pte_t pte) |
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329 | { |
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330 | return native_pte_val(pte) & PTE_FLAGS_MASK; |
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331 | } |
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332 | |||
333 | #define pgprot_val(x) ((x).pgprot) |
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334 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
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335 | |||
336 | extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM]; |
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337 | extern uint8_t __pte2cachemode_tbl[8]; |
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338 | |||
339 | #define __pte2cm_idx(cb) \ |
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340 | ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \ |
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341 | (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \ |
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342 | (((cb) >> _PAGE_BIT_PWT) & 1)) |
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343 | #define __cm_idx2pte(i) \ |
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344 | ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \ |
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345 | (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \ |
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346 | (((i) & 1) << _PAGE_BIT_PWT)) |
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347 | |||
348 | static inline unsigned long cachemode2protval(enum page_cache_mode pcm) |
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349 | { |
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350 | if (likely(pcm == 0)) |
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351 | return 0; |
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352 | return __cachemode2pte_tbl[pcm]; |
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353 | } |
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354 | static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm) |
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355 | { |
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356 | return __pgprot(cachemode2protval(pcm)); |
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357 | } |
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358 | static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot) |
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359 | { |
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360 | unsigned long masked; |
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361 | |||
362 | masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK; |
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363 | if (likely(masked == 0)) |
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364 | return 0; |
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365 | return __pte2cachemode_tbl[__pte2cm_idx(masked)]; |
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366 | } |
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367 | static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot) |
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368 | { |
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6588 | serge | 369 | pgprotval_t val = pgprot_val(pgprot); |
5270 | serge | 370 | pgprot_t new; |
371 | |||
372 | pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | |
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373 | ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); |
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374 | return new; |
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375 | } |
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376 | static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot) |
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377 | { |
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6588 | serge | 378 | pgprotval_t val = pgprot_val(pgprot); |
5270 | serge | 379 | pgprot_t new; |
380 | |||
381 | pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | |
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382 | ((val & _PAGE_PAT_LARGE) >> |
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383 | (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); |
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384 | return new; |
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385 | } |
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386 | |||
387 | |||
388 | typedef struct page *pgtable_t; |
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389 | |||
390 | extern pteval_t __supported_pte_mask; |
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391 | extern void set_nx(void); |
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392 | extern int nx_enabled; |
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393 | |||
394 | #define pgprot_writecombine pgprot_writecombine |
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395 | extern pgprot_t pgprot_writecombine(pgprot_t prot); |
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396 | |||
6082 | serge | 397 | #define pgprot_writethrough pgprot_writethrough |
398 | extern pgprot_t pgprot_writethrough(pgprot_t prot); |
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399 | |||
5270 | serge | 400 | /* Indicate that x86 has its own track and untrack pfn vma functions */ |
401 | #define __HAVE_PFNMAP_TRACKING |
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402 | |||
403 | #define __HAVE_PHYS_MEM_ACCESS_PROT |
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404 | struct file; |
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405 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
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406 | unsigned long size, pgprot_t vma_prot); |
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407 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
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408 | unsigned long size, pgprot_t *vma_prot); |
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409 | |||
410 | /* Install a pte for a particular vaddr in kernel space. */ |
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411 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); |
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412 | |||
413 | #ifdef CONFIG_X86_32 |
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414 | extern void native_pagetable_init(void); |
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415 | #else |
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416 | #define native_pagetable_init paging_init |
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417 | #endif |
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418 | |||
419 | struct seq_file; |
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420 | extern void arch_report_meminfo(struct seq_file *m); |
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421 | |||
422 | enum pg_level { |
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423 | PG_LEVEL_NONE, |
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424 | PG_LEVEL_4K, |
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425 | PG_LEVEL_2M, |
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426 | PG_LEVEL_1G, |
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427 | PG_LEVEL_NUM |
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428 | }; |
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429 | |||
430 | #ifdef CONFIG_PROC_FS |
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431 | extern void update_page_count(int level, unsigned long pages); |
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432 | #else |
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433 | static inline void update_page_count(int level, unsigned long pages) { } |
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434 | #endif |
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435 | |||
436 | /* |
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437 | * Helper function that returns the kernel pagetable entry controlling |
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438 | * the virtual address 'address'. NULL means no pagetable entry present. |
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439 | * NOTE: the return type is pte_t but if the pmd is PSE then we return it |
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440 | * as a pte too. |
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441 | */ |
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442 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); |
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443 | extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, |
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444 | unsigned int *level); |
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445 | extern pmd_t *lookup_pmd_address(unsigned long address); |
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446 | extern phys_addr_t slow_virt_to_phys(void *__address); |
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447 | extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address, |
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448 | unsigned numpages, unsigned long page_flags); |
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449 | void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address, |
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450 | unsigned numpages); |
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451 | #endif /* !__ASSEMBLY__ */ |
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452 | |||
453 | #endif /* _ASM_X86_PGTABLE_DEFS_H */><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><> |