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| Rev | Author | Line No. | Line |
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| 6514 | serge | 1 | #ifndef _ASM_X86_DMA_MAPPING_H |
| 2 | #define _ASM_X86_DMA_MAPPING_H |
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| 3 | |||
| 4 | /* |
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| 5 | * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and |
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| 6 | * Documentation/DMA-API.txt for documentation. |
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| 7 | */ |
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| 8 | |||
| 9 | #include |
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| 10 | #include |
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| 11 | #include |
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| 12 | #include |
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| 13 | #include |
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| 14 | #include |
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| 15 | #include |
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| 16 | |||
| 17 | #ifdef CONFIG_ISA |
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| 18 | # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24) |
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| 19 | #else |
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| 20 | # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32) |
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| 21 | #endif |
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| 22 | |||
| 23 | #define DMA_ERROR_CODE 0 |
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| 24 | |||
| 25 | extern int iommu_merge; |
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| 26 | extern struct device x86_dma_fallback_dev; |
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| 27 | extern int panic_on_overflow; |
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| 28 | |||
| 29 | extern struct dma_map_ops *dma_ops; |
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| 30 | |||
| 31 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) |
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| 32 | { |
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| 33 | #ifndef CONFIG_X86_DEV_DMA_OPS |
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| 34 | return dma_ops; |
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| 35 | #else |
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| 36 | if (unlikely(!dev) || !dev->archdata.dma_ops) |
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| 37 | return dma_ops; |
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| 38 | else |
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| 39 | return dev->archdata.dma_ops; |
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| 40 | #endif |
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| 41 | } |
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| 42 | |||
| 43 | bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp); |
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| 44 | #define arch_dma_alloc_attrs arch_dma_alloc_attrs |
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| 45 | |||
| 46 | #define HAVE_ARCH_DMA_SUPPORTED 1 |
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| 47 | extern int dma_supported(struct device *hwdev, u64 mask); |
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| 48 | |||
| 49 | #include |
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| 50 | |||
| 51 | extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, |
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| 52 | dma_addr_t *dma_addr, gfp_t flag, |
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| 53 | struct dma_attrs *attrs); |
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| 54 | |||
| 55 | extern void dma_generic_free_coherent(struct device *dev, size_t size, |
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| 56 | void *vaddr, dma_addr_t dma_addr, |
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| 57 | struct dma_attrs *attrs); |
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| 58 | |||
| 59 | #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */ |
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| 60 | extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); |
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| 61 | extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); |
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| 62 | extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); |
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| 63 | #else |
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| 64 | |||
| 65 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) |
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| 66 | { |
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| 67 | if (!dev->dma_mask) |
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| 68 | return 0; |
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| 69 | |||
| 70 | return addr + size - 1 <= *dev->dma_mask; |
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| 71 | } |
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| 72 | |||
| 73 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
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| 74 | { |
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| 75 | return paddr; |
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| 76 | } |
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| 77 | |||
| 78 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) |
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| 79 | { |
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| 80 | return daddr; |
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| 81 | } |
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| 82 | #endif /* CONFIG_X86_DMA_REMAP */ |
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| 83 | |||
| 84 | static inline void |
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| 85 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
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| 86 | enum dma_data_direction dir) |
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| 87 | { |
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| 88 | flush_write_buffers(); |
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| 89 | } |
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| 90 | |||
| 91 | static inline unsigned long dma_alloc_coherent_mask(struct device *dev, |
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| 92 | gfp_t gfp) |
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| 93 | { |
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| 94 | unsigned long dma_mask = 0; |
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| 95 | |||
| 96 | dma_mask = dev->coherent_dma_mask; |
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| 97 | if (!dma_mask) |
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| 98 | dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32); |
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| 99 | |||
| 100 | return dma_mask; |
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| 101 | } |
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| 102 | |||
| 103 | static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp) |
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| 104 | { |
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| 105 | unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp); |
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| 106 | |||
| 107 | if (dma_mask <= DMA_BIT_MASK(24)) |
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| 108 | gfp |= GFP_DMA; |
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| 109 | #ifdef CONFIG_X86_64 |
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| 110 | if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) |
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| 111 | gfp |= GFP_DMA32; |
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| 112 | #endif |
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| 113 | return gfp; |
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| 114 | } |
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| 115 | |||
| 116 | #endif |