Rev 6936 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5270 | serge | 1 | #ifndef _ASM_X86_CPUFEATURE_H |
| 2 | #define _ASM_X86_CPUFEATURE_H |
||
| 3 | |||
| 7143 | serge | 4 | #include |
| 5270 | serge | 5 | |
| 6 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) |
||
| 7 | |||
| 8 | #include |
||
| 9 | #include |
||
| 10 | |||
| 6936 | serge | 11 | enum cpuid_leafs |
| 12 | { |
||
| 13 | CPUID_1_EDX = 0, |
||
| 14 | CPUID_8000_0001_EDX, |
||
| 15 | CPUID_8086_0001_EDX, |
||
| 16 | CPUID_LNX_1, |
||
| 17 | CPUID_1_ECX, |
||
| 18 | CPUID_C000_0001_EDX, |
||
| 19 | CPUID_8000_0001_ECX, |
||
| 20 | CPUID_LNX_2, |
||
| 21 | CPUID_LNX_3, |
||
| 22 | CPUID_7_0_EBX, |
||
| 23 | CPUID_D_1_EAX, |
||
| 24 | CPUID_F_0_EDX, |
||
| 25 | CPUID_F_1_EDX, |
||
| 26 | CPUID_8000_0008_EBX, |
||
| 27 | CPUID_6_EAX, |
||
| 28 | CPUID_8000_000A_EDX, |
||
| 7143 | serge | 29 | CPUID_7_ECX, |
| 6936 | serge | 30 | }; |
| 31 | |||
| 5270 | serge | 32 | #ifdef CONFIG_X86_FEATURE_NAMES |
| 33 | extern const char * const x86_cap_flags[NCAPINTS*32]; |
||
| 34 | extern const char * const x86_power_flags[32]; |
||
| 35 | #define X86_CAP_FMT "%s" |
||
| 36 | #define x86_cap_flag(flag) x86_cap_flags[flag] |
||
| 37 | #else |
||
| 38 | #define X86_CAP_FMT "%d:%d" |
||
| 39 | #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31) |
||
| 40 | #endif |
||
| 41 | |||
| 42 | /* |
||
| 43 | * In order to save room, we index into this array by doing |
||
| 44 | * X86_BUG_ |
||
| 45 | */ |
||
| 46 | extern const char * const x86_bug_flags[NBUGINTS*32]; |
||
| 47 | |||
| 48 | #define test_cpu_cap(c, bit) \ |
||
| 49 | test_bit(bit, (unsigned long *)((c)->x86_capability)) |
||
| 50 | |||
| 51 | #define REQUIRED_MASK_BIT_SET(bit) \ |
||
| 7143 | serge | 52 | ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0 )) || \ |
| 53 | (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1 )) || \ |
||
| 54 | (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2 )) || \ |
||
| 55 | (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3 )) || \ |
||
| 56 | (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4 )) || \ |
||
| 57 | (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5 )) || \ |
||
| 58 | (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6 )) || \ |
||
| 59 | (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7 )) || \ |
||
| 60 | (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8 )) || \ |
||
| 61 | (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9 )) || \ |
||
| 62 | (((bit)>>5)==10 && (1UL<<((bit)&31) & REQUIRED_MASK10)) || \ |
||
| 63 | (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) || \ |
||
| 64 | (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) || \ |
||
| 65 | (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) || \ |
||
| 66 | (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) || \ |
||
| 67 | (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) || \ |
||
| 68 | (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) ) |
||
| 5270 | serge | 69 | |
| 70 | #define DISABLED_MASK_BIT_SET(bit) \ |
||
| 7143 | serge | 71 | ( (((bit)>>5)==0 && (1UL<<((bit)&31) & DISABLED_MASK0 )) || \ |
| 72 | (((bit)>>5)==1 && (1UL<<((bit)&31) & DISABLED_MASK1 )) || \ |
||
| 73 | (((bit)>>5)==2 && (1UL<<((bit)&31) & DISABLED_MASK2 )) || \ |
||
| 74 | (((bit)>>5)==3 && (1UL<<((bit)&31) & DISABLED_MASK3 )) || \ |
||
| 75 | (((bit)>>5)==4 && (1UL<<((bit)&31) & DISABLED_MASK4 )) || \ |
||
| 76 | (((bit)>>5)==5 && (1UL<<((bit)&31) & DISABLED_MASK5 )) || \ |
||
| 77 | (((bit)>>5)==6 && (1UL<<((bit)&31) & DISABLED_MASK6 )) || \ |
||
| 78 | (((bit)>>5)==7 && (1UL<<((bit)&31) & DISABLED_MASK7 )) || \ |
||
| 79 | (((bit)>>5)==8 && (1UL<<((bit)&31) & DISABLED_MASK8 )) || \ |
||
| 80 | (((bit)>>5)==9 && (1UL<<((bit)&31) & DISABLED_MASK9 )) || \ |
||
| 81 | (((bit)>>5)==10 && (1UL<<((bit)&31) & DISABLED_MASK10)) || \ |
||
| 82 | (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) || \ |
||
| 83 | (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) || \ |
||
| 84 | (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) || \ |
||
| 85 | (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) || \ |
||
| 86 | (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) || \ |
||
| 87 | (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) ) |
||
| 5270 | serge | 88 | |
| 89 | #define cpu_has(c, bit) \ |
||
| 90 | (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ |
||
| 91 | test_cpu_cap(c, bit)) |
||
| 92 | |||
| 93 | #define this_cpu_has(bit) \ |
||
| 94 | (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ |
||
| 95 | x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability)) |
||
| 96 | |||
| 97 | /* |
||
| 98 | * This macro is for detection of features which need kernel |
||
| 99 | * infrastructure to be used. It may *not* directly test the CPU |
||
| 100 | * itself. Use the cpu_has() family if you want true runtime |
||
| 101 | * testing of CPU features, like in hypervisor code where you are |
||
| 102 | * supporting a possible guest feature where host support for it |
||
| 103 | * is not relevant. |
||
| 104 | */ |
||
| 105 | #define cpu_feature_enabled(bit) \ |
||
| 7143 | serge | 106 | (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) |
| 5270 | serge | 107 | |
| 108 | #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) |
||
| 109 | |||
| 110 | #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability)) |
||
| 111 | #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) |
||
| 112 | #define setup_clear_cpu_cap(bit) do { \ |
||
| 113 | clear_cpu_cap(&boot_cpu_data, bit); \ |
||
| 114 | set_bit(bit, (unsigned long *)cpu_caps_cleared); \ |
||
| 115 | } while (0) |
||
| 116 | #define setup_force_cpu_cap(bit) do { \ |
||
| 117 | set_cpu_cap(&boot_cpu_data, bit); \ |
||
| 118 | set_bit(bit, (unsigned long *)cpu_caps_set); \ |
||
| 119 | } while (0) |
||
| 120 | |||
| 121 | #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) |
||
| 122 | #define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE) |
||
| 123 | #define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC) |
||
| 124 | #define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE) |
||
| 125 | #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) |
||
| 126 | #define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR) |
||
| 127 | #define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM) |
||
| 128 | #define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2) |
||
| 129 | #define cpu_has_aes boot_cpu_has(X86_FEATURE_AES) |
||
| 130 | #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX) |
||
| 131 | #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2) |
||
| 132 | #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH) |
||
| 133 | #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) |
||
| 134 | #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) |
||
| 135 | #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) |
||
| 136 | #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) |
||
| 137 | #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) |
||
| 138 | #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) |
||
| 139 | #define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE) |
||
| 140 | #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) |
||
| 6936 | serge | 141 | /* |
| 7143 | serge | 142 | * Do not add any more of those clumsy macros - use static_cpu_has() for |
| 6936 | serge | 143 | * fast paths and boot_cpu_has() otherwise! |
| 144 | */ |
||
| 5270 | serge | 145 | |
| 7143 | serge | 146 | #if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS) |
| 5270 | serge | 147 | /* |
| 148 | * Static testing of CPU features. Used the same as boot_cpu_has(). |
||
| 7143 | serge | 149 | * These will statically patch the target code for additional |
| 150 | * performance. |
||
| 5270 | serge | 151 | */ |
| 7143 | serge | 152 | static __always_inline __pure bool _static_cpu_has(u16 bit) |
| 5270 | serge | 153 | { |
| 7143 | serge | 154 | asm_volatile_goto("1: jmp 6f\n" |
| 5270 | serge | 155 | "2:\n" |
| 6082 | serge | 156 | ".skip -(((5f-4f) - (2b-1b)) > 0) * " |
| 157 | "((5f-4f) - (2b-1b)),0x90\n" |
||
| 158 | "3:\n" |
||
| 5270 | serge | 159 | ".section .altinstructions,\"a\"\n" |
| 160 | " .long 1b - .\n" /* src offset */ |
||
| 6082 | serge | 161 | " .long 4f - .\n" /* repl offset */ |
| 5270 | serge | 162 | " .word %P1\n" /* always replace */ |
| 6082 | serge | 163 | " .byte 3b - 1b\n" /* src len */ |
| 164 | " .byte 5f - 4f\n" /* repl len */ |
||
| 165 | " .byte 3b - 2b\n" /* pad len */ |
||
| 5270 | serge | 166 | ".previous\n" |
| 167 | ".section .altinstr_replacement,\"ax\"\n" |
||
| 6082 | serge | 168 | "4: jmp %l[t_no]\n" |
| 169 | "5:\n" |
||
| 5270 | serge | 170 | ".previous\n" |
| 171 | ".section .altinstructions,\"a\"\n" |
||
| 172 | " .long 1b - .\n" /* src offset */ |
||
| 173 | " .long 0\n" /* no replacement */ |
||
| 174 | " .word %P0\n" /* feature bit */ |
||
| 6082 | serge | 175 | " .byte 3b - 1b\n" /* src len */ |
| 5270 | serge | 176 | " .byte 0\n" /* repl len */ |
| 6082 | serge | 177 | " .byte 0\n" /* pad len */ |
| 5270 | serge | 178 | ".previous\n" |
| 7143 | serge | 179 | ".section .altinstr_aux,\"ax\"\n" |
| 180 | "6:\n" |
||
| 181 | " testb %[bitnum],%[cap_byte]\n" |
||
| 182 | " jnz %l[t_yes]\n" |
||
| 183 | " jmp %l[t_no]\n" |
||
| 184 | ".previous\n" |
||
| 185 | : : "i" (bit), "i" (X86_FEATURE_ALWAYS), |
||
| 186 | [bitnum] "i" (1 << (bit & 7)), |
||
| 187 | [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3]) |
||
| 188 | : : t_yes, t_no); |
||
| 189 | t_yes: |
||
| 5270 | serge | 190 | return true; |
| 191 | t_no: |
||
| 192 | return false; |
||
| 193 | } |
||
| 194 | |||
| 7143 | serge | 195 | #define static_cpu_has(bit) \ |
| 5270 | serge | 196 | ( \ |
| 197 | __builtin_constant_p(boot_cpu_has(bit)) ? \ |
||
| 198 | boot_cpu_has(bit) : \ |
||
| 7143 | serge | 199 | _static_cpu_has(bit) \ |
| 5270 | serge | 200 | ) |
| 201 | #else |
||
| 202 | /* |
||
| 7143 | serge | 203 | * Fall back to dynamic for gcc versions which don't support asm goto. Should be |
| 204 | * a minority now anyway. |
||
| 5270 | serge | 205 | */ |
| 206 | #define static_cpu_has(bit) boot_cpu_has(bit) |
||
| 207 | #endif |
||
| 208 | |||
| 209 | #define cpu_has_bug(c, bit) cpu_has(c, (bit)) |
||
| 210 | #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) |
||
| 211 | #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) |
||
| 212 | |||
| 213 | #define static_cpu_has_bug(bit) static_cpu_has((bit)) |
||
| 214 | #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) |
||
| 215 | |||
| 216 | #define MAX_CPU_FEATURES (NCAPINTS * 32) |
||
| 217 | #define cpu_have_feature boot_cpu_has |
||
| 218 | |||
| 219 | #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X" |
||
| 220 | #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ |
||
| 221 | boot_cpu_data.x86_model |
||
| 222 | |||
| 223 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ |
||
| 224 | #endif /* _ASM_X86_CPUFEATURE_H */ |