WebSVN – Kolibri OS – Blame – /drivers/ethernet/RTL8169.asm

Rev	Author	Line No.	Line
3545	hidnplayr	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2	;; ;;
7250	hidnplayr	3	;; Copyright (C) KolibriOS team 2004-2018. All rights reserved. ;;
3545	hidnplayr	4	;; Distributed under terms of the GNU General Public License ;;
		5	;; ;;
		6	;; RTL8169 driver for KolibriOS ;;
		7	;; ;;
		8	;; Copyright 2007 mike.dld, ;;
		9	;; mike.dld@gmail.com ;;
		10	;; ;;
6119	hidnplayr	11	;; Port to the new network stack by hidnplayr ;;
3545	hidnplayr	12	;; ;;
		13	;; References: ;;
6124	hidnplayr	14	;; r8169.c - linux driver ;;
3545	hidnplayr	15	;; ;;
		16	;; GNU GENERAL PUBLIC LICENSE ;;
		17	;; Version 2, June 1991 ;;
		18	;; ;;
		19	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		20
5050	hidnplayr	21	format PE DLL native
		22	entry START
3545	hidnplayr	23
5050	hidnplayr	24	CURRENT_API = 0x0200
		25	COMPATIBLE_API = 0x0100
		26	API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API
3545	hidnplayr	27
		28	MAX_DEVICES = 16
		29
		30	__DEBUG__ = 1
5050	hidnplayr	31	__DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only
3545	hidnplayr	32
		33	NUM_TX_DESC = 4
		34	NUM_RX_DESC = 4
		35
5050	hidnplayr	36	section '.flat' readable writable executable
		37
		38	include '../proc32.inc'
4467	hidnplayr	39	include '../struct.inc'
		40	include '../macros.inc'
3545	hidnplayr	41	include '../fdo.inc'
5074	hidnplayr	42	include '../netdrv.inc'
3545	hidnplayr	43
		44	REG_MAC0 = 0x0 ; Ethernet hardware address
		45	REG_MAR0 = 0x8 ; Multicast filter
		46	REG_TxDescStartAddr = 0x20
		47	REG_TxHDescStartAddr = 0x28
		48	REG_FLASH = 0x30
		49	REG_ERSR = 0x36
		50	REG_ChipCmd = 0x37
		51	REG_TxPoll = 0x38
		52	REG_IntrMask = 0x3C
		53	REG_IntrStatus = 0x3E
		54	REG_TxConfig = 0x40
		55	REG_RxConfig = 0x44
		56	REG_RxMissed = 0x4C
		57	REG_Cfg9346 = 0x50
		58	REG_Config0 = 0x51
		59	REG_Config1 = 0x52
		60	REG_Config2 = 0x53
		61	REG_Config3 = 0x54
		62	REG_Config4 = 0x55
		63	REG_Config5 = 0x56
		64	REG_MultiIntr = 0x5C
		65	REG_PHYAR = 0x60
		66	REG_TBICSR = 0x64
		67	REG_TBI_ANAR = 0x68
		68	REG_TBI_LPAR = 0x6A
		69	REG_PHYstatus = 0x6C
		70	REG_RxMaxSize = 0xDA
		71	REG_CPlusCmd = 0xE0
		72	REG_RxDescStartAddr = 0xE4
		73	REG_ETThReg = 0xEC
		74	REG_FuncEvent = 0xF0
		75	REG_FuncEventMask = 0xF4
		76	REG_FuncPresetState = 0xF8
		77	REG_FuncForceEvent = 0xFC
		78
		79	; InterruptStatusBits
		80	ISB_SYSErr = 0x8000
		81	ISB_PCSTimeout = 0x4000
		82	ISB_SWInt = 0x0100
		83	ISB_TxDescUnavail = 0x80
		84	ISB_RxFIFOOver = 0x40
		85	ISB_LinkChg = 0x20
		86	ISB_RxOverflow = 0x10
		87	ISB_TxErr = 0x08
		88	ISB_TxOK = 0x04
		89	ISB_RxErr = 0x02
		90	ISB_RxOK = 0x01
		91
		92	; RxStatusDesc
		93	SD_RxRES = 0x00200000
		94	SD_RxCRC = 0x00080000
		95	SD_RxRUNT = 0x00100000
		96	SD_RxRWT = 0x00400000
		97
		98	; ChipCmdBits
		99	CMD_Reset = 0x10
		100	CMD_RxEnb = 0x08
		101	CMD_TxEnb = 0x04
		102	CMD_RxBufEmpty = 0x01
		103
		104	; Cfg9346Bits
		105	CFG_9346_Lock = 0x00
		106	CFG_9346_Unlock = 0xC0
		107
		108	; rx_mode_bits
		109	RXM_AcceptErr = 0x20
		110	RXM_AcceptRunt = 0x10
		111	RXM_AcceptBroadcast = 0x08
		112	RXM_AcceptMulticast = 0x04
		113	RXM_AcceptMyPhys = 0x02
		114	RXM_AcceptAllPhys = 0x01
		115
		116	; RxConfigBits
		117	RXC_FIFOShift = 13
		118	RXC_DMAShift = 8
		119
		120	; TxConfigBits
		121	TXC_InterFrameGapShift = 24
		122	TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits
		123
		124	; PHYstatus
		125	PHYS_TBI_Enable = 0x80
		126	PHYS_TxFlowCtrl = 0x40
		127	PHYS_RxFlowCtrl = 0x20
		128	PHYS_1000bpsF = 0x10
		129	PHYS_100bps = 0x08
		130	PHYS_10bps = 0x04
		131	PHYS_LinkStatus = 0x02
		132	PHYS_FullDup = 0x01
		133
		134	; GIGABIT_PHY_registers
		135	PHY_CTRL_REG = 0
		136	PHY_STAT_REG = 1
		137	PHY_AUTO_NEGO_REG = 4
		138	PHY_1000_CTRL_REG = 9
		139
		140	; GIGABIT_PHY_REG_BIT
		141	PHY_Restart_Auto_Nego = 0x0200
		142	PHY_Enable_Auto_Nego = 0x1000
		143
		144	; PHY_STAT_REG = 1
		145	PHY_Auto_Neco_Comp = 0x0020
		146
		147	; PHY_AUTO_NEGO_REG = 4
		148	PHY_Cap_10_Half = 0x0020
		149	PHY_Cap_10_Full = 0x0040
		150	PHY_Cap_100_Half = 0x0080
		151	PHY_Cap_100_Full = 0x0100
		152
		153	; PHY_1000_CTRL_REG = 9
		154	PHY_Cap_1000_Full = 0x0200
		155	PHY_Cap_1000_Half = 0x0100
		156
		157	PHY_Cap_PAUSE = 0x0400
		158	PHY_Cap_ASYM_PAUSE = 0x0800
		159
		160	PHY_Cap_Null = 0x0
		161
		162	; _MediaType
		163	MT_10_Half = 0x01
		164	MT_10_Full = 0x02
		165	MT_100_Half = 0x04
		166	MT_100_Full = 0x08
		167	MT_1000_Full = 0x10
		168
		169	; _TBICSRBit
5567	hidnplayr	170	TBI_RESET = 0x80000000
		171	TBI_LOOPBACK = 0x40000000
		172	TBI_NW_ENABLE = 0x20000000
		173	TBI_NW_RESTART = 0x10000000
		174	TBI_LINK_OK = 0x02000000
		175	TBI_NW_COMPLETE = 0x01000000
3545	hidnplayr	176
		177	; _DescStatusBit
		178	DSB_OWNbit = 0x80000000
		179	DSB_EORbit = 0x40000000
		180	DSB_FSbit = 0x20000000
		181	DSB_LSbit = 0x10000000
		182
5522	hidnplayr	183	RX_BUF_SIZE = 1514 ; Rx Buffer size
3545	hidnplayr	184
		185	; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4)
5522	hidnplayr	186	MAX_ETH_FRAME_SIZE = 1514
3545	hidnplayr	187
		188	TX_FIFO_THRESH = 256 ; In bytes
		189
		190	RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer
		191	RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024
		192	TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024
		193	ETTh = 0x3F ; 0x3F means NO threshold
		194
		195	EarlyTxThld = 0x3F ; 0x3F means NO early transmit
		196	RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1
		197	InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one
		198
		199	HZ = 1000
		200
		201	RTL_MIN_IO_SIZE = 0x80
		202	TX_TIMEOUT = (6*HZ)
		203
		204	TIMER_EXPIRE_TIME = 100
		205
		206	ETH_HDR_LEN = 14
		207	DEFAULT_MTU = 1500
5522	hidnplayr	208	DEFAULT_RX_BUF_LEN = 1514
3545	hidnplayr	209
		210
		211	;ifdef JUMBO_FRAME_SUPPORT
		212	; MAX_JUMBO_FRAME_MTU = 10000
		213	; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN )
		214	;else
		215	MAX_RX_SKBDATA_SIZE = 1600
		216	;end if
		217
		218	MCFG_METHOD_01 = 0x01
		219	MCFG_METHOD_02 = 0x02
		220	MCFG_METHOD_03 = 0x03
		221	MCFG_METHOD_04 = 0x04
		222	MCFG_METHOD_05 = 0x05
		223	MCFG_METHOD_11 = 0x0b
		224	MCFG_METHOD_12 = 0x0c
		225	MCFG_METHOD_13 = 0x0d
		226	MCFG_METHOD_14 = 0x0e
		227	MCFG_METHOD_15 = 0x0f
		228
		229	PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000
		230	PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001
		231	PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002
		232
5050	hidnplayr	233	struct tx_desc
		234	status dd ?
		235	vlan_tag dd ?
		236	buf_addr dq ?
		237	ends
		238	tx_desc.buf_soft_addr = NUM_TX_DESC*sizeof.tx_desc
3545	hidnplayr	239
5050	hidnplayr	240	struct rx_desc
		241	status dd ?
		242	vlan_tag dd ?
		243	buf_addr dq ?
		244	ends
		245	rx_desc.buf_soft_addr = NUM_RX_DESC*sizeof.rx_desc
3545	hidnplayr	246
5050	hidnplayr	247	struct device ETH_DEVICE
3545	hidnplayr	248
5050	hidnplayr	249	io_addr dd ?
		250	pci_bus dd ?
		251	pci_dev dd ?
		252	irq_line db ?
		253	rb 3 ; align 4
		254	pcfg dd ?
		255	mcfg dd ?
5498	hidnplayr	256
5050	hidnplayr	257	cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt
		258	cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt
5498	hidnplayr	259	last_tx dd ?
5494	hidnplayr	260	mac_version dd ?
3545	hidnplayr	261
5050	hidnplayr	262	rb 0x100-($ and 0xff) ; align 256
		263	tx_ring rb NUM_TX_DESC * sizeof.tx_desc * 2
3545	hidnplayr	264
5050	hidnplayr	265	rb 0x100-($ and 0xff) ; align 256
		266	rx_ring rb NUM_RX_DESC * sizeof.rx_desc * 2
3545	hidnplayr	267
5050	hidnplayr	268	ends
3545	hidnplayr	269
		270	intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK
		271	rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E
		272
		273
		274	macro udelay msec {
		275
4803	hidnplayr	276	push esi ecx
3545	hidnplayr	277	mov esi, msec
5050	hidnplayr	278	invoke Sleep
4803	hidnplayr	279	pop ecx esi
3545	hidnplayr	280
		281	}
		282
		283	macro WRITE_GMII_REG RegAddr, value {
		284
5050	hidnplayr	285	set_io [ebx + device.io_addr], REG_PHYAR
3545	hidnplayr	286	if value eq ax
		287	and eax, 0x0000ffff
		288	or eax, 0x80000000 + (RegAddr shl 16)
		289	else
		290	mov eax, 0x80000000 + (RegAddr shl 16) + value
		291	end if
		292	out dx, eax
		293
		294	call PHY_WAIT_WRITE
		295	}
		296
		297	macro READ_GMII_REG RegAddr {
		298
		299	local .error, .done
		300
5050	hidnplayr	301	set_io [ebx + device.io_addr], REG_PHYAR
3545	hidnplayr	302	mov eax, RegAddr shl 16
		303	out dx, eax
		304
		305	call PHY_WAIT_READ
		306	jz .error
		307
		308	in eax, dx
		309	and eax, 0xFFFF
		310	jmp .done
		311
		312	.error:
		313	or eax, -1
		314	.done:
		315	}
		316
		317	align 4
		318	PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR
		319
		320	udelay 1 ;;;1000
		321
		322	push ecx
		323	mov ecx, 2000
		324	; Check if the RTL8169 has completed writing/reading to the specified MII register
		325	@@:
		326	in eax, dx
		327	test eax, 0x80000000
		328	jnz .exit
		329	udelay 1 ;;;100
		330	loop @b
		331	.exit:
		332	pop ecx
		333	ret
		334
		335	align 4
		336	PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR
		337
		338	udelay 1 ;;;1000
		339
		340	push ecx
		341	mov ecx, 2000
		342	; Check if the RTL8169 has completed writing/reading to the specified MII register
		343	@@:
		344	in eax, dx
		345	test eax, 0x80000000
		346	jz .exit
		347	udelay 1 ;;;100
		348	loop @b
		349	.exit:
		350	pop ecx
		351	ret
		352
		353
		354
		355	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		356	;; ;;
		357	;; proc START ;;
		358	;; ;;
		359	;; (standard driver proc) ;;
		360	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		361
5050	hidnplayr	362	proc START c, reason:dword, cmdline:dword
3545	hidnplayr	363
5050	hidnplayr	364	cmp [reason], DRV_ENTRY
		365	jne .fail
3545	hidnplayr	366
5050	hidnplayr	367	DEBUGF 2,"Loading driver\n"
		368	invoke RegService, my_service, service_proc
3545	hidnplayr	369	ret
		370
		371	.fail:
5050	hidnplayr	372	xor eax, eax
3545	hidnplayr	373	ret
		374
		375	endp
		376
		377
		378	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		379	;; ;;
		380	;; proc SERVICE_PROC ;;
		381	;; ;;
		382	;; (standard driver proc) ;;
		383	;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		384
		385	proc service_proc stdcall, ioctl:dword
		386
		387	mov edx, [ioctl]
4470	hidnplayr	388	mov eax, [edx + IOCTL.io_code]
3545	hidnplayr	389
		390	;------------------------------------------------------
		391
		392	cmp eax, 0 ;SRV_GETVERSION
		393	jne @F
		394
4470	hidnplayr	395	cmp [edx + IOCTL.out_size], 4
3545	hidnplayr	396	jb .fail
4470	hidnplayr	397	mov eax, [edx + IOCTL.output]
3545	hidnplayr	398	mov [eax], dword API_VERSION
		399
		400	xor eax, eax
		401	ret
		402
		403	;------------------------------------------------------
		404	@@:
		405	cmp eax, 1 ;SRV_HOOK
		406	jne .fail
		407
4470	hidnplayr	408	cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes
3545	hidnplayr	409	jb .fail
		410
4470	hidnplayr	411	mov eax, [edx + IOCTL.input]
3545	hidnplayr	412	cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given
		413	jne .fail ; other types arent supported for this card yet
		414
		415	; check if the device is already listed
		416
		417	mov esi, device_list
		418	mov ecx, [devices]
		419	test ecx, ecx
		420	jz .firstdevice
		421
4470	hidnplayr	422	; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers
		423	mov ax, [eax+1] ;
3545	hidnplayr	424	.nextdevice:
		425	mov ebx, [esi]
5050	hidnplayr	426	cmp al, byte[ebx + device.pci_bus]
3545	hidnplayr	427	jne @f
5050	hidnplayr	428	cmp ah, byte[ebx + device.pci_dev]
3545	hidnplayr	429	je .find_devicenum ; Device is already loaded, let's find it's device number
		430	@@:
		431	add esi, 4
		432	loop .nextdevice
		433
		434
		435	; This device doesnt have its own eth_device structure yet, lets create one
		436	.firstdevice:
		437	cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card
		438	jae .fail
		439
5050	hidnplayr	440	allocate_and_clear ebx, sizeof.device, .fail ; Allocate memory to put the device structure in
3545	hidnplayr	441
		442	; Fill in the direct call addresses into the struct
		443
5050	hidnplayr	444	mov [ebx + device.reset], reset
		445	mov [ebx + device.transmit], transmit
		446	mov [ebx + device.unload], unload
		447	mov [ebx + device.name], my_service
3545	hidnplayr	448
		449	; save the pci bus and device numbers
		450
4470	hidnplayr	451	mov eax, [edx + IOCTL.input]
3545	hidnplayr	452	movzx ecx, byte[eax+1]
5050	hidnplayr	453	mov [ebx + device.pci_bus], ecx
3545	hidnplayr	454	movzx ecx, byte[eax+2]
5050	hidnplayr	455	mov [ebx + device.pci_dev], ecx
3545	hidnplayr	456
		457	; Now, it's time to find the base io addres of the PCI device
		458
5050	hidnplayr	459	stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev]
		460	mov [ebx + device.io_addr], eax
3545	hidnplayr	461
		462	; We've found the io address, find IRQ now
		463
5050	hidnplayr	464	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line
		465	mov [ebx + device.irq_line], al
3545	hidnplayr	466
		467	DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
5050	hidnplayr	468	[ebx + device.pci_dev]:1,[ebx + device.pci_bus]:1,[ebx + device.irq_line]:1,[ebx + device.io_addr]:8
3545	hidnplayr	469
		470	; Ok, the eth_device structure is ready, let's probe the device
		471	; Because initialization fires IRQ, IRQ handler must be aware of this device
		472	mov eax, [devices] ; Add the device structure to our device list
		473	mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device)
		474	inc [devices] ;
		475
		476	call probe ; this function will output in eax
		477	test eax, eax
		478	jnz .err2 ; If an error occured, exit
		479
5050	hidnplayr	480	mov [ebx + device.type], NET_TYPE_ETH
		481	invoke NetRegDev
3545	hidnplayr	482
		483	cmp eax, -1
		484	je .destroy
		485
		486	ret
		487
		488	; If the device was already loaded, find the device number and return it in eax
		489
		490	.find_devicenum:
		491	DEBUGF 2,"Trying to find device number of already registered device\n"
5050	hidnplayr	492	invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx
3545	hidnplayr	493	; into a device number in edi
		494	mov eax, edi ; Application wants it in eax instead
		495	DEBUGF 2,"Kernel says: %u\n", eax
		496	ret
		497
		498	; If an error occured, remove all allocated data and exit (returning -1 in eax)
		499
		500	.destroy:
		501	; todo: reset device into virgin state
		502
		503	.err2:
		504	dec [devices]
		505	.err:
		506	DEBUGF 2,"removing device structure\n"
5050	hidnplayr	507	invoke KernelFree, ebx
3545	hidnplayr	508	.fail:
		509	or eax, -1
		510	ret
		511
		512	;------------------------------------------------------
		513	endp
		514
		515
		516	align 4
		517	unload:
		518
		519	ret
		520
		521
		522	align 4
		523	init_board:
		524
		525	DEBUGF 1,"init_board\n"
		526
5050	hidnplayr	527	; Make the device a bus master
		528	invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command
		529	or al, PCI_CMD_MASTER
		530	invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax
3545	hidnplayr	531
		532	; Soft reset the chip
5050	hidnplayr	533	set_io [ebx + device.io_addr], 0
		534	set_io [ebx + device.io_addr], REG_ChipCmd
3545	hidnplayr	535	mov al, CMD_Reset
		536	out dx, al
		537
		538	; Check that the chip has finished the reset
		539	mov ecx, 1000
5050	hidnplayr	540	set_io [ebx + device.io_addr], REG_ChipCmd
5494	hidnplayr	541	@@:
		542	in al, dx
3545	hidnplayr	543	test al, CMD_Reset
		544	jz @f
		545	udelay 10
		546	loop @b
5494	hidnplayr	547	@@:
3545	hidnplayr	548
		549
5050	hidnplayr	550	set_io [ebx + device.io_addr], REG_TxConfig
3545	hidnplayr	551	in eax, dx
5494	hidnplayr	552	mov esi, MAC_VERSION_LIST
		553	@@:
		554	mov ecx, eax
		555	and ecx, dword[esi]
		556	cmp ecx, dword[esi+4]
		557	je @f
		558	add esi, 4*4
		559	jmp @r
		560	@@:
3545	hidnplayr	561
6119	hidnplayr	562	mov ecx, [esi+8]
		563	mov [ebx + device.mac_version], ecx
		564	mov ecx, [esi+12]
		565	mov [ebx + device.name], ecx
		566	DEBUGF 2, "Detected chip: %s\n", ecx
		567	cmp dword[esi], 0
		568	jne @f
		569	DEBUGF 2, "TxConfig = 0x%x\n", eax
		570	@@:
3545	hidnplayr	571
		572	xor eax, eax
		573	ret
		574
		575
		576
		577	;***************************************************************************
		578	; Function
		579	; probe
		580	; Description
		581	; Searches for an ethernet card, enables it and clears the rx buffer
		582	; If a card was found, it enables the ethernet -> TCPIP link
		583	; Destroyed registers
		584	; eax, ebx, ecx, edx
		585	;
		586	;***************************************************************************
		587	align 4
		588	probe:
		589
		590	DEBUGF 1,"probe\n"
		591
		592	call init_board
		593	call read_mac
		594	call PHY_config
		595
4334	hidnplayr	596	DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
5050	hidnplayr	597	set_io [ebx + device.io_addr], 0
		598	set_io [ebx + device.io_addr], 0x82
3545	hidnplayr	599	mov al, 0x01
		600	out dx, al
5050	hidnplayr	601	cmp [ebx + device.mcfg], MCFG_METHOD_03
3545	hidnplayr	602	jae @f
4334	hidnplayr	603	DEBUGF 1,"Set PCI Latency=0x40\n"
5050	hidnplayr	604	; Adjust PCI latency to be at least 64
		605	invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency
		606	cmp al, 64
		607	jae @f
		608	mov al, 64
		609	invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax
		610	@@:
		611	cmp [ebx + device.mcfg], MCFG_METHOD_02
3545	hidnplayr	612	jne @f
4334	hidnplayr	613	DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
5050	hidnplayr	614	set_io [ebx + device.io_addr], 0
		615	set_io [ebx + device.io_addr], 0x82
3545	hidnplayr	616	mov al, 0x01
		617	out dx, al
4334	hidnplayr	618	DEBUGF 1,"Set PHY Reg 0x0bh = 0x00h\n"
3545	hidnplayr	619	WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0
		620	@@:
		621	; if TBI is not enabled
5050	hidnplayr	622	set_io [ebx + device.io_addr], 0
		623	set_io [ebx + device.io_addr], REG_PHYstatus
3545	hidnplayr	624	in al, dx
		625	test al, PHYS_TBI_Enable
		626	jz .tbi_dis
		627	READ_GMII_REG PHY_AUTO_NEGO_REG
		628
		629	; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
		630	and eax, 0x0C1F
		631	or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full
		632	WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax
		633
		634	; enable 1000 Full Mode
		635	WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168
		636
		637	; Enable auto-negotiation and restart auto-nigotiation
		638	WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego
		639
4803	hidnplayr	640	udelay 1 ; 100
		641	mov ecx, 200 ; 10000
		642	DEBUGF 1, "Waiting for auto-negotiation to complete\n"
3545	hidnplayr	643	; wait for auto-negotiation process
		644	@@: dec ecx
		645	jz @f
5050	hidnplayr	646	set_io [ebx + device.io_addr], 0
3545	hidnplayr	647	READ_GMII_REG PHY_STAT_REG
4803	hidnplayr	648	udelay 1 ; 100
3545	hidnplayr	649	test eax, PHY_Auto_Neco_Comp
		650	jz @b
5050	hidnplayr	651	set_io [ebx + device.io_addr], REG_PHYstatus
3545	hidnplayr	652	in al, dx
		653	jmp @f
		654	.tbi_dis:
4803	hidnplayr	655	udelay 1 ; 100
3545	hidnplayr	656	@@:
4803	hidnplayr	657	DEBUGF 1, "auto-negotiation complete\n"
3545	hidnplayr	658
		659	;***************************************************************************
		660	; Function
		661	; rt8169_reset
		662	; Description
		663	; Place the chip (ie, the ethernet card) into a virgin state
		664	; Destroyed registers
		665	; eax, ebx, ecx, edx
		666	;
		667	;***************************************************************************
		668	align 4
		669	reset:
		670
4803	hidnplayr	671	DEBUGF 1,"resetting\n"
3545	hidnplayr	672
		673	call init_ring
5522	hidnplayr	674	test eax, eax
		675	jnz .err
		676
3545	hidnplayr	677	call hw_start
		678
		679	; clear packet/byte counters
		680
		681	xor eax, eax
5050	hidnplayr	682	lea edi, [ebx + device.bytes_tx]
3545	hidnplayr	683	mov ecx, 6
		684	rep stosd
		685
5050	hidnplayr	686	mov [ebx + device.mtu], 1500
5498	hidnplayr	687	call detect_link
3545	hidnplayr	688
4803	hidnplayr	689	DEBUGF 2,"init OK!\n"
3545	hidnplayr	690	xor eax, eax
		691	ret
		692
5522	hidnplayr	693	.err:
		694	DEBUGF 2,"failed!\n"
		695	or eax, -1
		696	ret
3545	hidnplayr	697
		698
		699
		700	align 4
		701	PHY_config:
		702
5050	hidnplayr	703	DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n", [ebx + device.mcfg], [ebx + device.pcfg]
3545	hidnplayr	704
5050	hidnplayr	705	cmp [ebx + device.mcfg], MCFG_METHOD_04
3545	hidnplayr	706	jne .not_4
5050	hidnplayr	707	set_io [ebx + device.io_addr], 0
3545	hidnplayr	708	; WRITE_GMII_REG 0x1F, 0x0001
		709	; WRITE_GMII_REG 0x1b, 0x841e
		710	; WRITE_GMII_REG 0x0e, 0x7bfb
		711	; WRITE_GMII_REG 0x09, 0x273a
		712	WRITE_GMII_REG 0x1F, 0x0002
		713	WRITE_GMII_REG 0x01, 0x90D0
		714	WRITE_GMII_REG 0x1F, 0x0000
		715	jmp .exit
		716	.not_4:
5050	hidnplayr	717	cmp [ebx + device.mcfg], MCFG_METHOD_02
3545	hidnplayr	718	je @f
5050	hidnplayr	719	cmp [ebx + device.mcfg], MCFG_METHOD_03
3545	hidnplayr	720	jne .not_2_or_3
		721	@@:
5050	hidnplayr	722	set_io [ebx + device.io_addr], 0
3545	hidnplayr	723	WRITE_GMII_REG 0x1F, 0x0001
		724	WRITE_GMII_REG 0x15, 0x1000
		725	WRITE_GMII_REG 0x18, 0x65C7
		726	WRITE_GMII_REG 0x04, 0x0000
		727	WRITE_GMII_REG 0x03, 0x00A1
		728	WRITE_GMII_REG 0x02, 0x0008
		729	WRITE_GMII_REG 0x01, 0x1020
		730	WRITE_GMII_REG 0x00, 0x1000
		731	WRITE_GMII_REG 0x04, 0x0800
		732	WRITE_GMII_REG 0x04, 0x0000
		733	WRITE_GMII_REG 0x04, 0x7000
		734	WRITE_GMII_REG 0x03, 0xFF41
		735	WRITE_GMII_REG 0x02, 0xDE60
		736	WRITE_GMII_REG 0x01, 0x0140
		737	WRITE_GMII_REG 0x00, 0x0077
		738	WRITE_GMII_REG 0x04, 0x7800
		739	WRITE_GMII_REG 0x04, 0x7000
		740	WRITE_GMII_REG 0x04, 0xA000
		741	WRITE_GMII_REG 0x03, 0xDF01
		742	WRITE_GMII_REG 0x02, 0xDF20
		743	WRITE_GMII_REG 0x01, 0xFF95
		744	WRITE_GMII_REG 0x00, 0xFA00
		745	WRITE_GMII_REG 0x04, 0xA800
		746	WRITE_GMII_REG 0x04, 0xA000
		747	WRITE_GMII_REG 0x04, 0xB000
		748	WRITE_GMII_REG 0x03, 0xFF41
		749	WRITE_GMII_REG 0x02, 0xDE20
		750	WRITE_GMII_REG 0x01, 0x0140
		751	WRITE_GMII_REG 0x00, 0x00BB
		752	WRITE_GMII_REG 0x04, 0xB800
		753	WRITE_GMII_REG 0x04, 0xB000
		754	WRITE_GMII_REG 0x04, 0xF000
		755	WRITE_GMII_REG 0x03, 0xDF01
		756	WRITE_GMII_REG 0x02, 0xDF20
		757	WRITE_GMII_REG 0x01, 0xFF95
		758	WRITE_GMII_REG 0x00, 0xBF00
		759	WRITE_GMII_REG 0x04, 0xF800
		760	WRITE_GMII_REG 0x04, 0xF000
		761	WRITE_GMII_REG 0x04, 0x0000
		762	WRITE_GMII_REG 0x1F, 0x0000
		763	WRITE_GMII_REG 0x0B, 0x0000
		764	jmp .exit
		765	.not_2_or_3:
5050	hidnplayr	766	DEBUGF 1,"mcfg=%d, discard hw PHY config\n", [ebx + device.mcfg]
3545	hidnplayr	767	.exit:
		768	ret
		769
		770
		771
		772	align 4
		773	set_rx_mode:
		774
		775	DEBUGF 1,"set_rx_mode\n"
		776
		777	; IFF_ALLMULTI
		778	; Too many to filter perfectly -- accept all multicasts
5050	hidnplayr	779	set_io [ebx + device.io_addr], 0
		780	set_io [ebx + device.io_addr], REG_RxConfig
3545	hidnplayr	781	in eax, dx
5494	hidnplayr	782	and eax, 0xff7e1880
3545	hidnplayr	783	or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys)
		784	out dx, eax
		785
		786	; Multicast hash filter
5050	hidnplayr	787	set_io [ebx + device.io_addr], REG_MAR0 + 0
3545	hidnplayr	788	or eax, -1
		789	out dx, eax
5050	hidnplayr	790	set_io [ebx + device.io_addr], REG_MAR0 + 4
3545	hidnplayr	791	out dx, eax
		792
		793	ret
		794
		795
		796	align 4
		797	init_ring:
		798
		799	DEBUGF 1,"init_ring\n"
		800
		801	xor eax, eax
5050	hidnplayr	802	mov [ebx + device.cur_rx], eax
		803	mov [ebx + device.cur_tx], eax
5498	hidnplayr	804	mov [ebx + device.last_tx], eax
3545	hidnplayr	805
5050	hidnplayr	806	lea edi, [ebx + device.tx_ring]
5498	hidnplayr	807	mov ecx, (NUM_TX_DESC * sizeof.tx_desc) / 4 * 2
3545	hidnplayr	808	rep stosd
		809
5050	hidnplayr	810	lea edi, [ebx + device.rx_ring]
		811	mov ecx, (NUM_RX_DESC * sizeof.rx_desc) / 4
3545	hidnplayr	812	rep stosd
		813
5498	hidnplayr	814	lea edi, [ebx + device.rx_ring]
3545	hidnplayr	815	mov ecx, NUM_RX_DESC
		816	.loop:
		817	push ecx
5522	hidnplayr	818	invoke NetAlloc, RX_BUF_SIZE+NET_BUFF.data
		819	test eax, eax
		820	jz .err
5050	hidnplayr	821	mov dword [edi + rx_desc.buf_soft_addr], eax
5498	hidnplayr	822	invoke GetPhysAddr
5522	hidnplayr	823	add eax, NET_BUFF.data
3545	hidnplayr	824	mov dword [edi + rx_desc.buf_addr], eax
		825	mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE
5050	hidnplayr	826	add edi, sizeof.rx_desc
3545	hidnplayr	827	pop ecx
5050	hidnplayr	828	dec ecx
		829	jnz .loop
		830	or [edi - sizeof.rx_desc + rx_desc.status], DSB_EORbit
3545	hidnplayr	831
5522	hidnplayr	832	xor eax, eax
3545	hidnplayr	833	ret
		834
5522	hidnplayr	835	.err:
		836	pop eax
		837	or eax, -1
		838	ret
3545	hidnplayr	839
		840	align 4
		841	hw_start:
		842
		843	DEBUGF 1,"hw_start\n"
		844
		845	; attach int handler
5050	hidnplayr	846	movzx eax, [ebx + device.irq_line]
3545	hidnplayr	847	DEBUGF 1,"Attaching int handler to irq %x\n", eax:1
5050	hidnplayr	848	invoke AttachIntHandler, eax, int_handler, ebx
		849	test eax, eax
		850	jnz @f
		851	DEBUGF 2,"Could not attach int handler!\n"
		852	or eax, -1
		853	ret
		854	@@:
3545	hidnplayr	855
		856	; Soft reset the chip
5050	hidnplayr	857	set_io [ebx + device.io_addr], 0
		858	set_io [ebx + device.io_addr], REG_ChipCmd
3545	hidnplayr	859	mov al, CMD_Reset
		860	out dx, al
		861
		862	DEBUGF 1,"Waiting for chip to reset... "
		863	; Check that the chip has finished the reset
		864	mov ecx, 1000
5050	hidnplayr	865	set_io [ebx + device.io_addr], REG_ChipCmd
3545	hidnplayr	866	@@: in al, dx
		867	test al, CMD_Reset
		868	jz @f
		869	udelay 10
		870	loop @b
		871	@@:
		872	DEBUGF 1,"done!\n"
		873
5050	hidnplayr	874	set_io [ebx + device.io_addr], REG_Cfg9346
3545	hidnplayr	875	mov al, CFG_9346_Unlock
		876	out dx, al
		877
5050	hidnplayr	878	set_io [ebx + device.io_addr], REG_ChipCmd
3545	hidnplayr	879	mov al, CMD_TxEnb or CMD_RxEnb
		880	out dx, al
		881
5050	hidnplayr	882	set_io [ebx + device.io_addr], REG_ETThReg
3545	hidnplayr	883	mov al, ETTh
		884	out dx, al
		885
		886	; For gigabit rtl8169
5050	hidnplayr	887	set_io [ebx + device.io_addr], REG_RxMaxSize
3545	hidnplayr	888	mov ax, RxPacketMaxSize
		889	out dx, ax
		890
		891	; Set Rx Config register
5050	hidnplayr	892	set_io [ebx + device.io_addr], REG_RxConfig
3545	hidnplayr	893	in ax, dx
5494	hidnplayr	894	and eax, 0xff7e1880
3545	hidnplayr	895	or eax, rx_config
		896	out dx, eax
		897
		898	; Set DMA burst size and Interframe Gap Time
5050	hidnplayr	899	set_io [ebx + device.io_addr], REG_TxConfig
3545	hidnplayr	900	mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift)
		901	out dx, eax
		902
5050	hidnplayr	903	set_io [ebx + device.io_addr], REG_CPlusCmd
3545	hidnplayr	904	in ax, dx
		905	out dx, ax
		906
		907	in ax, dx
		908	or ax, 1 shl 3
5050	hidnplayr	909	cmp [ebx + device.mcfg], MCFG_METHOD_02
3545	hidnplayr	910	jne @f
5050	hidnplayr	911	cmp [ebx + device.mcfg], MCFG_METHOD_03
3545	hidnplayr	912	jne @f
		913	or ax,1 shl 14
		914	DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n"
		915	jmp .set
		916	@@:
		917	DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n"
		918	.set:
5050	hidnplayr	919	set_io [ebx + device.io_addr], REG_CPlusCmd
3545	hidnplayr	920	out dx, ax
		921
5050	hidnplayr	922	set_io [ebx + device.io_addr], 0xE2
3545	hidnplayr	923	; mov ax, 0x1517
		924	; out dx, ax
		925	; mov ax, 0x152a
		926	; out dx, ax
		927	; mov ax, 0x282a
		928	; out dx, ax
		929	xor ax, ax
		930	out dx, ax
		931
		932	xor eax, eax
5050	hidnplayr	933	mov [ebx + device.cur_rx], eax
		934	lea eax, [ebx + device.tx_ring]
		935	invoke GetPhysAddr
		936	set_io [ebx + device.io_addr], REG_TxDescStartAddr
3545	hidnplayr	937	out dx, eax
5050	hidnplayr	938	set_io [ebx + device.io_addr], REG_TxDescStartAddr + 4
4301	clevermous	939	xor eax, eax
		940	out dx, eax
3545	hidnplayr	941
5050	hidnplayr	942	lea eax, [ebx + device.rx_ring]
		943	invoke GetPhysAddr
		944	set_io [ebx + device.io_addr], REG_RxDescStartAddr
3545	hidnplayr	945	out dx, eax
4301	clevermous	946	xor eax, eax
5050	hidnplayr	947	set_io [ebx + device.io_addr], REG_RxDescStartAddr + 4
4301	clevermous	948	out dx, eax
3545	hidnplayr	949
5050	hidnplayr	950	set_io [ebx + device.io_addr], REG_Cfg9346
3545	hidnplayr	951	mov al, CFG_9346_Lock
		952	out dx, al
		953
		954	udelay 10
		955
		956	xor eax, eax
5050	hidnplayr	957	set_io [ebx + device.io_addr], REG_RxMissed
3545	hidnplayr	958	out dx, eax
		959
		960	call set_rx_mode
		961
5050	hidnplayr	962	set_io [ebx + device.io_addr], 0
3545	hidnplayr	963	; no early-rx interrupts
5050	hidnplayr	964	set_io [ebx + device.io_addr], REG_MultiIntr
3545	hidnplayr	965	in ax, dx
		966	and ax, 0xF000
		967	out dx, ax
		968
		969	; set interrupt mask
5050	hidnplayr	970	set_io [ebx + device.io_addr], REG_IntrMask
3545	hidnplayr	971	mov ax, intr_mask
		972	out dx, ax
		973
		974	xor eax, eax
		975	ret
		976
		977
		978	align 4
		979	read_mac:
		980
5050	hidnplayr	981	set_io [ebx + device.io_addr], 0
		982	set_io [ebx + device.io_addr], REG_MAC0
3545	hidnplayr	983	xor ecx, ecx
5050	hidnplayr	984	lea edi, [ebx + device.mac]
3545	hidnplayr	985	mov ecx, 6
		986
		987	; Get MAC address. FIXME: read EEPROM
5498	hidnplayr	988	@@:
		989	in al, dx
3545	hidnplayr	990	stosb
		991	inc edx
		992	loop @r
		993
		994	DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\
5050	hidnplayr	995	[ebx + device.mac+0]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2
3545	hidnplayr	996
		997	ret
		998
		999	align 4
		1000	write_mac:
		1001
		1002	ret 6
		1003
		1004
		1005	;***************************************************************************
		1006	; Function
		1007	; transmit
		1008	; Description
		1009	; Transmits a packet of data via the ethernet card
		1010	;
		1011	; Destroyed registers
		1012	; eax, edx, esi, edi
		1013	;
		1014	;***************************************************************************
		1015
5522	hidnplayr	1016	proc transmit stdcall bufferptr
5050	hidnplayr	1017
		1018	pushf
		1019	cli
		1020
5522	hidnplayr	1021	mov esi, [bufferptr]
		1022	DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length]
		1023	lea eax, [esi + NET_BUFF.data]
3545	hidnplayr	1024	DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
		1025	[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
		1026	[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
		1027	[eax+13]:2,[eax+12]:2
		1028
5522	hidnplayr	1029	cmp [esi + NET_BUFF.length], 1514
3545	hidnplayr	1030	ja .fail
5522	hidnplayr	1031	cmp [esi + NET_BUFF.length], 60
5050	hidnplayr	1032	jb .fail
3545	hidnplayr	1033
		1034	;----------------------------------
		1035	; Find currentTX descriptor address
		1036
5050	hidnplayr	1037	mov eax, sizeof.tx_desc
		1038	mul [ebx + device.cur_tx]
		1039	lea esi, [ebx + device.tx_ring + eax]
3545	hidnplayr	1040
		1041	DEBUGF 1,"Using TX desc: %x\n", esi
		1042
5498	hidnplayr	1043	;----------------------------------
		1044	; Check if the descriptor is in use
		1045
		1046	test [esi + tx_desc.status], DSB_OWNbit
		1047	jnz .desc
		1048
3545	hidnplayr	1049	;---------------------------
		1050	; Program the packet pointer
		1051
5050	hidnplayr	1052	mov eax, [bufferptr]
5522	hidnplayr	1053	mov ecx, [eax + NET_BUFF.length]
3545	hidnplayr	1054	mov [esi + tx_desc.buf_soft_addr], eax
5522	hidnplayr	1055	add eax, [eax + NET_BUFF.offset]
5050	hidnplayr	1056	invoke GetPhysAddr
3545	hidnplayr	1057	mov dword [esi + tx_desc.buf_addr], eax
		1058
		1059	;------------------------
		1060	; Program the packet size
		1061
5522	hidnplayr	1062	mov eax, ecx
5498	hidnplayr	1063	or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit
5050	hidnplayr	1064	cmp [ebx + device.cur_tx], NUM_TX_DESC - 1
3545	hidnplayr	1065	jne @f
		1066	or eax, DSB_EORbit
5498	hidnplayr	1067	@@:
		1068	mov [esi + tx_desc.status], eax
3545	hidnplayr	1069
		1070	;-----------------------------------------
		1071	; Set the polling bit (start transmission)
		1072
5050	hidnplayr	1073	set_io [ebx + device.io_addr], 0
		1074	set_io [ebx + device.io_addr], REG_TxPoll
3545	hidnplayr	1075	mov al, 0x40 ; set polling bit
		1076	out dx, al
		1077
		1078	;-----------------------
		1079	; Update TX descriptor
		1080
5050	hidnplayr	1081	inc [ebx + device.cur_tx]
		1082	and [ebx + device.cur_tx], NUM_TX_DESC - 1
3545	hidnplayr	1083
		1084	;-------------
		1085	; Update stats
		1086
5050	hidnplayr	1087	inc [ebx + device.packets_tx]
5522	hidnplayr	1088	add dword [ebx + device.bytes_tx], ecx
5050	hidnplayr	1089	adc dword [ebx + device.bytes_tx + 4], 0
3545	hidnplayr	1090
5126	hidnplayr	1091	popf
3545	hidnplayr	1092	xor eax, eax
5050	hidnplayr	1093	ret
3545	hidnplayr	1094
5498	hidnplayr	1095	.desc:
		1096	DEBUGF 2,"Descriptor is still in use!\n"
3545	hidnplayr	1097	.fail:
5050	hidnplayr	1098	DEBUGF 2,"Transmit failed\n"
5522	hidnplayr	1099	invoke NetFree, [bufferptr]
5050	hidnplayr	1100	popf
3545	hidnplayr	1101	or eax, -1
5050	hidnplayr	1102	ret
3545	hidnplayr	1103
5050	hidnplayr	1104	endp
3545	hidnplayr	1105
5050	hidnplayr	1106
3545	hidnplayr	1107
		1108	;;;;;;;;;;;;;;;;;;;;;;;
		1109	;; ;;
		1110	;; Interrupt handler ;;
		1111	;; ;;
		1112	;;;;;;;;;;;;;;;;;;;;;;;
		1113
		1114	align 4
		1115	int_handler:
		1116
		1117	push ebx esi edi
		1118
4334	hidnplayr	1119	DEBUGF 1,"INT\n"
3545	hidnplayr	1120
		1121	; find pointer of device wich made IRQ occur
		1122
		1123	mov ecx, [devices]
		1124	test ecx, ecx
		1125	jz .nothing
		1126	mov esi, device_list
		1127	.nextdevice:
		1128	mov ebx, [esi]
		1129
5050	hidnplayr	1130	set_io [ebx + device.io_addr], 0
		1131	set_io [ebx + device.io_addr], REG_IntrStatus
3545	hidnplayr	1132	in ax, dx
5498	hidnplayr	1133	out dx, ax ; ACK all interrupts
		1134	cmp ax, 0xffff ; if so, hardware is no longer present
		1135	je .nothing
3545	hidnplayr	1136	test ax, ax
		1137	jnz .got_it
		1138	.continue:
		1139	add esi, 4
		1140	dec ecx
		1141	jnz .nextdevice
		1142	.nothing:
		1143	pop edi esi ebx
		1144	xor eax, eax
		1145
		1146	ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver)
		1147
		1148	.got_it:
5050	hidnplayr	1149	DEBUGF 1,"Device: %x Status: %x\n", ebx, ax
3545	hidnplayr	1150
		1151	;--------
		1152	; Receive
		1153	test ax, ISB_RxOK
		1154	jz .no_rx
		1155
		1156	push ax
		1157	push ebx
		1158
5567	hidnplayr	1159	.rx_loop:
3545	hidnplayr	1160	pop ebx
5050	hidnplayr	1161	mov eax, sizeof.rx_desc
		1162	mul [ebx + device.cur_rx]
		1163	lea esi, [ebx + device.rx_ring + eax]
3545	hidnplayr	1164
		1165	DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status]
5522	hidnplayr	1166	mov ecx, [esi + rx_desc.status]
5567	hidnplayr	1167	test ecx, DSB_OWNbit
5522	hidnplayr	1168	jnz .rx_return
3545	hidnplayr	1169
5050	hidnplayr	1170	DEBUGF 1,"cur_rx = %u\n", [ebx + device.cur_rx]
5522	hidnplayr	1171	test ecx, SD_RxRES
5567	hidnplayr	1172	jnz .rx_reuse
3545	hidnplayr	1173
		1174	push ebx
5567	hidnplayr	1175	push .rx_loop
5522	hidnplayr	1176	and ecx, 0x00001FFF
		1177	add ecx, -4 ; we dont need CRC
		1178	DEBUGF 1,"data length = %u\n", ecx
		1179	mov eax, [esi + rx_desc.buf_soft_addr]
3545	hidnplayr	1180	push eax
5522	hidnplayr	1181	mov [eax + NET_BUFF.length], ecx
		1182	mov [eax + NET_BUFF.device], ebx
		1183	mov [eax + NET_BUFF.offset], NET_BUFF.data
3545	hidnplayr	1184
5522	hidnplayr	1185	;-------------
		1186	; Update stats
3545	hidnplayr	1187
6480	hidnplayr	1188	add dword [ebx + device.bytes_rx], ecx
5050	hidnplayr	1189	adc dword [ebx + device.bytes_rx + 4], 0
		1190	inc [ebx + device.packets_rx]
3545	hidnplayr	1191
5522	hidnplayr	1192	;----------------------
		1193	; Allocate a new buffer
3545	hidnplayr	1194
5567	hidnplayr	1195	mov [esi + rx_desc.status], 0
5522	hidnplayr	1196	invoke NetAlloc, RX_BUF_SIZE+NET_BUFF.data
5567	hidnplayr	1197	test eax, eax
		1198	jz .no_more_buffers
3545	hidnplayr	1199	mov [esi + rx_desc.buf_soft_addr], eax
5050	hidnplayr	1200	invoke GetPhysAddr
5522	hidnplayr	1201	add eax, NET_BUFF.data
3545	hidnplayr	1202	mov dword [esi + rx_desc.buf_addr], eax
		1203
5522	hidnplayr	1204	;---------------
		1205	; re set OWN bit
3545	hidnplayr	1206
		1207	mov eax, DSB_OWNbit or RX_BUF_SIZE
5050	hidnplayr	1208	cmp [ebx + device.cur_rx], NUM_RX_DESC - 1
3545	hidnplayr	1209	jne @f
		1210	or eax, DSB_EORbit
5050	hidnplayr	1211	@@:
		1212	mov [esi + rx_desc.status], eax
3545	hidnplayr	1213
5567	hidnplayr	1214	.no_more_buffers:
5522	hidnplayr	1215	;--------------
		1216	; Update rx ptr
3545	hidnplayr	1217
5050	hidnplayr	1218	inc [ebx + device.cur_rx]
		1219	and [ebx + device.cur_rx], NUM_RX_DESC - 1
3545	hidnplayr	1220
5522	hidnplayr	1221	jmp [EthInput]
5567	hidnplayr	1222
		1223	.rx_reuse:
		1224	mov eax, DSB_OWNbit or RX_BUF_SIZE
		1225	cmp [ebx + device.cur_rx], NUM_RX_DESC - 1
		1226	jne @f
		1227	or eax, DSB_EORbit
		1228	@@:
		1229	mov [esi + rx_desc.status], eax
		1230	push ebx
		1231	jmp .rx_loop
		1232
3545	hidnplayr	1233	.rx_return:
		1234	pop ax
		1235	.no_rx:
		1236
5498	hidnplayr	1237	;-----------------
		1238	; Transmit cleanup
3545	hidnplayr	1239
5498	hidnplayr	1240	test ax, ISB_TxOK or ISB_TxErr or ISB_TxDescUnavail
3545	hidnplayr	1241	jz .no_tx
5522	hidnplayr	1242	push ax
3545	hidnplayr	1243
5498	hidnplayr	1244	DEBUGF 1,"TX done!\n"
5522	hidnplayr	1245
		1246	mov ecx, NUM_TX_DESC
		1247	lea esi, [ebx + device.tx_ring]
5498	hidnplayr	1248	.txloop:
5050	hidnplayr	1249	cmp dword [esi + tx_desc.buf_soft_addr], 0
5522	hidnplayr	1250	jz .maybenext
3545	hidnplayr	1251
		1252	test [esi + tx_desc.status], DSB_OWNbit
5522	hidnplayr	1253	jnz .maybenext
3545	hidnplayr	1254
5522	hidnplayr	1255	push ecx
		1256	DEBUGF 1,"Freeing up TX desc: %x\n", esi
		1257	invoke NetFree, [esi + tx_desc.buf_soft_addr]
		1258	pop ecx
5050	hidnplayr	1259	and dword [esi + tx_desc.buf_soft_addr], 0
3545	hidnplayr	1260
5522	hidnplayr	1261	.maybenext:
		1262	add esi, sizeof.tx_desc
		1263	dec ecx
		1264	jnz .txloop
		1265
		1266	pop ax
3545	hidnplayr	1267	.no_tx:
		1268
5498	hidnplayr	1269	test ax, ISB_LinkChg
		1270	jz .no_linkchange
		1271	DEBUGF 2, "Link change detected\n"
		1272	call detect_link
		1273	.no_linkchange:
3545	hidnplayr	1274
		1275	pop edi esi ebx
		1276	xor eax, eax
		1277	inc eax
		1278
		1279	ret
		1280
		1281
		1282
5498	hidnplayr	1283	align 4
		1284	detect_link:
		1285
		1286	set_io [ebx + device.io_addr], 0
		1287
		1288	; set_io [ebx + device.io_addr], REG_TBICSR
		1289	; in eax, dx
		1290	; test eax, TBI_LinkOK
		1291	; jz .down
		1292
		1293	; mov [ebx + device.state], ETH_LINK_UNKNOWN
		1294	; invoke NetLinkChanged
		1295	; ret
		1296
		1297	set_io [ebx + device.io_addr], REG_PHYstatus
		1298	in al, dx
		1299	test al, PHYS_LinkStatus
		1300	jz .down
		1301	DEBUGF 2, "Link is up, phystatus=0x%x\n", al
		1302	xor ecx, ecx
		1303	test al, PHYS_10bps
		1304	jz @f
		1305	or cl, ETH_LINK_10M
		1306	@@:
		1307	test al, PHYS_100bps
		1308	jz @f
		1309	or cl, ETH_LINK_100M
		1310	@@:
		1311	test al, PHYS_1000bpsF
		1312	jz @f
		1313	or cl, ETH_LINK_1G ;or ETH_LINK_FD
		1314	@@:
		1315	test al, PHYS_FullDup
		1316	jz @f
		1317	or cl, ETH_LINK_FD
		1318	@@:
		1319	mov [ebx + device.state], ecx
		1320	invoke NetLinkChanged
		1321	ret
		1322
		1323	.down:
		1324	DEBUGF 2, "Link is down\n"
		1325	mov [ebx + device.state], ETH_LINK_DOWN
		1326	invoke NetLinkChanged
		1327	ret
		1328
		1329
		1330
5050	hidnplayr	1331	; End of code
3545	hidnplayr	1332
5050	hidnplayr	1333	data fixups
		1334	end data
3545	hidnplayr	1335
5050	hidnplayr	1336	include '../peimport.inc'
3545	hidnplayr	1337
		1338	my_service db 'RTL8169',0 ; max 16 chars include zero
		1339
		1340	include_debug_strings ; All data wich FDO uses will be included here
		1341
5494	hidnplayr	1342	MAC_VERSION_LIST:
3545	hidnplayr	1343
5494	hidnplayr	1344	; 8168EP family.
		1345	dd 0x7cf00000, 0x50200000, 51, name_49
		1346	dd 0x7cf00000, 0x50100000, 50, name_49
		1347	dd 0x7cf00000, 0x50000000, 49, name_49
3545	hidnplayr	1348
5494	hidnplayr	1349	; 8168H family.
		1350	dd 0x7cf00000, 0x54100000, 46, name_45
		1351	dd 0x7cf00000, 0x54000000, 45, name_45
3545	hidnplayr	1352
5494	hidnplayr	1353	; 8168G family.
		1354	dd 0x7cf00000, 0x5c800000, 44, name_44
		1355	dd 0x7cf00000, 0x50900000, 42, name_40
		1356	dd 0x7cf00000, 0x4c100000, 41, name_40
		1357	dd 0x7cf00000, 0x4c000000, 40, name_40
		1358
		1359	; 8168F family.
		1360	dd 0x7c800000, 0x48800000, 38, name_38
		1361	dd 0x7cf00000, 0x48100000, 36, name_35
		1362	dd 0x7cf00000, 0x48000000, 35, name_35
		1363
		1364	; 8168E family.
		1365	dd 0x7c800000, 0x2c800000, 34, name_34
		1366	dd 0x7cf00000, 0x2c200000, 33, name_32
		1367	dd 0x7cf00000, 0x2c100000, 32, name_32
		1368	dd 0x7c800000, 0x2c000000, 33, name_32
		1369
		1370	; 8168D family.
		1371	dd 0x7cf00000, 0x28300000, 26, name_25
		1372	dd 0x7cf00000, 0x28100000, 25, name_25
		1373	dd 0x7c800000, 0x28000000, 26, name_25
		1374
		1375	; 8168DP family.
		1376	dd 0x7cf00000, 0x28800000, 27, name_27
		1377	dd 0x7cf00000, 0x28a00000, 28, name_27
		1378
		1379	; 8168C family.
5522	hidnplayr	1380	dd 0x7cf00000, 0x3cb00000, 24, name_18
		1381	dd 0x7cf00000, 0x3c900000, 23, name_18
5494	hidnplayr	1382	dd 0x7cf00000, 0x3c800000, 18, name_18
5522	hidnplayr	1383	dd 0x7c800000, 0x3c800000, 24, name_18
5494	hidnplayr	1384	dd 0x7cf00000, 0x3c000000, 19, name_19
		1385	dd 0x7cf00000, 0x3c200000, 20, name_19
		1386	dd 0x7cf00000, 0x3c300000, 21, name_19
		1387	dd 0x7cf00000, 0x3c400000, 22, name_19
		1388	dd 0x7c800000, 0x3c000000, 22, name_19
		1389
		1390	; 8168B family.
		1391	dd 0x7cf00000, 0x38000000, 12, name_11
		1392	dd 0x7cf00000, 0x38500000, 17, name_10
		1393	dd 0x7c800000, 0x38000000, 17, name_10
		1394	dd 0x7c800000, 0x30000000, 11, name_11
		1395
		1396	; 8101 family.
6124	hidnplayr	1397	dd 0x7cf00000, 0x44900000, 39, name_39
		1398	dd 0x7c800000, 0x44800000, 39, name_39
		1399	dd 0x7c800000, 0x44000000, 37, name_37
		1400	dd 0x7cf00000, 0x40b00000, 30, name_29
		1401	dd 0x7cf00000, 0x40a00000, 30, name_29
		1402	dd 0x7cf00000, 0x40900000, 29, name_29
		1403	dd 0x7c800000, 0x40800000, 30, name_29
5494	hidnplayr	1404	dd 0x7cf00000, 0x34a00000, 09, name_07
		1405	dd 0x7cf00000, 0x24a00000, 09, name_07
		1406	dd 0x7cf00000, 0x34900000, 08, name_07
		1407	dd 0x7cf00000, 0x24900000, 08, name_07
		1408	dd 0x7cf00000, 0x34800000, 07, name_07
		1409	dd 0x7cf00000, 0x24800000, 07, name_07
		1410	dd 0x7cf00000, 0x34000000, 13, name_10
		1411	dd 0x7cf00000, 0x34300000, 10, name_10
		1412	dd 0x7cf00000, 0x34200000, 16, name_11
		1413	dd 0x7c800000, 0x34800000, 09, name_07
		1414	dd 0x7c800000, 0x24800000, 09, name_07
		1415	dd 0x7c800000, 0x34000000, 16, name_11
		1416	dd 0xfc800000, 0x38800000, 15, name_14
		1417	dd 0xfc800000, 0x30800000, 14, name_14
		1418
		1419	; 8110 family.
		1420	dd 0xfc800000, 0x98000000, 06, name_05
		1421	dd 0xfc800000, 0x18000000, 05, name_05
		1422	dd 0xfc800000, 0x10000000, 04, name_04
		1423	dd 0xfc800000, 0x04000000, 03, name_03
		1424	dd 0xfc800000, 0x00800000, 02, name_02
		1425	dd 0xfc800000, 0x00000000, 01, name_01
		1426
		1427	; Catch-all
		1428	dd 0x00000000, 0x00000000, 0, name_unknown
		1429
		1430	; PCI-devices
		1431	name_01 db "RTL8169",0
		1432	name_02 db "RTL8169s",0
		1433	name_03 db "RTL8110s",0
		1434	name_04 db "RTL8169sb/8110sb",0
		1435	name_05 db "RTL8169sc/8110sc",0
		1436	;name_06 db "RTL8169sc/8110sc",0
		1437
		1438	; PCI-E devices
		1439	name_07 db "RTL8102e",0
		1440	;name_08 db "RTL8102e",0
		1441	;name_09 db "RTL8102e",0
		1442	name_10 db "RTL8101e",0
		1443	name_11 db "RTL8168b/8111b",0
		1444	;name_12 db "RTL8168b/8111b",0
		1445	;name_13 db "RTL8101e",0
		1446	name_14 db "RTL8100e",0
		1447	;name_15 db "RTL8100e",0
		1448	;name_16 db "RTL8168b/8111b",0
		1449	;name_17 db "RTL8101e",0
		1450	name_18 db "RTL8168cp/8111cp",0
		1451	name_19 db "RTL8168c/8111c",0
		1452	;name_20 db "RTL8168c/8111c",0
		1453	;name_21 db "RTL8168c/8111c",0
		1454	;name_22 db "RTL8168c/8111c",0
5522	hidnplayr	1455	;name_23 db "RTL8168cp/8111cp",0
5494	hidnplayr	1456	;name_24 db "RTL8168cp/8111cp",0
		1457	name_25 db "RTL8168d/8111d",0
		1458	;name_26 db "RTL8168d/8111d",0
		1459	name_27 db "RTL8168dp/8111dp",0
		1460	;name_28 db "RTL8168dp/8111dp",0
		1461	name_29 db "RTL8105e",0
		1462	;name_30 db "RTL8105e",0
		1463	;name_31 db "RTL8168dp/8111dp",0
		1464	name_32 db "RTL8168e/8111e",0
		1465	;name_33 db "RTL8168e/8111e",0
		1466	name_34 db "RTL8168evl/8111evl",0
		1467	name_35 db "RTL8168f/8111f",0
		1468	;name_36 db "RTL8168f/8111f",0
		1469	name_37 db "RTL8402",0
		1470	name_38 db "RTL8411",0
		1471	name_39 db "RTL8106e",0
		1472	name_40 db "RTL8168g/8111g",0
		1473	;name_41 db "RTL8168g/8111g",0
		1474	;name_42 db "RTL8168g/8111g",0
		1475	;name_43 db "RTL8106e",0
		1476	name_44 db "RTL8411",0
		1477	name_45 db "RTL8168h/8111h",0
		1478	;name_46 db "RTL8168h/8111h",0
		1479	name_47 db "RTL8107e",0
		1480	;name_48 db "RTL8107e",0
		1481	name_49 db "RTL8168ep/8111ep",0
		1482	;name_50 db "RTL8168ep/8111ep",0
		1483	;name_51 db "RTL8168ep/8111ep",0
		1484
		1485	name_unknown db "unknown RTL8169 clone",0
		1486
5050	hidnplayr	1487	align 4
		1488	devices dd 0
3545	hidnplayr	1489	device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling
		1490

Subversion Repositories Kolibri OS

(root)/drivers/ethernet/RTL8169.asm – Rev 7250