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3083 leency 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
;;                                                              ;;
5363 yogev_ezra 3
;; Copyright (C) KolibriOS team 2004-2015. All rights reserved. ;;
3083 leency 4
;; Distributed under terms of the GNU General Public License    ;;
5
;;                                                              ;;
6
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7
 
5048 Asper 8
format PE DLL native 0.05
9
section '.flat' code readable writable executable
3083 leency 10
 
11
DEBUG		equ 1
3498 mario79 12
FDEBUG		equ 0
3083 leency 13
DEBUG_IRQ	equ 0
14
 
5048 Asper 15
USE_SINGLE_MODE equ  0	 ; 1 = Single mode; 0 = Normal mode.
16
USE_UNSOL_EV	equ  1	 ; 1 = Use unsolicited events; 0 = Do not use unsolicited events.
3083 leency 17
 
5048 Asper 18
TEST_VERSION_NUMBER  equ '019'
3083 leency 19
 
20
;Asper+ [
5048 Asper 21
SDO_TAG  equ 1	      ;Output stream tag id (any number except 0)
22
SDO_IDX  equ 4	      ;Output stream index
3083 leency 23
;According to "Intel® I/O Controller Hub 6 (ICH6) High Definition Audio / AC ’97 Programmer’s Reference Manual (PRM) May 2005 Document"
24
;and "Intel® I/O Controller Hub 6 (ICH6) Family Datasheet" SDO0=4,
25
;but according to "High Definition Audio Specification Revision 1.0a June 17, 2010" SDO0 depends on the number of SDIs.
26
 
5048 Asper 27
SDO_INT 	equ 1 shl SDO_IDX	;Output stream interrupt (must be power of 2)
28
SDO_OFS 	equ 0x80+(SDO_IDX*0x20) ;Output stream offset
3083 leency 29
;Asper+ ]
30
 
31
CURRENT_API	equ   0x0100	  ;1.00
32
COMPATIBLE_API	equ   0x0101	  ;1.01
33
API_VERSION	equ   (COMPATIBLE_API shl 16) or CURRENT_API
34
 
35
IRQ_REMAP	equ 0
36
IRQ_LINE	equ 0
37
 
38
CPU_FREQ	equ  2600d
39
 
40
; Vendors
41
VID_INTEL	  equ 0x8086
42
VID_NVIDIA	  equ 0x10DE
43
VID_ATI 	  equ 0x1002
44
VID_AMD 	  equ 0x1022
3170 hidnplayr 45
VID_VIA 	  equ 0x1106
3083 leency 46
VID_SIS 	  equ 0x1039
47
VID_ULI 	  equ 0x10B9
48
VID_CREATIVE	  equ 0x1102
49
VID_TERA	  equ 0x6549
50
VID_RDC 	  equ 0x17F3
51
VID_VMWARE	  equ 0x15AD
52
 
53
; Devices
54
; Intel
55
CTRL_INTEL_SCH2 	 equ  0x080a
56
CTRL_INTEL_HPT		 equ  0x0c0c
57
CTRL_INTEL_CPT		 equ  0x1c20
58
CTRL_INTEL_PGB		 equ  0x1d20
59
CTRL_INTEL_PPT1 	 equ  0x1e20
60
CTRL_INTEL_82801F	 equ  0x2668
61
CTRL_INTEL_63XXESB	 equ  0x269a
62
CTRL_INTEL_82801G	 equ  0x27d8
63
CTRL_INTEL_82801H	 equ  0x284b
64
CTRL_INTEL_82801_UNK1	 equ  0x2911
65
CTRL_INTEL_82801I	 equ  0x293e
66
CTRL_INTEL_82801_UNK2	 equ  0x293f
67
CTRL_INTEL_82801JI	 equ  0x3a3e
68
CTRL_INTEL_82801JD	 equ  0x3a6e
69
CTRL_INTEL_PCH		 equ  0x3b56
70
CTRL_INTEL_PCH2 	 equ  0x3b57
71
CTRL_INTEL_SCH		 equ  0x811b
72
CTRL_INTEL_LPT		 equ  0x8c20
73
; Nvidia
74
CTRL_NVIDIA_MCP51	 equ  0x026c
75
CTRL_NVIDIA_MCP55	 equ  0x0371
76
CTRL_NVIDIA_MCP61_1	 equ  0x03e4
77
CTRL_NVIDIA_MCP61_2	 equ  0x03f0
78
CTRL_NVIDIA_MCP65_1	 equ  0x044a
79
CTRL_NVIDIA_MCP65_2	 equ  0x044b
80
CTRL_NVIDIA_MCP67_1	 equ  0x055c
81
CTRL_NVIDIA_MCP67_2	 equ  0x055d
82
CTRL_NVIDIA_MCP78_1	 equ  0x0774
83
CTRL_NVIDIA_MCP78_2	 equ  0x0775
84
CTRL_NVIDIA_MCP78_3	 equ  0x0776
85
CTRL_NVIDIA_MCP78_4	 equ  0x0777
86
CTRL_NVIDIA_MCP73_1	 equ  0x07fc
87
CTRL_NVIDIA_MCP73_2	 equ  0x07fd
88
CTRL_NVIDIA_MCP79_1	 equ  0x0ac0
89
CTRL_NVIDIA_MCP79_2	 equ  0x0ac1
90
CTRL_NVIDIA_MCP79_3	 equ  0x0ac2
91
CTRL_NVIDIA_MCP79_4	 equ  0x0ac3
92
CTRL_NVIDIA_0BE2	 equ  0x0be2
93
CTRL_NVIDIA_0BE3	 equ  0x0be3
94
CTRL_NVIDIA_0BE4	 equ  0x0be4
95
CTRL_NVIDIA_GT100	 equ  0x0be5
96
CTRL_NVIDIA_GT106	 equ  0x0be9
97
CTRL_NVIDIA_GT108	 equ  0x0bea
98
CTRL_NVIDIA_GT104	 equ  0x0beb
99
CTRL_NVIDIA_GT116	 equ  0x0bee
100
CTRL_NVIDIA_MCP89_1	 equ  0x0d94
101
CTRL_NVIDIA_MCP89_2	 equ  0x0d95
102
CTRL_NVIDIA_MCP89_3	 equ  0x0d96
103
CTRL_NVIDIA_MCP89_4	 equ  0x0d97
104
CTRL_NVIDIA_GF119	 equ  0x0e08
105
CTRL_NVIDIA_GF110_1	 equ  0x0e09
106
CTRL_NVIDIA_GF110_2	 equ  0x0e0c
107
; ATI
108
CTRL_ATI_SB450		 equ  0x437b
109
CTRL_ATI_SB600		 equ  0x4383
110
; ATI HDMI
111
CTRL_ATI_RS600		 equ  0x793b
112
CTRL_ATI_RS690		 equ  0x7919
113
CTRL_ATI_RS780		 equ  0x960f
114
CTRL_ATI_RS_UNK1	 equ  0x970f
115
CTRL_ATI_R600		 equ  0xaa00
116
CTRL_ATI_RV630		 equ  0xaa08
117
CTRL_ATI_RV610		 equ  0xaa10
118
CTRL_ATI_RV670		 equ  0xaa18
119
CTRL_ATI_RV635		 equ  0xaa20
120
CTRL_ATI_RV620		 equ  0xaa28
121
CTRL_ATI_RV770		 equ  0xaa30
122
CTRL_ATI_RV730		 equ  0xaa38
123
CTRL_ATI_RV710		 equ  0xaa40
124
CTRL_ATI_RV740		 equ  0xaa48
125
; AMD
126
CTRL_AMD_HUDSON 	 equ  0x780d
127
; VIA
128
CTRL_VIA_VT82XX 	 equ  0x3288
129
CTRL_VIA_VT61XX 	 equ  0x9140
130
CTRL_VIA_VT71XX 	 equ  0x9170
131
; SiS
132
CTRL_SIS_966		 equ  0x7502
133
; ULI
134
CTRL_ULI_M5461		 equ  0x5461
135
; Creative
136
CTRL_CREATIVE_CA0110_IBG     equ  0x0009
137
CTRL_CREATIVE_SOUND_CORE3D_1 equ  0x0010
138
CTRL_CREATIVE_SOUND_CORE3D_2 equ  0x0012
139
; Teradici
140
CTRL_TERA_UNK1		 equ  0x1200
141
; RDC Semiconductor
142
CTRL_RDC_R3010		 equ  0x3010
143
;VMware
144
CTRL_VMWARE_UNK1	 equ  0x1977
145
 
146
 
147
; driver types
148
AZX_DRIVER_ICH		 equ  0
149
AZX_DRIVER_PCH		 equ  1
150
AZX_DRIVER_SCH		 equ  2
151
AZX_DRIVER_ATI		 equ  3
152
AZX_DRIVER_ATIHDMI	 equ  4
153
AZX_DRIVER_VIA		 equ  5
154
AZX_DRIVER_SIS		 equ  6
155
AZX_DRIVER_ULI		 equ  7
156
AZX_DRIVER_NVIDIA	 equ  8
157
AZX_DRIVER_TERA 	 equ  9
158
AZX_DRIVER_CTX		 equ  10
159
AZX_DRIVER_GENERIC	 equ  11
160
AZX_NUM_DRIVERS 	 equ  12
161
 
162
 
163
; registers
164
 
165
ICH6_REG_GCAP		 equ  0x00
166
ICH6_REG_VMIN		 equ  0x02
167
ICH6_REG_VMAJ		 equ  0x03
168
ICH6_REG_OUTPAY 	 equ  0x04
169
ICH6_REG_INPAY		 equ  0x06
170
ICH6_REG_GCTL		 equ  0x08
171
  ICH6_GCTL_RESET	   equ	(1 shl 0)  ; controller reset
172
  ICH6_GCTL_FCNTRL	   equ	(1 shl 1)  ; flush control
173
  ICH6_GCTL_UNSOL	   equ	(1 shl 8)  ; accept unsol. response enable
174
ICH6_REG_WAKEEN 	 equ  0x0c
175
ICH6_REG_STATESTS	 equ  0x0e
176
ICH6_REG_GSTS		 equ  0x10
177
  ICH6_GSTS_FSTS	   equ	(1 shl 1)  ; flush status
178
ICH6_REG_INTCTL 	 equ  0x20
179
ICH6_REG_INTSTS 	 equ  0x24
180
ICH6_REG_WALLCLK	 equ  0x30  ; 24Mhz source
181
ICH6_REG_OLD_SSYNC	 equ  0x34  ; SSYNC for old ICH
182
ICH6_REG_SSYNC		 equ  0x38
183
ICH6_REG_CORBLBASE	 equ  0x40
184
ICH6_REG_CORBUBASE	 equ  0x44
185
ICH6_REG_CORBWP 	 equ  0x48
186
ICH6_REG_CORBRP 	 equ  0x4A
187
  ICH6_CORBRP_RST	   equ	(1 shl 15)  ; read pointer reset
188
ICH6_REG_CORBCTL	 equ  0x4c
189
  ICH6_CORBCTL_RUN	   equ	(1 shl 1)   ; enable DMA
190
  ICH6_CORBCTL_CMEIE	   equ	(1 shl 0)   ; enable memory error irq
191
ICH6_REG_CORBSTS	 equ  0x4d
192
  ICH6_CORBSTS_CMEI	   equ	(1 shl 0)   ; memory error indication
193
ICH6_REG_CORBSIZE	 equ  0x4e
194
 
195
ICH6_REG_RIRBLBASE	 equ  0x50
196
ICH6_REG_RIRBUBASE	 equ  0x54
197
ICH6_REG_RIRBWP 	 equ  0x58
198
  ICH6_RIRBWP_RST	   equ	(1 shl 15)  ; write pointer reset
199
ICH6_REG_RINTCNT	 equ  0x5a
200
ICH6_REG_RIRBCTL	 equ  0x5c
201
  ICH6_RBCTL_IRQ_EN	   equ	(1 shl 0)   ; enable IRQ
202
  ICH6_RBCTL_DMA_EN	   equ	(1 shl 1)   ; enable DMA
203
  ICH6_RBCTL_OVERRUN_EN    equ	(1 shl 2)   ; enable overrun irq
204
ICH6_REG_RIRBSTS	 equ  0x5d
205
  ICH6_RBSTS_IRQ	   equ	(1 shl 0)   ; response irq
206
  ICH6_RBSTS_OVERRUN	   equ	(1 shl 2)   ; overrun irq
207
ICH6_REG_RIRBSIZE	 equ  0x5e
208
 
209
ICH6_REG_IC		 equ  0x60
210
ICH6_REG_IR		 equ  0x64
211
ICH6_REG_IRS		 equ  0x68
212
  ICH6_IRS_VALID	   equ	2
213
  ICH6_IRS_BUSY 	   equ	1
214
 
215
ICH6_REG_DPLBASE	 equ  0x70
216
ICH6_REG_DPUBASE	 equ  0x74
217
  ICH6_DPLBASE_ENABLE	   equ	1     ; Enable position buffer
218
 
219
; SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
220
SDI0_SD_OFFSET	  equ  0x80
221
SDI1_SD_OFFSET	  equ  0xA0
222
SDI2_SD_OFFSET	  equ  0xC0
223
SDI3_SD_OFFSET	  equ  0xE0
224
SDO0_SD_OFFSET	  equ  0x100
225
SDO1_SD_OFFSET	  equ  0x120
226
SDO2_SD_OFFSET	  equ  0X140
227
SDO3_SD_OFFSET	  equ  0x160
228
 
229
; stream register offsets from stream base
230
ICH6_REG_SD_CTL 	 equ  0x00
231
ICH6_REG_SD_STS 	 equ  0x03
232
ICH6_REG_SD_LPIB	 equ  0x04
233
ICH6_REG_SD_CBL 	 equ  0x08
234
ICH6_REG_SD_LVI 	 equ  0x0c
235
ICH6_REG_SD_FIFOW	 equ  0x0e
236
ICH6_REG_SD_FIFOSIZE	 equ  0x10
237
ICH6_REG_SD_FORMAT	 equ  0x12
238
ICH6_REG_SD_BDLPL	 equ  0x18
239
ICH6_REG_SD_BDLPU	 equ  0x1c
240
 
241
; PCI space
242
ICH6_PCIREG_TCSEL	 equ  0x44
243
 
244
; other constants
245
ICH6_RIRB_EX_UNSOL_EV	 equ   (1 shl 4)
246
 
247
; max number of SDs
248
MAX_ICH6_DEV		 equ  8
249
; max number of fragments - we may use more if allocating more pages for BDL
250
AZX_MAX_FRAG		 equ  (4096 / (MAX_ICH6_DEV * 16))
251
; max buffer size - no h/w limit, you can increase as you like
252
AZX_MAX_BUF_SIZE	 equ  (1024*1024*1024)
253
; max number of PCM devices per card
254
AZX_MAX_PCMS		 equ  8
255
 
256
; RIRB int mask: overrun[2], response[0]
257
RIRB_INT_RESPONSE	 equ  0x01
258
RIRB_INT_OVERRUN	 equ  0x04
259
RIRB_INT_MASK		 equ  0x05
260
 
261
; STATESTS int mask: SD2,SD1,SD0
262
STATESTS_INT_MASK	 equ  0x07
263
AZX_MAX_CODECS		 equ  4
264
 
265
; SD_CTL bits
266
SD_CTL_STREAM_RESET	 equ  0x01    ; stream reset bit
267
SD_CTL_DMA_START	 equ  0x02    ; stream DMA start bit
268
SD_CTL_STREAM_TAG_MASK	 equ  (0xf shl 20)
269
SD_CTL_STREAM_TAG_SHIFT  equ  20
270
 
271
; SD_CTL and SD_STS
272
SD_INT_DESC_ERR 	 equ  0x10    ; descriptor error interrupt
273
SD_INT_FIFO_ERR 	 equ  0x08    ; FIFO error interrupt
274
SD_INT_COMPLETE 	 equ  0x04    ; completion interrupt
275
SD_INT_MASK		 equ  (SD_INT_DESC_ERR or SD_INT_FIFO_ERR or SD_INT_COMPLETE)
276
 
277
; SD_STS
278
SD_STS_FIFO_READY	 equ  0x20    ; FIFO ready
279
 
280
; INTCTL and INTSTS
281
ICH6_INT_ALL_STREAM	 equ  0xff	      ; all stream interrupts
282
ICH6_INT_CTRL_EN	 equ  0x40000000      ; controller interrupt enable bit
283
ICH6_INT_GLOBAL_EN	 equ  0x80000000      ; global interrupt enable bit
284
 
285
; GCTL reset bit
286
ICH6_GCTL_RESET 	 equ  1
287
 
288
; CORB/RIRB control, read/write pointer
289
ICH6_RBCTL_DMA_EN	 equ  0x02    ; enable DMA
290
ICH6_RBCTL_IRQ_EN	 equ  0x01    ; enable IRQ
291
ICH6_RBRWP_CLR		 equ  0x8000  ; read/write pointer clear
292
; below are so far hardcoded - should read registers in future
293
ICH6_MAX_CORB_ENTRIES	 equ  256
294
ICH6_MAX_RIRB_ENTRIES	 equ  256
295
 
296
; position fix mode
5048 Asper 297
POS_FIX_AUTO		 equ  0
298
POS_FIX_LPIB		 equ  1
299
POS_FIX_POSBUF		 equ  2
300
POS_FIX_VIACOMBO	 equ  4
301
POS_FIX_COMBO		 equ  8
3083 leency 302
 
303
; Defines for ATI HD Audio support in SB450 south bridge
304
ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   equ  0x42
305
ATI_SB450_HDAUDIO_ENABLE_SNOOP	    equ  0x02
306
 
307
; Defines for Nvidia HDA support
308
NVIDIA_HDA_TRANSREG_ADDR	    equ  0x4e
309
NVIDIA_HDA_ENABLE_COHBITS	    equ  0x0f
310
NVIDIA_HDA_ISTRM_COH		    equ  0x4d
311
NVIDIA_HDA_OSTRM_COH		    equ  0x4c
312
NVIDIA_HDA_ENABLE_COHBIT	    equ  0x01
313
 
314
; Defines for Intel SCH HDA snoop control
315
INTEL_SCH_HDA_DEVC		    equ  0x78
316
INTEL_SCH_HDA_DEVC_NOSNOOP	    equ  (0x1 shl 11)
317
 
318
; Define IN stream 0 FIFO size offset in VIA controller
319
VIA_IN_STREAM0_FIFO_SIZE_OFFSET     equ  0x90
320
; Define VIA HD Audio Device ID
321
VIA_HDAC_DEVICE_ID		    equ  0x3288
322
 
323
; HD Audio class code
324
PCI_CLASS_MULTIMEDIA_HD_AUDIO	    equ  0x0403
325
 
326
 
327
SRV_GETVERSION		 equ  0
328
DEV_PLAY		 equ  1
329
DEV_STOP		 equ  2
330
DEV_CALLBACK		 equ  3
331
DEV_SET_BUFF		 equ  4
332
DEV_NOTIFY		 equ  5
333
DEV_SET_MASTERVOL	 equ  6
334
DEV_GET_MASTERVOL	 equ  7
335
DEV_GET_INFO		 equ  8
336
DEV_GET_POS		 equ  9
337
DEV_SET_CHANNEL_VOLUME	 equ  10
338
DEV_GET_CHANNEL_VOLUME	 equ  11
339
;Asper: Non standard system service. For the tests only! [
340
DEV_EXEC_CODEC_CMD	 equ  100
341
;Asper: Non standard system service. For the tests only! ]
342
 
343
struc AC_CNTRL		    ;AC controller base class
5048 Asper 344
{
345
	.bus		    dd ?
346
	.devfn		    dd ?
3083 leency 347
 
5048 Asper 348
	.vendor 	    dw ?
349
	.dev_id 	    dw ?
350
	.pci_cmd	    dd ?
351
	.pci_stat	    dd ?
3083 leency 352
 
5048 Asper 353
	.ctrl_io_base	    dd ?
354
	.ctrl_mem_base	    dd ?
355
	.cfg_reg	    dd ?
356
	.int_line	    dd ?
3083 leency 357
 
5048 Asper 358
	.vendor_ids	    dd ?    ;vendor id string
359
	.ctrl_ids	    dd ?    ;hub id string
3083 leency 360
 
5048 Asper 361
	.buffer 	    dd ?
3083 leency 362
 
5048 Asper 363
	.notify_pos	    dd ?
364
	.notify_task	    dd ?
3083 leency 365
 
5048 Asper 366
	.lvi_reg	    dd ?
367
	.civ_val	    dd 1
368
	.user_callback	    dd ?
3083 leency 369
 
5048 Asper 370
	.ctrl_read8	    dd ?
371
	.ctrl_read16	    dd ?
372
	.ctrl_read32	    dd ?
3083 leency 373
 
5048 Asper 374
	.ctrl_write8	    dd ?
375
	.ctrl_write16	    dd ?
376
	.ctrl_write32	    dd ?
3083 leency 377
 
5048 Asper 378
	.codec_mask	    dd ?
379
	.rb		    dd ?
380
	.rirb_rp	    dw 0
381
	.rirb_wp	    dw 0
382
	.corb_rp	    dw 0
383
	.corb_wp	    dw 0
384
	.rirb_cmd	    dd 0
385
	.rirb_res	    dd 0
386
	.rirb_error	    dd 0
387
	.response_reset     dd 0
388
	.polling_mode	    db 0
389
	.poll_count	    db 0
390
	.posbuf 	    dd ?
391
	.start_wallclk	    dd ? ; start + minimum wallclk
392
	.period_wallclk     dd ? ; wallclk for period
393
	.position_fix	    db ?
3083 leency 394
}
395
 
396
struc CODEC		   ;Audio Chip base class
397
{
5048 Asper 398
	.addr		    dd ?    ; codec slot index (codec address)
399
	.afg		    dd ?    ; AFG node id
400
	.mfg		    dd ?    ; MFG node id
3083 leency 401
 
5048 Asper 402
	.function_id	    dd ?
403
	.subsystem_id	    dd ?
404
	.revision_id	    dd ?
405
	.chip_id	    dw ?
406
	.vendor_id	    dw ?
3083 leency 407
 
5048 Asper 408
	; widget capabilities cache
409
	.num_nodes	    dw ?
410
	.start_nid	    dw ?
411
	.wcaps		    dd ?
3083 leency 412
 
5048 Asper 413
	.init_pins	    dd ?    ; initial (BIOS) pin configurations
414
	.num_pins	    dd ?    ;Asper +  : word is enough, but for align...
415
	.beeper_nid	    dw ?
416
		      .pad  dw ?
3083 leency 417
 
5048 Asper 418
	.ac_vendor_ids	    dd ?    ;ac vendor id string
419
	.chip_ids	    dd ?    ;chip model string
3083 leency 420
}
421
 
422
struc CTRL_INFO
5048 Asper 423
{
424
	.pci_cmd	    dd ?
425
	.irq		    dd ?
426
	.glob_cntrl	    dd ?
427
	.glob_sta	    dd ?
428
	.codec_io_base	    dd ?
429
	.ctrl_io_base	    dd ?
430
	.codec_mem_base     dd ?
431
	.ctrl_mem_base	    dd ?
432
	.codec_id	    dd ?
3083 leency 433
}
434
 
435
struc IOCTL
5048 Asper 436
{
437
	.handle 	    dd ?
438
	.io_code	    dd ?
439
	.input		    dd ?
440
	.inp_size	    dd ?
441
	.output 	    dd ?
442
	.out_size	    dd ?
3083 leency 443
}
444
 
445
EVENT_NOTIFY	equ 0x00000200
446
 
3496 Asper 447
; Macroses by CleverMouse
448
; The following macro assume that we are on uniprocessor machine.
449
; Serious work is needed for multiprocessor machines.
450
macro spin_lock_irqsave spinlock
451
{
452
	pushf
453
	cli
454
}
455
macro spin_unlock_irqrestore spinlock
456
{
457
	popf
458
}
459
macro spin_lock_irq spinlock
460
{
461
	cli
462
}
463
macro spin_unlock_irq spinlock
464
{
465
	sti
466
}
467
 
468
SPINLOCK_BUSY = 1
469
SPINLOCK_FREE = 0
470
 
471
macro spin_lock
472
{
473
	push	eax ebx
474
	mov	eax, aspinlock
475
	mov	ebx, SPINLOCK_BUSY
5048 Asper 476
@@:
3496 Asper 477
	lock	xchg [eax], ebx
478
	cmp	ebx, SPINLOCK_FREE
479
	jnz	@b
480
	pop	ebx eax
481
}
482
 
483
macro spin_unlock
484
{
485
	push	eax ebx
486
	mov	eax, aspinlock
487
	mov	eax, aspinlock
488
	mov	ebx, SPINLOCK_FREE
5048 Asper 489
	lock	xchg	[eax], ebx
3496 Asper 490
	pop	ebx eax
491
}
492
 
5048 Asper 493
data fixups
494
end data
3083 leency 495
 
5048 Asper 496
include '../../struct.inc'
497
include '../../macros.inc'
498
include '../../proc32.inc'
499
include '../../peimport.inc'
500
include 'CODEC_H.INC'
3083 leency 501
 
5048 Asper 502
entry START
3083 leency 503
 
5077 clevermous 504
;proc START c, reason:dword, cmdline:dword
505
proc START
5048 Asper 506
	push	ebx esi ; save used registers to be stdcall
507
virtual at esp
508
		rd	2 ; saved registers
509
		dd	? ; return address
510
.reason 	dd	? ; DRV_ENTRY or DRV_EXIT
511
.cmdline	dd	? ; normally NULL
512
end virtual
513
; 1. Check the reason for the call, do nothing unless initializing.
5077 clevermous 514
	cmp	[.reason], DRV_ENTRY
515
	jne	.stop
3083 leency 516
 
5048 Asper 517
if DEBUG
518
	mov	esi, msgTV
519
	invoke	SysMsgBoardStr
3083 leency 520
 
5048 Asper 521
	mov	esi, msgInit
522
	invoke	SysMsgBoardStr
523
end if
3083 leency 524
 
5048 Asper 525
	call	detect_controller
526
	test	eax, eax
527
	jz	.fail
3083 leency 528
 
5048 Asper 529
	mov	esi,[ctrl.vendor_ids]
530
	invoke	SysMsgBoardStr
531
	mov	esi, [ctrl.ctrl_ids]
532
	invoke	SysMsgBoardStr
3083 leency 533
 
5048 Asper 534
	call	init_controller
535
	test	eax, eax
536
	jz	.fail
3083 leency 537
 
538
;Asper This part is from "azx_create" proc. [
5048 Asper 539
	mov	[ctrl.position_fix], POS_FIX_LPIB
540
	cmp	[driver_type], AZX_DRIVER_VIA
541
	je	.set_via_patch
542
	cmp	[driver_type], AZX_DRIVER_ATI
543
	jne	.no_via_patch
544
.set_via_patch:
545
	or	[ctrl.position_fix], POS_FIX_VIACOMBO
546
.no_via_patch:
547
	; codec detection
548
	mov	eax, [ctrl.codec_mask]
549
	test	eax, eax
550
	jnz	@f
551
if DEBUG
552
	mov	esi, msgNoCodecsFound
553
	jmp	.fail_msg
554
else
555
	jmp	.fail
556
end if
557
@@:
3083 leency 558
;Asper ]
559
 
5048 Asper 560
	mov	esi, msgPrimBuff
561
	invoke	SysMsgBoardStr
562
	call	create_primary_buff
563
	mov	esi, msgDone
564
	invoke	SysMsgBoardStr
3083 leency 565
 
5048 Asper 566
if IRQ_REMAP
567
	pushf
568
	cli
3083 leency 569
 
5048 Asper 570
	mov	ebx, [ctrl.int_line]
571
	in	al, 0xA1
572
	mov	ah, al
573
	in	al, 0x21
574
	test	ebx, ebx
575
	jz	.skip
576
	bts	ax, bx			;mask old line
3083 leency 577
.skip
5048 Asper 578
	bts	ax, IRQ_LINE		;mask new line
579
	out	0x21, al
580
	mov	al, ah
581
	out	0xA1, al
3083 leency 582
					   ;remap IRQ
5048 Asper 583
	invoke	PciWrite8, 0, 0xF8, 0x61, IRQ_LINE
3083 leency 584
 
5048 Asper 585
	mov	dx, 0x4d0		;8259 ELCR1
586
	in	al, dx
587
	bts	ax, IRQ_LINE
588
	out	dx, al			;set level-triggered mode
589
	mov	[ctrl.int_line], IRQ_LINE
590
	popf
591
	mov	esi, msgRemap
592
	invoke	SysMsgBoardStr
593
end if
3083 leency 594
 
5048 Asper 595
	mov	ebx, [ctrl.int_line]
596
	invoke	AttachIntHandler, ebx, hda_irq, dword 0
3083 leency 597
 
598
;Asper This part is from "azx_probe" proc. [
5048 Asper 599
	call	azx_codec_create
600
	cmp	eax, 0
601
	jl	.fail
3083 leency 602
 
5048 Asper 603
	call	azx_codec_configure
604
	cmp	eax, 0
605
	jl	.fail
3083 leency 606
;] Asper
607
 
5048 Asper 608
	; create PCM streams
3083 leency 609
;Asper+ [
5048 Asper 610
	mov	eax, [spec.dac_node]
611
if DEBUG ;-
612
	push	eax esi
613
	mov	esi, msgVal
614
	invoke	SysMsgBoardStr
615
	stdcall  fdword2str, 3
616
	invoke	SysMsgBoardStr
617
	pop	esi eax
618
end if
3083 leency 619
 
5048 Asper 620
	test	eax, eax
621
	jz	.fail
622
	mov	ebx, [spec.dac_node+4]
623
if DEBUG ;-
624
	push	eax esi
625
	mov	esi, msgVal
626
	invoke	SysMsgBoardStr
627
	mov	eax, [spec.dac_node+4]
628
	stdcall fdword2str, 3
629
	invoke	SysMsgBoardStr
630
	pop	esi eax
631
end if
3083 leency 632
 
5048 Asper 633
	test	ebx, ebx
634
	jz	@f
635
	cmp	eax, ebx
636
	je	@f
637
	stdcall hda_codec_setup_stream, ebx, SDO_TAG, 0, 0x11	; Left & Right channels (Front panel)
638
@@:
639
	stdcall hda_codec_setup_stream, eax, SDO_TAG, 0, 0x11	; Left & Right channels (Back panel)
3083 leency 640
;Asper+ ]
641
 
5048 Asper 642
if USE_SINGLE_MODE
643
	mov	esi, msgSingleMode
644
	invoke	SysMsgBoardStr
645
else
646
	mov	esi, msgNormalMode
647
	invoke	SysMsgBoardStr
648
end if
3083 leency 649
 
650
.reg:
5048 Asper 651
	invoke	RegService, sz_sound_srv, service_proc
652
	pop	esi ebx
653
	ret
3083 leency 654
.fail:
5048 Asper 655
	mov	esi, msgFail
3083 leency 656
.fail_msg:
5048 Asper 657
	invoke	SysMsgBoardStr
658
	pop	esi ebx
659
	xor	eax, eax
660
	ret
3083 leency 661
.stop:
5048 Asper 662
	call	stop
663
	pop	esi ebx
664
	xor	eax, eax
665
	ret
3083 leency 666
endp
667
 
668
handle	   equ	IOCTL.handle
669
io_code    equ	IOCTL.io_code
670
input	   equ	IOCTL.input
671
inp_size   equ	IOCTL.inp_size
672
output	   equ	IOCTL.output
673
out_size   equ	IOCTL.out_size
674
 
675
align 4
676
proc service_proc stdcall, ioctl:dword
5048 Asper 677
	mov	edi, [ioctl]
678
	mov	eax, [edi+io_code]
3083 leency 679
 
5048 Asper 680
	cmp	eax, SRV_GETVERSION
681
	jne	@F
3083 leency 682
 
5048 Asper 683
	mov	eax, [edi+output]
684
	cmp	[edi+out_size], 4
685
	jne	.fail
3083 leency 686
 
5048 Asper 687
	mov	[eax], dword API_VERSION
688
	xor	eax, eax
689
	ret
3083 leency 690
@@:
5048 Asper 691
	cmp	eax, DEV_PLAY
692
	jne	@F
693
if DEBUG
694
	mov	esi, msgPlay
695
	invoke	SysMsgBoardStr
696
end if
697
	call	play
698
	xor	eax, eax
699
	ret
3083 leency 700
@@:
5048 Asper 701
	cmp	eax, DEV_STOP
702
	jne	@F
703
if DEBUG
704
	mov	esi, msgStop
705
	invoke	SysMsgBoardStr
706
end if
707
	call	stop
708
	xor	eax, eax
709
	ret
3083 leency 710
@@:
5048 Asper 711
	cmp	eax, DEV_CALLBACK
712
	jne	@f
713
	mov	ebx, [edi+input]
714
	stdcall set_callback, [ebx]
715
	xor	eax, eax
716
	ret
3083 leency 717
@@:
5048 Asper 718
	cmp	eax, DEV_SET_MASTERVOL
719
	jne	@f
720
	mov	eax, [edi+input]
721
	mov	eax, [eax]
722
	call	set_master_vol
723
	xor	eax, eax
724
	ret
3083 leency 725
@@:
5048 Asper 726
	cmp	eax, DEV_GET_MASTERVOL
727
	jne	@f
728
	mov	ebx, [edi+output]
729
	stdcall get_master_vol, ebx
730
	xor	eax, eax
731
	ret
3083 leency 732
;@@:
5048 Asper 733
;        cmp     eax, DEV_GET_INFO
734
;        jne     @f
735
;        mov     ebx, [edi+output]
736
;        stdcall get_dev_info, ebx
737
;        xor     eax, eax
738
;        ret
3083 leency 739
@@:
5048 Asper 740
	cmp	eax, DEV_GET_POS
741
	jne	@f
742
	stdcall azx_get_position
743
	shr	eax, 2
744
	mov	ebx, [edi+output]
745
	mov	[ebx], eax
746
	xor	eax, eax
747
	ret
3083 leency 748
@@:
5048 Asper 749
;        cmp     eax, DEV_SET_CHANNEL_VOLUME
750
;        jne     @f
751
;if DEBUG
752
;        mov     esi, msgSetChannelVolume
753
;        invoke  SysMsgBoardStr
754
;end if
755
;        mov      ebx, [edi+input]
756
;        mov      cl,  byte [ebx]      ; cl=channel
757
;        mov      eax, dword [ebx+1]   ; eax=volume in Db
758
;if DEBUG
759
;        push    eax esi
760
;        mov     esi, msgYAHOO1
761
;        invoke  SysMsgBoardStr
762
;        stdcall fdword2str, 1
763
;        invoke  SysMsgBoardStr
764
;        mov     esi, strSemicolon
765
;        invoke  SysMsgBoardStr
766
;        movzx   eax, cl
767
;        stdcall fdword2str, 3
768
;        invoke  SysMsgBoardStr
769
;        pop     esi eax
770
;end if
771
;    ;        call    set_channel_volume
772
;        xor     eax, eax
773
;        ret
3083 leency 774
;@@:
5048 Asper 775
;        cmp     eax, DEV_GET_CHANNEL_VOLUME
776
;        jne     @f
777
;        mov     cl,  byte [edi+input]  ; cl=channel
778
;        call    get_channel_volume
779
;        mov     ebx, [edi+output]
780
;        mov     [ebx], eax
781
;        xor     eax, eax
782
;        ret
3083 leency 783
;@@:
784
 
785
;Asper: Non standard system service. For the tests only! [
786
@@:
5048 Asper 787
	cmp	 eax, DEV_EXEC_CODEC_CMD
788
	jne	 @f
3083 leency 789
 
5048 Asper 790
	mov	 eax, [edi+input]
791
	mov	 eax, [eax]
792
	stdcall  codec_exec_verb, eax
793
	xor	 eax, eax
794
	ret
3083 leency 795
@@:
796
;Asper: Non standard system service. For the tests only! ]
797
 
798
.fail:
5048 Asper 799
	or	 eax, -1
800
	ret
3083 leency 801
endp
802
 
5048 Asper 803
restore handle
804
restore io_code
805
restore input
806
restore inp_size
807
restore output
808
restore out_size
3083 leency 809
 
810
 
811
align 4
812
proc hda_irq   ;+
5048 Asper 813
	spin_lock
814
if DEBUG_IRQ
815
	push	eax esi
816
	;mov     esi, msgIRQ
817
	;invoke  SysMsgBoardStr
818
	call	GetTimerTicks
819
	stdcall fdword2str, 2
820
	invoke	SysMsgBoardStr
821
	pop	esi eax
822
end if
823
	mov	edx, ICH6_REG_INTSTS
824
	call	azx_readl
825
	test	eax, eax
826
	jnz	@f
827
	spin_unlock
828
	ret
829
@@:
830
	mov	ebx, eax ; status
831
	mov	eax, SDO_INT
832
	test	ebx, eax
833
	jz	@f
3083 leency 834
 
5048 Asper 835
	mov	edx, ICH6_REG_SD_STS + SDO_OFS
836
	call	azx_readb
837
	mov	bl, al
3083 leency 838
 
5048 Asper 839
	mov	al, SD_INT_MASK
840
	mov	edx, ICH6_REG_SD_STS + SDO_OFS
841
	call	azx_writeb
3083 leency 842
 
5048 Asper 843
	test	bl, SD_INT_COMPLETE
844
	jz	@f
3083 leency 845
 
5048 Asper 846
	mov	eax, [ctrl.civ_val]
847
	inc	eax
848
	and	eax, 4-1 ;2-1
849
	mov	[ctrl.civ_val], eax
3083 leency 850
 
5048 Asper 851
	mov	ebx, dword [buff_list+eax*4]
852
	cmp	[ctrl.user_callback], 0
853
	je	@f
854
	stdcall [ctrl.user_callback], ebx
855
@@:
856
	; clear rirb int
857
	mov	edx, ICH6_REG_RIRBSTS
858
	call	azx_readb
3083 leency 859
 
5048 Asper 860
	test	al, RIRB_INT_MASK
861
	jz	.l1
862
	test	al, RIRB_INT_RESPONSE
863
	jz	.l2
3083 leency 864
 
5048 Asper 865
	cmp	byte [driver_type], AZX_DRIVER_CTX
866
	jne	@f
867
	mov	eax, 80    ; wait 80 us
868
	call	StallExec
869
@@:
870
	call	azx_update_rirb
871
.l2:
872
	mov	al, RIRB_INT_MASK
873
	mov	edx, ICH6_REG_RIRBSTS
874
	call	azx_writeb
875
.l1:
3083 leency 876
 
877
;if 0
878
	; clear state status int
5048 Asper 879
	mov	edx, ICH6_REG_STATESTS
880
	call	azx_readb
881
	test	al, 0x04
882
	jz	@f
3083 leency 883
 
5048 Asper 884
	mov	al, 0x04
885
	mov	edx, ICH6_REG_STATESTS
886
	call	azx_writeb
887
@@:
3083 leency 888
;end if
5048 Asper 889
	or	eax, 1
890
	spin_unlock
891
	ret
3083 leency 892
endp
893
 
894
 
895
align 4
896
proc create_primary_buff
897
 
5048 Asper 898
	invoke	KernelAlloc, 4096
899
	mov	[ctrl.posbuf], eax
3083 leency 900
 
5048 Asper 901
	invoke	KernelAlloc, 0x10000 ;0x8000
902
	mov	[ctrl.buffer], eax
3083 leency 903
 
5048 Asper 904
	mov	edi, eax
905
	mov	ecx, 0x10000/4 ;0x8000/4
906
	xor	eax, eax
907
	cld
908
	rep	stosd
3083 leency 909
 
5048 Asper 910
	invoke	KernelAlloc, 4096
911
	mov	[pcmout_bdl], eax
3083 leency 912
 
5048 Asper 913
	mov	edi, eax
914
	mov	ecx, 4096/4
915
	xor	eax, eax
916
	cld
917
	rep	stosd
3083 leency 918
 
5048 Asper 919
	; reset BDL address
920
	xor	eax, eax
921
	mov	edx, ICH6_REG_SD_BDLPL + SDO_OFS
922
	call	azx_writel
923
	xor	eax, eax
924
	mov	edx, ICH6_REG_SD_BDLPU + SDO_OFS
925
	call	azx_writel
3083 leency 926
 
5048 Asper 927
	; program the initial BDL entries
928
	mov	eax, [ctrl.buffer]
929
	mov	ebx, eax
930
	invoke	GetPgAddr
931
	and	ebx, 0xFFF
932
	add	eax, ebx
3083 leency 933
 
5048 Asper 934
	mov	ebx, 0x4000 ;buffer size
935
	mov	ecx, 8	    ;number of periods
936
	mov	edi, [pcmout_bdl] ;pcmout_bdl
937
.next_period:
938
	push	eax ecx
939
	mov	ecx, 4 ;2  ;number of bdl in a period
940
.next_bdl:
941
	; program the address field of the BDL entry
942
	mov	dword [edi], eax
943
	mov	dword [edi+4], 0
944
	; program the size field of the BDL entry
945
	mov	dword [edi+8],	ebx
946
	; program the IOC to enable interrupt when buffer completes
947
	mov	dword [edi+12], 0x01
3083 leency 948
 
5048 Asper 949
	add	eax, ebx
950
	add	edi, 16
951
	dec	ecx
952
	jnz	.next_bdl
3083 leency 953
 
5048 Asper 954
	pop	ecx eax
955
	dec	ecx
956
	jnz	.next_period
3083 leency 957
 
5048 Asper 958
	mov	edi, buff_list
959
	mov	eax, [ctrl.buffer]
960
	mov	ecx, 4 ;2
3083 leency 961
@@:
5048 Asper 962
	mov	[edi], eax
963
	mov	[edi+8], eax
964
	mov	[edi+16], eax
965
	mov	[edi+24], eax
966
	mov	[edi+32], eax
967
	mov	[edi+40], eax
968
	mov	[edi+48], eax
969
	mov	[edi+56], eax
3083 leency 970
 
5048 Asper 971
	add	eax, ebx
972
	add	edi, 4
973
	loop	@B
3083 leency 974
 
5048 Asper 975
	; wallclk has 24Mhz clock source
976
	mov	[ctrl.period_wallclk], ((0x4000 * 24000) / 48000) * 1000
3083 leency 977
 
5048 Asper 978
	call	azx_stream_reset
979
	call	azx_setup_controller
980
	ret
3083 leency 981
endp
982
 
983
align 4
984
proc detect_controller
5048 Asper 985
locals
986
	last_bus dd ?
987
	bus	 dd ?
988
	devfn	 dd ?
989
endl
990
	xor	eax, eax
991
	mov	[bus], eax
992
	inc	eax
993
	invoke	PciApi
994
	cmp	eax, -1
995
	je	.err
3083 leency 996
 
5048 Asper 997
	mov	[last_bus], eax
3083 leency 998
 
5048 Asper 999
.next_bus:
1000
	and	[devfn], 0
1001
.next_dev:
1002
	invoke	PciRead32, [bus], [devfn], dword 0
1003
	test	eax, eax
1004
	jz	.next
1005
	cmp	eax, -1
1006
	je	.next
3083 leency 1007
 
5048 Asper 1008
	mov	edi, devices
1009
@@:
1010
	mov	ebx, [edi]
1011
	test	ebx, ebx
1012
	jz	.next
3083 leency 1013
 
5048 Asper 1014
	cmp	eax, ebx
1015
	je	.found
1016
	add	edi, 12
1017
	jmp	@b
1018
.next:
1019
	inc	[devfn]
1020
	cmp	[devfn], 256
1021
	jb	.next_dev
1022
	mov	eax, [bus]
1023
	inc	eax
1024
	mov	[bus], eax
1025
	cmp	eax, [last_bus]
1026
	jna	.next_bus
1027
	xor	eax, eax
1028
	ret
1029
.found:
1030
	mov	ebx, [bus]
1031
	mov	[ctrl.bus], ebx
3083 leency 1032
 
5048 Asper 1033
	mov	ecx, [devfn]
1034
	mov	[ctrl.devfn], ecx
3083 leency 1035
 
5048 Asper 1036
	mov	edx, eax
1037
	and	edx, 0xFFFF
1038
	mov	[ctrl.vendor], dx
1039
	shr	eax, 16
1040
	mov	[ctrl.dev_id], ax
3083 leency 1041
 
5048 Asper 1042
	mov	ebx, [edi+4]
1043
	mov	[ctrl.ctrl_ids], ebx
3083 leency 1044
 
5048 Asper 1045
	cmp	edx, VID_INTEL
1046
	jne	@f
1047
	mov	[ctrl.vendor_ids], msg_Intel
1048
	jmp	.ok
1049
@@:
1050
	cmp	edx, VID_NVIDIA
1051
	jne	@f
1052
	mov	[ctrl.vendor_ids], msg_NVidia
1053
	jmp	.ok
1054
@@:
1055
	cmp	edx, VID_ATI
1056
	jne	@f
1057
	cmp	eax, 0x4383
1058
	jg	.ati_hdmi
1059
	mov	[ctrl.vendor_ids], msg_ATI
1060
	jmp	.ok
1061
.ati_hdmi:
1062
	mov	[ctrl.vendor_ids], msg_ATI_HDMI
1063
	jmp	.ok
1064
@@:
1065
	cmp	edx, VID_AMD
1066
	jne	@f
1067
	mov	[ctrl.vendor_ids], msg_AMD
1068
	jmp	.ok
1069
@@:
1070
	cmp	edx, VID_VIA
1071
	jne	@f
1072
	mov	[ctrl.vendor_ids], msg_VIA
1073
	jmp	.ok
1074
@@:
1075
	cmp	edx, VID_SIS
1076
	jne	@f
1077
	mov	[ctrl.vendor_ids], msg_SIS
1078
	jmp	.ok
1079
@@:
1080
	cmp	edx, VID_ULI
1081
	jne	@f
1082
	mov	[ctrl.vendor_ids], msg_ULI
1083
	jmp	.ok
1084
@@:
1085
	cmp	edx, VID_TERA
1086
	jne	@f
1087
	mov	[ctrl.vendor_ids], msg_TERA
1088
	jmp	.ok
1089
@@:
1090
	cmp	edx, VID_CREATIVE
1091
	jne	@f
1092
	mov	[ctrl.vendor_ids], msg_CREATIVE
1093
	jmp	.ok
1094
@@:
1095
	cmp	edx, VID_RDC
1096
	jne	@f
1097
	mov	[ctrl.vendor_ids], msg_RDC
1098
	jmp	.ok
1099
@@:
1100
	cmp	edx, VID_VMWARE
1101
	jne	@f
1102
	mov	[ctrl.vendor_ids], msg_VMWARE
1103
	jmp	.ok
1104
@@:
1105
.err:
1106
	xor	eax, eax
1107
	mov	[ctrl.vendor_ids], eax	   ;something  wrong ?
1108
	mov	[driver_type], -1
1109
	ret
1110
.ok:
1111
	mov	ebx, [edi+8]
1112
	mov	[driver_type], ebx
1113
	ret
3083 leency 1114
endp
1115
 
1116
align 4
1117
proc init_controller
1118
 
5048 Asper 1119
	invoke	PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
1120
	test	eax, 0x4 ; Test Master bit
1121
	jnz	@f
1122
	or	eax, 0x4 ; Set Master bit
1123
	invoke	PciWrite32, [ctrl.bus], [ctrl.devfn], dword 4, eax
1124
	invoke	PciRead32, [ctrl.bus], [ctrl.devfn], dword 4
1125
@@:
1126
	mov	ebx, eax
1127
	and	eax, 0xFFFF
1128
	mov	[ctrl.pci_cmd], eax
1129
	shr	ebx, 16
1130
	mov	[ctrl.pci_stat], ebx
3083 leency 1131
 
5048 Asper 1132
	mov	esi, msgPciCmd
1133
	invoke	SysMsgBoardStr
1134
	stdcall fdword2str, 2
1135
	invoke	SysMsgBoardStr
3083 leency 1136
 
5048 Asper 1137
	mov	esi, msgPciStat
1138
	invoke	SysMsgBoardStr
1139
	mov	eax, [ctrl.pci_stat]
1140
	stdcall fdword2str, 2
1141
	invoke	SysMsgBoardStr
3083 leency 1142
 
5048 Asper 1143
	mov	esi, msgHDALowMMIo
1144
	invoke	SysMsgBoardStr
1145
	invoke	PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x10
1146
	stdcall fdword2str, 2
1147
	invoke	SysMsgBoardStr
3083 leency 1148
 
5048 Asper 1149
	and	eax, 0xFFFFC000
1150
	mov	[ctrl.ctrl_mem_base], eax
3083 leency 1151
 
5048 Asper 1152
	mov	esi, msgHDAUpMMIo
1153
	invoke	SysMsgBoardStr
1154
	invoke	PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x14
1155
	;-mov     [ctrl.hda_upper_mem_base], eax
1156
	stdcall fdword2str, 2
1157
	invoke	SysMsgBoardStr
3083 leency 1158
 
5048 Asper 1159
.default:
1160
	invoke	PciRead32, [ctrl.bus], [ctrl.devfn], dword 0x3C
1161
	and	eax, 0xFF
1162
@@:
1163
	mov	[ctrl.int_line], eax
1164
	mov	[ctrl.user_callback], 0
3083 leency 1165
 
5048 Asper 1166
	call	set_HDA
3083 leency 1167
;Asper This is from "azx_create" proc. [
5048 Asper 1168
	xor	eax, eax
1169
	mov	edx, ICH6_REG_GCAP
1170
	call	azx_readw
1171
if DEBUG
1172
	mov	esi, msgGCap
1173
	invoke	SysMsgBoardStr
1174
	stdcall fdword2str, 2
1175
	invoke	SysMsgBoardStr
1176
end if
1177
	; allocate CORB/RIRB
1178
	call	azx_alloc_cmd_io
3083 leency 1179
 
5048 Asper 1180
	; initialize chip
1181
	call	azx_init_pci
3083 leency 1182
 
5048 Asper 1183
	xor	eax, eax
1184
	call	azx_init_chip
3083 leency 1185
;] Asper
1186
 
5048 Asper 1187
	xor	eax, eax
1188
	inc	eax
1189
	ret
3083 leency 1190
endp
1191
 
1192
 
1193
 
5048 Asper 1194
PG_SW		equ 0x003
1195
PG_NOCACHE	equ 0x018
3083 leency 1196
 
1197
align 4
1198
proc set_HDA
5048 Asper 1199
	invoke	MapIoMem,[ctrl.ctrl_mem_base],0x1000,PG_SW+PG_NOCACHE
1200
	mov	[ctrl.ctrl_mem_base], eax
1201
	ret
3083 leency 1202
endp
1203
 
1204
 
1205
; in:  eax - fullreset_flag
1206
;
1207
; reset codec link
1208
align 4
1209
proc reset_controller
5048 Asper 1210
locals
1211
	counter dd ?
1212
endl
3083 leency 1213
 
5048 Asper 1214
	test	eax, eax
1215
	jz	.skip
3083 leency 1216
 
5048 Asper 1217
	; clear STATESTS
1218
	mov	eax, STATESTS_INT_MASK
1219
	mov	edx, ICH6_REG_STATESTS
1220
	call	azx_writeb
3083 leency 1221
 
5048 Asper 1222
	; reset controller
1223
	mov	edx, ICH6_REG_GCTL
1224
	call	azx_readl
1225
	mov	ebx, ICH6_GCTL_RESET
1226
	xor	ebx, -1
1227
	and	eax, ebx
1228
	mov	edx, ICH6_REG_GCTL
1229
	call	azx_writel
3083 leency 1230
 
5048 Asper 1231
	mov	[counter], 50	 ; total 50*100 us = 0.5s
1232
.wait0:
3083 leency 1233
 
5048 Asper 1234
	mov	edx, ICH6_REG_GCTL
1235
	call	azx_readb
1236
	test	eax, eax
1237
	jz	@f
3083 leency 1238
 
5048 Asper 1239
	mov	eax, 100    ; wait 100 us
1240
	call	StallExec
3083 leency 1241
 
5048 Asper 1242
	dec	[counter]
1243
	jnz	.wait0
1244
@@:
1245
	; delay for >= 100us for codec PLL to settle per spec
1246
	; Rev 0.9 section 5.5.1
1247
	mov	eax, 100    ; wait 100 us
1248
	call	StallExec
3083 leency 1249
 
5048 Asper 1250
	; Bring controller out of reset
1251
	mov	edx, ICH6_REG_GCTL
1252
	call	azx_readb
1253
	or	eax, ICH6_GCTL_RESET
1254
	mov	edx, ICH6_REG_GCTL
1255
	call	azx_writeb
3083 leency 1256
 
5048 Asper 1257
	mov	[counter], 50	 ; total 50*100 us = 0.5s
1258
.wait1:
3083 leency 1259
 
5048 Asper 1260
	mov	edx, ICH6_REG_GCTL
1261
	call	azx_readb
1262
	test	eax, eax
1263
	jnz	@f
3083 leency 1264
 
5048 Asper 1265
	mov	eax, 100    ; wait 100 us
1266
	call	StallExec
3083 leency 1267
 
5048 Asper 1268
	dec	[counter]
1269
	jnz	.wait1
1270
@@:
3083 leency 1271
 
5048 Asper 1272
	; Brent Chartrand said to wait >= 540us for codecs to intialize
1273
	mov	eax, 540    ; wait 540 us
1274
	call	StallExec
3083 leency 1275
 
5048 Asper 1276
.skip:
1277
	; check to see if controller is ready
1278
	mov	edx, ICH6_REG_GCTL
1279
	call	azx_readb
1280
	test	eax, eax
1281
	jz	.fail
3083 leency 1282
 
5048 Asper 1283
	; Accept unsolicited responses
1284
if USE_SINGLE_MODE
1285
else if USE_UNSOL_EV
3083 leency 1286
;UNSUPPORTED YET! [
5048 Asper 1287
	mov	edx, ICH6_REG_GCTL
1288
	call	azx_readl
1289
	or	eax, ICH6_GCTL_UNSOL
1290
	mov	edx, ICH6_REG_GCTL
1291
	call	azx_writel
3083 leency 1292
;UNSUPPORTED YET! ]
5048 Asper 1293
end if
3083 leency 1294
 
5048 Asper 1295
	; detect codecs
1296
	mov	eax, [ctrl.codec_mask]
1297
	test	ax, ax
1298
	jnz	@f
3083 leency 1299
 
5048 Asper 1300
	mov	edx, ICH6_REG_STATESTS
1301
	call	azx_readw
1302
	mov	[ctrl.codec_mask], eax
3083 leency 1303
 
5048 Asper 1304
if DEBUG
1305
	mov	esi, msgCodecMask
1306
	invoke	SysMsgBoardStr
1307
	stdcall fdword2str, 2
1308
	invoke	SysMsgBoardStr
1309
end if
3083 leency 1310
 
5048 Asper 1311
@@:
3083 leency 1312
 
5048 Asper 1313
.ok:
1314
	clc
1315
	ret
1316
.fail:
1317
if DEBUG
1318
	mov	esi, msgHDARFail
1319
	invoke	SysMsgBoardStr
1320
end if
1321
	stc
1322
	ret
3083 leency 1323
endp
1324
 
1325
 
1326
align 4
1327
play:
5048 Asper 1328
	spin_lock_irq
1329
	mov	edx, ICH6_REG_WALLCLK
1330
	call	azx_readl
1331
	mov	[ctrl.start_wallclk], eax
3083 leency 1332
 
5048 Asper 1333
	call	azx_stream_start
1334
	xor	eax, eax
1335
	spin_unlock_irq
1336
	ret
3083 leency 1337
 
1338
align 4
1339
stop:
5048 Asper 1340
	spin_lock_irq
1341
;*        call    azx_stream_stop        ;Asper: Hangs system
1342
;R        push    ebx ecx edx
1343
;R        ; stop DMA
1344
;R        mov     edx, ICH6_REG_SD_CTL
1345
;R        call    azx_sd_readb
1346
;R        mov     bl, SD_CTL_DMA_START or SD_INT_MASK
1347
;R        xor     bl, -1
1348
;R        and     al, bl
1349
;R        mov     edx, ICH6_REG_SD_CTL
1350
;R        call    azx_sd_writeb
1351
;R        mov     edx, ICH6_REG_SD_STS
1352
;R        mov     al, SD_INT_MASK
1353
;R        call    azx_sd_writeb  ; to be sure
1354
	  ; disable SIE
1355
;N        mov     edx, ICH6_REG_INTCTL
1356
;N        call    azx_readb
1357
;N        mov     bl, SDO_INT ;shl azx_dev->index
1358
;N        xor     bl, -1
1359
;N        and     al, bl
1360
;N        mov     edx, ICH6_REG_INTCTL
1361
;N        call    azx_writeb
3083 leency 1362
 
5048 Asper 1363
	;     int timeout = 5000;
1364
	;     while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) ;
3083 leency 1365
;Asper: Hangs system   [
5048 Asper 1366
;*        mov     ecx, 5000
1367
;*.l1:
1368
;*        mov     edx, ICH6_REG_SD_CTL
1369
;*        call    azx_sd_readb
1370
;*        test    al, SD_CTL_DMA_START
1371
;*        jz      @f
1372
;*        dec     ecx
1373
;*        jnz     .l1
1374
;*@@:
3083 leency 1375
;*
5048 Asper 1376
;*        pop     edx ecx ebx
3083 leency 1377
;Asper ]
1378
 
5048 Asper 1379
	xor	eax, eax
1380
	spin_unlock_irq
1381
	ret
3083 leency 1382
 
1383
;align 4
5048 Asper 1384
;proc get_dev_info stdcall, p_info:dword ;deprecated
1385
;virtual at esi
1386
;        CTRL_INFO CTRL_INFO
1387
;end virtual
3083 leency 1388
;
5048 Asper 1389
;        mov     esi, [p_info]
1390
;        mov     eax, [ctrl.int_line]
1391
;        mov     bx,  [ctrl.dev_id]
1392
;        shl     ebx, 16
1393
;        and     bx,  [ctrl.vendor]
1394
;        mov     ecx, [ctrl.pci_cmd]
1395
;        mov     edx, [ctrl.codec_mem_base] ;[ctrl.hda_lower_mem_base]
1396
;        mov     edi, [ctrl.ctrl_mem_base] ;[ctrl.hda_upper_mem_base]
3083 leency 1397
;
5048 Asper 1398
;        mov     [CTRL_INFO.irq], eax
1399
;        mov     [CTRL_INFO.codec_id], ebx
1400
;        mov     [CTRL_INFO.pci_cmd], ecx
1401
;        mov     [CTRL_INFO.codec_mem_base], edx
1402
;        mov     [CTRL_INFO.ctrl_mem_base], edi
3083 leency 1403
;
5048 Asper 1404
;        xor     eax, eax
1405
;        mov     [CTRL_INFO.codec_io_base], eax
1406
;        mov     [CTRL_INFO.ctrl_io_base], eax
1407
;        mov     [CTRL_INFO.glob_cntrl], eax
1408
;        mov     [CTRL_INFO.glob_sta], eax
1409
;        ret
3083 leency 1410
;endp
1411
 
1412
align 4
1413
proc set_callback stdcall, handler:dword
5048 Asper 1414
	mov	eax, [handler]
1415
	mov	[ctrl.user_callback], eax
1416
	ret
3083 leency 1417
endp
1418
 
1419
 
1420
 
1421
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1422
;; Interface for HD codec ;;
1423
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1424
 
1425
;;;;;;;;;;;;;;;;;;;;;;;;;;;
1426
;; CORB / RIRB interface ;;
1427
;;;;;;;;;;;;;;;;;;;;;;;;;;;
1428
 
5048 Asper 1429
proc azx_alloc_cmd_io
1430
	push	eax ecx edx
1431
	; single page (at least 4096 bytes) must suffice for both ringbuffers
1432
	invoke	KernelAlloc, 4096
1433
	mov	[ctrl.rb], eax
3083 leency 1434
 
5048 Asper 1435
	mov	edi, eax
1436
	mov	ecx, 4096/4
1437
	xor	eax, eax
1438
	cld
1439
	rep	stosd
3083 leency 1440
 
5048 Asper 1441
	pop	edx ecx eax
1442
	ret
3083 leency 1443
endp
1444
 
5048 Asper 1445
proc azx_init_cmd_io
1446
	spin_lock_irq
1447
	pusha
1448
	; CORB set up
1449
	mov	eax, [ctrl.rb]
1450
	mov	ebx, eax
1451
	invoke	GetPgAddr
1452
	and	ebx, 0xFFF
1453
	add	eax, ebx
1454
	push	eax  ; save corb address
1455
	mov	edx, ICH6_REG_CORBLBASE
1456
	call	azx_writel
1457
	xor	eax, eax
1458
	mov	edx, ICH6_REG_CORBUBASE
1459
	call	azx_writel
3083 leency 1460
 
5048 Asper 1461
	; set the corb size to 256 entries (ULI requires explicitly)
1462
	mov	al, 0x02
1463
	mov	edx, ICH6_REG_CORBSIZE
1464
	call	azx_writeb
1465
	; set the corb write pointer to 0
1466
	xor	ax, ax
1467
	mov	edx, ICH6_REG_CORBWP
1468
	call	azx_writew
1469
	; reset the corb hw read pointer
1470
	mov	ax, ICH6_CORBRP_RST
1471
	mov	edx, ICH6_REG_CORBRP
1472
	call	azx_writew
1473
	; enable corb dma
1474
	mov	al, ICH6_CORBCTL_RUN
1475
	mov	edx, ICH6_REG_CORBCTL
1476
	call	azx_writeb
3083 leency 1477
 
5048 Asper 1478
	; RIRB set up
1479
	mov	[ctrl.rirb_rp], 0
1480
	mov	[ctrl.rirb_wp], 0
1481
	mov	[ctrl.rirb_cmd], 0
3083 leency 1482
 
5048 Asper 1483
	pop	eax  ; restore corb address
1484
	add	eax, 2048
1485
	mov	edx, ICH6_REG_RIRBLBASE
1486
	call	azx_writel
1487
	xor	eax, eax
1488
	mov	edx, ICH6_REG_RIRBUBASE
1489
	call	azx_writel
3083 leency 1490
 
5048 Asper 1491
	; set the rirb size to 256 entries (ULI requires explicitly)
1492
	mov	al, 0x02
1493
	mov	edx, ICH6_REG_RIRBSIZE
1494
	call	azx_writeb
1495
	; reset the rirb hw write pointer
1496
	mov	ax, ICH6_RIRBWP_RST
1497
	mov	edx, ICH6_REG_RIRBWP
1498
	call	azx_writew
1499
	; set N=1, get RIRB response interrupt for new entry
1500
	xor	ax, ax
1501
	cmp	byte [driver_type], AZX_DRIVER_CTX
1502
	jne	@f
1503
	mov	ax, 0xC0-1
3083 leency 1504
  @@:
5048 Asper 1505
	inc	ax
1506
	mov	edx, ICH6_REG_RINTCNT
1507
	call	azx_writew
1508
	; enable rirb dma and response irq
1509
	mov	al, ICH6_RBCTL_DMA_EN or ICH6_RBCTL_IRQ_EN
1510
	mov	edx, ICH6_REG_RIRBCTL
1511
	call	azx_writeb
3083 leency 1512
 
5048 Asper 1513
	popa
1514
	spin_unlock_irq
1515
	ret
3083 leency 1516
endp
1517
 
5048 Asper 1518
proc azx_free_cmd_io
1519
	spin_lock_irq
1520
	push	eax edx
1521
	; disable ringbuffer DMAs
1522
	xor	al, al
1523
	mov	edx, ICH6_REG_RIRBCTL
1524
	call	azx_writeb
1525
	mov	edx, ICH6_REG_CORBCTL
1526
	call	azx_writeb
1527
	pop	edx eax
1528
	spin_unlock_irq
1529
	ret
3083 leency 1530
endp
1531
 
1532
 
1533
; send a command
5048 Asper 1534
proc azx_corb_send_cmd	stdcall, val:dword
1535
	spin_lock_irq
1536
	push	edx edi
1537
	xor	eax, eax
1538
	; add command to corb
1539
	mov	edx, ICH6_REG_CORBWP
1540
	call	azx_readb
1541
	inc	al
1542
	inc	dword [ctrl.rirb_cmd]
1543
	mov	edi, dword [ctrl.rb]
3083 leency 1544
 
5048 Asper 1545
	push	eax
1546
	shl	eax, 2 ;wp=wp*sizeof(corb entry)=wp*4
1547
	add	edi, eax
1548
	mov	eax, dword [val]
1549
	stosd
1550
	pop	eax
1551
	mov	edx, ICH6_REG_CORBWP
1552
	call	azx_writel
3083 leency 1553
 
5048 Asper 1554
	pop	edi edx
1555
	xor	eax, eax ;Asper+
1556
	spin_unlock_irq
1557
	ret
3083 leency 1558
endp
1559
 
1560
 
1561
; retrieve RIRB entry - called from interrupt handler
5048 Asper 1562
proc azx_update_rirb
1563
	pusha
1564
	xor	eax, eax
1565
	mov	edx, ICH6_REG_RIRBWP
1566
	call	azx_readb ;call  azx_readw
3083 leency 1567
 
5048 Asper 1568
	cmp	ax, [ctrl.rirb_wp]
1569
	je	.done
1570
	mov	[ctrl.rirb_wp], ax
1571
	mov	bx, [ctrl.rirb_rp]
3083 leency 1572
 
5048 Asper 1573
.l1:
1574
	cmp	bx, [ctrl.rirb_wp]
1575
	je	.l3
3083 leency 1576
 
5048 Asper 1577
	inc	bl
1578
.l2:
1579
	cmp	bx, ICH6_MAX_RIRB_ENTRIES
1580
	jl	@f
1581
	sub	bx, ICH6_MAX_RIRB_ENTRIES
1582
	jmp	.l2
1583
@@:
3083 leency 1584
 
5048 Asper 1585
	movzx	edx, bx
1586
	shl	edx, 1 + 2 ; an RIRB entry is 8-bytes
1587
	mov	esi, dword [ctrl.rb]
1588
	add	esi, 2048
1589
	add	esi, edx
1590
	lodsd	; res
1591
	mov	edx, eax
1592
	lodsd	; res_ex
3083 leency 1593
 
5048 Asper 1594
	test	eax, ICH6_RIRB_EX_UNSOL_EV
1595
	jz	@f
1596
	stdcall snd_hda_queue_unsol_event, edx, eax
1597
	jmp	.l1
1598
@@:
1599
	mov	ecx, [ctrl.rirb_cmd]
1600
	test	ecx, ecx
1601
	jz	@f
1602
	mov	[ctrl.rirb_res], edx
1603
	dec	dword [ctrl.rirb_cmd]
1604
	jmp	.l1
1605
@@:
1606
if DEBUG
1607
	push	esi
1608
	mov	esi, msgSpuriousResponce
1609
	invoke	SysMsgBoardStr
1610
	pop	esi
1611
end if
1612
	jmp	.l1
1613
.l3:
1614
	mov	[ctrl.rirb_rp], bx
1615
.done:
1616
	popa
1617
	ret
3083 leency 1618
endp
1619
 
1620
; receive a response
5048 Asper 1621
proc azx_rirb_get_response
1622
locals
1623
	do_poll db 0
1624
endl
3083 leency 1625
 
5048 Asper 1626
	push	ebx ecx edx
1627
.again:
1628
	mov	ecx, 1000;+1000
1629
.next_try:
1630
	mov	al, [ctrl.polling_mode]
1631
	test	al, al
1632
	jnz	.poll
1633
	mov	ah, [do_poll]
1634
	test	ah, ah
1635
	jz	@f
1636
.poll:
1637
	spin_lock_irq
1638
	call	azx_update_rirb
1639
	spin_unlock_irq
1640
@@:
1641
	mov	eax, [ctrl.rirb_cmd]
1642
	test	eax, eax
1643
	jnz	.l1
1644
	mov	[ctrl.rirb_error], 0
1645
	mov	al, [do_poll]
1646
	test	al, al
1647
	jnz	@f
1648
	mov	[ctrl.poll_count], 0
1649
@@:
1650
	mov	eax, [ctrl.rirb_res] ; the last value
1651
	jmp	.out
1652
.l1:
1653
	push	eax
1654
	mov	eax, 2000  ; temporary workaround
1655
	call	StallExec
1656
	pop	eax
1657
	dec	ecx
1658
	jnz	.next_try
1659
.no_next_try:
1660
	mov	al, [ctrl.polling_mode]
1661
	test	al, al
1662
	jnz	.no_poll
3083 leency 1663
 
5048 Asper 1664
	mov	al, [ctrl.poll_count]
1665
	cmp	al, 2
1666
	jge	.poll_count_overflow
1667
if DEBUG
1668
	push	eax esi
1669
	mov	esi, msgGetResponceTimeout
1670
	invoke	SysMsgBoardStr
1671
	mov	esi, msgPollingCodecOnce
1672
	invoke	SysMsgBoardStr
1673
	pop	esi eax
1674
end if
1675
	mov	[do_poll], 1
1676
	inc	[ctrl.poll_count]
1677
	jmp	.again
3083 leency 1678
 
5048 Asper 1679
.poll_count_overflow:
1680
if DEBUG
1681
	push	eax esi
1682
	mov	esi, msgGetResponceTimeout
1683
	invoke	SysMsgBoardStr
1684
	mov	esi, msgSwitchToPollMode
1685
	invoke	SysMsgBoardStr
1686
	pop	esi eax
1687
end if
1688
	mov	[ctrl.polling_mode], 1
1689
	jmp	.again
3083 leency 1690
 
5048 Asper 1691
.no_poll:
3083 leency 1692
 
5048 Asper 1693
	mov	al, [ctrl.polling_mode]
1694
	test	al, al
1695
	jz	@f
1696
	mov	eax, -1
1697
	jmp	.out
1698
@@:
3083 leency 1699
 
5048 Asper 1700
	; a fatal communication error; need either to reset or to fallback
1701
	; to the single_cmd mode
1702
	mov	[ctrl.rirb_error], 1
1703
	;Asper~ -?  [
1704
	mov	[ctrl.response_reset], 1
1705
	mov	eax, -1  ; give a chance to retry
1706
	jmp	.out
1707
	;Asper~ -?  ]
3083 leency 1708
 
5048 Asper 1709
	;-? mov     [ctrl.single_cmd], 1
1710
	mov	[ctrl.response_reset], 0
3083 leency 1711
 
5048 Asper 1712
	; release CORB/RIRB
1713
	call	azx_free_cmd_io
1714
	; disable unsolicited responses
1715
	mov	edx, ICH6_REG_GCTL
1716
	call	azx_readl
1717
	mov	ebx, ICH6_GCTL_UNSOL
1718
	xor	ebx, -1
1719
	and	eax, ebx
1720
	mov	edx, ICH6_REG_GCTL
1721
	call	azx_writel
1722
	mov	eax, -1
1723
.out:
1724
	pop	edx ecx ebx
1725
	ret
3083 leency 1726
endp
1727
 
1728
;
1729
; Use the single immediate command instead of CORB/RIRB for simplicity
1730
;
1731
; Note: according to Intel, this is not preferred use.  The command was
1732
;       intended for the BIOS only, and may get confused with unsolicited
1733
;       responses.  So, we shouldn't use it for normal operation from the
1734
;       driver.
1735
;       I left the codes, however, for debugging/testing purposes.
1736
;
1737
 
1738
; receive a response
5048 Asper 1739
proc azx_single_wait_for_response
1740
	push	ecx edx esi
3083 leency 1741
 
5048 Asper 1742
	mov	ecx, 50
1743
.l1:
1744
	test	ecx, ecx
1745
	jz	.timeout
3083 leency 1746
 
1747
	; check IRV busy bit
5048 Asper 1748
	mov	edx, ICH6_REG_IRS
1749
	call	azx_readw
1750
	test	ax, ICH6_IRS_VALID
1751
	jz	@f
3083 leency 1752
	; reuse rirb.res as the response return value
5048 Asper 1753
	mov	edx, ICH6_REG_IR
1754
	call	azx_readl
1755
	mov	[ctrl.rirb_res], eax
3083 leency 1756
 
5048 Asper 1757
	pop	esi edx ecx
1758
	xor	eax, eax
3083 leency 1759
	ret
5048 Asper 1760
@@:
1761
	xor	eax, eax
1762
	inc	eax
1763
	call	StallExec
3083 leency 1764
 
5048 Asper 1765
	dec	ecx
1766
	jmp	.l1
1767
.timeout:
1768
if DEBUG
1769
	xor	eax, eax
1770
	mov	edx, ICH6_REG_IRS
1771
	call	azx_readw
1772
	mov	esi, msgGetResponceTimeout
1773
	invoke	SysMsgBoardStr
1774
	mov	esi, msgIRS
1775
	invoke	SysMsgBoardStr
1776
	stdcall fdword2str, 2
1777
	invoke	SysMsgBoardStr
1778
end if
3083 leency 1779
 
5048 Asper 1780
	pop	esi edx ecx
1781
	mov	eax, -1
1782
	mov	[ctrl.rirb_res], eax
3083 leency 1783
	ret
1784
endp
1785
 
1786
; send a command
5048 Asper 1787
proc azx_single_send_cmd  stdcall, val:dword
3083 leency 1788
	push	ecx edx esi
1789
 
1790
	mov	ecx, 50
5048 Asper 1791
.l1:
3083 leency 1792
	test	ecx, ecx
1793
	jz	.timeout
1794
 
1795
	; check ICB busy bit
5048 Asper 1796
	mov	edx, ICH6_REG_IRS
1797
	call	azx_readw
1798
	test	ax, ICH6_IRS_BUSY
1799
	jnz	@f
3083 leency 1800
	; Clear IRV valid bit
5048 Asper 1801
	mov	edx, ICH6_REG_IRS
1802
	call	azx_readw
1803
	or	ax, ICH6_IRS_VALID
1804
	mov	edx, ICH6_REG_IRS
1805
	call	azx_writew
3083 leency 1806
 
5048 Asper 1807
	mov	eax, dword [val]
1808
	mov	edx, ICH6_REG_IC
1809
	call	azx_writel
3083 leency 1810
 
5048 Asper 1811
	mov	edx, ICH6_REG_IRS
1812
	call	azx_readw
1813
	or	ax, ICH6_IRS_BUSY
1814
	mov	edx, ICH6_REG_IRS
1815
	call	azx_writew
3083 leency 1816
 
1817
	stdcall azx_single_wait_for_response
5048 Asper 1818
	pop	esi edx ecx
3083 leency 1819
	ret
5048 Asper 1820
@@:
3083 leency 1821
	dec	ecx
1822
	jmp	.l1
5048 Asper 1823
.timeout:
1824
if DEBUG
1825
	xor	eax, eax
1826
	mov	edx, ICH6_REG_IRS
1827
	call	azx_readw
1828
	mov	esi, msgSendCmdTimeout
1829
	invoke	SysMsgBoardStr
1830
	stdcall fdword2str, 2
1831
	invoke	SysMsgBoardStr
1832
	mov	esi, msgVal
1833
	invoke	SysMsgBoardStr
1834
	mov	eax, dword [val]
1835
	stdcall fdword2str, 2
1836
	invoke	SysMsgBoardStr
1837
end if
3083 leency 1838
 
5048 Asper 1839
	pop	esi edx ecx
1840
	mov	eax, -1
3083 leency 1841
	ret
1842
endp
1843
 
1844
; receive a response
5048 Asper 1845
proc azx_single_get_response
1846
	mov	eax, [ctrl.rirb_res]
3083 leency 1847
	ret
1848
endp
1849
 
1850
;
1851
; The below are the main callbacks from hda_codec.
1852
;
1853
; They are just the skeleton to call sub-callbacks according to the
1854
; current setting of chip->single_cmd.
1855
;
1856
 
1857
; send a command
5048 Asper 1858
proc azx_send_cmd  stdcall, val:dword
1859
if USE_SINGLE_MODE
1860
	stdcall azx_single_send_cmd, [val]
1861
else
1862
	stdcall azx_corb_send_cmd, [val]
1863
end if
1864
	ret
3083 leency 1865
endp
1866
 
1867
; get a response
5048 Asper 1868
proc azx_get_response
1869
if USE_SINGLE_MODE
1870
	call	azx_single_get_response
1871
else
1872
	call	azx_rirb_get_response
1873
end if
1874
	ret
3083 leency 1875
endp
1876
 
1877
 
1878
;;;;;;;;;;;;;;;;;;;;;;;;
1879
;; Lowlevel interface ;;
1880
;;;;;;;;;;;;;;;;;;;;;;;;
1881
 
1882
; enable interrupts
5048 Asper 1883
proc azx_int_enable
1884
	push	 eax edx
1885
	; enable controller CIE and GIE
1886
	mov	edx, ICH6_REG_INTCTL
1887
	call	azx_readl
1888
	or	eax, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
1889
	mov	edx, ICH6_REG_INTCTL
1890
	call	azx_writel
1891
	pop	edx eax
1892
	ret
3083 leency 1893
endp
1894
 
1895
; disable interrupts
5048 Asper 1896
proc azx_int_disable
1897
	push	eax ebx edx
3083 leency 1898
 
5048 Asper 1899
	; disable interrupts in stream descriptor
1900
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1901
	call	azx_readb
1902
	mov	bl, SD_INT_MASK
1903
	xor	bl, -1
1904
	and	al, bl
1905
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1906
	call	azx_writeb
3083 leency 1907
 
5048 Asper 1908
	; disable SIE for all streams
1909
	xor	al, al
1910
	mov	edx, ICH6_REG_INTCTL
1911
	call	azx_writeb
3083 leency 1912
 
5048 Asper 1913
	; disable controller CIE and GIE
1914
	mov	edx, ICH6_REG_INTCTL
1915
	call	azx_readl
1916
	mov	ebx, ICH6_INT_CTRL_EN or ICH6_INT_GLOBAL_EN
1917
	xor	ebx, -1
1918
	and	eax, ebx
1919
	call	azx_writel
1920
	pop	edx ebx eax
1921
	ret
3083 leency 1922
endp
1923
 
1924
; clear interrupts
5048 Asper 1925
proc azx_int_clear
1926
	push	eax edx
3083 leency 1927
 
5048 Asper 1928
	; clear stream status
1929
	mov	al, SD_INT_MASK
1930
	mov	edx, ICH6_REG_SD_STS + SDO_OFS
1931
	call	azx_writeb
3083 leency 1932
 
5048 Asper 1933
	; clear STATESTS
1934
	mov	al, STATESTS_INT_MASK
1935
	mov	edx, ICH6_REG_STATESTS
1936
	call	azx_writeb
3083 leency 1937
 
5048 Asper 1938
	; clear rirb status
1939
	mov	al, RIRB_INT_MASK
1940
	mov	edx, ICH6_REG_RIRBSTS
1941
	call	azx_writeb
3083 leency 1942
 
5048 Asper 1943
	; clear int status
1944
	mov	eax, ICH6_INT_CTRL_EN or ICH6_INT_ALL_STREAM
1945
	mov	edx, ICH6_REG_INTSTS
1946
	call	azx_writel
1947
	pop	edx eax
1948
	ret
3083 leency 1949
endp
1950
 
1951
 
1952
; start a stream
5048 Asper 1953
proc azx_stream_start
1954
	push	eax edx
3083 leency 1955
 
5048 Asper 1956
	; enable SIE
1957
	mov	edx, ICH6_REG_INTCTL
1958
	call	azx_readl
3083 leency 1959
 
5048 Asper 1960
	or	eax, 0xC0000000 ;Asper+
1961
	or	eax, SDO_INT  ; Asper: output stream interrupt index
1962
	mov	edx, ICH6_REG_INTCTL
1963
	call	azx_writel
1964
	; set DMA start and interrupt mask
1965
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1966
	call	azx_readb
3083 leency 1967
 
5048 Asper 1968
	or	al, SD_CTL_DMA_START or SD_INT_MASK
3083 leency 1969
 
5048 Asper 1970
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1971
	call	azx_writeb
3083 leency 1972
 
5048 Asper 1973
	pop	edx eax
1974
	ret
3083 leency 1975
endp
1976
 
1977
; stop DMA
5048 Asper 1978
proc azx_stream_clear
1979
	push	eax ebx edx
1980
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1981
	call	azx_readb
1982
	mov	bl, SD_CTL_DMA_START or SD_INT_MASK
1983
	xor	bl, -1
1984
	and	al, bl
1985
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
1986
	call	azx_writeb
1987
	mov	al, SD_INT_MASK
1988
	mov	edx, ICH6_REG_SD_STS + SDO_OFS
1989
	call	azx_writeb
1990
	pop	edx ebx eax
1991
	ret
3083 leency 1992
endp
1993
 
1994
; stop a stream
5048 Asper 1995
proc azx_stream_stop
1996
	push	eax ebx edx
1997
	call	azx_stream_clear
1998
	; disable SIE
1999
	mov	edx, ICH6_REG_INTCTL
2000
	call	azx_readl
2001
	mov	ebx, (SDO_INT)
2002
	xor	ebx, -1
2003
	and	eax, ebx
2004
	mov	edx, ICH6_REG_INTCTL
2005
	call	azx_writel
2006
	pop	edx ebx eax
2007
	ret
3083 leency 2008
endp
2009
 
2010
;
2011
;in: eax = full_reset
2012
;
2013
; initialize the chip
5048 Asper 2014
proc azx_init_chip
2015
	push	eax
3083 leency 2016
 
5048 Asper 2017
	; reset controller
2018
	mov	eax, 1 ;full reset
2019
	call	reset_controller
3083 leency 2020
 
5048 Asper 2021
	; initialize interrupts
2022
	call	azx_int_clear
2023
	call	azx_int_enable
3083 leency 2024
 
5048 Asper 2025
	; initialize the codec command I/O
2026
if USE_SINGLE_MODE
2027
else
2028
	call	azx_init_cmd_io
2029
end if
3083 leency 2030
 
5048 Asper 2031
	; program the position buffer
2032
	mov	eax, dword [ctrl.posbuf]
2033
	mov	ebx, eax
2034
	invoke	GetPgAddr
2035
	and	ebx, 0xFFF
2036
	add	eax, ebx
2037
	mov	edx, ICH6_REG_DPLBASE
2038
	call	azx_writel
2039
	xor	eax, eax
2040
	mov	edx, ICH6_REG_DPUBASE
2041
	call	azx_writel
3083 leency 2042
 
5048 Asper 2043
	pop	eax
2044
	ret
3083 leency 2045
endp
2046
 
2047
 
2048
; initialize the PCI registers
2049
 
2050
; update bits in a PCI register byte
5048 Asper 2051
proc update_pci_byte  stdcall, reg:dword, mask:dword, val:dword
2052
	push	ax bx
2053
	invoke	PciRead8, [ctrl.bus], [ctrl.devfn], [reg]
2054
	mov	bl, byte [mask]
2055
	mov	bh, bl
2056
	xor	bl, -1
2057
	and	al, bl
2058
	shr	bx, 8
2059
	and	bl, byte [val]
2060
	or	al, bl
2061
	invoke	PciWrite8, [ctrl.bus], [ctrl.devfn], [reg], eax
2062
	pop	bx ax
2063
	ret
3083 leency 2064
endp
2065
 
2066
 
5048 Asper 2067
proc azx_init_pci
2068
	; Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
2069
	; TCSEL == Traffic Class Select Register, which sets PCI express QOS
2070
	; Ensuring these bits are 0 clears playback static on some HD Audio
2071
	; codecs
2072
	push	eax
2073
	stdcall update_pci_byte, ICH6_PCIREG_TCSEL, 0x07, 0
3083 leency 2074
 
5048 Asper 2075
	mov	eax, [driver_type]
2076
	cmp	eax, AZX_DRIVER_ATI
2077
	jne	@f
2078
	; For ATI SB450 azalia HD audio, we need to enable snoop
2079
	stdcall update_pci_byte, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP
2080
	jmp	.done
2081
@@:
2082
	cmp	eax, AZX_DRIVER_NVIDIA
2083
	jne	@f
2084
	; For NVIDIA HDA, enable snoop
2085
	stdcall update_pci_byte, NVIDIA_HDA_TRANSREG_ADDR, 0x0f, NVIDIA_HDA_ENABLE_COHBITS
2086
	stdcall update_pci_byte, NVIDIA_HDA_ISTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
2087
	stdcall update_pci_byte, NVIDIA_HDA_OSTRM_COH, 0x01, NVIDIA_HDA_ENABLE_COHBIT
2088
	jmp	.done
2089
@@:
2090
	cmp	eax, AZX_DRIVER_SCH
2091
	je	.l1
2092
	cmp	eax, AZX_DRIVER_PCH
2093
	jne	@f
2094
.l1:
2095
	invoke	PciRead16,  [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
2096
	test	ax, INTEL_SCH_HDA_DEVC_NOSNOOP
2097
	jz	@f
2098
	push	ebx
2099
	mov	ebx, INTEL_SCH_HDA_DEVC_NOSNOOP
2100
	xor	ebx, -1
2101
	and	eax, ebx
2102
	pop	ebx
2103
	invoke	PciWrite16,  [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC, eax
2104
	invoke	PciRead16,  [ctrl.bus], [ctrl.devfn], dword INTEL_SCH_HDA_DEVC
3083 leency 2105
 
5048 Asper 2106
if DEBUG
2107
	push	esi
2108
	mov	esi, msgHDASnoopDisabled
2109
	invoke	SysMsgBoardStr
2110
	mov	esi, msg_OK
2111
	test	ax, INTEL_SCH_HDA_DEVC_NOSNOOP
2112
	jz	.snoop_ok
2113
	mov	esi, msg_Fail
2114
.snoop_ok:
2115
	invoke	SysMsgBoardStr
2116
	pop	esi
2117
end if
2118
@@:
2119
.done:
2120
	pop	eax
2121
	ret
3083 leency 2122
endp
2123
 
2124
 
2125
; reset stream
5048 Asper 2126
proc azx_stream_reset
2127
	push	eax ebx ecx edx
3083 leency 2128
 
5048 Asper 2129
	call	azx_stream_clear
3083 leency 2130
 
5048 Asper 2131
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2132
	call	azx_readb
2133
	or	al, SD_CTL_STREAM_RESET
2134
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2135
	call	azx_writeb
3083 leency 2136
 
5048 Asper 2137
	mov	eax, 3
2138
	call	StallExec
3083 leency 2139
 
5048 Asper 2140
	mov	ecx, 300
2141
.l1:
2142
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2143
	call	azx_readb
2144
	test	al, SD_CTL_STREAM_RESET
2145
	jnz	@f
2146
	dec	ecx
2147
	jnz	.l1
2148
@@:
2149
	mov	bl, SD_CTL_STREAM_RESET
2150
	xor	bl, -1
2151
	and	al, bl
2152
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2153
	call	azx_writeb
3083 leency 2154
 
5048 Asper 2155
	mov	eax, 3
2156
	call	StallExec
3083 leency 2157
 
5048 Asper 2158
	mov	ecx, 300
2159
	; waiting for hardware to report that the stream is out of reset
2160
.l2:
2161
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2162
	call	azx_readb
2163
	test	al, SD_CTL_STREAM_RESET
2164
	jnz	@f
2165
	dec	ecx
2166
	jnz	.l2
2167
@@:
2168
	; reset first position - may not be synced with hw at this time
2169
	mov	edx, [ctrl.posbuf]
2170
	mov	dword [edx], 0
2171
	pop	edx ecx ebx eax
2172
	ret
3083 leency 2173
endp
2174
 
2175
 
2176
; set up the SD for streaming
2177
proc azx_setup_controller
5048 Asper 2178
	push	eax ebx ecx edx
2179
	; make sure the run bit is zero for SD
2180
	call	azx_stream_clear
3083 leency 2181
 
5048 Asper 2182
	; program the stream_tag
2183
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2184
	call	azx_readl
2185
	mov	ecx, SD_CTL_STREAM_TAG_MASK
2186
	xor	ecx, -1
2187
	and	eax, ecx
2188
	mov	ecx, SDO_TAG
2189
	shl	ecx, SD_CTL_STREAM_TAG_SHIFT
2190
	or	eax, ecx
2191
	; Asper stream_tag = SDO_TAG
2192
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2193
	call	azx_writel
3083 leency 2194
 
5048 Asper 2195
	; program the length of samples in cyclic buffer
2196
	mov	eax, 0x4000*32
2197
	mov	edx, ICH6_REG_SD_CBL + SDO_OFS
2198
	call	azx_writel
3083 leency 2199
 
5048 Asper 2200
	; program the stream format
2201
	; this value needs to be the same as the one programmed
2202
	mov	ax, 0x11
2203
	mov	edx, ICH6_REG_SD_FORMAT + SDO_OFS
2204
	call	azx_writew
3083 leency 2205
 
5048 Asper 2206
	; program the stream LVI (last valid index) of the BDL
2207
	mov	eax, 32-1 ;4-1 ;2-1
2208
	mov	[ctrl.lvi_reg], eax
2209
	mov	edx, ICH6_REG_SD_LVI + SDO_OFS
2210
	call	azx_writew
3083 leency 2211
 
5048 Asper 2212
	; program the BDL address
2213
	; lower BDL address
2214
	mov	eax, [pcmout_bdl]
2215
	mov	ebx, eax
2216
	invoke	GetPgAddr
2217
	and	ebx, 0xFFF
2218
	add	eax, ebx
2219
	mov	edx, ICH6_REG_SD_BDLPL + SDO_OFS
2220
	call	azx_writel
2221
	; upper BDL address
2222
	xor	eax, eax       ;upper_32bit(azx_dev->bdl_addr)
2223
	mov	edx, ICH6_REG_SD_BDLPU + SDO_OFS
2224
	call	azx_writel
3083 leency 2225
 
5048 Asper 2226
	; enable the position buffer
2227
	cmp	[ctrl.position_fix], POS_FIX_LPIB
2228
	jz	@f
2229
	mov	edx, ICH6_REG_DPLBASE
2230
	call	azx_readl
2231
	and	eax, ICH6_DPLBASE_ENABLE
2232
	jnz	@f
2233
	mov	eax, dword [ctrl.posbuf]
2234
	mov	ebx, eax
2235
	invoke	GetPgAddr
2236
	and	ebx, 0xFFF
2237
	add	eax, ebx
2238
	or	eax, ICH6_DPLBASE_ENABLE
2239
	mov	edx, ICH6_REG_DPLBASE
2240
	call	azx_writel
2241
@@:
2242
	; set the interrupt enable bits in the descriptor control register
2243
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2244
	call	azx_readl
2245
	or	eax, SD_INT_MASK
2246
	mov	edx, ICH6_REG_SD_CTL + SDO_OFS
2247
	call	azx_writel
3083 leency 2248
 
5048 Asper 2249
	pop	edx ecx ebx eax
2250
	ret
3083 leency 2251
endp
2252
 
2253
 
2254
;(...)
2255
 
2256
; Probe the given codec address
2257
proc probe_codec, addr:dword
5048 Asper 2258
	push	edx
2259
	mov	eax, [addr]
2260
	shl	eax, 28
2261
	mov	edx, (AC_NODE_ROOT shl 20) or (AC_VERB_PARAMETERS shl 8) or AC_PAR_VENDOR_ID
2262
	or	eax, edx
2263
	stdcall azx_send_cmd, eax
2264
	stdcall azx_get_response
3083 leency 2265
 
5048 Asper 2266
	cmp	eax, -1
2267
	je	.out
2268
	mov	eax, [addr]
2269
	mov	[codec.addr], eax ;Asper+
2270
if DEBUG
2271
	push	esi
2272
	mov	esi, msgCodecOK
2273
	invoke	SysMsgBoardStr
2274
	mov	esi, msgCAd
2275
	invoke	SysMsgBoardStr
2276
	stdcall fdword2str, 3
2277
	invoke	SysMsgBoardStr
2278
	pop	esi
2279
end if
2280
	xor	eax, eax
2281
.out:
2282
	pop	edx
2283
	ret
3083 leency 2284
endp
2285
 
2286
 
2287
proc  azx_bus_reset
5048 Asper 2288
	call	azx_stop_chip
2289
	call	azx_init_chip
3083 leency 2290
endp
2291
 
2292
 
2293
; Codec initialization
5048 Asper 2294
proc azx_codec_create
2295
	push	ebx  ecx  edx
2296
	;(...)
3083 leency 2297
	; First try to probe all given codec slots
2298
	; Asper: We asume for now that max slots for codecs = 4
5048 Asper 2299
	xor	ecx, ecx
2300
	xor	edx, edx
2301
	inc	edx
2302
.next_slot:
2303
	test	edx, [ctrl.codec_mask]
2304
	jz	@f
2305
	stdcall probe_codec, ecx
2306
	test	eax, eax
2307
	jz	.init ;@f
2308
	; Some BIOSen give you wrong codec addresses that don't exist
2309
if DEBUG
2310
	mov	esi, msgCodecError
2311
	invoke	SysMsgBoardStr
2312
end if
2313
	mov	ebx, edx
2314
	xor	ebx, -1
2315
	and	[ctrl.codec_mask], ebx
3083 leency 2316
 
5048 Asper 2317
	; More badly, accessing to a non-existing
2318
	; codec often screws up the controller chip,
2319
	; and disturbs the further communications.
2320
	; Thus if an error occurs during probing,
2321
	; better to reset the controller chip to
2322
	; get back to the sanity state.
2323
	;call    azx_bus_reset
2324
@@:
2325
	shl	edx, 1
2326
	inc	ecx
2327
;if USE_FIRST_CODEC
2328
;        cmp     ecx, 1
2329
;else
2330
	cmp	ecx, 4
2331
;end if
2332
	jl	.next_slot
2333
	mov	eax, -1
2334
	jmp	.out
2335
.init:
2336
	push	ecx edx
2337
	stdcall snd_hda_codec_init
2338
	pop	edx ecx
2339
	test	eax, eax
2340
	jnz	@b
2341
.out:
2342
	pop	edx  ecx  ebx
2343
	ret
3083 leency 2344
endp
2345
 
2346
 
5048 Asper 2347
proc azx_codec_configure
2348
	;(...)
2349
	call	snd_hda_codec_configure
2350
	ret
3083 leency 2351
endp
2352
 
2353
 
5048 Asper 2354
proc azx_get_position
2355
	test	[ctrl.position_fix], POS_FIX_LPIB
2356
	jz	@f
2357
	; read LPIB
2358
	mov	edx, ICH6_REG_SD_LPIB + SDO_OFS
2359
	call	azx_readl
2360
	jmp	.out
2361
@@:
2362
	test	[ctrl.position_fix], POS_FIX_VIACOMBO
2363
	jz	@f
2364
;        call    azx_get_via_position
2365
;        jmp     .out
2366
@@:
2367
	; use the position buffer
2368
	push	edx
2369
	mov	edx, dword [ctrl.posbuf]
2370
	mov	eax, dword [edx]
2371
	pop	edx
2372
.out:
2373
	cmp	eax, 0x4000 ; bufsize
2374
	jl	@f
2375
	xor	eax, eax
2376
@@:
2377
	ret
3083 leency 2378
endp
2379
 
2380
 
5048 Asper 2381
proc azx_stop_chip
2382
	push	eax edx
3083 leency 2383
 
5048 Asper 2384
	; disable interrupts
2385
	call	azx_int_disable
2386
	call	azx_int_clear
3083 leency 2387
 
5048 Asper 2388
	; disable CORB/RIRB
2389
	call	azx_free_cmd_io
2390
 
2391
	; disable position buffer
2392
	xor	eax, eax
2393
	mov	edx, ICH6_REG_DPLBASE
2394
	call	azx_writel
2395
	mov	edx, ICH6_REG_DPUBASE
2396
	call	azx_writel
2397
	pop	edx eax
2398
	ret
3083 leency 2399
endp
2400
 
2401
 
2402
; in:  eax = volume (-10000 - 0)
2403
align 4
2404
set_master_vol:
5048 Asper 2405
	mov	ecx, 3
2406
	call	set_channel_volume
2407
	ret
3083 leency 2408
 
2409
 
2410
; out:  [pvol] = volume (-10000 - 0)
2411
align 4
2412
proc  get_master_vol stdcall, pvol:dword
5048 Asper 2413
	xor	ecx, ecx
2414
	call	get_channel_volume
2415
	mov	ebx, [pvol]
2416
	mov	[ebx], eax
2417
	xor	eax, eax
2418
	ret
3083 leency 2419
endp
2420
 
2421
 
2422
; in:   ecx = channel mask (1 - Left; 2 - Right; 3-Both)
2423
;       eax = volume (-10000 - 0)
2424
align 4
2425
set_channel_volume:
5048 Asper 2426
	push	eax ebx ecx edx
2427
	mov	ebx, [volume.maxDb]
2428
	neg	eax
2429
if DEBUG ;-
2430
	push	eax esi
2431
	mov	esi, msgNewVolume
2432
	invoke	SysMsgBoardStr
2433
	stdcall fdword2str, 2
2434
	invoke	SysMsgBoardStr
3083 leency 2435
 
5048 Asper 2436
	mov	esi, msgMinVolume
2437
	invoke	SysMsgBoardStr
2438
	mov	eax, ebx
2439
	stdcall fdword2str, 2
2440
	invoke	SysMsgBoardStr
2441
	pop	esi eax
2442
end if
2443
	test	ebx, ebx
2444
	jz	.err_out
3083 leency 2445
 
5048 Asper 2446
	cmp	eax, 0
2447
	jg	@f
2448
	xor	eax, eax
2449
	jmp	.set
2450
@@:
2451
	cmp	eax, ebx
2452
	jng	.set
2453
	mov	eax, ebx
2454
.set:
2455
	sub	ebx, eax
2456
	mov	eax, ebx
2457
	;cdq
2458
	xor	edx, edx
2459
	push	eax
2460
	movzx	eax, [volume.step_size]
2461
	imul	eax, (100/4)
2462
	mov	ebx, eax
2463
	pop	eax
2464
	xor	edx, edx
2465
	idiv	ebx
3083 leency 2466
 
5048 Asper 2467
	mov	edx, [volume.out_amp_node]
2468
	test	edx, edx
2469
	jz	.out
2470
	movzx	ebx, [edx+HDA_GNODE.nid]
3083 leency 2471
 
5048 Asper 2472
	test	ecx, 1	 ; Left channel ?
2473
	jz	@f
2474
	stdcall put_volume_mute, ebx, 0, HDA_OUTPUT, 0, eax
2475
@@:
2476
	test	ecx, 2	 ; Right channel ?
2477
	jz	.out
2478
	stdcall put_volume_mute, ebx, 1, HDA_OUTPUT, 0, eax
2479
.out:
2480
	pop	edx ecx ebx eax
2481
	ret
2482
.err_out:
2483
if DEBUG  ;-
2484
	push	esi
2485
	mov	esi, emsgNoVolCtrl
2486
	invoke	SysMsgBoardStr
2487
	pop	esi
2488
end if
2489
	jmp	.out
3083 leency 2490
 
2491
; in:   ecx = channel (1 - Left; 2 - Right)
2492
; out:  eax = volume (-10000 - 0)
2493
align 4
2494
get_channel_volume:
5048 Asper 2495
	push	ebx ecx edx
2496
	cmp	ecx, 2
2497
	jg	.out
2498
	dec	cl
2499
	xor	eax, eax
2500
	mov	edx, [volume.out_amp_node]
2501
	test	edx, edx
2502
	jz	.out
2503
	movzx	ebx, [edx+HDA_GNODE.nid]
2504
	stdcall get_volume_mute, ebx, ecx, HDA_OUTPUT, 0
2505
	and	eax, 0x7F ;get gain
2506
	mov	cl, [volume.step_size]
2507
	mul	cl
2508
	imul	eax, (-100/4)
2509
.out:
2510
	pop	edx ecx ebx
2511
	ret
3083 leency 2512
 
2513
 
2514
; in:  ecx = delay
2515
udelay:
3496 Asper 2516
	push	eax ecx edx
2517
	test	ecx, ecx
2518
	jnz	@f
2519
	inc	ecx
5048 Asper 2520
@@:
3496 Asper 2521
	mov	eax, ecx
2522
	mov	cx, 500
2523
	mul	cl
2524
	mov	ecx, edx
2525
	shl	ecx, 16
2526
	or	ecx, eax
5048 Asper 2527
@@:
3496 Asper 2528
	xor	eax, eax
2529
	cpuid
2530
	dec	ecx
2531
	jz	@b
2532
	pop	edx ecx eax
2533
	ret
3083 leency 2534
 
2535
align 4
2536
proc StallExec
3496 Asper 2537
	push	ecx edx ebx eax
3083 leency 2538
 
3496 Asper 2539
	mov	ecx, CPU_FREQ
2540
	mul	ecx
2541
	mov	ebx, eax       ;low
2542
	mov	ecx, edx       ;high
2543
	rdtsc
2544
	add	ebx, eax
2545
	adc	ecx,edx
5048 Asper 2546
@@:
3496 Asper 2547
	rdtsc
2548
	sub	eax, ebx
2549
	sbb	edx, ecx
2550
	js	@B
3083 leency 2551
 
3496 Asper 2552
	pop	eax ebx edx ecx
2553
	ret
3083 leency 2554
endp
2555
 
2556
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2557
;         MEMORY MAPPED IO    (os depended) ;
2558
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2559
 
2560
align 4
2561
proc azx_readb
3496 Asper 2562
	add	edx, [ctrl.ctrl_mem_base]
2563
	mov	al, [edx]
2564
	ret
3083 leency 2565
endp
2566
 
2567
align 4
2568
proc azx_readw
3496 Asper 2569
	add	edx, [ctrl.ctrl_mem_base]
2570
	mov	ax, [edx]
2571
	ret
3083 leency 2572
endp
2573
 
2574
align 4
2575
proc azx_readl
3496 Asper 2576
	add	edx, [ctrl.ctrl_mem_base]
2577
	mov	eax, [edx]
2578
	ret
3083 leency 2579
endp
2580
 
2581
align 4
2582
proc azx_writeb
3496 Asper 2583
	add	edx, [ctrl.ctrl_mem_base]
2584
	mov	[edx], al
2585
	ret
3083 leency 2586
endp
2587
 
2588
align 4
2589
proc azx_writew
3496 Asper 2590
	add	edx, [ctrl.ctrl_mem_base]
2591
	mov	[edx], ax
2592
	ret
3083 leency 2593
endp
2594
 
2595
align 4
2596
proc azx_writel
3496 Asper 2597
	add	edx, [ctrl.ctrl_mem_base]
2598
	mov	[edx], eax
2599
	ret
3083 leency 2600
endp
2601
 
2602
;_______
2603
 
2604
 
2605
;Asper remember to add this functions:
2606
proc  snd_hda_queue_unsol_event stdcall, par1:dword, par2:dword
5048 Asper 2607
if DEBUG
3496 Asper 2608
	push	esi
2609
	mov	esi, msgUnsolEvent
5048 Asper 2610
	invoke	SysMsgBoardStr
3496 Asper 2611
	pop	esi
5048 Asper 2612
end if
2613
if USE_UNSOL_EV = 0
2614
	;Test. Do not make queue, process immediately!
2615
	;stdcall here snd_hda_read_pin_sense stdcall, nid:dword, trigger_sense:dword
2616
	;and then mute/unmute pin based on the results
2617
end if
3496 Asper 2618
	ret
3083 leency 2619
endp
2620
;...
2621
 
2622
 
2623
align 4
2624
proc  fdword2str stdcall, flags:dword	; bit 0 - skipLeadZeroes; bit 1 - newLine; other bits undefined
3496 Asper 2625
	push	eax ebx ecx
2626
	mov	esi, hex_buff
2627
	mov	ecx, -8
2628
	push	eax
5048 Asper 2629
@@:
3496 Asper 2630
	rol	eax, 4
2631
	mov	ebx, eax
2632
	and	ebx, 0x0F
2633
	mov	bl, [ebx+hexletters]
2634
	mov	[8+esi+ecx], bl
2635
	inc	ecx
2636
	jnz	@b
2637
	pop	eax
3083 leency 2638
 
3496 Asper 2639
	mov	dword [esi+8], 0
2640
	test	[flags], 0x2 ; new line ?
2641
	jz	.no_newline
2642
	mov	dword [esi+8], 0x00000A0D
5048 Asper 2643
.no_newline:
3083 leency 2644
 
3496 Asper 2645
	push	eax
2646
	test	[flags], 0x1 ; skip zero bits ?
2647
	jz	.no_skipz
2648
	mov	ecx, 8
5048 Asper 2649
@@:
3496 Asper 2650
	test	eax, 0xF0000000
2651
	jnz	.skipz_done
2652
	rol	eax, 4
2653
	inc	esi
2654
	dec	ecx
2655
	jnz	@b
2656
	dec	esi
5048 Asper 2657
.skipz_done:
2658
.no_skipz:
3496 Asper 2659
	pop	eax
3083 leency 2660
 
3496 Asper 2661
	pop	ecx ebx eax
2662
	ret
3083 leency 2663
endp
2664
 
2665
hexletters   db '0123456789ABCDEF'
2666
hex_buff     db 8 dup(0),13,10,0,0
2667
 
2668
 
3085 leency 2669
include "CODEC.INC"
3083 leency 2670
include "hda_generic.inc"
2671
 
2672
align 4
2673
devices:
2674
; Intel
5048 Asper 2675
	dd (CTRL_INTEL_SCH2    shl 16)+VID_INTEL,msg_INTEL_SCH2,	   AZX_DRIVER_SCH
2676
	dd (CTRL_INTEL_HPT     shl 16)+VID_INTEL,msg_INTEL_HPT, 	   AZX_DRIVER_SCH
2677
	dd (CTRL_INTEL_CPT     shl 16)+VID_INTEL,msg_INTEL_CPT, 	   AZX_DRIVER_PCH
2678
	dd (CTRL_INTEL_PGB     shl 16)+VID_INTEL,msg_INTEL_PGB, 	   AZX_DRIVER_PCH
2679
	dd (CTRL_INTEL_PPT1    shl 16)+VID_INTEL,msg_INTEL_PPT1,	   AZX_DRIVER_PCH
2680
	dd (CTRL_INTEL_82801F  shl 16)+VID_INTEL,msg_INTEL_82801F,	   AZX_DRIVER_ICH
2681
	dd (CTRL_INTEL_63XXESB shl 16)+VID_INTEL,msg_INTEL_63XXESB,	   AZX_DRIVER_ICH
2682
	dd (CTRL_INTEL_82801G  shl 16)+VID_INTEL,msg_INTEL_82801G,	   AZX_DRIVER_ICH
2683
	dd (CTRL_INTEL_82801H  shl 16)+VID_INTEL,msg_INTEL_82801H,	   AZX_DRIVER_ICH
2684
	dd (CTRL_INTEL_82801_UNK1  shl 16)+VID_INTEL,msg_INTEL_82801_UNK1, AZX_DRIVER_ICH
2685
	dd (CTRL_INTEL_82801I  shl 16)+VID_INTEL,msg_INTEL_82801I,	   AZX_DRIVER_ICH
2686
	dd (CTRL_INTEL_82801_UNK2  shl 16)+VID_INTEL,msg_INTEL_82801_UNK2, AZX_DRIVER_ICH
2687
	dd (CTRL_INTEL_82801JI shl 16)+VID_INTEL,msg_INTEL_82801JI,	   AZX_DRIVER_ICH
2688
	dd (CTRL_INTEL_82801JD shl 16)+VID_INTEL,msg_INTEL_82801JD,	   AZX_DRIVER_ICH
2689
	dd (CTRL_INTEL_PCH     shl 16)+VID_INTEL,msg_INTEL_PCH, 	   AZX_DRIVER_PCH
2690
	dd (CTRL_INTEL_PCH2    shl 16)+VID_INTEL,msg_INTEL_PCH2,	   AZX_DRIVER_PCH
2691
	dd (CTRL_INTEL_SCH     shl 16)+VID_INTEL,msg_INTEL_SCH, 	   AZX_DRIVER_SCH
2692
	dd (CTRL_INTEL_LPT     shl 16)+VID_INTEL,msg_INTEL_LPT, 	   AZX_DRIVER_PCH
3083 leency 2693
; Nvidia
5048 Asper 2694
	dd (CTRL_NVIDIA_MCP51	 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP51,	   AZX_DRIVER_NVIDIA
2695
	dd (CTRL_NVIDIA_MCP55	 shl 16)+VID_NVIDIA,msg_NVIDIA_MCP55,	   AZX_DRIVER_NVIDIA
2696
	dd (CTRL_NVIDIA_MCP61_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61,	   AZX_DRIVER_NVIDIA
2697
	dd (CTRL_NVIDIA_MCP61_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP61,	   AZX_DRIVER_NVIDIA
2698
	dd (CTRL_NVIDIA_MCP65_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65,	   AZX_DRIVER_NVIDIA
2699
	dd (CTRL_NVIDIA_MCP65_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP65,	   AZX_DRIVER_NVIDIA
2700
	dd (CTRL_NVIDIA_MCP67_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67,	   AZX_DRIVER_NVIDIA
2701
	dd (CTRL_NVIDIA_MCP67_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP67,	   AZX_DRIVER_NVIDIA
2702
	dd (CTRL_NVIDIA_MCP73_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73,	   AZX_DRIVER_NVIDIA
2703
	dd (CTRL_NVIDIA_MCP73_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP73,	   AZX_DRIVER_NVIDIA
2704
	dd (CTRL_NVIDIA_MCP78_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78,	   AZX_DRIVER_NVIDIA
2705
	dd (CTRL_NVIDIA_MCP78_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78,	   AZX_DRIVER_NVIDIA
2706
	dd (CTRL_NVIDIA_MCP78_3  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78,	   AZX_DRIVER_NVIDIA
2707
	dd (CTRL_NVIDIA_MCP78_4  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP78,	   AZX_DRIVER_NVIDIA
2708
	dd (CTRL_NVIDIA_MCP79_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79,	   AZX_DRIVER_NVIDIA
2709
	dd (CTRL_NVIDIA_MCP79_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79,	   AZX_DRIVER_NVIDIA
2710
	dd (CTRL_NVIDIA_MCP79_3  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79,	   AZX_DRIVER_NVIDIA
2711
	dd (CTRL_NVIDIA_MCP79_4  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP79,	   AZX_DRIVER_NVIDIA
2712
	dd (CTRL_NVIDIA_0BE2	 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE2,	   AZX_DRIVER_NVIDIA
2713
	dd (CTRL_NVIDIA_0BE3	 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE3,	   AZX_DRIVER_NVIDIA
2714
	dd (CTRL_NVIDIA_0BE4	 shl 16)+VID_NVIDIA,msg_NVIDIA_0BE4,	   AZX_DRIVER_NVIDIA
2715
	dd (CTRL_NVIDIA_GT100	 shl 16)+VID_NVIDIA,msg_NVIDIA_GT100,	   AZX_DRIVER_NVIDIA
2716
	dd (CTRL_NVIDIA_GT106	 shl 16)+VID_NVIDIA,msg_NVIDIA_GT106,	   AZX_DRIVER_NVIDIA
2717
	dd (CTRL_NVIDIA_GT108	 shl 16)+VID_NVIDIA,msg_NVIDIA_GT108,	   AZX_DRIVER_NVIDIA
2718
	dd (CTRL_NVIDIA_GT104	 shl 16)+VID_NVIDIA,msg_NVIDIA_GT104,	   AZX_DRIVER_NVIDIA
2719
	dd (CTRL_NVIDIA_GT116	 shl 16)+VID_NVIDIA,msg_NVIDIA_GT116,	   AZX_DRIVER_NVIDIA
2720
	dd (CTRL_NVIDIA_MCP89_1  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89,	   AZX_DRIVER_NVIDIA
2721
	dd (CTRL_NVIDIA_MCP89_2  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89,	   AZX_DRIVER_NVIDIA
2722
	dd (CTRL_NVIDIA_MCP89_3  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89,	   AZX_DRIVER_NVIDIA
2723
	dd (CTRL_NVIDIA_MCP89_4  shl 16)+VID_NVIDIA,msg_NVIDIA_MCP89,	   AZX_DRIVER_NVIDIA
2724
	dd (CTRL_NVIDIA_GF119	 shl 16)+VID_NVIDIA,msg_NVIDIA_GF119,	   AZX_DRIVER_NVIDIA
2725
	dd (CTRL_NVIDIA_GF110_1  shl 16)+VID_NVIDIA,msg_NVIDIA_GF110,	   AZX_DRIVER_NVIDIA
2726
	dd (CTRL_NVIDIA_GF110_2  shl 16)+VID_NVIDIA,msg_NVIDIA_GF110,	   AZX_DRIVER_NVIDIA
3083 leency 2727
; ATI
5048 Asper 2728
	dd (CTRL_ATI_SB450  shl 16)+VID_ATI,msg_ATI_SB450,		   AZX_DRIVER_ATI
2729
	dd (CTRL_ATI_SB600  shl 16)+VID_ATI,msg_ATI_SB600,		   AZX_DRIVER_ATI
2730
	dd (CTRL_ATI_RS600  shl 16)+VID_ATI,msg_ATI_RS600,		   AZX_DRIVER_ATIHDMI
2731
	dd (CTRL_ATI_RS690  shl 16)+VID_ATI,msg_ATI_RS690,		   AZX_DRIVER_ATIHDMI
2732
	dd (CTRL_ATI_RS780  shl 16)+VID_ATI,msg_ATI_RS780,		   AZX_DRIVER_ATIHDMI
2733
	dd (CTRL_ATI_RS_UNK1  shl 16)+VID_ATI,msg_ATI_RS_UNK1,		   AZX_DRIVER_ATIHDMI
2734
	dd (CTRL_ATI_R600   shl 16)+VID_ATI,msg_ATI_R600,		   AZX_DRIVER_ATIHDMI
2735
	dd (CTRL_ATI_RV610  shl 16)+VID_ATI,msg_ATI_RV610,		   AZX_DRIVER_ATIHDMI
2736
	dd (CTRL_ATI_RV620  shl 16)+VID_ATI,msg_ATI_RV620,		   AZX_DRIVER_ATIHDMI
2737
	dd (CTRL_ATI_RV630  shl 16)+VID_ATI,msg_ATI_RV630,		   AZX_DRIVER_ATIHDMI
2738
	dd (CTRL_ATI_RV635  shl 16)+VID_ATI,msg_ATI_RV635,		   AZX_DRIVER_ATIHDMI
2739
	dd (CTRL_ATI_RV670  shl 16)+VID_ATI,msg_ATI_RV670,		   AZX_DRIVER_ATIHDMI
2740
	dd (CTRL_ATI_RV710  shl 16)+VID_ATI,msg_ATI_RV710,		   AZX_DRIVER_ATIHDMI
2741
	dd (CTRL_ATI_RV730  shl 16)+VID_ATI,msg_ATI_RV730,		   AZX_DRIVER_ATIHDMI
2742
	dd (CTRL_ATI_RV740  shl 16)+VID_ATI,msg_ATI_RV740,		   AZX_DRIVER_ATIHDMI
2743
	dd (CTRL_ATI_RV770  shl 16)+VID_ATI,msg_ATI_RV770,		   AZX_DRIVER_ATIHDMI
3083 leency 2744
; AMD
5048 Asper 2745
	dd (CTRL_AMD_HUDSON shl 16)+VID_AMD,msg_AMD_HUDSON,		   AZX_DRIVER_GENERIC
3083 leency 2746
; VIA
5048 Asper 2747
	dd (CTRL_VIA_VT82XX shl 16)+VID_VIA,msg_VIA_VT82XX,		   AZX_DRIVER_VIA
2748
	dd (CTRL_VIA_VT61XX shl 16)+VID_VIA,msg_VIA_VT61XX,		   AZX_DRIVER_GENERIC
2749
	dd (CTRL_VIA_VT71XX shl 16)+VID_VIA,msg_VIA_VT71XX,		   AZX_DRIVER_GENERIC
3083 leency 2750
; SiS
5048 Asper 2751
	dd (CTRL_SIS_966    shl 16)+VID_SIS,msg_SIS_966,		   AZX_DRIVER_SIS
3083 leency 2752
; ULI
5048 Asper 2753
	dd (CTRL_ULI_M5461  shl 16)+VID_ULI,msg_ULI_M5461,		   AZX_DRIVER_ULI
3083 leency 2754
; Teradici
5048 Asper 2755
	dd (CTRL_TERA_UNK1  shl 16)+VID_ULI,msg_TERA_UNK1,		   AZX_DRIVER_TERA
3083 leency 2756
; Creative
5048 Asper 2757
	dd (CTRL_CREATIVE_CA0110_IBG	 shl 16)+VID_CREATIVE,msg_CREATIVE_CA0110_IBG,	 AZX_DRIVER_CTX
2758
	dd (CTRL_CREATIVE_SOUND_CORE3D_1 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
2759
	dd (CTRL_CREATIVE_SOUND_CORE3D_2 shl 16)+VID_CREATIVE,msg_CREATIVE_SOUND_CORE3D, AZX_DRIVER_GENERIC
3083 leency 2760
; RDC Semiconductor
5048 Asper 2761
	dd (CTRL_RDC_R3010  shl 16)+VID_RDC,msg_RDC_R3010,		   AZX_DRIVER_GENERIC
3083 leency 2762
; VMware
5048 Asper 2763
	dd (CTRL_VMWARE_UNK1  shl 16)+VID_VMWARE,msg_VMWARE_UNK1,	   AZX_DRIVER_GENERIC
3083 leency 2764
 
5048 Asper 2765
	dd 0	;terminator
3083 leency 2766
 
2767
 
2768
version      dd (5 shl 16) or (API_VERSION and 0xFFFF)
2769
 
2770
msg_Intel		db 'Intel ',0
2771
msg_INTEL_CPT		db 'Cougar Point',13,10,0
2772
msg_INTEL_PGB		db 'Patsburg',13,10,0
2773
msg_INTEL_PPT1		db 'Panther Point',13,10,0
2774
msg_INTEL_LPT		db 'Lynx Point',13,10,0
2775
msg_INTEL_HPT		db 'Haswell',13,10,0
2776
msg_INTEL_82801F	db '82801F',13,10,0
2777
msg_INTEL_63XXESB	db '631x/632xESB',13,10,0
2778
msg_INTEL_82801G	db '82801G', 13,10,0
2779
msg_INTEL_82801H	db '82801H', 13,10,0
2780
msg_INTEL_82801I	db '82801I', 13,10,0
2781
msg_INTEL_82801JI	db '82801JI',13,10,0
2782
msg_INTEL_82801JD	db '82801JD',13,10,0
2783
msg_INTEL_PCH		db 'PCH',13,10,0
2784
msg_INTEL_PCH2		db 'PCH2',13,10,0
2785
msg_INTEL_SCH		db 'Poulsbo',13,10,0
2786
msg_INTEL_SCH2		db 'Oaktrail',13,10,0
2787
msg_INTEL_82801_UNK1	db '82801_UNK1',  13,10,0
2788
msg_INTEL_82801_UNK2	db '82801_UNK2',  13,10,0
2789
 
2790
msg_NVidia		db 'NVidia ',0
2791
msg_NVIDIA_MCP51	db 'MCP51',	 13,10,0
2792
msg_NVIDIA_MCP55	db 'MCP55',	 13,10,0
2793
msg_NVIDIA_MCP61	db 'MCP61',	 13,10,0
2794
msg_NVIDIA_MCP65	db 'MCP65',	 13,10,0
2795
msg_NVIDIA_MCP67	db 'MCP67',	 13,10,0
2796
msg_NVIDIA_MCP73	db 'MCP73',	 13,10,0
2797
msg_NVIDIA_MCP78	db 'MCP78',	 13,10,0
2798
msg_NVIDIA_MCP79	db 'MCP79',	 13,10,0
2799
msg_NVIDIA_MCP89	db 'MCP89',	 13,10,0
2800
msg_NVIDIA_0BE2 	db '(0x0be2)',	 13,10,0
2801
msg_NVIDIA_0BE3 	db '(0x0be3)',	 13,10,0
2802
msg_NVIDIA_0BE4 	db '(0x0be4)',	 13,10,0
2803
msg_NVIDIA_GT100	db 'GT100',	 13,10,0
2804
msg_NVIDIA_GT104	db 'GT104',	 13,10,0
2805
msg_NVIDIA_GT106	db 'GT106',	 13,10,0
2806
msg_NVIDIA_GT108	db 'GT108',	 13,10,0
2807
msg_NVIDIA_GT116	db 'GT116',	 13,10,0
2808
msg_NVIDIA_GF119	db 'GF119',	 13,10,0
2809
msg_NVIDIA_GF110	db 'GF110',	 13,10,0
2810
 
2811
msg_ATI 	     db 'ATI ',0
2812
msg_ATI_SB450	     db 'SB450',      13,10,0
2813
msg_ATI_SB600	     db 'SB600',      13,10,0
2814
 
2815
msg_ATI_HDMI	     db 'ATI HDMI ',0
2816
msg_ATI_RS600	     db 'RS600',      13,10,0
2817
msg_ATI_RS690	     db 'RS690',      13,10,0
2818
msg_ATI_RS780	     db 'RS780',      13,10,0
2819
msg_ATI_RS_UNK1      db 'RS_UNK1',    13,10,0
2820
msg_ATI_R600	     db 'R600',       13,10,0
2821
msg_ATI_RV610	     db 'RV610',      13,10,0
2822
msg_ATI_RV620	     db 'RV620',      13,10,0
2823
msg_ATI_RV630	     db 'RV630',      13,10,0
2824
msg_ATI_RV635	     db 'RV635',      13,10,0
2825
msg_ATI_RV670	     db 'RV670',      13,10,0
2826
msg_ATI_RV710	     db 'RV710',      13,10,0
2827
msg_ATI_RV730	     db 'RV730',      13,10,0
2828
msg_ATI_RV740	     db 'RV740',      13,10,0
2829
msg_ATI_RV770	     db 'RV770',      13,10,0
2830
 
2831
msg_AMD 	     db 'AMD ',0
2832
msg_AMD_HUDSON	     db 'Hudson',     13,10,0
2833
 
2834
msg_VIA 	     db 'VIA ',0
2835
msg_VIA_VT82XX	     db 'VT8251/8237A',     13,10,0
2836
msg_VIA_VT61XX	     db 'GFX VT6122/VX11',  13,10,0
2837
msg_VIA_VT71XX	     db 'GFX VT7122/VX900', 13,10,0
2838
 
2839
msg_SIS 	     db 'SIS ',0
2840
msg_SIS_966	     db '966',	    13,10,0
2841
 
2842
msg_ULI 	     db 'ULI ',0
2843
msg_ULI_M5461	     db 'M5461',      13,10,0
2844
 
2845
msg_TERA	     db 'Teradici ',0
2846
msg_TERA_UNK1	     db 'UNK1',      13,10,0
2847
 
2848
msg_CREATIVE		      db 'Creative ',0
2849
msg_CREATIVE_CA0110_IBG       db 'CA0110-IBG',13,10,0 ;SB X-Fi Xtreme Audio
2850
msg_CREATIVE_SOUND_CORE3D     db 'Sound Core3D'
2851
 
2852
msg_RDC 	     db 'RDC ',0
2853
msg_RDC_R3010	     db 'R3010', 13,10,0
2854
 
2855
msg_VMWARE	     db 'VMware ',0
2856
msg_VMWARE_UNK1      db 'UNK1', 13,10,0
2857
 
2858
szKernel	     db 'KERNEL',0
2859
sz_sound_srv	     db 'SOUND',0
2860
 
2861
msgInit      db 'detect hardware...',13,10,0
2862
msgFail      db 'device not found',13,10,0
2863
msgAttchIRQ  db 'IRQ line not supported', 13,10,0
2864
msgInvIRQ    db 'IRQ line not assigned or invalid', 13,10,0
2865
msgPlay      db 'start play', 13,10,0
2866
msgStop      db 'stop play',  13,10,0
2867
msgSetChannelVolume  db 'Set Channel Volume', 13,10,0
2868
msgIRQ	     db 'HDA IRQ', 13,10,0
2869
msgInitCtrl  db 'init controller',13,10,0
2870
msgPrimBuff  db 'create primary buffer ...',0
2871
msgDone      db 'done',13,10,0
2872
msgRemap     db 'Remap IRQ',13,10,0
2873
msgOk	     db 'service installed',13,10,0
2874
msgCold      db 'cold reset',13,10,0
2875
    msgHDARFail    db 'controller not ready',13,10,0
2876
msgCFail     db 'codec not ready',13,10,0
2877
msgResetOk   db 'reset complete',13,10,0
2878
msgPciCmd    db 'PCI command     ',0
2879
msgPciStat   db 'PCI status      ',0
2880
    msgHDALowMMIo db 'lower mmio base ',0
2881
    msgHDAUpMMIo  db 'upper mmio base ',0
2882
msgIrqMap    db 'HDA irq map as      ',0
2883
 
2884
;Asper [
2885
if DEBUG
2886
    msgCodecMask	     db 'codec_mask = ',0
2887
    msgNoCodecsFound	     db 'no codecs found!',13,10,0
2888
    msgHDASnoopDisabled      db 'HDA snoop disabled, enabling ... ',0
2889
    msg_OK		     db 'OK',13,10,0
2890
    msg_Fail		     db 'Failed',13,10,0
2891
    msgSpuriousResponce      db 'spurious responce ',0
2892
    emsgInvalidAFGSubtree    db 'Invalid AFG subtree',13,10,0
2893
    emsgConnListNotAvailable db 'connection list not available for ',0
2894
    msgUnmuteOut	     db 'UNMUTE OUT: NID=',0
2895
    msgUnmuteIn 	     db 'UNMUTE IN: NID=',0
2896
    msgGetResponceTimeout    db 'get_response timeout: ',0
2897
    msgVal		     db ' val=',0
2898
    emsgBusResetFatalComm    db 'resetting BUS due to fatal communication error',13,10,0
2899
    msgCodecOK		     db 'codec probed OK',13,10,0
2900
    msgCodecError	     db 'codec probe error disabling it...',13,10,0
2901
    emsgNoAFGorMFGFound      db 'no AFG or MFG node found',13,10,0
4324 Asper 2902
    msgNoAFGFound	     db 'no AFG node found, trying another codec',13,10,0
3083 leency 2903
    emsgNoMem		     db 'hda_codec: cannot malloc',13,10,0
2904
    msgConnect		     db 'CONNECT: NID=',0
2905
    msgIdx		     db ' IDX=',0
2906
    msgSkipDigitalOutNode    db 'Skip Digital OUT node ',0
2907
    msgAudOutFound	     db 'AUD_OUT found ',0
2908
    emsgNoParserAvailable    db 'No codec parser is available',13,10,0
2909
    emsgNoProperOutputPathFound  db 'hda_generic: no proper output path found',13,10,0
2910
    emsgInvConnList	     db 'hda_codec: invalid CONNECT_LIST verb ',0
2911
    emsgInvDepRangeVal	     db 'hda_codec: invalid dep_range_val ',0
2912
    emsgTooManyConns	     db 'Too many connections',13,10,0
2913
	emsgNoVolCtrl	     db 'No volume control',13,10,0
2914
    msgHDACodecSetupStream   db 'hda_codec_setup_stream: NID=',0
2915
    msgStream		     db 'stream=',0
2916
    msgChannel		     db 'channel=',0
2917
    msgFormat		     db 'format=',0
2918
 
2919
    msgPollingCodecOnce      db 'polling the codec once',13,10,0 ;Asper~
2920
    msgSwitchToPollMode      db 'switching to polling mode',13,10,0 ;Asper~
2921
 
2922
    msgUnsolEvent	     db 'Unsolicited event!',13,10,0
2923
    strSemicolon	     db ':',0
2924
    msgSETUP_FG_NODES	     db 'Setup FG nodes = start_nid:total_nodes = ',0
2925
    msgFG_TYPE		     db 'FG type = ',0
2926
    msgPinCfgs		     db 'Pin configurations:',13,10,0
2927
    msgWCaps		     db 'Widget capabilities:',13,10,0
2928
    msgCAd		     db 'CAd = ',0
2929
    msgTCSEL		     db 'PCI TCSEL     ',0
2930
    msgTV		     db 'HDA test version ',TEST_VERSION_NUMBER,13,10,0
2931
    msgGCap		     db 'GCAP = ',0
2932
end if
2933
 
2934
if USE_SINGLE_MODE
2935
    msgSingleMode	     db 'Single mode !',13,10,0
2936
    msgIRS		     db 'IRS=',0
2937
    msgSendCmdTimeout	     db 'send_cmd timeout: IRS=',0
2938
else
2939
    msgNormalMode	     db 'Normal mode !',13,10,0
2940
end if
2941
 
2942
if DEBUG
2943
    msgYAHOO2		     db 'YAHOO2: ',0
5048 Asper 2944
    msgMinVolume	     db 'MinVolume: ',0
3083 leency 2945
    msgNewVolume	     db 'NewVolume: ',0
2946
 
2947
    msgVerbQuery	     db 'Q: ',0
2948
    msgVerbAnswer	     db 'A: ',0
2949
    msgPin_Nid		     db 'Pin Nid = ',0
2950
    msgPin_Ctl		     db 'Pin Control = ',0
2951
    msgPin_Caps 	     db 'Pin Capabilities = ',0
2952
    msgDef_Cfg		     db 'Pin def_cfg = ',0
2953
    msgAmp_Out_Caps	     db 'Pin Amp Out caps = ',0
2954
    msgAmpVal		     db 'Amp val = ',0
2955
    msgEnableEAPD	     db 'Enable EAPD: NID=',0
2956
    msgBeeperNid	     db 'Beeper found: NID=',0
2957
    msgBeeperValue	     db 'Beeper initial value: ',0
2958
    msgBeepNow		     db 'Beep!',13,10,0
5048 Asper 2959
 
2960
    msgNodeSeq		     db 'Sequence of codec nodes:',13,10,0
2961
    msgNID		     db 'NID: 0x',0
3083 leency 2962
end if
2963
 
2964
;] Asper
2965
 
3496 Asper 2966
aspinlock	 dd SPINLOCK_FREE
3083 leency 2967
 
2968
codec CODEC
2969
ctrl AC_CNTRL
2970
 
2971
;Asper: BDL must be aligned to 128 according to HDA specification.
2972
pcmout_bdl	 rd 1
2973
buff_list	 rd 32
2974
 
2975
driver_type	 rd 1