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Rev | Author | Line No. | Line |
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5191 | serge | 1 | /* Xtensa ELF support for BFD. |
6324 | serge | 2 | Copyright (C) 2003-2015 Free Software Foundation, Inc. |
5191 | serge | 3 | Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. |
4 | |||
5 | This file is part of BFD, the Binary File Descriptor library. |
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6 | |||
7 | This program is free software; you can redistribute it and/or modify |
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8 | it under the terms of the GNU General Public License as published by |
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9 | the Free Software Foundation; either version 3 of the License, or |
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10 | (at your option) any later version. |
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11 | |||
12 | This program is distributed in the hope that it will be useful, |
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13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | GNU General Public License for more details. |
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16 | |||
17 | You should have received a copy of the GNU General Public License |
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18 | along with this program; if not, write to the Free Software |
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19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, |
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20 | USA. */ |
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21 | |||
22 | /* This file holds definitions specific to the Xtensa ELF ABI. */ |
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23 | |||
24 | #ifndef _ELF_XTENSA_H |
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25 | #define _ELF_XTENSA_H |
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26 | |||
27 | #include "elf/reloc-macros.h" |
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28 | |||
29 | /* Relocations. */ |
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30 | START_RELOC_NUMBERS (elf_xtensa_reloc_type) |
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31 | RELOC_NUMBER (R_XTENSA_NONE, 0) |
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32 | RELOC_NUMBER (R_XTENSA_32, 1) |
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33 | RELOC_NUMBER (R_XTENSA_RTLD, 2) |
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34 | RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3) |
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35 | RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4) |
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36 | RELOC_NUMBER (R_XTENSA_RELATIVE, 5) |
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37 | RELOC_NUMBER (R_XTENSA_PLT, 6) |
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38 | RELOC_NUMBER (R_XTENSA_OP0, 8) |
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39 | RELOC_NUMBER (R_XTENSA_OP1, 9) |
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40 | RELOC_NUMBER (R_XTENSA_OP2, 10) |
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41 | RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11) |
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42 | RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12) |
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43 | RELOC_NUMBER (R_XTENSA_32_PCREL, 14) |
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44 | RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15) |
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45 | RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16) |
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46 | RELOC_NUMBER (R_XTENSA_DIFF8, 17) |
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47 | RELOC_NUMBER (R_XTENSA_DIFF16, 18) |
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48 | RELOC_NUMBER (R_XTENSA_DIFF32, 19) |
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49 | RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20) |
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50 | RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21) |
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51 | RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22) |
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52 | RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23) |
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53 | RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24) |
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54 | RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25) |
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55 | RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26) |
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56 | RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27) |
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57 | RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28) |
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58 | RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29) |
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59 | RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30) |
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60 | RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31) |
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61 | RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32) |
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62 | RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33) |
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63 | RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34) |
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64 | RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35) |
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65 | RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36) |
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66 | RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37) |
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67 | RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38) |
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68 | RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39) |
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69 | RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40) |
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70 | RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41) |
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71 | RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42) |
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72 | RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43) |
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73 | RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44) |
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74 | RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45) |
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75 | RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46) |
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76 | RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47) |
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77 | RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48) |
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78 | RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49) |
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79 | RELOC_NUMBER (R_XTENSA_TLSDESC_FN, 50) |
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80 | RELOC_NUMBER (R_XTENSA_TLSDESC_ARG, 51) |
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81 | RELOC_NUMBER (R_XTENSA_TLS_DTPOFF, 52) |
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82 | RELOC_NUMBER (R_XTENSA_TLS_TPOFF, 53) |
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83 | RELOC_NUMBER (R_XTENSA_TLS_FUNC, 54) |
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84 | RELOC_NUMBER (R_XTENSA_TLS_ARG, 55) |
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85 | RELOC_NUMBER (R_XTENSA_TLS_CALL, 56) |
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86 | END_RELOC_NUMBERS (R_XTENSA_max) |
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87 | |||
88 | /* Processor-specific flags for the ELF header e_flags field. */ |
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89 | |||
90 | /* Four-bit Xtensa machine type field. */ |
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91 | #define EF_XTENSA_MACH 0x0000000f |
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92 | |||
93 | /* Various CPU types. */ |
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94 | #define E_XTENSA_MACH 0x00000000 |
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95 | |||
96 | /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. |
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97 | Highly unlikely, but what the heck. */ |
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98 | |||
99 | #define EF_XTENSA_XT_INSN 0x00000100 |
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100 | #define EF_XTENSA_XT_LIT 0x00000200 |
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101 | |||
102 | |||
103 | /* Processor-specific dynamic array tags. */ |
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104 | |||
105 | /* Offset of the table that records the GOT location(s). */ |
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106 | #define DT_XTENSA_GOT_LOC_OFF 0x70000000 |
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107 | |||
108 | /* Number of entries in the GOT location table. */ |
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109 | #define DT_XTENSA_GOT_LOC_SZ 0x70000001 |
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110 | |||
111 | |||
112 | /* Definitions for instruction and literal property tables. The |
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113 | tables for ".gnu.linkonce.*" sections are placed in the following |
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114 | sections: |
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115 | |||
116 | instruction tables: .gnu.linkonce.x.* |
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117 | literal tables: .gnu.linkonce.p.* |
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118 | */ |
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119 | |||
120 | #define XTENSA_INSN_SEC_NAME ".xt.insn" |
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121 | #define XTENSA_LIT_SEC_NAME ".xt.lit" |
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122 | #define XTENSA_PROP_SEC_NAME ".xt.prop" |
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123 | |||
124 | typedef struct property_table_entry_t |
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125 | { |
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126 | bfd_vma address; |
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127 | bfd_vma size; |
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128 | flagword flags; |
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129 | } property_table_entry; |
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130 | |||
131 | /* Flags in the property tables to specify whether blocks of memory are |
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132 | literals, instructions, data, or unreachable. For instructions, |
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133 | blocks that begin loop targets and branch targets are designated. |
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134 | Blocks that do not allow density instructions, instruction reordering |
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135 | or transformation are also specified. Finally, for branch targets, |
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136 | branch target alignment priority is included. Alignment of the next |
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137 | block is specified in the current block and the size of the current |
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138 | block does not include any fill required to align to the next |
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139 | block. */ |
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140 | |||
141 | #define XTENSA_PROP_LITERAL 0x00000001 |
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142 | #define XTENSA_PROP_INSN 0x00000002 |
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143 | #define XTENSA_PROP_DATA 0x00000004 |
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144 | #define XTENSA_PROP_UNREACHABLE 0x00000008 |
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145 | /* Instruction-only properties at beginning of code. */ |
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146 | #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010 |
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147 | #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020 |
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148 | /* Instruction-only properties about code. */ |
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149 | #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040 |
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150 | #define XTENSA_PROP_INSN_NO_REORDER 0x00000080 |
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151 | /* Historically, NO_TRANSFORM was a property of instructions, |
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152 | but it should apply to literals under certain circumstances. */ |
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153 | #define XTENSA_PROP_NO_TRANSFORM 0x00000100 |
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154 | |||
155 | /* Branch target alignment information. This transmits information |
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156 | to the linker optimization about the priority of aligning a |
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157 | particular block for branch target alignment: None, low priority, |
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158 | high priority, or required. These only need to be checked in |
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159 | instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET. |
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160 | Common usage is: |
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161 | |||
162 | switch (GET_XTENSA_PROP_BT_ALIGN(flags)) |
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163 | case XTENSA_PROP_BT_ALIGN_NONE: |
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164 | case XTENSA_PROP_BT_ALIGN_LOW: |
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165 | case XTENSA_PROP_BT_ALIGN_HIGH: |
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166 | case XTENSA_PROP_BT_ALIGN_REQUIRE: |
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167 | */ |
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168 | #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600 |
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169 | |||
170 | /* No branch target alignment. */ |
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171 | #define XTENSA_PROP_BT_ALIGN_NONE 0x0 |
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172 | /* Low priority branch target alignment. */ |
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173 | #define XTENSA_PROP_BT_ALIGN_LOW 0x1 |
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174 | /* High priority branch target alignment. */ |
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175 | #define XTENSA_PROP_BT_ALIGN_HIGH 0x2 |
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176 | /* Required branch target alignment. */ |
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177 | #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3 |
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178 | |||
179 | #define GET_XTENSA_PROP_BT_ALIGN(flag) \ |
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180 | (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9) |
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181 | #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \ |
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182 | (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \ |
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183 | (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK)) |
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184 | |||
185 | /* Alignment is specified in the block BEFORE the one that needs |
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186 | alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to |
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187 | get the required alignment specified as a power of 2. Use |
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188 | SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required |
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189 | alignment. Be careful of side effects since the SET will evaluate |
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190 | flags twice. Also, note that the SIZE of a block in the property |
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191 | table does not include the alignment size, so the alignment fill |
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192 | must be calculated to determine if two blocks are contiguous. |
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193 | TEXT_ALIGN is not currently implemented but is a placeholder for a |
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194 | possible future implementation. */ |
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195 | |||
196 | #define XTENSA_PROP_ALIGN 0x00000800 |
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197 | |||
198 | #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000 |
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199 | |||
200 | #define GET_XTENSA_PROP_ALIGNMENT(flag) \ |
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201 | (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12) |
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202 | #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \ |
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203 | (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \ |
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204 | (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK)) |
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205 | |||
206 | #define XTENSA_PROP_INSN_ABSLIT 0x00020000 |
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207 | |||
208 | #endif /* _ELF_XTENSA_H */><>><> |