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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5361 | serge | 1 | /* |
| 2 | * Copyright © <2010>, Intel Corporation. |
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| 3 | * |
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| 4 | * This program is licensed under the terms and conditions of the |
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| 5 | * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at |
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| 6 | * http://www.opensource.org/licenses/eclipse-1.0.php. |
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| 7 | * |
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| 8 | */ |
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| 9 | // Modual name: ME_header.inc |
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| 10 | // |
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| 11 | // Global symbols define |
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| 12 | // |
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| 13 | |||
| 14 | /* |
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| 15 | * Constant |
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| 16 | */ |
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| 17 | define(`VME_MESSAGE_TYPE_INTER', `1') |
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| 18 | define(`VME_MESSAGE_TYPE_INTRA', `2') |
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| 19 | define(`VME_MESSAGE_TYPE_MIXED', `3') |
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| 20 | |||
| 21 | define(`BLOCK_32X1', `0x0000001F') |
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| 22 | define(`BLOCK_4X16', `0x000F0003') |
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| 23 | |||
| 24 | define(`LUMA_INTRA_16x16_DISABLE', `0x1') |
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| 25 | define(`LUMA_INTRA_8x8_DISABLE', `0x2') |
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| 26 | define(`LUMA_INTRA_4x4_DISABLE', `0x4') |
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| 27 | |||
| 28 | define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') |
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| 29 | define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') |
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| 30 | define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') |
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| 31 | define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') |
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| 32 | |||
| 33 | define(`BIND_IDX_VME', `0') |
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| 34 | define(`BIND_IDX_VME_REF0', `1') |
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| 35 | define(`BIND_IDX_VME_REF1', `2') |
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| 36 | define(`BIND_IDX_OUTPUT', `3') |
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| 37 | define(`BIND_IDX_INEP', `4') |
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| 38 | |||
| 39 | define(`SUB_PEL_MODE_INTEGER', `0x00000000') |
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| 40 | define(`SUB_PEL_MODE_HALF', `0x00001000') |
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| 41 | define(`SUB_PEL_MODE_QUARTER', `0x00003000') |
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| 42 | |||
| 43 | define(`INTER_SAD_NONE', `0x00000000') |
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| 44 | define(`INTER_SAD_HAAR', `0x00200000') |
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| 45 | |||
| 46 | define(`INTRA_SAD_NONE', `0x00000000') |
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| 47 | define(`INTRA_SAD_HAAR', `0x00800000') |
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| 48 | |||
| 49 | define(`INTER_PART_MASK', `0x00000000') |
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| 50 | |||
| 51 | define(`SEARCH_CTRL_SINGLE', `0x00000000') |
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| 52 | define(`SEARCH_CTRL_DUAL_START', `0x00000100') |
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| 53 | define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300') |
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| 54 | define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700') |
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| 55 | |||
| 56 | define(`REF_REGION_SIZE', `0x2830:UW') |
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| 57 | define(`MIN_REF_REGION_SIZE', `0x2020:UW') |
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| 58 | |||
| 59 | define(`BI_SUB_MB_PART_MASK', `0x0c000000') |
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| 60 | define(`MAX_NUM_MV', `0x00000020') |
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| 61 | define(`FB_PRUNING_ENABLE', `0x40000000') |
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| 62 | |||
| 63 | define(`SEARCH_PATH_LEN', `0x00003030') |
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| 64 | define(`START_CENTER', `0x30000000') |
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| 65 | |||
| 66 | define(`ADAPTIVE_SEARCH_ENABLE', `0x00000002') |
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| 67 | define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') |
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| 68 | |||
| 69 | define(`INTER_VME_OUTPUT_IN_OWS', `10') |
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| 70 | define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') |
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| 71 | |||
| 72 | define(`INTRAMBFLAG_MASK', `0x00002000') |
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| 73 | define(`MVSIZE_UW_BASE', `0x0040') |
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| 74 | define(`MFC_MV32_BIT_SHIFT', `5') |
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| 75 | define(`CBP_DC_YUV_UW', `0x000E') |
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| 76 | |||
| 77 | #ifdef DEV_SNB |
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| 78 | |||
| 79 | define(`MV32_BIT_MASK', `0x0010') |
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| 80 | define(`MV32_BIT_SHIFT', `4') |
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| 81 | |||
| 82 | define(`OBW_CACHE_TYPE', `5') |
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| 83 | |||
| 84 | #else |
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| 85 | |||
| 86 | define(`MV32_BIT_MASK', `0x0020') |
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| 87 | define(`MV32_BIT_SHIFT', `5') |
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| 88 | |||
| 89 | define(`OBW_CACHE_TYPE', `10') |
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| 90 | |||
| 91 | #endif |
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| 92 | |||
| 93 | define(`OBW_MESSAGE_TYPE', `8') |
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| 94 | |||
| 95 | define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') |
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| 96 | |||
| 97 | define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ |
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| 98 | define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ |
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| 99 | define(`OBW_CONTROL_2', `2') /* 2 OWords */ |
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| 100 | define(`OBW_CONTROL_3', `3') /* 4 OWords */ |
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| 101 | define(`OBW_CONTROL_4', `4') /* 8 OWords */ |
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| 102 | |||
| 103 | #ifdef DEV_SNB |
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| 104 | |||
| 105 | define(`OBW_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ |
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| 106 | |||
| 107 | #else |
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| 108 | |||
| 109 | define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ |
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| 110 | |||
| 111 | #endif |
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| 112 | |||
| 113 | |||
| 114 | define(`OBW_HEADER_PRESENT', `1') |
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| 115 | |||
| 116 | /* GRF registers |
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| 117 | * r0 header |
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| 118 | * r1~r4 constant buffer (reserved) |
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| 119 | * r5 inline data |
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| 120 | * r6~r11 reserved |
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| 121 | * r12 write back of VME message |
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| 122 | * r13 write back of Oword Block Write |
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| 123 | */ |
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| 124 | /* |
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| 125 | * GRF 0 -- header |
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| 126 | */ |
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| 127 | define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ |
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| 128 | |||
| 129 | /* |
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| 130 | * GRF 1~4 -- Constant Buffer (reserved) |
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| 131 | */ |
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| 132 | |||
| 133 | /* |
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| 134 | * GRF 5 -- inline data |
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| 135 | */ |
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| 136 | define(`inline_reg0', `r5') |
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| 137 | define(`w_in_mb_uw', `inline_reg0.2') |
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| 138 | define(`orig_xy_ub', `inline_reg0.0') |
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| 139 | define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ |
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| 140 | define(`orig_y_ub', `inline_reg0.1') |
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| 141 | define(`transform_8x8_ub', `inline_reg0.4') |
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| 142 | define(`slice_edge_ub', `inline_reg0.4') |
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| 143 | define(`num_macroblocks', `inline_reg0.6') |
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| 144 | define(`quality_level_ub', `inline_reg0.8') |
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| 145 | |||
| 146 | /* |
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| 147 | * GRF 6~11 -- reserved |
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| 148 | */ |
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| 149 | |||
| 150 | /* |
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| 151 | * GRF 12~15 -- write back for VME message |
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| 152 | */ |
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| 153 | define(`vme_wb', `r12') |
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| 154 | define(`vme_wb0', `r12') |
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| 155 | define(`vme_wb1', `r13') |
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| 156 | define(`vme_wb2', `r14') |
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| 157 | define(`vme_wb3', `r15') |
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| 158 | |||
| 159 | #ifdef DEV_SNB |
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| 160 | /* |
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| 161 | * GRF 16 -- write back for Oword Block Write message with write commit bit |
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| 162 | */ |
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| 163 | define(`obw_wb', `r16') |
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| 164 | define(`obw_wb_length', `1') |
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| 165 | |||
| 166 | #else |
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| 167 | |||
| 168 | /* |
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| 169 | * GRF 16 -- write back for VME message |
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| 170 | */ |
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| 171 | define(`vme_wb4', `r16') |
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| 172 | define(`obw_wb', `null<1>:W') |
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| 173 | define(`obw_wb_length', `0') |
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| 174 | |||
| 175 | #endif |
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| 176 | |||
| 177 | /* |
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| 178 | * GRF 18~21 -- Intra Neighbor Edge Pixels |
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| 179 | */ |
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| 180 | define(`INEP_ROW', `r18') |
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| 181 | define(`INEP_COL0', `r20') |
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| 182 | define(`INEP_COL1', `r21') |
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| 183 | |||
| 184 | /* |
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| 185 | * temporary registers |
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| 186 | */ |
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| 187 | define(`tmp_reg0', `r32') |
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| 188 | define(`read0_header', `tmp_reg0') |
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| 189 | define(`tmp_reg1', `r33') |
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| 190 | define(`read1_header', `tmp_reg1') |
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| 191 | define(`tmp_reg2', `r34') |
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| 192 | define(`vme_m0', `tmp_reg2') |
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| 193 | define(`tmp_reg3', `r35') |
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| 194 | define(`vme_m1', `tmp_reg3') |
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| 195 | define(`intra_flag', `vme_m1.28') |
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| 196 | define(`intra_part_mask_ub', `vme_m1.28') |
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| 197 | define(`mb_intra_struct_ub', `vme_m1.29') |
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| 198 | define(`tmp_reg4', `r36') |
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| 199 | define(`obw_m0', `tmp_reg4') |
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| 200 | define(`tmp_reg5', `r37') |
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| 201 | define(`obw_m1', `tmp_reg5') |
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| 202 | define(`tmp_reg6', `r38') |
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| 203 | define(`obw_m2', `tmp_reg6') |
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| 204 | define(`tmp_reg7', `r39') |
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| 205 | define(`obw_m3', `tmp_reg7') |
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| 206 | define(`tmp_reg8', `r40') |
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| 207 | define(`obw_m4', `tmp_reg8') |
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| 208 | define(`tmp_reg9', `r41') |
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| 209 | define(`tmp_x_w', `tmp_reg9.0') |
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| 210 | define(`tmp_rega', `r42') |
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| 211 | define(`tmp_ud0', `tmp_rega.0') |
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| 212 | define(`tmp_ud1', `tmp_rega.4') |
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| 213 | define(`tmp_ud2', `tmp_rega.8') |
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| 214 | define(`tmp_ud3', `tmp_rega.12') |
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| 215 | define(`tmp_uw0', `tmp_rega.0') |
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| 216 | define(`tmp_uw1', `tmp_rega.2') |
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| 217 | define(`tmp_uw2', `tmp_rega.4') |
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| 218 | define(`tmp_uw3', `tmp_rega.6') |
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| 219 | define(`tmp_uw4', `tmp_rega.8') |
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| 220 | define(`tmp_uw5', `tmp_rega.10') |
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| 221 | define(`tmp_uw6', `tmp_rega.12') |
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| 222 | define(`tmp_uw7', `tmp_rega.14') |
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| 223 | |||
| 224 | /* |
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| 225 | * MRF registers |
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| 226 | */ |
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| 227 | #ifdef DEV_SNB |
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| 228 | |||
| 229 | define(`msg_ind', `0') |
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| 230 | define(`msg_reg0', `m0') /* m0 */ |
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| 231 | define(`msg_reg1', `m1') /* m1 */ |
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| 232 | define(`msg_reg2', `m2') /* m2 */ |
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| 233 | define(`msg_reg3', `m3') /* m3 */ |
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| 234 | define(`msg_reg4', `m4') /* m4 */ |
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| 235 | |||
| 236 | #else |
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| 237 | |||
| 238 | define(`msg_ind', `64') |
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| 239 | define(`msg_reg0', `g64') |
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| 240 | define(`msg_reg1', `g65') |
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| 241 | define(`msg_reg2', `g66') |
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| 242 | define(`msg_reg3', `g67') |
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| 243 | define(`msg_reg4', `g68') |
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| 244 | |||
| 245 | #endif |
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| 246 | |||
| 247 | /* |
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| 248 | * VME message payload |
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| 249 | */ |
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| 250 | |||
| 251 | #ifdef DEV_SNB |
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| 252 | |||
| 253 | define(`vme_msg_length', `4') |
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| 254 | define(`vme_inter_wb_length', `4') |
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| 255 | |||
| 256 | #else |
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| 257 | |||
| 258 | define(`vme_msg_length', `5') |
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| 259 | define(`vme_inter_wb_length', `6') |
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| 260 | |||
| 261 | #endif |
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| 262 | |||
| 263 | define(`vme_intra_wb_length', `1') |
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| 264 | |||
| 265 | define(`vme_msg_ind', `msg_ind') |
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| 266 | define(`vme_msg_0', `msg_reg0') |
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| 267 | define(`vme_msg_1', `msg_reg1') |
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| 268 | define(`vme_msg_2', `msg_reg2') |
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| 269 | |||
| 270 | #ifdef DEV_SNB |
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| 271 | |||
| 272 | define(`vme_msg_3', `vme_msg_2') |
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| 273 | define(`vme_msg_4', `msg_reg3') |
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| 274 | |||
| 275 | #else |
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| 276 | |||
| 277 | define(`vme_msg_3', `msg_reg3') |
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| 278 | define(`vme_msg_4', `msg_reg4') |
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| 279 | |||
| 280 | #endif |
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| 281 | |||
| 282 | define(`DEFAULT_QUALITY_LEVEL', `0x01') |
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| 283 | define(`HIGH_QUALITY_LEVEL', `DEFAULT_QUALITY_LEVEL') |
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| 284 | define(`LOW_QUALITY_LEVEL', `0x02') |