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Rev | Author | Line No. | Line |
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5361 | serge | 1 | /* |
2 | * All Video Processing kernels |
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3 | * Copyright © <2010>, Intel Corporation. |
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4 | * |
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5 | * This program is licensed under the terms and conditions of the |
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6 | * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at |
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7 | * http://www.opensource.org/licenses/eclipse-1.0.php. |
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8 | * |
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9 | */ |
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10 | |||
11 | // Module name: AVS_IEF.inc |
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12 | |||
13 | #ifndef _AVS_INF_INC_ |
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14 | #define _AVS_INF_INC_ |
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15 | |||
16 | #include "undefall.inc" //Undefine the SRC and DEST sysmbols |
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17 | |||
18 | // Message Header |
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19 | // m0.7 31:0 Debug |
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20 | // m0.6 31:0 Debug |
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21 | // m0.5 31:0 Ignored |
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22 | // m0.4 31:0 Ignored |
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23 | // m0.3 31:0 Ignored |
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24 | // m0.2 31:16 Ignored |
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25 | // 15 Alpha Write Channel Mask enable=0, disable=1 |
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26 | // 14 Blue Write Channel Mask (V) |
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27 | // 13 Green Write Channel Mask (Y) |
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28 | // 12 Red Write Channel Mask (U) |
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29 | // 11:0 Ignored |
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30 | // m0.1 Ignored |
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31 | // m0.0 Ignored |
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32 | |||
33 | #define mAVS_8x8_HDR m0 // Message Header |
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34 | #define mAVS_PAYLOAD m1 // Message Payload Header |
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35 | |||
36 | #define mAVS_8x8_HDR_2 m2 // Message Header |
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37 | #define mAVS_PAYLOAD_2 m3 // Message Payload Header |
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38 | |||
39 | #define mAVS_8x8_HDR_UV m2 // Message Header |
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40 | #define mAVS_PAYLOAD_UV m3 // Message Payload Header |
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41 | |||
42 | #define rAVS_8x8_HDR rMSGSRC // Mirror of Message Header |
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43 | #define rAVS_PAYLOAD r9 // Mirror of Message Payload Header |
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44 | |||
45 | // AVS payload |
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46 | // m1.7 Ignored |
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47 | // m1.6 Pixel 0 V Address ---> ORIY (Y0) |
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48 | // m1.5 Delta V ---> Step Y |
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49 | // m1.4 Ignored |
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50 | // m1.3 Ignored |
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51 | // m1.2 Pixel 0 U Address ---> ORIX (X0) |
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52 | // m1.1 U 2nd Derivative ---> NLAS dx |
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53 | // m1.0 Delta U ---> Step X |
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54 | |||
55 | // Sampler Message Descriptor |
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56 | // 31:29 Reserved 000 |
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57 | // 28:25 Message length 0010 |
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58 | // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel |
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59 | // 19 Header Present 1 |
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60 | // 18 MBZ 0 |
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61 | // 17:16 SIMD Mode 11 ---> SIMD64 |
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62 | // 15:12 Message Type 0011 ---> sample_8x8 |
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63 | // 11:8 Sampler Index xxxx |
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64 | // 7:0 Binding Table Index xxxxxxxx |
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65 | #define nAVS_MSG_DSC_1CH 0x044BB000 |
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66 | #define nAVS_MSG_DSC_2CH 0x048BB000 |
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67 | #define nAVS_MSG_DSC_3CH 0x04CBB000 |
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68 | #define nAVS_MSG_DSC_4CH 0x050BB000 |
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69 | |||
70 | #define nAVS_RED_CHANNEL_ONLY 0x0000E000 // Enable Red channel only |
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71 | #define nAVS_GREEN_CHANNEL_ONLY 0x0000D000 // Enable Green channel only |
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72 | #define nAVS_RED_BLUE_CHANNELS 0x0000A000 // Enable Red and Blue channels |
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73 | #define nAVS_RGB_CHANNELS 0x00008000 // Enable RGB(YUV) channels |
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74 | #define nAVS_ALL_CHANNELS 0x00000000 // Enable all channels (ARGB\AYUV) |
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75 | |||
76 | |||
77 | |||
78 | .declare ubAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=1 SrcRegion=REGION(16,1) Type=ub |
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79 | .declare uwAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=2 SrcRegion=REGION(16,1) Type=uw |
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80 | |||
81 | .declare ubAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=1 SrcRegion=REGION(16,1) Type=ub |
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82 | .declare uwAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=2 SrcRegion=REGION(16,1) Type=uw |
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83 | |||
84 | |||
85 | #if (nSRC_REGION==nREGION_2) |
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86 | #define uwDEST_Y uwBOT_Y |
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87 | #define uwDEST_U uwBOT_U |
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88 | #define uwDEST_V uwBOT_V |
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89 | |||
90 | #define ubDEST_Y ubBOT_Y |
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91 | |||
92 | #undef nSRC_REGION |
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93 | #define nSRC_REGION nREGION_2 |
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94 | |||
95 | #else //(nSRC_REGION==nREGION_1) |
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96 | #define uwDEST_Y uwTOP_Y |
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97 | #define uwDEST_U uwTOP_U |
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98 | #define uwDEST_V uwTOP_V |
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99 | |||
100 | #define ubDEST_Y ubTOP_Y |
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101 | |||
102 | #undef nSRC_REGION |
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103 | #define nSRC_REGION nREGION_1 |
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104 | |||
105 | #endif |
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106 | |||
107 | |||
108 | #endif //_AVS_INF_INC_2010> |