Details | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5361 | serge | 1 | /* |
| 2 | * All Video Processing kernels |
||
| 3 | * Copyright © <2010>, Intel Corporation. |
||
| 4 | * |
||
| 5 | * This program is licensed under the terms and conditions of the |
||
| 6 | * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at |
||
| 7 | * http://www.opensource.org/licenses/eclipse-1.0.php. |
||
| 8 | * |
||
| 9 | */ |
||
| 10 | |||
| 11 | // Module name: PA_Load_9x8.asm |
||
| 12 | //---------------------------------------------------------------- |
||
| 13 | // This module loads 16x8 Y, 9x8 U and 9x8 V planar data blocks for CSC module |
||
| 14 | // and stores it in word-aligned format. |
||
| 15 | //---------------------------------------------------------------- |
||
| 16 | |||
| 17 | #define PA_LOAD_9x8 |
||
| 18 | #include "PA_Load.inc" |
||
| 19 | |||
| 20 | // Load 18x8 packed data block |
||
| 21 | // Packed data block should be loaded as 36x8 pixel block |
||
| 22 | add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin |
||
| 23 | shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled |
||
| 24 | mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_MAIN:ud // Block width and height (32x8) |
||
| 25 | mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud |
||
| 26 | send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_MAIN+nBI_CURRENT_SRC_YUV:ud |
||
| 27 | |||
| 28 | add (1) rMSGSRC.0<1>:d rMSGSRC.0:d 32:w //the last 4 pixels are read again for optimization |
||
| 29 | mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_ADDITION:ud // Block width and height (4x8) |
||
| 30 | mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud |
||
| 31 | send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_ADDITION+nBI_CURRENT_SRC_YUV:ud |
||
| 32 | |||
| 33 | // Unpack to "planar" YUV422 format in word-aligned bytes |
||
| 34 | add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block |
||
| 35 | $for(0; |
||
| 36 | mov (16) uwDEST_Y(0, %1*16)<1> r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) |
||
| 37 | mov (8) uwDEST_U(0, %1*16)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) |
||
| 38 | mov (8) uwDEST_V(0, %1*16)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) |
||
| 39 | } |
||
| 40 | |||
| 41 | $for(0; |
||
| 42 | mov (1) uwDEST_U(0, %1*16+8)<1> r[pCF_U_OFFSET, %1*4+256]REGION(1,0) |
||
| 43 | mov (1) uwDEST_V(0, %1*16+8)<1> r[pCF_V_OFFSET, %1*4+256]REGION(1,0) |
||
| 44 | } |
||
| 45 | //UV expansion done in PL9x8_PL16x8.asm module |
||
| 46 | |||
| 47 | // End of PA_Load_9x8 |