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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5361 | serge | 1 | /* |
| 2 | * Copyright © 2008 Intel Corporation |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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| 21 | * SOFTWARE. |
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| 22 | * |
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| 23 | * Author: |
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| 24 | * Zou Nan hai |
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| 25 | * Yan Li |
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| 26 | * Liu Xi bin |
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| 27 | */ |
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| 28 | /* GRF allocation: |
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| 29 | g1~g30: constant buffer |
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| 30 | g1~g2:intra IQ matrix |
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| 31 | g3~g4:non intra IQ matrix |
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| 32 | g5~g20:IDCT table |
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| 33 | g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 |
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| 34 | g[a0.0]:DCT data of a block |
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| 35 | g125: ip before jump |
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| 36 | if(v==0 && u==0 && intra_mb) |
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| 37 | F''[v][u] = QF[v][u] * intra_dc_mult |
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| 38 | else |
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| 39 | F''[v][u] = (QF[v][u]*W[w][v][u]*quantiser_scale*2)/32 |
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| 40 | */ |
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| 41 | DO_IQ_INTRA: |
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| 42 | add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; |
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| 43 | mov (1) g111.0<1>W g[a0.0]<1,1,1>W {align1}; |
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| 44 | mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr}; |
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| 45 | mul (16) g116.0<1>D g116.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; |
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| 46 | asr (16) g116.0<1>D g116.0<8,8,1>D 4UW {align1 compr}; |
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| 47 | mul (1) g116.0<1>D g111<1,1,1>W g109.4<1,1,1>UW {align1}; //intra_dc_mult |
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| 48 | |||
| 49 | add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; |
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| 50 | mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr}; |
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| 51 | mul (16) g118.0<1>D g118.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; |
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| 52 | asr (16) g118.0<1>D g118.0<8,8,1>D 4UW {align1 compr}; |
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| 53 | |||
| 54 | add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; |
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| 55 | mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr}; |
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| 56 | mul (16) g120.0<1>D g120.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; |
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| 57 | asr (16) g120.0<1>D g120.0<8,8,1>D 4UW {align1 compr}; |
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| 58 | |||
| 59 | add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; |
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| 60 | mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr}; |
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| 61 | mul (16) g122.0<1>D g122.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; |
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| 62 | asr (16) g122.0<1>D g122.0<8,8,1>D 4UW {align1 compr}; |
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| 63 | |||
| 64 | add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back |