Subversion Repositories Kolibri OS

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
5361 serge 1 
/*
2 
 * Header file for all AVC intra prediction kernels
3 
 * Copyright © <2010>, Intel Corporation.
4 
 *
5 
 * This program is licensed under the terms and conditions of the
6 
 * Eclipse Public License (EPL), version 1.0.  The full text of the EPL is at
7 
 * http://www.opensource.org/licenses/eclipse-1.0.php.
8 
 *
9 
 */
10 
#if !defined(__INTRA_HEADER__)	// Make sure this file is only included once
11 
#define __INTRA_HEADER__
12 
 
13 
// Module name: intra_header.inc
14 
//
15 
// Header file for all AVC intra prediction kernels
16 
//
17 
//	This header file defines everything that's specific to intra macroblock kernels
18 
 
19 
 
20 
//  ----------- Various data buffers and pointers ------------
21 
//
22 
//	I_PCM data buffer
23 
//
24 
#define		I_PCM_BUF_Y			4
25 
#define		I_PCM_BUF_UV		12
26 
 
27 
#define		REG_I_PCM_BUF_Y		r4
28 
#define		REG_I_PCM_BUF_UV	r12
29 
 
30 
.declare    I_PCM_Y  Base=REG_I_PCM_BUF_Y  ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// 8-bit I_PCM Y data
31 
.declare    I_PCM_UV Base=REG_I_PCM_BUF_UV ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// 8-bit I_PCM U/V data
32 
 
33 
//	Intra macroblock error data blocks
34 
//
35 
#define	    ERRBUF		4		// Starting GRF index for error data
36 
#define		REG_ERRBUF	r4
37 
.declare    MBBLOCKW Base=REG_ERRBUF ElementSize=2 SrcRegion=REGION(16,1) Type=w	// For 16-bit inter MB
38 
.declare    MBBLOCKD Base=REG_ERRBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw	// For use in "send" command
39 
 
40 
#define	    PERROR		a0.2	// Pointer to macroblock error data
41 
#define	    PERROR1		a0.3	// Pointer to macroblock error data used by instruction compression
42 
#define	    PERROR_UD	a0.1	// Pointer to macroblock error data in DWORD unit
43 
 
44 
//	Intra macroblock reference data
45 
//
46 
#define		REG_INTRA_REF_TOP	r49		// Must be an odd numbered GRF register
47 
.declare    INTRA_REF_TOP0		Base=REG_INTRA_REF_TOP	 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
48 
.declare    INTRA_REF_TOP		Base=REG_INTRA_REF_TOP.4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
49 
										// Actual top row reference data start at offset 4 in BYTE
50 
.declare    INTRA_REF_TOP_W		Base=REG_INTRA_REF_TOP.2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
51 
										// Actual top row reference data start at offset 2 in WORD
52 
.declare    INTRA_REF_TOP_D		Base=REG_INTRA_REF_TOP ElementSize=4 DstRegion=<1> Type=ud	// Only used in "send" instruction
53 
 
54 
#define		INTRA_REF_LEFT_ID	50
55 
#define		REG_INTRA_REF_LEFT	r50
56 
.declare    INTRA_REF_LEFT0		Base=REG_INTRA_REF_LEFT ElementSize=1 SrcRegion=REGION(8,4) Type=ub
57 
.declare    INTRA_REF_LEFT		Base=REG_INTRA_REF_LEFT.3 ElementSize=1 SrcRegion=REGION(8,4) Type=ub
58 
										// Actual left column reference data are located at offset 3 in BYTE
59 
.declare    INTRA_REF_LEFT_UV	Base=REG_INTRA_REF_LEFT.2 ElementSize=1 SrcRegion=REGION(8,4) Type=ub
60 
										// Actual left column U/V reference data are located at offset 2 in BYTE
61 
.declare    INTRA_REF_LEFT_W	Base=REG_INTRA_REF_LEFT.1 ElementSize=2 SrcRegion=REGION(8,2) Type=uw
62 
										// Actual left column reference data are located at offset 1 in WORD
63 
.declare    INTRA_REF_LEFT_D	Base=REG_INTRA_REF_LEFT ElementSize=4 DstRegion=<1> Type=ud	// Only used in "send" instruction
64 
 
65 
#define		PREF_LEFT		a0.4	// Pointer to left reference data
66 
#define		PREF_LEFT_UD	a0.2	// Pointer in DWORD to left reference data
67 
 
68 
#define		INTRA_TEMP_0	52
69 
#define		INTRA_TEMP_1	53
70 
#define		INTRA_TEMP_2	54
71 
#define		INTRA_TEMP_3	55
72 
#define		INTRA_TEMP_4	56
73 
#define		INTRA_TEMP_5	57
74 
#define		INTRA_TEMP_6	58
75 
 
76 
#define		REG_INTRA_TEMP_0	r52
77 
#define		REG_INTRA_TEMP_1	r53
78 
#define		REG_INTRA_TEMP_2	r54
79 
#define		REG_INTRA_TEMP_3	r55
80 
#define		REG_INTRA_TEMP_4	r56
81 
#define		REG_INTRA_TEMP_5	r57
82 
#define		REG_INTRA_TEMP_6	r58
83 
#define		REG_INTRA_TEMP_7	r59
84 
#define		REG_INTRA_TEMP_8	r60
85 
 
86 
// Destination registers for write commit
87 
#define		REG_WRITE_COMMIT_Y	r60.0
88 
#define		REG_WRITE_COMMIT_UV	r61.0
89 
 
90 
//  ----------- Various data buffers and pointers ------------
91 
//  R32 - R47 for predicted picture buffer (for both Y and U/V blocks)
92 
//
93 
#define	    PREDBUF		32		// Starting GRF index for predicted buffer
94 
#define		REG_PREDBUF	r32
95 
 
96 
.declare    PRED_Y		Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted Y picture
97 
.declare    PRED_YW		Base=REG_PREDBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw	// Predicted Y picture stored in WORD
98 
.declare    PRED_Y_FM	Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted Y picture frame
99 
.declare    PRED_Y_TF	Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted Y picture Top field
100 
 
101 
.declare    PRED_UV		Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted U/V picture
102 
.declare    PRED_UVW	Base=REG_PREDBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw	// Predicted U/V picture stored in WORD
103 
.declare    PRED_UV_FM	Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted U/V picture frame
104 
.declare    PRED_UV_TF	Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted U/V picture top field
105 
.declare    PRED_UV_BF	Base=REG_PREDBUF.16 ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Predicted U/V picture bottom field
106 
 
107 
//  The same region will also be used as finally decoded Y blocks shared with U/V blocks
108 
//
109 
#define	    DECBUF		32
110 
#define		REG_DECBUF	r32
111 
.declare    DEC_Y		Base=REG_DECBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Decoded Y picture
112 
.declare    DEC_UV		Base=REG_DECBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Decoded U/V P-/B-picture
113 
.declare    DEC_UD		Base=REG_DECBUF ElementSize=4 SrcRegion=REGION(8,1) Type=ud		// Decoded buffer in UD type
114 
 
115 
//	Reference buffer for intra_NxN prediction
116 
//
117 
#define		PRED_MODE	REG_INTRA_TEMP_0
118 
.declare    REF_TOP0	Base=REG_INTRA_TEMP_5	ElementSize=1 SrcRegion=REGION(16,1) Type=ub
119 
.declare    REF_TOP		Base=REG_INTRA_TEMP_5.4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
120 
									// Actual top reference data start from offset 3,i.e. p[-1,-1]
121 
.declare    REF_TOP_W	Base=REG_INTRA_TEMP_5 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
122 
.declare    REF_TOP_D	Base=REG_INTRA_TEMP_5 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
123 
.declare    REF_LEFT	Base=REG_INTRA_TEMP_6 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
124 
.declare    REF_LEFT_D	Base=REG_INTRA_TEMP_6 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
125 
 
126 
// For intra prediction plane mode
127 
//
128 
.declare    H1	Base=REG_INTRA_TEMP_0 ElementSize=2 SrcRegion=REGION(8,1) Type=w	// Make sure it's an even GRF
129 
.declare    H2	Base=REG_INTRA_TEMP_0.8 ElementSize=2 SrcRegion=REGION(8,1) Type=w
130 
.declare    V1	Base=REG_INTRA_TEMP_1 ElementSize=2 SrcRegion=REGION(8,1) Type=w	// Make sure it's the following odd GRF
131 
.declare    V2	Base=REG_INTRA_TEMP_1.8 ElementSize=2 SrcRegion=REGION(8,1) Type=w
132 
 
133 
.declare	CP	Base=REG_INTRA_TEMP_2 ElementSize=2 SrcRegion=REGION(16,1) Type=w
134 
 
135 
#define		PINTRAPRED_Y	a0.7	// Used as luma intra prediction mode pointer
136 
#define		PINTRAPRED_UV	a0.7	// Used as chroma intra prediction mode pointer
137 
#define		PINTRA4X4_Y		a0.4	// Used as luma intra_4x4 prediction mode pointer
138 
 
139 
#define		PBWDCOPY_4		a0.4	// a0.4 - a0.7 used in intra_4x4 prediction for moving data backward
140 
#define		PBWDCOPY_8		a0.6	// a0.6 - a0.7 used in intra_8x8 prediction for moving data backward
141 
 
142 
// For Intra_4x4 prediction mode
143 
//
144 
.declare    INTRA_4X4_MODE	Base=REG_INTRA_TEMP_1 ElementSize=4 SrcRegion=REGION(1,0) DstRegion=<1> Type=d	// Actually only need 1 DWORD
145 
 
146 
//  ----------- Intra CURBE constants ------------
147 
//
148 
#define		REG_CURBE1	r1
149 
#define		REG_CURBE2	r2
150 
#define		INTRA_4X4_OFFSET	1*GRFWIB		// 9 Bytes
151 
#define		INTRA_8X8_OFFSET	1*GRFWIB+12		// 9 Bytes starting sub-register r1.3:ud
152 
#define		INTRA_16X16_OFFSET	1*GRFWIB+24		// 4 Bytes starting sub-register r1.6:ud
153 
#define		INTRA_CHROMA_OFFSET	1*GRFWIB+28		// 4 Bytes starting sub-register r1.7:ud
154 
 
155 
#define		TOP_REF_OFFSET		REG_CURBE1.10	// r1.5:w
156 
 
157 
//	Constants used in plane intra prediction mode
158 
#define		XY_3	REG_CURBE2.4	// Stored BYTE constants x-3 for x=0...7, i.e. -3,-2,...3,4 for U/V, need duplicate to every other byte
159 
#define		XY_3_1	REG_CURBE2.5	// Stored BYTE constants x-3 for x=0...7, i.e. -3,-2,...3,4 for 2nd instruction in {Comp}
160 
#define		XY_7	REG_CURBE2.0	// Stored BYTE constants x-7 for x=0...15, i.e. -7,-6,...7,8 for Y
161 
#define		XY_7_1	REG_CURBE2.1	// Stored BYTE constants x-7 for x=0...15, i.e. -7,-6,...7,8 for 2nd instruction in {Comp}
162 
 
163 
#define		INV_SHIFT	REG_CURBE2.16
164 
 
165 
#define		INV_TRANS4	REG_CURBE2.20	// For reverse data transfer for intra_4x4 (0x00020406)
166 
#define		INV_TRANS48	REG_CURBE2.22	// For reverse data transfer for intra_4x4 (0x0002)
167 
#define		INV_TRANS8	REG_CURBE1.22	// For reverse data transfer for intra_8x8 (0x0001)
168 
 
169 
#define		INTRA_MODE	REG_CURBE2.24	// Offset to intra_Pred_4x4_Y from each sub-block
170 
 
171 
//  ----------- In-line parameters ------------
172 
//
173 
#define REG_INLINE	r3
174 
 
175 
#define INLINE_DW0	REG_INLINE.0<0;1,0>:ud
176 
#define INLINE_DW1	REG_INLINE.1<0;1,0>:ud
177 
#define INLINE_DW2	REG_INLINE.2<0;1,0>:ud
178 
#define INLINE_DW3	REG_INLINE.3<0;1,0>:ud
179 
#define INLINE_DW4	REG_INLINE.4<0;1,0>:ud
180 
#define INLINE_DW5	REG_INLINE.5<0;1,0>:ud
181 
#define INLINE_DW6	REG_INLINE.6<0;1,0>:ud
182 
#define INLINE_DW7	REG_INLINE.7<0;1,0>:ud
183 
 
184 
//	Intra macroblock in-line data
185 
//
186 
//	In-line DWORD 0
187 
#define REG_MBAFF_FIELD				REG_INLINE.1	// :uw, can be added directly to lower-word of MSGDSC
188 
#define MBAFF_FIELD					BIT26+BIT25		// Bits 26:25 - MBAFF field macroblock flag
189 
													//  00 = Current macroblock is not an MBAFF field macroblock
190 
													//  11 = Current macroblock is an MBAFF field macroblock
191 
 
192 
#define REG_FIELD_PARITY			INLINE_DW0
193 
#define FIELD_PARITY				BIT24			// Bit 24 - Macroblock field parity flag
194 
													//  0 = Current field is a top field
195 
													//  1 = Current field is a bottom field
196 
 
197 
#define REG_FIELD_MACROBLOCK_FLAG	INLINE_DW0
198 
#define FIELD_MACROBLOCK_FLAG		BIT14			// Bit 14 - Field macroblock flag
199 
													//  0 = Current macroblock is not a field macroblock
200 
													//  1 = Current macroblock is a field macroblock
201 
#define REG_MACROBLOCK_TYPE			INLINE_DW0
202 
#define MACROBLOCK_TYPE				BIT12+BIT11+BIT10+BIT9+BIT8		// Bit 12:8 - Intra macroblock flag
203 
 
204 
#define REG_CHROMA_FORMAT_IDC		INLINE_DW0
205 
#define CHROMA_FORMAT_IDC			BIT3+BIT2		// Bit 3:2 - Chroma format
206 
													// 00 = Luma only (Monochrome)
207 
													// 01 = YUV420
208 
													// 10 = YUV422
209 
													// 11 = YUV444
210 
#define	REG_MBAFF_PIC				INLINE_DW0
211 
#define MBAFF_PIC					BIT1			// Bit 1 - MBAFF Frame picture
212 
													// 0 = Not an MBAFF frame picture
213 
													// 1 = An MBAFF frame picture
214 
#define REG_INTRA_PRED_8X8_BLK2_AVAIL_FLAG	INLINE_DW0
215 
#define INTRA_PRED_8X8_BLK2_AVAIL_FLAG	BIT4		// Bit 4: Pixel available for block 2 in an intra_8x8 MB.
216 
 
217 
//	In-line DWORD 1
218 
#define ORIX			REG_INLINE.4	// :ub, H. origin of the macroblock in macroblock unit
219 
#define ORIY			REG_INLINE.5	// :ub, V. origin of the macroblock in macroblock unit
220 
 
221 
//	In-line DWORD 2
222 
#define	REG_CBPCYB					REG_INLINE.9	// :ub, Coded block pattern
223 
#define	REG_CBPCY					INLINE_DW2		// Bits 13:8 - Coded block pattern
224 
													// reflect Y0, Y1, Y2, Y3, Cb4, Cr5
225 
													// Bit 13 - Y0
226 
													// Bit 12 - Y1
227 
													// Bit 11 - Y2
228 
													// Bit 10 - Y3
229 
													// Bit 9 - U4
230 
													// Bit 8 - V5
231 
#define CBP_MASK					0x3F00:ud		// Bit mask for all CBP bits
232 
#define CBP_Y_MASK					0x3C00:ud		// Bit mask for CBP Y bits
233 
#define CBP_UV_MASK					0x0300:ud		// Bit mask for CBP U/V bits
234 
 
235 
#define CBP_Y0_MASK					BIT13:ud		// Bit mask for CBP Y0 bit
236 
#define CBP_Y1_MASK					BIT12:ud		// Bit mask for CBP Y1 bit
237 
#define CBP_Y2_MASK					BIT11:ud		// Bit mask for CBP Y2 bit
238 
#define CBP_Y3_MASK					BIT10:ud		// Bit mask for CBP Y3 bit
239 
#define CBP_U_MASK					BIT9:ud			// Bit mask for CBP U bit
240 
#define CBP_V_MASK					BIT8:ud			// Bit mask for CBP V bit
241 
 
242 
//	In-line DWORD 3
243 
#define REG_INTRA_CHROMA_PRED_MODE	REG_INLINE.12	// :ub - Intra chroma prediction mode
244 
#define INTRA_CHROMA_PRED_MODE		BIT7+BIT6		// Bit 7:6 - Intra chroma prediction mode
245 
													// 00 = Intra DC prediction
246 
													// 01 = Intra horizontal prediction
247 
													// 10 = Intra vertical prediction
248 
													// 11 = Intra plane prediction
249 
#define INTRA_CHROMA_PRED_MODE_SHIFT	6			// Intra chroma prediction mode shift
250 
 
251 
#define REG_INTRA_PRED_AVAIL_FLAG	INLINE_DW3
252 
#define INTRA_PRED_AVAIL_FLAG		BIT4+BIT3+BIT2+BIT1+BIT0	// Bits 4:0 - Intra prediction available flag
253 
													// Bit 0: Macroblock A (the left neighbor) entire or top half
254 
													// Bit 1: Macroblock B (the upper neighbor)
255 
													// Bit 2: Macroblock C (the above-right neighbor)
256 
													// Bit 3: Macroblock D (the above-left neighbor)
257 
													// Bit 4: Macroblock A (the left neighbor) bottom half
258 
													// Each bit is defined below
259 
													// 0 = The macroblock is not available for intra prediction
260 
													// 1 = The macroblock is available for intra prediction
261 
#define INTRA_PRED_LEFT_TH_AVAIL_FLAG	BIT0		// Bit 0: Macroblock A (the left neighbor) entire or top half
262 
#define INTRA_PRED_UP_AVAIL_FLAG		BIT1		// Bit 1: Macroblock B (the upper neighbor)
263 
#define INTRA_PRED_UP_RIGHT_AVAIL_FLAG	BIT2		// Bit 2: Macroblock C (the above-right neighbor)
264 
#define INTRA_PRED_UP_LEFT_AVAIL_FLAG	BIT3		// Bit 3: Macroblock D (the above-left neighbor)
265 
#define INTRA_PRED_LEFT_BH_AVAIL_FLAG	BIT4		// Bit 4: Macroblock A (the left neighbor) bottom half
266 
//#define INTRA_PRED_8X8_BLK2_AVAIL_FLAG	BIT5		// Bit 5: Pixel available for block 2 in an intra_8x8 MB.
267 
#define REG_INTRA_PRED_AVAIL_FLAG_BYTE	REG_INLINE.12	// Byte location of Intra_Pred_Avail_Flag
268 
#define REG_INTRA_PRED_AVAIL_FLAG_WORD	REG_INLINE.6	// Word location of Intra_Pred_Avail_Flag
269 
 
270 
 
271 
.declare    INTRA_PRED_MODE  Base=REG_INLINE.16 ElementSize=1 SrcRegion=REGION(16,1) Type=ub	// Intra prediction mode
272 
 
273 
// End of intra_header.inc
274 
 
275 
#endif	// !defined(__INTRA_HEADER__)
276