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4363 | Serge | 1 | /* |
2 | * Copyright © 2008-2012 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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21 | * IN THE SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Eric Anholt |
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25 | * |
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26 | */ |
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27 | |||
28 | /** |
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29 | * @file intel_bufmgr.h |
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30 | * |
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31 | * Public definitions of Intel-specific bufmgr functions. |
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32 | */ |
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33 | |||
34 | #ifndef INTEL_BUFMGR_H |
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35 | #define INTEL_BUFMGR_H |
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36 | |||
37 | #include |
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38 | #include |
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39 | #include |
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40 | |||
41 | struct drm_clip_rect; |
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42 | |||
43 | typedef struct _drm_intel_bufmgr drm_intel_bufmgr; |
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44 | typedef struct _drm_intel_context drm_intel_context; |
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45 | typedef struct _drm_intel_bo drm_intel_bo; |
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46 | |||
47 | struct _drm_intel_bo { |
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48 | /** |
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49 | * Size in bytes of the buffer object. |
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50 | * |
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51 | * The size may be larger than the size originally requested for the |
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52 | * allocation, such as being aligned to page size. |
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53 | */ |
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54 | unsigned long size; |
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55 | |||
56 | /** |
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57 | * Alignment requirement for object |
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58 | * |
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59 | * Used for GTT mapping & pinning the object. |
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60 | */ |
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61 | unsigned long align; |
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62 | |||
63 | /** |
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5068 | serge | 64 | * Deprecated field containing (possibly the low 32-bits of) the last |
65 | * seen virtual card address. Use offset64 instead. |
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4363 | Serge | 66 | */ |
67 | unsigned long offset; |
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68 | |||
69 | /** |
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70 | * Virtual address for accessing the buffer data. Only valid while |
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71 | * mapped. |
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72 | */ |
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73 | #ifdef __cplusplus |
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74 | void *virt; |
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75 | #else |
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76 | void *virtual; |
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77 | #endif |
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78 | |||
79 | /** Buffer manager context associated with this buffer object */ |
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80 | drm_intel_bufmgr *bufmgr; |
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81 | |||
82 | /** |
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83 | * MM-specific handle for accessing object |
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84 | */ |
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85 | int handle; |
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5068 | serge | 86 | |
87 | /** |
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88 | * Last seen card virtual address (offset from the beginning of the |
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89 | * aperture) for the object. This should be used to fill relocation |
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90 | * entries when calling drm_intel_bo_emit_reloc() |
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91 | */ |
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92 | uint64_t offset64; |
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4363 | Serge | 93 | }; |
94 | |||
95 | enum aub_dump_bmp_format { |
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96 | AUB_DUMP_BMP_FORMAT_8BIT = 1, |
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97 | AUB_DUMP_BMP_FORMAT_ARGB_4444 = 4, |
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98 | AUB_DUMP_BMP_FORMAT_ARGB_0888 = 6, |
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99 | AUB_DUMP_BMP_FORMAT_ARGB_8888 = 7, |
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100 | }; |
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101 | |||
102 | typedef struct _drm_intel_aub_annotation { |
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103 | uint32_t type; |
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104 | uint32_t subtype; |
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105 | uint32_t ending_offset; |
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106 | } drm_intel_aub_annotation; |
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107 | |||
108 | #define BO_ALLOC_FOR_RENDER (1<<0) |
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109 | |||
110 | drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, |
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111 | unsigned long size, unsigned int alignment); |
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112 | drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, |
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113 | const char *name, |
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114 | unsigned long size, |
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115 | unsigned int alignment); |
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116 | drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, |
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117 | const char *name, |
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118 | int x, int y, int cpp, |
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119 | uint32_t *tiling_mode, |
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120 | unsigned long *pitch, |
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121 | unsigned long flags); |
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122 | void drm_intel_bo_reference(drm_intel_bo *bo); |
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123 | void drm_intel_bo_unreference(drm_intel_bo *bo); |
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124 | int drm_intel_bo_map(drm_intel_bo *bo, int write_enable); |
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125 | int drm_intel_bo_unmap(drm_intel_bo *bo); |
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126 | |||
127 | int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset, |
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128 | unsigned long size, const void *data); |
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129 | int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, |
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130 | unsigned long size, void *data); |
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131 | void drm_intel_bo_wait_rendering(drm_intel_bo *bo); |
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132 | |||
133 | void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug); |
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134 | void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr); |
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135 | int drm_intel_bo_exec(drm_intel_bo *bo, int used, |
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136 | struct drm_clip_rect *cliprects, int num_cliprects, int DR4); |
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137 | int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, |
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138 | struct drm_clip_rect *cliprects, int num_cliprects, int DR4, |
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139 | unsigned int flags); |
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140 | int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count); |
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141 | |||
142 | int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
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143 | drm_intel_bo *target_bo, uint32_t target_offset, |
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144 | uint32_t read_domains, uint32_t write_domain); |
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145 | int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, |
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146 | drm_intel_bo *target_bo, |
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147 | uint32_t target_offset, |
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148 | uint32_t read_domains, uint32_t write_domain); |
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149 | int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment); |
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150 | int drm_intel_bo_unpin(drm_intel_bo *bo); |
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151 | int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
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152 | uint32_t stride); |
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153 | int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
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154 | uint32_t * swizzle_mode); |
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155 | int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name); |
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156 | int drm_intel_bo_busy(drm_intel_bo *bo); |
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157 | int drm_intel_bo_madvise(drm_intel_bo *bo, int madv); |
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158 | |||
159 | int drm_intel_bo_disable_reuse(drm_intel_bo *bo); |
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160 | int drm_intel_bo_is_reusable(drm_intel_bo *bo); |
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161 | int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo); |
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162 | |||
163 | /* drm_intel_bufmgr_gem.c */ |
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164 | drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size); |
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165 | drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, |
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166 | const char *name, |
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167 | unsigned int handle); |
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168 | drm_intel_bo * |
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169 | bo_create_from_gem_handle(drm_intel_bufmgr *bufmgr, |
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170 | unsigned int size, unsigned int handle); |
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171 | |||
172 | void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr); |
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173 | void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr); |
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174 | void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr, |
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175 | int limit); |
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176 | int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo); |
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177 | int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo); |
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178 | int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo); |
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179 | |||
180 | int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo); |
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181 | void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start); |
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182 | void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable); |
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183 | |||
184 | void |
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185 | drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr, |
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186 | const char *filename); |
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187 | void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable); |
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188 | void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo, |
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189 | int x1, int y1, int width, int height, |
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190 | enum aub_dump_bmp_format format, |
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191 | int pitch, int offset); |
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192 | void |
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193 | drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo, |
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194 | drm_intel_aub_annotation *annotations, |
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195 | unsigned count); |
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196 | |||
197 | int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); |
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198 | |||
199 | int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); |
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200 | int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); |
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201 | int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); |
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202 | |||
203 | drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr); |
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204 | void drm_intel_gem_context_destroy(drm_intel_context *ctx); |
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205 | int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx, |
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206 | int used, unsigned int flags); |
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207 | |||
208 | int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd); |
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209 | drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, |
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210 | int prime_fd, int size); |
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211 | |||
212 | /* drm_intel_bufmgr_fake.c */ |
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213 | drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, |
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214 | unsigned long low_offset, |
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215 | void *low_virtual, |
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216 | unsigned long size, |
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217 | volatile unsigned int |
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218 | *last_dispatch); |
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219 | void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr, |
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220 | volatile unsigned int |
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221 | *last_dispatch); |
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222 | void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr, |
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223 | int (*exec) (drm_intel_bo *bo, |
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224 | unsigned int used, |
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225 | void *priv), |
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226 | void *priv); |
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227 | void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr, |
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228 | unsigned int (*emit) (void *priv), |
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229 | void (*wait) (unsigned int fence, |
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230 | void *priv), |
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231 | void *priv); |
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232 | drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr, |
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233 | const char *name, |
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234 | unsigned long offset, |
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235 | unsigned long size, void *virt); |
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236 | void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo, |
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237 | void (*invalidate_cb) (drm_intel_bo |
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238 | * bo, |
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239 | void *ptr), |
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240 | void *ptr); |
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241 | |||
242 | void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr); |
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243 | void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr); |
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244 | |||
245 | struct drm_intel_decode *drm_intel_decode_context_alloc(uint32_t devid); |
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246 | void drm_intel_decode_context_free(struct drm_intel_decode *ctx); |
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247 | void drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx, |
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248 | void *data, uint32_t hw_offset, |
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249 | int count); |
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250 | void drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx, |
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251 | int dump_past_end); |
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252 | void drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx, |
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253 | uint32_t head, uint32_t tail); |
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254 | void drm_intel_decode_set_output_file(struct drm_intel_decode *ctx, FILE *out); |
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255 | void drm_intel_decode(struct drm_intel_decode *ctx); |
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256 | |||
257 | int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, |
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258 | uint32_t offset, |
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259 | uint64_t *result); |
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260 | |||
261 | int drm_intel_get_reset_stats(drm_intel_context *ctx, |
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262 | uint32_t *reset_count, |
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263 | uint32_t *active, |
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264 | uint32_t *pending); |
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265 | |||
266 | /** @{ Compatibility defines to keep old code building despite the symbol rename |
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267 | * from dri_* to drm_intel_* |
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268 | */ |
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269 | #define dri_bo drm_intel_bo |
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270 | #define dri_bufmgr drm_intel_bufmgr |
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271 | #define dri_bo_alloc drm_intel_bo_alloc |
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272 | #define dri_bo_reference drm_intel_bo_reference |
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273 | #define dri_bo_unreference drm_intel_bo_unreference |
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274 | #define dri_bo_map drm_intel_bo_map |
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275 | #define dri_bo_unmap drm_intel_bo_unmap |
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276 | #define dri_bo_subdata drm_intel_bo_subdata |
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277 | #define dri_bo_get_subdata drm_intel_bo_get_subdata |
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278 | #define dri_bo_wait_rendering drm_intel_bo_wait_rendering |
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279 | #define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug |
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280 | #define dri_bufmgr_destroy drm_intel_bufmgr_destroy |
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281 | #define dri_bo_exec drm_intel_bo_exec |
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282 | #define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space |
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283 | #define dri_bo_emit_reloc(reloc_bo, read, write, target_offset, \ |
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284 | reloc_offset, target_bo) \ |
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285 | drm_intel_bo_emit_reloc(reloc_bo, reloc_offset, \ |
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286 | target_bo, target_offset, \ |
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287 | read, write); |
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288 | #define dri_bo_pin drm_intel_bo_pin |
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289 | #define dri_bo_unpin drm_intel_bo_unpin |
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290 | #define dri_bo_get_tiling drm_intel_bo_get_tiling |
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291 | #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0) |
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292 | #define dri_bo_flink drm_intel_bo_flink |
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293 | #define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init |
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294 | #define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name |
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295 | #define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse |
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296 | #define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init |
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297 | #define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch |
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298 | #define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback |
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299 | #define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback |
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300 | #define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static |
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301 | #define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store |
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302 | #define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take |
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303 | #define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all |
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304 | |||
305 | /** @{ */ |
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306 | |||
307 | #endif /* INTEL_BUFMGR_H */0) |