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5563 | serge | 1 | /* |
2 | * Copyright © 2010 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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21 | * DEALINGS IN THE SOFTWARE. |
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22 | */ |
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23 | |||
24 | /** |
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25 | * \file lower_instructions.cpp |
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26 | * |
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27 | * Many GPUs lack native instructions for certain expression operations, and |
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28 | * must replace them with some other expression tree. This pass lowers some |
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29 | * of the most common cases, allowing the lowering code to be implemented once |
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30 | * rather than in each driver backend. |
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31 | * |
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32 | * Currently supported transformations: |
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33 | * - SUB_TO_ADD_NEG |
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34 | * - DIV_TO_MUL_RCP |
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35 | * - INT_DIV_TO_MUL_RCP |
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36 | * - EXP_TO_EXP2 |
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37 | * - POW_TO_EXP2 |
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38 | * - LOG_TO_LOG2 |
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39 | * - MOD_TO_FRACT |
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40 | * - LRP_TO_ARITH |
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41 | * - BITFIELD_INSERT_TO_BFM_BFI |
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42 | * |
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43 | * SUB_TO_ADD_NEG: |
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44 | * --------------- |
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45 | * Breaks an ir_binop_sub expression down to add(op0, neg(op1)) |
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46 | * |
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47 | * This simplifies expression reassociation, and for many backends |
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48 | * there is no subtract operation separate from adding the negation. |
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49 | * For backends with native subtract operations, they will probably |
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50 | * want to recognize add(op0, neg(op1)) or the other way around to |
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51 | * produce a subtract anyway. |
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52 | * |
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53 | * DIV_TO_MUL_RCP and INT_DIV_TO_MUL_RCP: |
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54 | * -------------------------------------- |
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55 | * Breaks an ir_binop_div expression down to op0 * (rcp(op1)). |
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56 | * |
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57 | * Many GPUs don't have a divide instruction (945 and 965 included), |
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58 | * but they do have an RCP instruction to compute an approximate |
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59 | * reciprocal. By breaking the operation down, constant reciprocals |
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60 | * can get constant folded. |
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61 | * |
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62 | * DIV_TO_MUL_RCP only lowers floating point division; INT_DIV_TO_MUL_RCP |
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63 | * handles the integer case, converting to and from floating point so that |
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64 | * RCP is possible. |
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65 | * |
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66 | * EXP_TO_EXP2 and LOG_TO_LOG2: |
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67 | * ---------------------------- |
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68 | * Many GPUs don't have a base e log or exponent instruction, but they |
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69 | * do have base 2 versions, so this pass converts exp and log to exp2 |
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70 | * and log2 operations. |
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71 | * |
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72 | * POW_TO_EXP2: |
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73 | * ----------- |
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74 | * Many older GPUs don't have an x**y instruction. For these GPUs, convert |
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75 | * x**y to 2**(y * log2(x)). |
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76 | * |
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77 | * MOD_TO_FRACT: |
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78 | * ------------- |
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79 | * Breaks an ir_binop_mod expression down to (op1 * fract(op0 / op1)) |
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80 | * |
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81 | * Many GPUs don't have a MOD instruction (945 and 965 included), and |
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82 | * if we have to break it down like this anyway, it gives an |
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83 | * opportunity to do things like constant fold the (1.0 / op1) easily. |
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84 | * |
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85 | * LRP_TO_ARITH: |
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86 | * ------------- |
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87 | * Converts ir_triop_lrp to (op0 * (1.0f - op2)) + (op1 * op2). |
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88 | * |
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89 | * BITFIELD_INSERT_TO_BFM_BFI: |
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90 | * --------------------------- |
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91 | * Breaks ir_quadop_bitfield_insert into ir_binop_bfm (bitfield mask) and |
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92 | * ir_triop_bfi (bitfield insert). |
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93 | * |
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94 | * Many GPUs implement the bitfieldInsert() built-in from ARB_gpu_shader_5 |
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95 | * with a pair of instructions. |
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96 | * |
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97 | */ |
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98 | |||
99 | #include "main/core.h" /* for M_LOG2E */ |
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100 | #include "glsl_types.h" |
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101 | #include "ir.h" |
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102 | #include "ir_builder.h" |
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103 | #include "ir_optimization.h" |
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104 | |||
105 | using namespace ir_builder; |
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106 | |||
107 | class lower_instructions_visitor : public ir_hierarchical_visitor { |
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108 | public: |
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109 | lower_instructions_visitor(unsigned lower) |
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110 | : progress(false), lower(lower) { } |
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111 | |||
112 | ir_visitor_status visit_leave(ir_expression *); |
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113 | |||
114 | bool progress; |
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115 | |||
116 | private: |
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117 | unsigned lower; /** Bitfield of which operations to lower */ |
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118 | |||
119 | void sub_to_add_neg(ir_expression *); |
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120 | void div_to_mul_rcp(ir_expression *); |
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121 | void int_div_to_mul_rcp(ir_expression *); |
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122 | void mod_to_fract(ir_expression *); |
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123 | void exp_to_exp2(ir_expression *); |
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124 | void pow_to_exp2(ir_expression *); |
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125 | void log_to_log2(ir_expression *); |
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126 | void lrp_to_arith(ir_expression *); |
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127 | void bitfield_insert_to_bfm_bfi(ir_expression *); |
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128 | }; |
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129 | |||
130 | /** |
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131 | * Determine if a particular type of lowering should occur |
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132 | */ |
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133 | #define lowering(x) (this->lower & x) |
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134 | |||
135 | bool |
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136 | lower_instructions(exec_list *instructions, unsigned what_to_lower) |
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137 | { |
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138 | lower_instructions_visitor v(what_to_lower); |
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139 | |||
140 | visit_list_elements(&v, instructions); |
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141 | return v.progress; |
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142 | } |
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143 | |||
144 | void |
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145 | lower_instructions_visitor::sub_to_add_neg(ir_expression *ir) |
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146 | { |
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147 | ir->operation = ir_binop_add; |
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148 | ir->operands[1] = new(ir) ir_expression(ir_unop_neg, ir->operands[1]->type, |
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149 | ir->operands[1], NULL); |
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150 | this->progress = true; |
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151 | } |
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152 | |||
153 | void |
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154 | lower_instructions_visitor::div_to_mul_rcp(ir_expression *ir) |
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155 | { |
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156 | assert(ir->operands[1]->type->is_float()); |
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157 | |||
158 | /* New expression for the 1.0 / op1 */ |
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159 | ir_rvalue *expr; |
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160 | expr = new(ir) ir_expression(ir_unop_rcp, |
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161 | ir->operands[1]->type, |
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162 | ir->operands[1]); |
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163 | |||
164 | /* op0 / op1 -> op0 * (1.0 / op1) */ |
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165 | ir->operation = ir_binop_mul; |
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166 | ir->operands[1] = expr; |
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167 | |||
168 | this->progress = true; |
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169 | } |
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170 | |||
171 | void |
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172 | lower_instructions_visitor::int_div_to_mul_rcp(ir_expression *ir) |
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173 | { |
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174 | assert(ir->operands[1]->type->is_integer()); |
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175 | |||
176 | /* Be careful with integer division -- we need to do it as a |
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177 | * float and re-truncate, since rcp(n > 1) of an integer would |
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178 | * just be 0. |
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179 | */ |
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180 | ir_rvalue *op0, *op1; |
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181 | const struct glsl_type *vec_type; |
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182 | |||
183 | vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT, |
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184 | ir->operands[1]->type->vector_elements, |
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185 | ir->operands[1]->type->matrix_columns); |
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186 | |||
187 | if (ir->operands[1]->type->base_type == GLSL_TYPE_INT) |
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188 | op1 = new(ir) ir_expression(ir_unop_i2f, vec_type, ir->operands[1], NULL); |
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189 | else |
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190 | op1 = new(ir) ir_expression(ir_unop_u2f, vec_type, ir->operands[1], NULL); |
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191 | |||
192 | op1 = new(ir) ir_expression(ir_unop_rcp, op1->type, op1, NULL); |
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193 | |||
194 | vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT, |
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195 | ir->operands[0]->type->vector_elements, |
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196 | ir->operands[0]->type->matrix_columns); |
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197 | |||
198 | if (ir->operands[0]->type->base_type == GLSL_TYPE_INT) |
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199 | op0 = new(ir) ir_expression(ir_unop_i2f, vec_type, ir->operands[0], NULL); |
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200 | else |
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201 | op0 = new(ir) ir_expression(ir_unop_u2f, vec_type, ir->operands[0], NULL); |
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202 | |||
203 | vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT, |
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204 | ir->type->vector_elements, |
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205 | ir->type->matrix_columns); |
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206 | |||
207 | op0 = new(ir) ir_expression(ir_binop_mul, vec_type, op0, op1); |
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208 | |||
209 | if (ir->operands[1]->type->base_type == GLSL_TYPE_INT) { |
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210 | ir->operation = ir_unop_f2i; |
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211 | ir->operands[0] = op0; |
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212 | } else { |
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213 | ir->operation = ir_unop_i2u; |
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214 | ir->operands[0] = new(ir) ir_expression(ir_unop_f2i, op0); |
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215 | } |
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216 | ir->operands[1] = NULL; |
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217 | |||
218 | this->progress = true; |
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219 | } |
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220 | |||
221 | void |
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222 | lower_instructions_visitor::exp_to_exp2(ir_expression *ir) |
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223 | { |
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224 | ir_constant *log2_e = new(ir) ir_constant(float(M_LOG2E)); |
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225 | |||
226 | ir->operation = ir_unop_exp2; |
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227 | ir->operands[0] = new(ir) ir_expression(ir_binop_mul, ir->operands[0]->type, |
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228 | ir->operands[0], log2_e); |
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229 | this->progress = true; |
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230 | } |
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231 | |||
232 | void |
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233 | lower_instructions_visitor::pow_to_exp2(ir_expression *ir) |
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234 | { |
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235 | ir_expression *const log2_x = |
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236 | new(ir) ir_expression(ir_unop_log2, ir->operands[0]->type, |
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237 | ir->operands[0]); |
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238 | |||
239 | ir->operation = ir_unop_exp2; |
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240 | ir->operands[0] = new(ir) ir_expression(ir_binop_mul, ir->operands[1]->type, |
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241 | ir->operands[1], log2_x); |
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242 | ir->operands[1] = NULL; |
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243 | this->progress = true; |
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244 | } |
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245 | |||
246 | void |
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247 | lower_instructions_visitor::log_to_log2(ir_expression *ir) |
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248 | { |
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249 | ir->operation = ir_binop_mul; |
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250 | ir->operands[0] = new(ir) ir_expression(ir_unop_log2, ir->operands[0]->type, |
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251 | ir->operands[0], NULL); |
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252 | ir->operands[1] = new(ir) ir_constant(float(1.0 / M_LOG2E)); |
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253 | this->progress = true; |
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254 | } |
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255 | |||
256 | void |
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257 | lower_instructions_visitor::mod_to_fract(ir_expression *ir) |
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258 | { |
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259 | ir_variable *temp = new(ir) ir_variable(ir->operands[1]->type, "mod_b", |
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260 | ir_var_temporary); |
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261 | this->base_ir->insert_before(temp); |
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262 | |||
263 | ir_assignment *const assign = |
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264 | new(ir) ir_assignment(new(ir) ir_dereference_variable(temp), |
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265 | ir->operands[1], NULL); |
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266 | |||
267 | this->base_ir->insert_before(assign); |
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268 | |||
269 | ir_expression *const div_expr = |
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270 | new(ir) ir_expression(ir_binop_div, ir->operands[0]->type, |
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271 | ir->operands[0], |
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272 | new(ir) ir_dereference_variable(temp)); |
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273 | |||
274 | /* Don't generate new IR that would need to be lowered in an additional |
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275 | * pass. |
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276 | */ |
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277 | if (lowering(DIV_TO_MUL_RCP)) |
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278 | div_to_mul_rcp(div_expr); |
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279 | |||
280 | ir_rvalue *expr = new(ir) ir_expression(ir_unop_fract, |
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281 | ir->operands[0]->type, |
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282 | div_expr, |
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283 | NULL); |
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284 | |||
285 | ir->operation = ir_binop_mul; |
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286 | ir->operands[0] = new(ir) ir_dereference_variable(temp); |
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287 | ir->operands[1] = expr; |
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288 | this->progress = true; |
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289 | } |
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290 | |||
291 | void |
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292 | lower_instructions_visitor::lrp_to_arith(ir_expression *ir) |
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293 | { |
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294 | /* (lrp x y a) -> x*(1-a) + y*a */ |
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295 | |||
296 | /* Save op2 */ |
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297 | ir_variable *temp = new(ir) ir_variable(ir->operands[2]->type, "lrp_factor", |
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298 | ir_var_temporary); |
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299 | this->base_ir->insert_before(temp); |
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300 | this->base_ir->insert_before(assign(temp, ir->operands[2])); |
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301 | |||
302 | ir_constant *one = new(ir) ir_constant(1.0f); |
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303 | |||
304 | ir->operation = ir_binop_add; |
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305 | ir->operands[0] = mul(ir->operands[0], sub(one, temp)); |
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306 | ir->operands[1] = mul(ir->operands[1], temp); |
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307 | ir->operands[2] = NULL; |
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308 | |||
309 | this->progress = true; |
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310 | } |
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311 | |||
312 | void |
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313 | lower_instructions_visitor::bitfield_insert_to_bfm_bfi(ir_expression *ir) |
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314 | { |
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315 | /* Translates |
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316 | * ir_quadop_bitfield_insert base insert offset bits |
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317 | * into |
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318 | * ir_triop_bfi (ir_binop_bfm bits offset) insert base |
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319 | */ |
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320 | |||
321 | ir_rvalue *base_expr = ir->operands[0]; |
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322 | |||
323 | ir->operation = ir_triop_bfi; |
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324 | ir->operands[0] = new(ir) ir_expression(ir_binop_bfm, |
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325 | ir->type->get_base_type(), |
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326 | ir->operands[3], |
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327 | ir->operands[2]); |
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328 | /* ir->operands[1] is still the value to insert. */ |
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329 | ir->operands[2] = base_expr; |
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330 | ir->operands[3] = NULL; |
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331 | |||
332 | this->progress = true; |
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333 | } |
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334 | |||
335 | ir_visitor_status |
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336 | lower_instructions_visitor::visit_leave(ir_expression *ir) |
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337 | { |
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338 | switch (ir->operation) { |
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339 | case ir_binop_sub: |
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340 | if (lowering(SUB_TO_ADD_NEG)) |
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341 | sub_to_add_neg(ir); |
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342 | break; |
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343 | |||
344 | case ir_binop_div: |
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345 | if (ir->operands[1]->type->is_integer() && lowering(INT_DIV_TO_MUL_RCP)) |
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346 | int_div_to_mul_rcp(ir); |
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347 | else if (ir->operands[1]->type->is_float() && lowering(DIV_TO_MUL_RCP)) |
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348 | div_to_mul_rcp(ir); |
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349 | break; |
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350 | |||
351 | case ir_unop_exp: |
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352 | if (lowering(EXP_TO_EXP2)) |
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353 | exp_to_exp2(ir); |
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354 | break; |
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355 | |||
356 | case ir_unop_log: |
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357 | if (lowering(LOG_TO_LOG2)) |
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358 | log_to_log2(ir); |
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359 | break; |
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360 | |||
361 | case ir_binop_mod: |
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362 | if (lowering(MOD_TO_FRACT) && ir->type->is_float()) |
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363 | mod_to_fract(ir); |
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364 | break; |
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365 | |||
366 | case ir_binop_pow: |
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367 | if (lowering(POW_TO_EXP2)) |
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368 | pow_to_exp2(ir); |
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369 | break; |
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370 | |||
371 | case ir_triop_lrp: |
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372 | if (lowering(LRP_TO_ARITH)) |
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373 | lrp_to_arith(ir); |
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374 | break; |
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375 | |||
376 | case ir_quadop_bitfield_insert: |
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377 | if (lowering(BITFIELD_INSERT_TO_BFM_BFI)) |
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378 | bitfield_insert_to_bfm_bfi(ir); |
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379 | break; |
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380 | |||
381 | default: |
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382 | return visit_continue; |
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383 | } |
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384 | |||
385 | return visit_continue; |
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386 | } |