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5563 | serge | 1 | /************************************************************************** |
2 | * |
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3 | * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. |
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4 | * All Rights Reserved. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the |
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8 | * "Software"), to deal in the Software without restriction, including |
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9 | * without limitation the rights to use, copy, modify, merge, publish, |
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10 | * distribute, sub license, and/or sell copies of the Software, and to |
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11 | * permit persons to whom the Software is furnished to do so, subject to |
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12 | * the following conditions: |
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13 | * |
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14 | * The above copyright notice and this permission notice (including the |
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15 | * next paragraph) shall be included in all copies or substantial portions |
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16 | * of the Software. |
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17 | * |
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18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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21 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | * |
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26 | **************************************************************************/ |
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27 | |||
28 | #include "util/u_debug.h" |
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29 | #include "util/u_memory.h" |
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30 | #include "tgsi_info.h" |
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31 | |||
32 | #define NONE TGSI_OUTPUT_NONE |
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33 | #define COMP TGSI_OUTPUT_COMPONENTWISE |
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34 | #define REPL TGSI_OUTPUT_REPLICATE |
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35 | #define CHAN TGSI_OUTPUT_CHAN_DEPENDENT |
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36 | #define OTHR TGSI_OUTPUT_OTHER |
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37 | |||
38 | static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = |
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39 | { |
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40 | { 1, 1, 0, 0, 0, 0, COMP, "ARL", TGSI_OPCODE_ARL }, |
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41 | { 1, 1, 0, 0, 0, 0, COMP, "MOV", TGSI_OPCODE_MOV }, |
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42 | { 1, 1, 0, 0, 0, 0, CHAN, "LIT", TGSI_OPCODE_LIT }, |
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43 | { 1, 1, 0, 0, 0, 0, REPL, "RCP", TGSI_OPCODE_RCP }, |
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44 | { 1, 1, 0, 0, 0, 0, REPL, "RSQ", TGSI_OPCODE_RSQ }, |
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45 | { 1, 1, 0, 0, 0, 0, CHAN, "EXP", TGSI_OPCODE_EXP }, |
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46 | { 1, 1, 0, 0, 0, 0, CHAN, "LOG", TGSI_OPCODE_LOG }, |
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47 | { 1, 2, 0, 0, 0, 0, COMP, "MUL", TGSI_OPCODE_MUL }, |
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48 | { 1, 2, 0, 0, 0, 0, COMP, "ADD", TGSI_OPCODE_ADD }, |
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49 | { 1, 2, 0, 0, 0, 0, REPL, "DP3", TGSI_OPCODE_DP3 }, |
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50 | { 1, 2, 0, 0, 0, 0, REPL, "DP4", TGSI_OPCODE_DP4 }, |
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51 | { 1, 2, 0, 0, 0, 0, CHAN, "DST", TGSI_OPCODE_DST }, |
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52 | { 1, 2, 0, 0, 0, 0, COMP, "MIN", TGSI_OPCODE_MIN }, |
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53 | { 1, 2, 0, 0, 0, 0, COMP, "MAX", TGSI_OPCODE_MAX }, |
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54 | { 1, 2, 0, 0, 0, 0, COMP, "SLT", TGSI_OPCODE_SLT }, |
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55 | { 1, 2, 0, 0, 0, 0, COMP, "SGE", TGSI_OPCODE_SGE }, |
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56 | { 1, 3, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD }, |
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57 | { 1, 2, 0, 0, 0, 0, COMP, "SUB", TGSI_OPCODE_SUB }, |
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58 | { 1, 3, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP }, |
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59 | { 1, 3, 0, 0, 0, 0, COMP, "CND", TGSI_OPCODE_CND }, |
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60 | { 1, 1, 0, 0, 0, 0, REPL, "SQRT", TGSI_OPCODE_SQRT }, |
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61 | { 1, 3, 0, 0, 0, 0, REPL, "DP2A", TGSI_OPCODE_DP2A }, |
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62 | { 0, 0, 0, 0, 0, 0, NONE, "", 22 }, /* removed */ |
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63 | { 0, 0, 0, 0, 0, 0, NONE, "", 23 }, /* removed */ |
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64 | { 1, 1, 0, 0, 0, 0, COMP, "FRC", TGSI_OPCODE_FRC }, |
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65 | { 1, 3, 0, 0, 0, 0, COMP, "CLAMP", TGSI_OPCODE_CLAMP }, |
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66 | { 1, 1, 0, 0, 0, 0, COMP, "FLR", TGSI_OPCODE_FLR }, |
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67 | { 1, 1, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND }, |
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68 | { 1, 1, 0, 0, 0, 0, REPL, "EX2", TGSI_OPCODE_EX2 }, |
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69 | { 1, 1, 0, 0, 0, 0, REPL, "LG2", TGSI_OPCODE_LG2 }, |
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70 | { 1, 2, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW }, |
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71 | { 1, 2, 0, 0, 0, 0, COMP, "XPD", TGSI_OPCODE_XPD }, |
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72 | { 0, 0, 0, 0, 0, 0, NONE, "", 32 }, /* removed */ |
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73 | { 1, 1, 0, 0, 0, 0, COMP, "ABS", TGSI_OPCODE_ABS }, |
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74 | { 1, 1, 0, 0, 0, 0, REPL, "RCC", TGSI_OPCODE_RCC }, |
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75 | { 1, 2, 0, 0, 0, 0, REPL, "DPH", TGSI_OPCODE_DPH }, |
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76 | { 1, 1, 0, 0, 0, 0, REPL, "COS", TGSI_OPCODE_COS }, |
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77 | { 1, 1, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX }, |
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78 | { 1, 1, 0, 0, 0, 0, COMP, "DDY", TGSI_OPCODE_DDY }, |
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79 | { 0, 0, 0, 0, 0, 0, NONE, "KILL", TGSI_OPCODE_KILL }, |
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80 | { 1, 1, 0, 0, 0, 0, COMP, "PK2H", TGSI_OPCODE_PK2H }, |
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81 | { 1, 1, 0, 0, 0, 0, COMP, "PK2US", TGSI_OPCODE_PK2US }, |
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82 | { 1, 1, 0, 0, 0, 0, COMP, "PK4B", TGSI_OPCODE_PK4B }, |
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83 | { 1, 1, 0, 0, 0, 0, COMP, "PK4UB", TGSI_OPCODE_PK4UB }, |
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84 | { 1, 2, 0, 0, 0, 0, COMP, "RFL", TGSI_OPCODE_RFL }, |
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85 | { 1, 2, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ }, |
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86 | { 1, 2, 0, 0, 0, 0, REPL, "SFL", TGSI_OPCODE_SFL }, |
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87 | { 1, 2, 0, 0, 0, 0, COMP, "SGT", TGSI_OPCODE_SGT }, |
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88 | { 1, 1, 0, 0, 0, 0, REPL, "SIN", TGSI_OPCODE_SIN }, |
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89 | { 1, 2, 0, 0, 0, 0, COMP, "SLE", TGSI_OPCODE_SLE }, |
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90 | { 1, 2, 0, 0, 0, 0, COMP, "SNE", TGSI_OPCODE_SNE }, |
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91 | { 1, 2, 0, 0, 0, 0, REPL, "STR", TGSI_OPCODE_STR }, |
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92 | { 1, 2, 1, 0, 0, 0, OTHR, "TEX", TGSI_OPCODE_TEX }, |
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93 | { 1, 4, 1, 0, 0, 0, OTHR, "TXD", TGSI_OPCODE_TXD }, |
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94 | { 1, 2, 1, 0, 0, 0, OTHR, "TXP", TGSI_OPCODE_TXP }, |
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95 | { 1, 1, 0, 0, 0, 0, COMP, "UP2H", TGSI_OPCODE_UP2H }, |
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96 | { 1, 1, 0, 0, 0, 0, COMP, "UP2US", TGSI_OPCODE_UP2US }, |
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97 | { 1, 1, 0, 0, 0, 0, COMP, "UP4B", TGSI_OPCODE_UP4B }, |
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98 | { 1, 1, 0, 0, 0, 0, COMP, "UP4UB", TGSI_OPCODE_UP4UB }, |
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99 | { 1, 3, 0, 0, 0, 0, COMP, "X2D", TGSI_OPCODE_X2D }, |
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100 | { 1, 1, 0, 0, 0, 0, COMP, "ARA", TGSI_OPCODE_ARA }, |
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101 | { 1, 1, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR }, |
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102 | { 0, 1, 0, 0, 0, 0, NONE, "BRA", TGSI_OPCODE_BRA }, |
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103 | { 0, 0, 0, 1, 0, 0, NONE, "CAL", TGSI_OPCODE_CAL }, |
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104 | { 0, 0, 0, 0, 0, 0, NONE, "RET", TGSI_OPCODE_RET }, |
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105 | { 1, 1, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG }, |
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106 | { 1, 3, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP }, |
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107 | { 1, 1, 0, 0, 0, 0, CHAN, "SCS", TGSI_OPCODE_SCS }, |
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108 | { 1, 2, 1, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB }, |
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109 | { 1, 1, 0, 0, 0, 0, COMP, "NRM", TGSI_OPCODE_NRM }, |
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110 | { 1, 2, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV }, |
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111 | { 1, 2, 0, 0, 0, 0, REPL, "DP2", TGSI_OPCODE_DP2 }, |
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112 | { 1, 2, 1, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL }, |
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113 | { 0, 0, 0, 0, 0, 0, NONE, "BRK", TGSI_OPCODE_BRK }, |
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114 | { 0, 1, 0, 1, 0, 1, NONE, "IF", TGSI_OPCODE_IF }, |
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115 | { 0, 1, 0, 1, 0, 1, NONE, "UIF", TGSI_OPCODE_UIF }, |
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116 | { 0, 1, 0, 0, 0, 1, NONE, "", 76 }, /* removed */ |
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117 | { 0, 0, 0, 1, 1, 1, NONE, "ELSE", TGSI_OPCODE_ELSE }, |
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118 | { 0, 0, 0, 0, 1, 0, NONE, "ENDIF", TGSI_OPCODE_ENDIF }, |
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119 | { 1, 0, 0, 0, 1, 0, NONE, "", 79 }, /* removed */ |
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120 | { 0, 0, 0, 0, 1, 0, NONE, "", 80 }, /* removed */ |
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121 | { 0, 1, 0, 0, 0, 0, NONE, "PUSHA", TGSI_OPCODE_PUSHA }, |
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122 | { 1, 0, 0, 0, 0, 0, NONE, "POPA", TGSI_OPCODE_POPA }, |
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123 | { 1, 1, 0, 0, 0, 0, COMP, "CEIL", TGSI_OPCODE_CEIL }, |
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124 | { 1, 1, 0, 0, 0, 0, COMP, "I2F", TGSI_OPCODE_I2F }, |
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125 | { 1, 1, 0, 0, 0, 0, COMP, "NOT", TGSI_OPCODE_NOT }, |
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126 | { 1, 1, 0, 0, 0, 0, COMP, "TRUNC", TGSI_OPCODE_TRUNC }, |
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127 | { 1, 2, 0, 0, 0, 0, COMP, "SHL", TGSI_OPCODE_SHL }, |
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128 | { 0, 0, 0, 0, 0, 0, NONE, "", 88 }, /* removed */ |
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129 | { 1, 2, 0, 0, 0, 0, COMP, "AND", TGSI_OPCODE_AND }, |
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130 | { 1, 2, 0, 0, 0, 0, COMP, "OR", TGSI_OPCODE_OR }, |
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131 | { 1, 2, 0, 0, 0, 0, COMP, "MOD", TGSI_OPCODE_MOD }, |
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132 | { 1, 2, 0, 0, 0, 0, COMP, "XOR", TGSI_OPCODE_XOR }, |
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133 | { 1, 3, 0, 0, 0, 0, COMP, "SAD", TGSI_OPCODE_SAD }, |
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134 | { 1, 2, 1, 0, 0, 0, OTHR, "TXF", TGSI_OPCODE_TXF }, |
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135 | { 1, 2, 1, 0, 0, 0, OTHR, "TXQ", TGSI_OPCODE_TXQ }, |
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136 | { 0, 0, 0, 0, 0, 0, NONE, "CONT", TGSI_OPCODE_CONT }, |
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137 | { 0, 0, 0, 0, 0, 0, NONE, "EMIT", TGSI_OPCODE_EMIT }, |
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138 | { 0, 0, 0, 0, 0, 0, NONE, "ENDPRIM", TGSI_OPCODE_ENDPRIM }, |
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139 | { 0, 0, 0, 1, 0, 1, NONE, "BGNLOOP", TGSI_OPCODE_BGNLOOP }, |
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140 | { 0, 0, 0, 0, 0, 1, NONE, "BGNSUB", TGSI_OPCODE_BGNSUB }, |
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141 | { 0, 0, 0, 1, 1, 0, NONE, "ENDLOOP", TGSI_OPCODE_ENDLOOP }, |
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142 | { 0, 0, 0, 0, 1, 0, NONE, "ENDSUB", TGSI_OPCODE_ENDSUB }, |
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143 | { 1, 1, 1, 0, 0, 0, OTHR, "TXQ_LZ", TGSI_OPCODE_TXQ_LZ }, |
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144 | { 0, 0, 0, 0, 0, 0, NONE, "", 104 }, /* removed */ |
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145 | { 0, 0, 0, 0, 0, 0, NONE, "", 105 }, /* removed */ |
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146 | { 0, 0, 0, 0, 0, 0, NONE, "", 106 }, /* removed */ |
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147 | { 0, 0, 0, 0, 0, 0, NONE, "NOP", TGSI_OPCODE_NOP }, |
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148 | { 0, 0, 0, 0, 0, 0, NONE, "", 108 }, /* removed */ |
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149 | { 0, 0, 0, 0, 0, 0, NONE, "", 109 }, /* removed */ |
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150 | { 0, 0, 0, 0, 0, 0, NONE, "", 110 }, /* removed */ |
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151 | { 0, 0, 0, 0, 0, 0, NONE, "", 111 }, /* removed */ |
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152 | { 1, 1, 0, 0, 0, 0, REPL, "NRM4", TGSI_OPCODE_NRM4 }, |
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153 | { 0, 1, 0, 0, 0, 0, NONE, "CALLNZ", TGSI_OPCODE_CALLNZ }, |
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154 | { 0, 1, 0, 0, 0, 0, NONE, "", 114 }, /* removed */ |
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155 | { 0, 1, 0, 0, 0, 0, NONE, "BREAKC", TGSI_OPCODE_BREAKC }, |
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156 | { 0, 1, 0, 0, 0, 0, NONE, "KILL_IF", TGSI_OPCODE_KILL_IF }, |
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157 | { 0, 0, 0, 0, 0, 0, NONE, "END", TGSI_OPCODE_END }, |
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158 | { 0, 0, 0, 0, 0, 0, NONE, "", 118 }, /* removed */ |
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159 | { 1, 1, 0, 0, 0, 0, COMP, "F2I", TGSI_OPCODE_F2I }, |
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160 | { 1, 2, 0, 0, 0, 0, COMP, "IDIV", TGSI_OPCODE_IDIV }, |
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161 | { 1, 2, 0, 0, 0, 0, COMP, "IMAX", TGSI_OPCODE_IMAX }, |
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162 | { 1, 2, 0, 0, 0, 0, COMP, "IMIN", TGSI_OPCODE_IMIN }, |
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163 | { 1, 1, 0, 0, 0, 0, COMP, "INEG", TGSI_OPCODE_INEG }, |
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164 | { 1, 2, 0, 0, 0, 0, COMP, "ISGE", TGSI_OPCODE_ISGE }, |
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165 | { 1, 2, 0, 0, 0, 0, COMP, "ISHR", TGSI_OPCODE_ISHR }, |
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166 | { 1, 2, 0, 0, 0, 0, COMP, "ISLT", TGSI_OPCODE_ISLT }, |
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167 | { 1, 1, 0, 0, 0, 0, COMP, "F2U", TGSI_OPCODE_F2U }, |
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168 | { 1, 1, 0, 0, 0, 0, COMP, "U2F", TGSI_OPCODE_U2F }, |
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169 | { 1, 2, 0, 0, 0, 0, COMP, "UADD", TGSI_OPCODE_UADD }, |
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170 | { 1, 2, 0, 0, 0, 0, COMP, "UDIV", TGSI_OPCODE_UDIV }, |
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171 | { 1, 3, 0, 0, 0, 0, COMP, "UMAD", TGSI_OPCODE_UMAD }, |
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172 | { 1, 2, 0, 0, 0, 0, COMP, "UMAX", TGSI_OPCODE_UMAX }, |
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173 | { 1, 2, 0, 0, 0, 0, COMP, "UMIN", TGSI_OPCODE_UMIN }, |
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174 | { 1, 2, 0, 0, 0, 0, COMP, "UMOD", TGSI_OPCODE_UMOD }, |
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175 | { 1, 2, 0, 0, 0, 0, COMP, "UMUL", TGSI_OPCODE_UMUL }, |
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176 | { 1, 2, 0, 0, 0, 0, COMP, "USEQ", TGSI_OPCODE_USEQ }, |
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177 | { 1, 2, 0, 0, 0, 0, COMP, "USGE", TGSI_OPCODE_USGE }, |
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178 | { 1, 2, 0, 0, 0, 0, COMP, "USHR", TGSI_OPCODE_USHR }, |
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179 | { 1, 2, 0, 0, 0, 0, COMP, "USLT", TGSI_OPCODE_USLT }, |
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180 | { 1, 2, 0, 0, 0, 0, COMP, "USNE", TGSI_OPCODE_USNE }, |
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181 | { 0, 1, 0, 0, 0, 0, NONE, "SWITCH", TGSI_OPCODE_SWITCH }, |
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182 | { 0, 1, 0, 0, 0, 0, NONE, "CASE", TGSI_OPCODE_CASE }, |
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183 | { 0, 0, 0, 0, 0, 0, NONE, "DEFAULT", TGSI_OPCODE_DEFAULT }, |
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184 | { 0, 0, 0, 0, 0, 0, NONE, "ENDSWITCH", TGSI_OPCODE_ENDSWITCH }, |
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185 | |||
186 | { 1, 3, 0, 0, 0, 0, OTHR, "SAMPLE", TGSI_OPCODE_SAMPLE }, |
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187 | { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_I", TGSI_OPCODE_SAMPLE_I }, |
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188 | { 1, 3, 0, 0, 0, 0, OTHR, "SAMPLE_I_MS", TGSI_OPCODE_SAMPLE_I_MS }, |
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189 | { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_B", TGSI_OPCODE_SAMPLE_B }, |
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190 | { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_C", TGSI_OPCODE_SAMPLE_C }, |
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191 | { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_C_LZ", TGSI_OPCODE_SAMPLE_C_LZ }, |
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192 | { 1, 5, 0, 0, 0, 0, OTHR, "SAMPLE_D", TGSI_OPCODE_SAMPLE_D }, |
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193 | { 1, 4, 0, 0, 0, 0, OTHR, "SAMPLE_L", TGSI_OPCODE_SAMPLE_L }, |
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194 | { 1, 3, 0, 0, 0, 0, OTHR, "GATHER4", TGSI_OPCODE_GATHER4 }, |
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195 | { 1, 2, 0, 0, 0, 0, OTHR, "SVIEWINFO", TGSI_OPCODE_SVIEWINFO }, |
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196 | { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_POS", TGSI_OPCODE_SAMPLE_POS }, |
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197 | { 1, 2, 0, 0, 0, 0, OTHR, "SAMPLE_INFO", TGSI_OPCODE_SAMPLE_INFO }, |
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198 | { 1, 1, 0, 0, 0, 0, COMP, "UARL", TGSI_OPCODE_UARL }, |
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199 | { 1, 3, 0, 0, 0, 0, COMP, "UCMP", TGSI_OPCODE_UCMP }, |
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200 | { 1, 1, 0, 0, 0, 0, COMP, "IABS", TGSI_OPCODE_IABS }, |
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201 | { 1, 1, 0, 0, 0, 0, COMP, "ISSG", TGSI_OPCODE_ISSG }, |
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202 | { 1, 2, 0, 0, 0, 0, OTHR, "LOAD", TGSI_OPCODE_LOAD }, |
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203 | { 1, 2, 0, 0, 0, 0, OTHR, "STORE", TGSI_OPCODE_STORE }, |
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204 | { 1, 0, 0, 0, 0, 0, OTHR, "MFENCE", TGSI_OPCODE_MFENCE }, |
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205 | { 1, 0, 0, 0, 0, 0, OTHR, "LFENCE", TGSI_OPCODE_LFENCE }, |
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206 | { 1, 0, 0, 0, 0, 0, OTHR, "SFENCE", TGSI_OPCODE_SFENCE }, |
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207 | { 0, 0, 0, 0, 0, 0, OTHR, "BARRIER", TGSI_OPCODE_BARRIER }, |
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208 | |||
209 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMUADD", TGSI_OPCODE_ATOMUADD }, |
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210 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMXCHG", TGSI_OPCODE_ATOMXCHG }, |
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211 | { 1, 4, 0, 0, 0, 0, OTHR, "ATOMCAS", TGSI_OPCODE_ATOMCAS }, |
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212 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMAND", TGSI_OPCODE_ATOMAND }, |
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213 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMOR", TGSI_OPCODE_ATOMOR }, |
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214 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMXOR", TGSI_OPCODE_ATOMXOR }, |
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215 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMUMIN", TGSI_OPCODE_ATOMUMIN }, |
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216 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMUMAX", TGSI_OPCODE_ATOMUMAX }, |
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217 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMIMIN", TGSI_OPCODE_ATOMIMIN }, |
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218 | { 1, 3, 0, 0, 0, 0, OTHR, "ATOMIMAX", TGSI_OPCODE_ATOMIMAX }, |
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219 | { 1, 3, 1, 0, 0, 0, OTHR, "TEX2", TGSI_OPCODE_TEX2 }, |
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220 | { 1, 3, 1, 0, 0, 0, OTHR, "TXB2", TGSI_OPCODE_TXB2 }, |
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221 | { 1, 3, 1, 0, 0, 0, OTHR, "TXL2", TGSI_OPCODE_TXL2 }, |
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222 | }; |
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223 | |||
224 | const struct tgsi_opcode_info * |
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225 | tgsi_get_opcode_info( uint opcode ) |
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226 | { |
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227 | static boolean firsttime = 1; |
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228 | |||
229 | if (firsttime) { |
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230 | unsigned i; |
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231 | firsttime = 0; |
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232 | for (i = 0; i < Elements(opcode_info); i++) |
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233 | assert(opcode_info[i].opcode == i); |
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234 | } |
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235 | |||
236 | if (opcode < TGSI_OPCODE_LAST) |
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237 | return &opcode_info[opcode]; |
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238 | |||
239 | assert( 0 ); |
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240 | return NULL; |
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241 | } |
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242 | |||
243 | |||
244 | const char * |
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245 | tgsi_get_opcode_name( uint opcode ) |
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246 | { |
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247 | const struct tgsi_opcode_info *info = tgsi_get_opcode_info(opcode); |
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248 | return info->mnemonic; |
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249 | } |
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250 | |||
251 | |||
252 | const char * |
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253 | tgsi_get_processor_name( uint processor ) |
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254 | { |
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255 | switch (processor) { |
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256 | case TGSI_PROCESSOR_VERTEX: |
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257 | return "vertex shader"; |
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258 | case TGSI_PROCESSOR_FRAGMENT: |
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259 | return "fragment shader"; |
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260 | case TGSI_PROCESSOR_GEOMETRY: |
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261 | return "geometry shader"; |
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262 | default: |
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263 | return "unknown shader type!"; |
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264 | } |
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265 | } |
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266 | |||
267 | /** |
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268 | * Infer the type (of the dst) of the opcode. |
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269 | * |
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270 | * MOV and UCMP is special so return VOID |
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271 | */ |
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272 | static INLINE enum tgsi_opcode_type |
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273 | tgsi_opcode_infer_type( uint opcode ) |
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274 | { |
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275 | switch (opcode) { |
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276 | case TGSI_OPCODE_MOV: |
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277 | case TGSI_OPCODE_UCMP: |
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278 | return TGSI_TYPE_UNTYPED; |
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279 | case TGSI_OPCODE_NOT: |
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280 | case TGSI_OPCODE_SHL: |
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281 | case TGSI_OPCODE_AND: |
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282 | case TGSI_OPCODE_OR: |
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283 | case TGSI_OPCODE_XOR: |
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284 | case TGSI_OPCODE_SAD: /* XXX some src args may be signed for SAD ? */ |
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285 | case TGSI_OPCODE_TXQ: |
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286 | case TGSI_OPCODE_TXQ_LZ: |
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287 | case TGSI_OPCODE_F2U: |
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288 | case TGSI_OPCODE_UDIV: |
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289 | case TGSI_OPCODE_UMAD: |
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290 | case TGSI_OPCODE_UMAX: |
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291 | case TGSI_OPCODE_UMIN: |
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292 | case TGSI_OPCODE_UMOD: |
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293 | case TGSI_OPCODE_UMUL: |
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294 | case TGSI_OPCODE_USEQ: |
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295 | case TGSI_OPCODE_USGE: |
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296 | case TGSI_OPCODE_USHR: |
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297 | case TGSI_OPCODE_USLT: |
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298 | case TGSI_OPCODE_USNE: |
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299 | case TGSI_OPCODE_SVIEWINFO: |
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300 | return TGSI_TYPE_UNSIGNED; |
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301 | case TGSI_OPCODE_ARL: |
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302 | case TGSI_OPCODE_ARR: |
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303 | case TGSI_OPCODE_MOD: |
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304 | case TGSI_OPCODE_F2I: |
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305 | case TGSI_OPCODE_IDIV: |
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306 | case TGSI_OPCODE_IMAX: |
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307 | case TGSI_OPCODE_IMIN: |
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308 | case TGSI_OPCODE_INEG: |
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309 | case TGSI_OPCODE_ISGE: |
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310 | case TGSI_OPCODE_ISHR: |
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311 | case TGSI_OPCODE_ISLT: |
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312 | case TGSI_OPCODE_UADD: |
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313 | case TGSI_OPCODE_UARL: |
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314 | case TGSI_OPCODE_IABS: |
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315 | case TGSI_OPCODE_ISSG: |
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316 | return TGSI_TYPE_SIGNED; |
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317 | default: |
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318 | return TGSI_TYPE_FLOAT; |
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319 | } |
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320 | } |
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321 | |||
322 | /* |
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323 | * infer the source type of a TGSI opcode. |
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324 | */ |
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325 | enum tgsi_opcode_type |
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326 | tgsi_opcode_infer_src_type( uint opcode ) |
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327 | { |
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328 | switch (opcode) { |
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329 | case TGSI_OPCODE_UIF: |
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330 | case TGSI_OPCODE_TXF: |
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331 | case TGSI_OPCODE_BREAKC: |
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332 | case TGSI_OPCODE_U2F: |
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333 | case TGSI_OPCODE_UADD: |
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334 | case TGSI_OPCODE_SWITCH: |
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335 | case TGSI_OPCODE_CASE: |
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336 | case TGSI_OPCODE_SAMPLE_I: |
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337 | case TGSI_OPCODE_SAMPLE_I_MS: |
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338 | return TGSI_TYPE_UNSIGNED; |
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339 | case TGSI_OPCODE_I2F: |
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340 | return TGSI_TYPE_SIGNED; |
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341 | case TGSI_OPCODE_ARL: |
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342 | case TGSI_OPCODE_ARR: |
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343 | case TGSI_OPCODE_TXQ_LZ: |
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344 | case TGSI_OPCODE_F2I: |
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345 | case TGSI_OPCODE_F2U: |
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346 | case TGSI_OPCODE_UCMP: |
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347 | return TGSI_TYPE_FLOAT; |
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348 | default: |
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349 | return tgsi_opcode_infer_type(opcode); |
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350 | } |
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351 | } |
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352 | |||
353 | /* |
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354 | * infer the destination type of a TGSI opcode. |
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355 | */ |
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356 | enum tgsi_opcode_type |
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357 | tgsi_opcode_infer_dst_type( uint opcode ) |
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358 | { |
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359 | return tgsi_opcode_infer_type(opcode); |
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360 | }>> |