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5564 | serge | 1 | /* |
2 | Copyright (C) Intel Corp. 2006. All Rights Reserved. |
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3 | Intel funded Tungsten Graphics to |
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4 | develop this 3D driver. |
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5 | |||
6 | Permission is hereby granted, free of charge, to any person obtaining |
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7 | a copy of this software and associated documentation files (the |
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8 | "Software"), to deal in the Software without restriction, including |
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9 | without limitation the rights to use, copy, modify, merge, publish, |
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10 | distribute, sublicense, and/or sell copies of the Software, and to |
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11 | permit persons to whom the Software is furnished to do so, subject to |
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12 | the following conditions: |
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13 | |||
14 | The above copyright notice and this permission notice (including the |
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15 | next paragraph) shall be included in all copies or substantial |
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16 | portions of the Software. |
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17 | |||
18 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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19 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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21 | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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22 | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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23 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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24 | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | |||
26 | **********************************************************************/ |
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27 | /* |
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28 | * Authors: |
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29 | * Keith Whitwell |
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30 | */ |
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31 | |||
32 | |||
33 | |||
34 | #include "brw_context.h" |
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35 | #include "brw_state.h" |
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36 | #include "brw_defines.h" |
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37 | |||
38 | static void |
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39 | brw_upload_gs_unit(struct brw_context *brw) |
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40 | { |
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41 | struct brw_gs_unit_state *gs; |
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42 | |||
43 | gs = brw_state_batch(brw, AUB_TRACE_GS_STATE, |
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44 | sizeof(*gs), 32, &brw->ff_gs.state_offset); |
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45 | |||
46 | memset(gs, 0, sizeof(*gs)); |
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47 | |||
48 | /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_GS_PROG_DATA */ |
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49 | if (brw->ff_gs.prog_active) { |
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50 | gs->thread0.grf_reg_count = (ALIGN(brw->ff_gs.prog_data->total_grf, 16) / |
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51 | 16 - 1); |
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52 | |||
53 | gs->thread0.kernel_start_pointer = |
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54 | brw_program_reloc(brw, |
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55 | brw->ff_gs.state_offset + |
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56 | offsetof(struct brw_gs_unit_state, thread0), |
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57 | brw->ff_gs.prog_offset + |
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58 | (gs->thread0.grf_reg_count << 1)) >> 6; |
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59 | |||
60 | gs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; |
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61 | gs->thread1.single_program_flow = 1; |
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62 | |||
63 | gs->thread3.dispatch_grf_start_reg = 1; |
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64 | gs->thread3.const_urb_entry_read_offset = 0; |
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65 | gs->thread3.const_urb_entry_read_length = 0; |
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66 | gs->thread3.urb_entry_read_offset = 0; |
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67 | gs->thread3.urb_entry_read_length = |
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68 | brw->ff_gs.prog_data->urb_read_length; |
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69 | |||
70 | /* BRW_NEW_URB_FENCE */ |
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71 | gs->thread4.nr_urb_entries = brw->urb.nr_gs_entries; |
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72 | gs->thread4.urb_entry_allocation_size = brw->urb.vsize - 1; |
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73 | |||
74 | if (brw->urb.nr_gs_entries >= 8) |
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75 | gs->thread4.max_threads = 1; |
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76 | else |
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77 | gs->thread4.max_threads = 0; |
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78 | } |
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79 | |||
80 | if (brw->gen == 5) |
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81 | gs->thread4.rendering_enable = 1; |
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82 | |||
83 | if (unlikely(INTEL_DEBUG & DEBUG_STATS)) |
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84 | gs->thread4.stats_enable = 1; |
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85 | |||
86 | gs->gs6.max_vp_index = brw->ctx.Const.MaxViewports - 1; |
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87 | |||
88 | brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; |
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89 | } |
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90 | |||
91 | const struct brw_tracked_state brw_gs_unit = { |
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92 | .dirty = { |
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93 | .mesa = 0, |
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94 | .brw = BRW_NEW_BATCH | |
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95 | BRW_NEW_CURBE_OFFSETS | |
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96 | BRW_NEW_FF_GS_PROG_DATA | |
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97 | BRW_NEW_PROGRAM_CACHE | |
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98 | BRW_NEW_URB_FENCE, |
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99 | }, |
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100 | .emit = brw_upload_gs_unit, |
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101 | };><> |