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5564 | serge | 1 | /********************************************************** |
2 | * Copyright 2008-2009 VMware, Inc. All rights reserved. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person |
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5 | * obtaining a copy of this software and associated documentation |
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6 | * files (the "Software"), to deal in the Software without |
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7 | * restriction, including without limitation the rights to use, copy, |
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8 | * modify, merge, publish, distribute, sublicense, and/or sell copies |
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9 | * of the Software, and to permit persons to whom the Software is |
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10 | * furnished to do so, subject to the following conditions: |
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11 | * |
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12 | * The above copyright notice and this permission notice shall be |
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13 | * included in all copies or substantial portions of the Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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18 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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19 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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20 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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21 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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22 | * SOFTWARE. |
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23 | * |
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24 | **********************************************************/ |
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25 | |||
26 | |||
27 | #include "pipe/p_shader_tokens.h" |
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28 | #include "tgsi/tgsi_parse.h" |
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29 | #include "util/u_memory.h" |
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30 | |||
31 | #include "svga_tgsi_emit.h" |
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32 | |||
33 | |||
34 | /** |
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35 | * Translate TGSI semantic info into SVGA3d semantic info. |
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36 | * This is called for VS outputs and PS inputs only. |
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37 | */ |
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38 | static boolean |
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39 | translate_vs_ps_semantic(struct svga_shader_emitter *emit, |
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40 | struct tgsi_declaration_semantic semantic, |
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41 | unsigned *usage, |
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42 | unsigned *idx) |
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43 | { |
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44 | switch (semantic.Name) { |
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45 | case TGSI_SEMANTIC_POSITION: |
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46 | *idx = semantic.Index; |
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47 | *usage = SVGA3D_DECLUSAGE_POSITION; |
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48 | break; |
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49 | case TGSI_SEMANTIC_COLOR: |
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50 | *idx = semantic.Index; |
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51 | *usage = SVGA3D_DECLUSAGE_COLOR; |
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52 | break; |
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53 | case TGSI_SEMANTIC_BCOLOR: |
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54 | *idx = semantic.Index + 2; /* sharing with COLOR */ |
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55 | *usage = SVGA3D_DECLUSAGE_COLOR; |
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56 | break; |
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57 | case TGSI_SEMANTIC_FOG: |
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58 | *idx = 0; |
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59 | assert(semantic.Index == 0); |
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60 | *usage = SVGA3D_DECLUSAGE_TEXCOORD; |
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61 | break; |
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62 | case TGSI_SEMANTIC_PSIZE: |
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63 | *idx = semantic.Index; |
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64 | *usage = SVGA3D_DECLUSAGE_PSIZE; |
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65 | break; |
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66 | case TGSI_SEMANTIC_GENERIC: |
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67 | *idx = svga_remap_generic_index(emit->key.generic_remap_table, |
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68 | semantic.Index); |
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69 | *usage = SVGA3D_DECLUSAGE_TEXCOORD; |
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70 | break; |
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71 | case TGSI_SEMANTIC_NORMAL: |
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72 | *idx = semantic.Index; |
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73 | *usage = SVGA3D_DECLUSAGE_NORMAL; |
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74 | break; |
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75 | case TGSI_SEMANTIC_CLIPDIST: |
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76 | case TGSI_SEMANTIC_CLIPVERTEX: |
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77 | /* XXX at this time we don't support clip distance or clip vertices */ |
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78 | debug_warn_once("unsupported clip distance/vertex attribute\n"); |
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79 | *usage = SVGA3D_DECLUSAGE_TEXCOORD; |
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80 | *idx = 0; |
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81 | return TRUE; |
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82 | default: |
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83 | assert(0); |
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84 | *usage = SVGA3D_DECLUSAGE_TEXCOORD; |
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85 | *idx = 0; |
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86 | return FALSE; |
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87 | } |
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88 | |||
89 | return TRUE; |
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90 | } |
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91 | |||
92 | |||
93 | /** |
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94 | * Emit a PS input (or VS depth/fog output) register declaration. |
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95 | * For example, if usage = SVGA3D_DECLUSAGE_TEXCOORD, reg.num = 1, and |
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96 | * index = 3, we'll emit "dcl_texcoord3 v1". |
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97 | */ |
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98 | static boolean |
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99 | emit_decl(struct svga_shader_emitter *emit, |
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100 | SVGA3dShaderDestToken reg, |
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101 | unsigned usage, |
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102 | unsigned index) |
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103 | { |
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104 | SVGA3DOpDclArgs dcl; |
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105 | SVGA3dShaderInstToken opcode; |
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106 | |||
107 | /* check values against bitfield sizes */ |
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108 | assert(index < 16); |
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109 | assert(usage <= SVGA3D_DECLUSAGE_MAX); |
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110 | |||
111 | opcode = inst_token( SVGA3DOP_DCL ); |
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112 | dcl.values[0] = 0; |
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113 | dcl.values[1] = 0; |
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114 | |||
115 | dcl.dst = reg; |
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116 | dcl.usage = usage; |
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117 | dcl.index = index; |
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118 | dcl.values[0] |= 1<<31; |
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119 | |||
120 | return (emit_instruction(emit, opcode) && |
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121 | svga_shader_emit_dwords( emit, dcl.values, Elements(dcl.values))); |
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122 | } |
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123 | |||
124 | |||
125 | /** |
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126 | * Emit declaration for PS front/back-face input register. |
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127 | */ |
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128 | static boolean |
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129 | emit_vface_decl(struct svga_shader_emitter *emit) |
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130 | { |
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131 | if (!emit->emitted_vface) { |
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132 | SVGA3dShaderDestToken reg = |
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133 | dst_register(SVGA3DREG_MISCTYPE, SVGA3DMISCREG_FACE); |
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134 | |||
135 | if (!emit_decl( emit, reg, 0, 0 )) |
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136 | return FALSE; |
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137 | |||
138 | emit->emitted_vface = TRUE; |
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139 | } |
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140 | return TRUE; |
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141 | } |
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142 | |||
143 | |||
144 | /** |
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145 | * Emit PS input register to pass depth/fog coordinates. |
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146 | * Note that this always goes into texcoord[0]. |
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147 | */ |
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148 | static boolean |
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149 | ps30_input_emit_depth_fog( struct svga_shader_emitter *emit, |
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150 | struct src_register *out ) |
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151 | { |
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152 | struct src_register reg; |
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153 | |||
154 | if (emit->emitted_depth_fog) { |
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155 | *out = emit->ps_depth_fog; |
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156 | return TRUE; |
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157 | } |
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158 | |||
159 | if (emit->ps30_input_count >= SVGA3D_INPUTREG_MAX) |
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160 | return FALSE; |
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161 | |||
162 | reg = src_register( SVGA3DREG_INPUT, |
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163 | emit->ps30_input_count++ ); |
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164 | |||
165 | *out = emit->ps_depth_fog = reg; |
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166 | |||
167 | emit->emitted_depth_fog = TRUE; |
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168 | |||
169 | return emit_decl( emit, dst( reg ), SVGA3D_DECLUSAGE_TEXCOORD, 0 ); |
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170 | } |
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171 | |||
172 | |||
173 | /** |
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174 | * Process a PS input declaration. |
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175 | * We'll emit a declaration like "dcl_texcoord1 v2" |
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176 | */ |
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177 | static boolean |
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178 | ps30_input(struct svga_shader_emitter *emit, |
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179 | struct tgsi_declaration_semantic semantic, |
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180 | unsigned idx) |
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181 | { |
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182 | unsigned usage, index; |
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183 | SVGA3dShaderDestToken reg; |
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184 | |||
185 | if (semantic.Name == TGSI_SEMANTIC_POSITION) { |
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186 | |||
187 | emit->ps_true_pos = src_register( SVGA3DREG_MISCTYPE, |
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188 | SVGA3DMISCREG_POSITION ); |
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189 | emit->ps_true_pos.base.swizzle = TRANSLATE_SWIZZLE( TGSI_SWIZZLE_X, |
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190 | TGSI_SWIZZLE_Y, |
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191 | TGSI_SWIZZLE_Y, |
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192 | TGSI_SWIZZLE_Y ); |
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193 | reg = writemask( dst(emit->ps_true_pos), |
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194 | TGSI_WRITEMASK_XY ); |
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195 | emit->ps_reads_pos = TRUE; |
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196 | |||
197 | if (emit->info.reads_z) { |
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198 | emit->ps_temp_pos = dst_register( SVGA3DREG_TEMP, |
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199 | emit->nr_hw_temp ); |
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200 | |||
201 | emit->input_map[idx] = src_register( SVGA3DREG_TEMP, |
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202 | emit->nr_hw_temp ); |
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203 | emit->nr_hw_temp++; |
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204 | |||
205 | if (!ps30_input_emit_depth_fog( emit, &emit->ps_depth_pos )) |
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206 | return FALSE; |
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207 | |||
208 | emit->ps_depth_pos.base.swizzle = TRANSLATE_SWIZZLE( TGSI_SWIZZLE_Z, |
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209 | TGSI_SWIZZLE_Z, |
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210 | TGSI_SWIZZLE_Z, |
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211 | TGSI_SWIZZLE_W ); |
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212 | } |
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213 | else { |
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214 | emit->input_map[idx] = emit->ps_true_pos; |
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215 | } |
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216 | |||
217 | return emit_decl( emit, reg, 0, 0 ); |
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218 | } |
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219 | else if (emit->key.fkey.light_twoside && |
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220 | (semantic.Name == TGSI_SEMANTIC_COLOR)) { |
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221 | |||
222 | if (!translate_vs_ps_semantic( emit, semantic, &usage, &index )) |
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223 | return FALSE; |
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224 | |||
225 | emit->internal_color_idx[emit->internal_color_count] = idx; |
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226 | emit->input_map[idx] = src_register( SVGA3DREG_INPUT, emit->ps30_input_count ); |
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227 | emit->ps30_input_count++; |
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228 | emit->internal_color_count++; |
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229 | |||
230 | reg = dst( emit->input_map[idx] ); |
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231 | |||
232 | if (!emit_decl( emit, reg, usage, index )) |
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233 | return FALSE; |
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234 | |||
235 | semantic.Name = TGSI_SEMANTIC_BCOLOR; |
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236 | if (!translate_vs_ps_semantic( emit, semantic, &usage, &index )) |
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237 | return FALSE; |
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238 | |||
239 | if (emit->ps30_input_count >= SVGA3D_INPUTREG_MAX) |
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240 | return FALSE; |
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241 | |||
242 | reg = dst_register( SVGA3DREG_INPUT, emit->ps30_input_count++ ); |
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243 | |||
244 | if (!emit_decl( emit, reg, usage, index )) |
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245 | return FALSE; |
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246 | |||
247 | if (!emit_vface_decl( emit )) |
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248 | return FALSE; |
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249 | |||
250 | return TRUE; |
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251 | } |
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252 | else if (semantic.Name == TGSI_SEMANTIC_FACE) { |
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253 | if (!emit_vface_decl( emit )) |
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254 | return FALSE; |
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255 | emit->emit_frontface = TRUE; |
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256 | emit->internal_frontface_idx = idx; |
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257 | return TRUE; |
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258 | } |
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259 | else if (semantic.Name == TGSI_SEMANTIC_FOG) { |
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260 | |||
261 | assert(semantic.Index == 0); |
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262 | |||
263 | if (!ps30_input_emit_depth_fog( emit, &emit->input_map[idx] )) |
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264 | return FALSE; |
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265 | |||
266 | emit->input_map[idx].base.swizzle = TRANSLATE_SWIZZLE( TGSI_SWIZZLE_X, |
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267 | TGSI_SWIZZLE_X, |
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268 | TGSI_SWIZZLE_X, |
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269 | TGSI_SWIZZLE_X ); |
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270 | |||
271 | return TRUE; |
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272 | } |
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273 | else { |
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274 | |||
275 | if (!translate_vs_ps_semantic( emit, semantic, &usage, &index )) |
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276 | return FALSE; |
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277 | |||
278 | if (emit->ps30_input_count >= SVGA3D_INPUTREG_MAX) |
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279 | return FALSE; |
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280 | |||
281 | emit->input_map[idx] = src_register( SVGA3DREG_INPUT, emit->ps30_input_count++ ); |
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282 | reg = dst( emit->input_map[idx] ); |
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283 | |||
284 | if (!emit_decl( emit, reg, usage, index )) |
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285 | return FALSE; |
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286 | |||
287 | if (semantic.Name == TGSI_SEMANTIC_GENERIC && |
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288 | emit->key.fkey.sprite_origin_lower_left && |
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289 | index >= 1 && |
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290 | emit->key.fkey.tex[index - 1].sprite_texgen) { |
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291 | /* This is a sprite texture coord with lower-left origin. |
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292 | * We need to invert the texture T coordinate since the SVGA3D |
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293 | * device only supports an upper-left origin. |
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294 | */ |
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295 | unsigned unit = index - 1; |
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296 | |||
297 | emit->inverted_texcoords |= (1 << unit); |
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298 | |||
299 | /* save original texcoord reg */ |
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300 | emit->ps_true_texcoord[unit] = emit->input_map[idx]; |
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301 | |||
302 | /* this temp register will be the results of the MAD instruction */ |
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303 | emit->ps_inverted_texcoord[unit] = |
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304 | src_register(SVGA3DREG_TEMP, emit->nr_hw_temp); |
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305 | emit->nr_hw_temp++; |
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306 | |||
307 | emit->ps_inverted_texcoord_input[unit] = idx; |
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308 | |||
309 | /* replace input_map entry with the temp register */ |
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310 | emit->input_map[idx] = emit->ps_inverted_texcoord[unit]; |
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311 | } |
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312 | |||
313 | return TRUE; |
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314 | } |
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315 | |||
316 | } |
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317 | |||
318 | |||
319 | /** |
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320 | * Process a PS output declaration. |
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321 | * Note that we don't actually emit a SVGA3DOpDcl for PS outputs. |
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322 | * \idx register index, such as OUT[2] (not semantic index) |
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323 | */ |
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324 | static boolean |
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325 | ps30_output(struct svga_shader_emitter *emit, |
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326 | struct tgsi_declaration_semantic semantic, |
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327 | unsigned idx) |
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328 | { |
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329 | switch (semantic.Name) { |
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330 | case TGSI_SEMANTIC_COLOR: |
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331 | if (emit->unit == PIPE_SHADER_FRAGMENT) { |
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332 | if (emit->key.fkey.white_fragments) { |
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333 | /* Used for XOR logicop mode */ |
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334 | emit->output_map[idx] = dst_register( SVGA3DREG_TEMP, |
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335 | emit->nr_hw_temp++ ); |
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336 | emit->temp_color_output[idx] = emit->output_map[idx]; |
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337 | emit->true_color_output[idx] = dst_register(SVGA3DREG_COLOROUT, |
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338 | semantic.Index); |
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339 | } |
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340 | else if (emit->key.fkey.write_color0_to_n_cbufs) { |
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341 | /* We'll write color output [0] to all render targets. |
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342 | * Prepare all the output registers here, but only when the |
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343 | * semantic.Index == 0 so we don't do this more than once. |
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344 | */ |
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345 | if (semantic.Index == 0) { |
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346 | unsigned i; |
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347 | for (i = 0; i < emit->key.fkey.write_color0_to_n_cbufs; i++) { |
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348 | emit->output_map[idx+i] = dst_register(SVGA3DREG_TEMP, |
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349 | emit->nr_hw_temp++); |
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350 | emit->temp_color_output[i] = emit->output_map[idx+i]; |
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351 | emit->true_color_output[i] = dst_register(SVGA3DREG_COLOROUT, |
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352 | i); |
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353 | } |
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354 | } |
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355 | } |
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356 | else { |
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357 | emit->output_map[idx] = |
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358 | dst_register(SVGA3DREG_COLOROUT, semantic.Index); |
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359 | } |
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360 | } |
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361 | else { |
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362 | emit->output_map[idx] = dst_register( SVGA3DREG_COLOROUT, |
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363 | semantic.Index ); |
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364 | } |
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365 | break; |
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366 | case TGSI_SEMANTIC_POSITION: |
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367 | emit->output_map[idx] = dst_register( SVGA3DREG_TEMP, |
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368 | emit->nr_hw_temp++ ); |
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369 | emit->temp_pos = emit->output_map[idx]; |
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370 | emit->true_pos = dst_register( SVGA3DREG_DEPTHOUT, |
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371 | semantic.Index ); |
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372 | break; |
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373 | default: |
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374 | assert(0); |
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375 | /* A wild stab in the dark. */ |
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376 | emit->output_map[idx] = dst_register( SVGA3DREG_COLOROUT, 0 ); |
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377 | break; |
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378 | } |
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379 | |||
380 | return TRUE; |
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381 | } |
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382 | |||
383 | |||
384 | /** |
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385 | * Declare a VS input register. |
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386 | * We still make up the input semantics the same as in 2.0 |
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387 | */ |
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388 | static boolean |
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389 | vs30_input(struct svga_shader_emitter *emit, |
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390 | struct tgsi_declaration_semantic semantic, |
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391 | unsigned idx) |
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392 | { |
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393 | SVGA3DOpDclArgs dcl; |
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394 | SVGA3dShaderInstToken opcode; |
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395 | unsigned usage, index; |
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396 | |||
397 | opcode = inst_token( SVGA3DOP_DCL ); |
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398 | dcl.values[0] = 0; |
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399 | dcl.values[1] = 0; |
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400 | |||
401 | emit->input_map[idx] = src_register( SVGA3DREG_INPUT, idx ); |
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402 | dcl.dst = dst_register( SVGA3DREG_INPUT, idx ); |
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403 | |||
404 | assert(dcl.dst.reserved0); |
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405 | |||
406 | svga_generate_vdecl_semantics( idx, &usage, &index ); |
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407 | |||
408 | dcl.usage = usage; |
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409 | dcl.index = index; |
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410 | dcl.values[0] |= 1<<31; |
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411 | |||
412 | return (emit_instruction(emit, opcode) && |
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413 | svga_shader_emit_dwords( emit, dcl.values, Elements(dcl.values))); |
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414 | } |
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415 | |||
416 | |||
417 | /** |
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418 | * Declare VS output for holding depth/fog. |
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419 | */ |
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420 | static boolean |
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421 | vs30_output_emit_depth_fog(struct svga_shader_emitter *emit, |
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422 | SVGA3dShaderDestToken *out) |
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423 | { |
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424 | SVGA3dShaderDestToken reg; |
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425 | |||
426 | if (emit->emitted_depth_fog) { |
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427 | *out = emit->vs_depth_fog; |
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428 | return TRUE; |
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429 | } |
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430 | |||
431 | reg = dst_register( SVGA3DREG_OUTPUT, emit->vs30_output_count++ ); |
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432 | |||
433 | *out = emit->vs_depth_fog = reg; |
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434 | |||
435 | emit->emitted_depth_fog = TRUE; |
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436 | |||
437 | return emit_decl( emit, reg, SVGA3D_DECLUSAGE_TEXCOORD, 0 ); |
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438 | } |
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439 | |||
440 | |||
441 | /** |
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442 | * Declare a VS output. |
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443 | * VS3.0 outputs have proper declarations and semantic info for |
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444 | * matching against PS inputs. |
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445 | */ |
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446 | static boolean |
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447 | vs30_output(struct svga_shader_emitter *emit, |
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448 | struct tgsi_declaration_semantic semantic, |
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449 | unsigned idx) |
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450 | { |
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451 | SVGA3DOpDclArgs dcl; |
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452 | SVGA3dShaderInstToken opcode; |
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453 | unsigned usage, index; |
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454 | |||
455 | opcode = inst_token( SVGA3DOP_DCL ); |
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456 | dcl.values[0] = 0; |
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457 | dcl.values[1] = 0; |
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458 | |||
459 | if (!translate_vs_ps_semantic( emit, semantic, &usage, &index )) |
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460 | return FALSE; |
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461 | |||
462 | if (emit->vs30_output_count >= SVGA3D_OUTPUTREG_MAX) |
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463 | return FALSE; |
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464 | |||
465 | dcl.dst = dst_register( SVGA3DREG_OUTPUT, emit->vs30_output_count++ ); |
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466 | dcl.usage = usage; |
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467 | dcl.index = index; |
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468 | dcl.values[0] |= 1<<31; |
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469 | |||
470 | if (semantic.Name == TGSI_SEMANTIC_POSITION) { |
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471 | assert(idx == 0); |
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472 | emit->output_map[idx] = dst_register( SVGA3DREG_TEMP, |
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473 | emit->nr_hw_temp++ ); |
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474 | emit->temp_pos = emit->output_map[idx]; |
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475 | emit->true_pos = dcl.dst; |
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476 | |||
477 | /* Grab an extra output for the depth output */ |
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478 | if (!vs30_output_emit_depth_fog( emit, &emit->depth_pos )) |
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479 | return FALSE; |
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480 | |||
481 | } |
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482 | else if (semantic.Name == TGSI_SEMANTIC_PSIZE) { |
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483 | emit->output_map[idx] = dst_register( SVGA3DREG_TEMP, |
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484 | emit->nr_hw_temp++ ); |
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485 | emit->temp_psiz = emit->output_map[idx]; |
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486 | |||
487 | /* This has the effect of not declaring psiz (below) and not |
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488 | * emitting the final MOV to true_psiz in the postamble. |
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489 | */ |
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490 | if (!emit->key.vkey.allow_psiz) |
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491 | return TRUE; |
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492 | |||
493 | emit->true_psiz = dcl.dst; |
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494 | } |
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495 | else if (semantic.Name == TGSI_SEMANTIC_FOG) { |
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496 | /* |
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497 | * Fog is shared with depth. |
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498 | * So we need to decrement out_count since emit_depth_fog will increment it. |
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499 | */ |
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500 | emit->vs30_output_count--; |
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501 | |||
502 | if (!vs30_output_emit_depth_fog( emit, &emit->output_map[idx] )) |
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503 | return FALSE; |
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504 | |||
505 | return TRUE; |
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506 | } |
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507 | else { |
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508 | emit->output_map[idx] = dcl.dst; |
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509 | } |
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510 | |||
511 | return (emit_instruction(emit, opcode) && |
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512 | svga_shader_emit_dwords( emit, dcl.values, Elements(dcl.values))); |
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513 | } |
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514 | |||
515 | |||
516 | /** Translate PIPE_TEXTURE_x to SVGA3DSAMP_x */ |
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517 | static ubyte |
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518 | svga_tgsi_sampler_type(const struct svga_shader_emitter *emit, int idx) |
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519 | { |
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520 | switch (emit->key.fkey.tex[idx].texture_target) { |
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521 | case PIPE_TEXTURE_1D: |
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522 | return SVGA3DSAMP_2D; |
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523 | case PIPE_TEXTURE_2D: |
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524 | case PIPE_TEXTURE_RECT: |
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525 | return SVGA3DSAMP_2D; |
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526 | case PIPE_TEXTURE_3D: |
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527 | return SVGA3DSAMP_VOLUME; |
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528 | case PIPE_TEXTURE_CUBE: |
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529 | return SVGA3DSAMP_CUBE; |
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530 | } |
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531 | |||
532 | return SVGA3DSAMP_UNKNOWN; |
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533 | } |
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534 | |||
535 | |||
536 | static boolean |
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537 | ps30_sampler( struct svga_shader_emitter *emit, |
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538 | struct tgsi_declaration_semantic semantic, |
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539 | unsigned idx ) |
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540 | { |
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541 | SVGA3DOpDclArgs dcl; |
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542 | SVGA3dShaderInstToken opcode; |
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543 | |||
544 | opcode = inst_token( SVGA3DOP_DCL ); |
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545 | dcl.values[0] = 0; |
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546 | dcl.values[1] = 0; |
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547 | |||
548 | dcl.dst = dst_register( SVGA3DREG_SAMPLER, idx ); |
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549 | dcl.type = svga_tgsi_sampler_type( emit, idx ); |
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550 | dcl.values[0] |= 1<<31; |
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551 | |||
552 | return (emit_instruction(emit, opcode) && |
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553 | svga_shader_emit_dwords( emit, dcl.values, Elements(dcl.values))); |
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554 | } |
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555 | |||
556 | |||
557 | boolean |
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558 | svga_translate_decl_sm30( struct svga_shader_emitter *emit, |
||
559 | const struct tgsi_full_declaration *decl ) |
||
560 | { |
||
561 | unsigned first = decl->Range.First; |
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562 | unsigned last = decl->Range.Last; |
||
563 | unsigned idx; |
||
564 | |||
565 | for( idx = first; idx <= last; idx++ ) { |
||
566 | boolean ok; |
||
567 | |||
568 | switch (decl->Declaration.File) { |
||
569 | case TGSI_FILE_SAMPLER: |
||
570 | assert (emit->unit == PIPE_SHADER_FRAGMENT); |
||
571 | ok = ps30_sampler( emit, decl->Semantic, idx ); |
||
572 | break; |
||
573 | |||
574 | case TGSI_FILE_INPUT: |
||
575 | if (emit->unit == PIPE_SHADER_VERTEX) |
||
576 | ok = vs30_input( emit, decl->Semantic, idx ); |
||
577 | else |
||
578 | ok = ps30_input( emit, decl->Semantic, idx ); |
||
579 | break; |
||
580 | |||
581 | case TGSI_FILE_OUTPUT: |
||
582 | if (emit->unit == PIPE_SHADER_VERTEX) |
||
583 | ok = vs30_output( emit, decl->Semantic, idx ); |
||
584 | else |
||
585 | ok = ps30_output( emit, decl->Semantic, idx ); |
||
586 | break; |
||
587 | |||
588 | default: |
||
589 | /* don't need to declare other vars */ |
||
590 | ok = TRUE; |
||
591 | } |
||
592 | |||
593 | if (!ok) |
||
594 | return FALSE; |
||
595 | } |
||
596 | |||
597 | return TRUE; |
||
598 | }=>31; |