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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 9683 | turbocat | 1 | /**************************** opcodes.cpp ******************************* |
| 2 | * Author: Agner Fog |
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| 3 | * Date created: 2007-02-21 |
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| 4 | * Last modified: 2018-10-08 |
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| 5 | * Project: objconv |
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| 6 | * Module: opcodes.cpp |
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| 7 | * Description: |
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| 8 | * Definition of opcode maps used by disassembler |
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| 9 | * |
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| 10 | * Copyright 2007-2018 GNU General Public License http://www.gnu.org/licenses |
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| 11 | *****************************************************************************/ |
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| 12 | |||
| 13 | |||
| 14 | /*************************** Define opcode maps ****************************** |
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| 15 | |||
| 16 | Each line in the tables defines an instruction. |
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| 17 | Name is the name of the instruction, possibly without suffix for operand size etc. |
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| 18 | Instset defines which instruction set is required. |
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| 19 | Prefix defines which prefixes are allowed or required and what they do. |
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| 20 | Format defines which scheme the instruction code is modeled after. |
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| 21 | Dest is the type of the destination operand. |
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| 22 | Source1-3 defines the types of up to 3 source operands. |
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| 23 | Link indicates branching into a subpage. |
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| 24 | Options is used for various types of additional information. |
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| 25 | |||
| 26 | These code tables are organized as a big branching tree. |
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| 27 | A line can branch into a subpage if more than one instruction or variant |
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| 28 | begins with the same code bytes. Each subpage can branch further to form |
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| 29 | a tree structure many levels deep. The first page, OpcodeMap0, is indexed |
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| 30 | by the first code byte after any prefixes. The subpages can be indexed by |
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| 31 | several different criteria, such as subsequent bytes, various bit-fields, |
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| 32 | or by the values of any prefixes that come before the code byte. The |
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| 33 | branching criteria are indicated in the 'link' column, while the submap |
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| 34 | number is indicated in the 'instset' field. |
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| 35 | |||
| 36 | The interpretation of an instruction may start at the root, OpcodeMap0, |
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| 37 | and follow any branches until the final leaf is found. |
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| 38 | Instructions with VEX, EVEX or MVEX prefix use the VEX.mm bits as |
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| 39 | shortcuts to the subpages OpcodeMap1, OpcodeMap2 and OpcodeMap4. |
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| 40 | |||
| 41 | The values in the tables do not use names for the constants because each |
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| 42 | value would need the combination of several names so that the lines would |
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| 43 | be extremely long and very difficult to align in a readable way. The meaning |
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| 44 | of the values in each field in the map entries is defined in disasm.h. |
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| 45 | |||
| 46 | OpcodeTables[] is an array of pointers to all the maps. |
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| 47 | |||
| 48 | OpcodeTableLength[] indicates the size of each map. |
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| 49 | |||
| 50 | If a map is incomplete, then the last entry should indicate a default for |
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| 51 | the missing entries, i.e. how to display the illegal or unknown instruction |
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| 52 | codes. |
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| 53 | |||
| 54 | New entries can be added whenever a new extension to the instruction set is |
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| 55 | introduced. |
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| 56 | |||
| 57 | *****************************************************************************/ |
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| 58 | |||
| 59 | #include "stdafx.h" |
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| 60 | |||
| 61 | // Primary opcode map. This is the root of the opcode lookup tree |
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| 62 | SOpcodeDef OpcodeMap0[256] = { |
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| 63 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 64 | {"add", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 00 |
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| 65 | {"add", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 01 |
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| 66 | {"add", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 02 |
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| 67 | {"add", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 03 |
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| 68 | {"add", 0 , 0 , 0x41 , 0xA1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 04 |
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| 69 | {"add", 0 , 0x1100 , 0x81 , 0xA9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 05 |
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| 70 | {"push es", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 06 |
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| 71 | {"pop es", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 07 |
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| 72 | {"or", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 08 |
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| 73 | {"or", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 09 |
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| 74 | {"or", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0A |
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| 75 | {"or", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0B |
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| 76 | {"or", 0 , 0 , 0x41 , 0xA1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0C |
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| 77 | {"or", 0 , 0x1100 , 0x81 , 0xA9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 0D |
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| 78 | {"push cs", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0E |
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| 79 | {0, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F link to OpcodeMap1 |
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| 80 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 81 | {"adc", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 10 |
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| 82 | {"adc", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 11 |
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| 83 | {"adc", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 12 |
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| 84 | {"adc", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 13 |
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| 85 | {"adc", 0 , 0 , 0x41 , 0xA1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 14 |
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| 86 | {"adc", 0 , 0x1100 , 0x81 , 0xA9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 15 |
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| 87 | {"push ss", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 16 |
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| 88 | {"pop ss", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 17 |
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| 89 | {"sbb", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 18 |
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| 90 | {"sbb", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 19 |
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| 91 | {"sbb", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1A |
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| 92 | {"sbb", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1B |
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| 93 | {"sbb", 0 , 0 , 0x41 , 0xA1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1C |
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| 94 | {"sbb", 0 , 0x1100 , 0x81 , 0xA9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 1D |
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| 95 | {"push ds", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1E |
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| 96 | {"pop ds", 0x8000, 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1F |
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| 97 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 98 | {"and", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 20 |
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| 99 | {"and", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 21 |
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| 100 | {"and", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 22 |
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| 101 | {"and", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 23 |
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| 102 | {"and", 0 , 0 , 0x41 , 0xA1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 24 |
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| 103 | {"and", 0 , 0x1100 , 0x81 , 0xA9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 25 |
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| 104 | {"es:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 26 |
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| 105 | {"daa", 0x8000, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 27 |
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| 106 | {"sub", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 28 |
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| 107 | {"sub", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 29 |
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| 108 | {"sub", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 2A |
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| 109 | {"sub", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 2B |
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| 110 | {"sub", 0 , 0 , 0x41 , 0xA1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 2C |
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| 111 | {"sub", 0 , 0x1100 , 0x81 , 0xA9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 2D |
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| 112 | {"cs:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 2E |
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| 113 | {"das", 0x8000, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 2F |
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| 114 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 115 | {"xor", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 30 |
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| 116 | {"xor", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 31 |
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| 117 | {"xor", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 32 |
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| 118 | {"xor", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 33 |
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| 119 | {"xor", 0 , 0 , 0x41 , 0xA1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 34 |
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| 120 | {"xor", 0 , 0x1100 , 0x81 , 0xA9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 35 |
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| 121 | {"ss:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 36 |
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| 122 | {"aaa", 0x8000, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 37 |
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| 123 | {"cmp", 0 , 0 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0x4 }, // 38 |
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| 124 | {"cmp", 0 , 0x1100 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0x4 }, // 39 |
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| 125 | {"cmp", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 3A |
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| 126 | {"cmp", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 3B |
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| 127 | {"cmp", 0 , 0 , 0x41 , 0xA1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 3C |
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| 128 | {"cmp", 0 , 0x1100 , 0x81 , 0xA9 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0x84 }, // 3D |
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| 129 | {"ds:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 3E |
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| 130 | {"aas", 0x8000, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 3F |
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| 131 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 132 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 40 |
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| 133 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 41 |
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| 134 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 42 |
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| 135 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 43 |
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| 136 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 44 |
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| 137 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 45 |
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| 138 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 46 |
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| 139 | {"inc", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 47 |
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| 140 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 48 |
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| 141 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 49 |
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| 142 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4A |
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| 143 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4B |
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| 144 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4C |
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| 145 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4D |
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| 146 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4E |
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| 147 | {"dec", 0x8000, 0x100 , 0x3 , 0x1008, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 4F |
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| 148 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 149 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 50 |
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| 150 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 51 |
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| 151 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 52 |
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| 152 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 53 |
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| 153 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 54 |
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| 154 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 55 |
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| 155 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 56 |
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| 156 | {"push", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // 57 |
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| 157 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 58 |
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| 158 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 59 |
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| 159 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5A |
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| 160 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5B |
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| 161 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5C |
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| 162 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5D |
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| 163 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5E |
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| 164 | {"pop", 0 , 0x2102 , 0x3 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 5F |
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| 165 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 166 | {"pusha", 0x8001, 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 }, // 60 |
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| 167 | {"popa", 0x8001, 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 }, // 61 |
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| 168 | {"bound", 0x8001, 0x106 , 0x12 , 0x1008, 0x2009, 0 , 0 , 0 , 0 , 0 , 0 }, // 62 |
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| 169 | {0, 0x3B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x7 , 0 }, // 63 Link to arpl/movsxd |
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| 170 | {"fs:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 64 |
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| 171 | {"gs:", 0 , 0 , 0x8001, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 65 |
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| 172 | {"operand size:",0x0, 0 , 0x8000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
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| 173 | {"address size:",0x0, 0 , 0x8000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 67 |
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| 174 | {"push", 0 , 0x2102 , 0x82 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 68 push imm word |
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| 175 | {"imul", 0x1 , 0x1100 , 0x92 , 0x1009, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0x80 }, // 69 imul r,m,iv |
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| 176 | {"push", 0 , 0x2102 , 0x42 , 0 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 6A push imm byte |
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| 177 | {"imul", 0x1 , 0x1100 , 0x52 , 0x1009, 0x9 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // 6B imul r,m,ib |
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| 178 | {"insb", 0 , 0x21 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 6C insb |
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| 179 | {"ins", 0 , 0x121 , 0x1 , 0x20C2, 0xB2 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 6D insw |
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| 180 | {"outsb", 0 , 0x21 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 6E outsb |
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| 181 | {"outs", 0 , 0x121 , 0x1 , 0xB2 , 0x20C2, 0 , 0 , 0 , 0 , 0 , 0x8 }, // 6F outs |
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| 182 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 183 | {"jo", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 70 conditional short jumps |
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| 184 | {"jno", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 71 |
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| 185 | {"jc", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 72 |
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| 186 | {"jnc", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 73 |
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| 187 | {"jz", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 74 |
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| 188 | {"jnz", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 75 |
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| 189 | {"jbe", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 76 |
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| 190 | {"ja", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 77 |
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| 191 | {"js", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 78 |
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| 192 | {"jns", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 79 |
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| 193 | {"jpe", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7A |
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| 194 | {"jpo", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7B |
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| 195 | {"jl", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7C |
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| 196 | {"jge", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7D |
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| 197 | {"jle", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7E |
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| 198 | {"jg", 0 , 0x88 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 7F |
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| 199 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 200 | {"grp1", 0x1A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 80 link to immediate grp 1 |
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| 201 | {"grp1", 0x1B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 81 link to immediate grp 1 |
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| 202 | {"grp1", 0x1C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 82 link to immediate grp 1 |
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| 203 | {"grp1", 0x1D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 83 link to immediate grp 1 |
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| 204 | {"test", 0 , 0 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0x4 }, // 84 |
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| 205 | {"test", 0 , 0x1100 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0x4 }, // 85 |
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| 206 | {"xchg", 0 , 0xC50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0x48 }, // 86 |
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| 207 | {"xchg", 0 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0x48 }, // 87 |
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| 208 | {"mov", 0 , 0xC40 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0x40 }, // 88 |
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| 209 | {"mov", 0 , 0x1D40 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0x40 }, // 89 |
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| 210 | {"mov", 0 , 0 , 0x12 , 0x1001, 0x1 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // 8A |
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| 211 | {"mov", 0 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // 8B |
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| 212 | {"mov", 0 , 0x1100 , 0x13 , 0x9 , 0x91 , 0 , 0 , 0 , 0 , 0 , 0 }, // 8C mov r16,segreg |
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| 213 | {"lea", 0 , 0x1101 , 0x12 , 0x1009, 0x2009, 0 , 0 , 0 , 0 , 0 , 0xC0 }, // 8D |
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| 214 | {"mov", 0 , 0x1100 , 0x12 , 0x91 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 8E mov segreg,r16 |
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| 215 | {"pop", 0x28 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 8F Link to group 1A |
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| 216 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
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| 217 | {"nop", 0x3C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 90 NOP/Pause. Link to map |
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| 218 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 91 xchg cx,ax |
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| 219 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 92 xchg dx,ax |
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| 220 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 93 xchg bx,ax |
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| 221 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 94 xchg sp,ax |
||
| 222 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 95 xchg bp,ax |
||
| 223 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 96 xchg si,ax |
||
| 224 | {"xchg", 0 , 0x1100 , 0x3 , 0x1009, 0xA9 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 97 xchg di,ax |
||
| 225 | {"cbw", 0x39 , 0x1100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 98 Link to map |
||
| 226 | {"cwd", 0x3A , 0x1100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 99 Link to map |
||
| 227 | {"call", 0x8000, 0x182 , 0x200 , 0x85 , 0 , 0 , 0 , 0 , 0 , 0 , 0x28 }, // 9A call far |
||
| 228 | {"fwait", 0x100 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 9B |
||
| 229 | {"pushf", 0x3E , 0x2100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 9C Link to map: pushf/d/q |
||
| 230 | {"popf", 0x3F , 0x2100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 9D Link to map: popf/d/q |
||
| 231 | {"sahf", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 9E |
||
| 232 | {"lahf", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 9F |
||
| 233 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 234 | {"mov", 0 , 0x5 , 0x401 , 0x10A1, 0x2001, 0 , 0 , 0 , 0 , 0 , 0 }, // A0 mov al,mem |
||
| 235 | {"mov", 0 , 0x1105 , 0x401 , 0x10A9, 0x2009, 0 , 0 , 0 , 0 , 0 , 0 }, // A1 mov ax,mem |
||
| 236 | {"mov", 0 , 0x5 , 0x401 , 0x2001, 0x10A1, 0 , 0 , 0 , 0 , 0 , 0 }, // A2 mov mem,al |
||
| 237 | {"mov", 0 , 0x1105 , 0x401 , 0x2009, 0x10A9, 0 , 0 , 0 , 0 , 0 , 0 }, // A3 mov mem,ax |
||
| 238 | {"movs", 0 , 0x25 , 0x1 , 0x20C2, 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // A4 movsb |
||
| 239 | {"movs", 0 , 0x1125 , 0x1 , 0x20C2, 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // A5 movsw |
||
| 240 | {"cmps", 0 , 0x45 , 0x1 , 0x20C2, 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // A6 cmpsb |
||
| 241 | {"cmps", 0 , 0x1145 , 0x1 , 0x20C2, 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // A7 cmpsw |
||
| 242 | {"test", 0 , 0 , 0x41 , 0x10A1, 0x31 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // A8 test al,ib |
||
| 243 | {"test", 0 , 0x1100 , 0x81 , 0x10A9, 0x39 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // A9 test ax,iw |
||
| 244 | {"stos", 0 , 0x21 , 0x1 , 0x20C2, 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // AA stosb |
||
| 245 | {"stos", 0 , 0x1121 , 0x1 , 0x20C2, 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // AB stosw |
||
| 246 | {"lods", 0 , 0x25 , 0x1 , 0 , 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // AC lodsb |
||
| 247 | {"lods", 0 , 0x1125 , 0x1 , 0 , 0x20C1, 0 , 0 , 0 , 0 , 0 , 0x8 }, // AD lodsw |
||
| 248 | {"scas", 0 , 0x41 , 0x1 , 0x20C2, 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // AE scasb |
||
| 249 | {"scas", 0 , 0x1141 , 0x1 , 0x20C2, 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // AF scasw |
||
| 250 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 251 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B0 mov al,ib |
||
| 252 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B1 mov cl,ib |
||
| 253 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B2 mov dl,ib |
||
| 254 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B3 mov bl,ib |
||
| 255 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B4 mov ah,ib |
||
| 256 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B5 mov ch,ib |
||
| 257 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B6 mov dh,ib |
||
| 258 | {"mov", 0 , 0 , 0x43 , 0x1001, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // B7 mov bh,ib |
||
| 259 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // B8 mov ax,iw |
||
| 260 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // B9 mov cx,iw |
||
| 261 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BA mov dx,iw |
||
| 262 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BB mov bx,iw |
||
| 263 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BC mov sp,iw |
||
| 264 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BD mov bp,iw |
||
| 265 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BE mov si,iw |
||
| 266 | {"mov", 0 , 0x1100 , 0x103 , 0x1009, 0x19 , 0 , 0 , 0 , 0 , 0 , 0x400 }, // BF mov di,iw |
||
| 267 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 268 | {"grp2", 0x1E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // C0 link to grp 2 |
||
| 269 | {"grp2", 0x1F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // C1 link to grp 2 |
||
| 270 | {"ret", 0 , 0x21AA , 0x22 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0x30 }, // C2 retn iw |
||
| 271 | {"ret", 0 , 0x21AA , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x30 }, // C3 retn |
||
| 272 | {"les", 0x8000, 0x100 , 0x812 , 0x1009, 0x200C, 0 , 0 , 0 , 0 , 0 , 0 }, // C4 les |
||
| 273 | {"lds", 0x8000, 0x100 , 0x812 , 0x1009, 0x200C, 0 , 0 , 0 , 0 , 0 , 0 }, // C5 lds |
||
| 274 | {"mov", 0x2F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // C6 link to grp 11 |
||
| 275 | {"mov", 0x30 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // C7 link to grp 11 |
||
| 276 | {"enter", 0 , 0 , 0x62 , 0 , 0x12 , 0x11 , 0 , 0 , 0 , 0 , 0x8 }, // C8 |
||
| 277 | {"leave", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // C9 |
||
| 278 | {"retf", 0 , 0x2182 , 0x22 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // CA retf iw |
||
| 279 | {"retf", 0 , 0x2182 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // CB retf |
||
| 280 | {"int 3;breakpoint or filler",0,0,2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x48 }, // CC |
||
| 281 | {"int", 0 , 0 , 0x42 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // CD |
||
| 282 | {"into", 0x8000, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // CE |
||
| 283 | {0, 0x19 , 0x1100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // CF link to IRET |
||
| 284 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 285 | {"grp2", 0x20 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // D0 link to grp 2 |
||
| 286 | {"grp2", 0x21 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // D1 link to grp 2 |
||
| 287 | {"grp2", 0x22 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // D2 link to grp 2 |
||
| 288 | {"grp2", 0x23 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // D3 link to grp 2 |
||
| 289 | {"aam", 0x8000, 0 , 0x42 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // D4. Don't show immediate operand if = 10 ! |
||
| 290 | {"aad", 0x8000, 0 , 0x42 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // D5. Don't show immediate operand if = 10 ! |
||
| 291 | {"salc", 0x8000, 0 , 0x4002, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // D6 salc (undocumented opcode) |
||
| 292 | {"xlat", 0x92 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 , 0 }, // D7. Link to xlat |
||
| 293 | {"x87 instr", 0x8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // D8 link to FP grp |
||
| 294 | {"x87 instr", 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // D9 link to FP grp |
||
| 295 | {"x87 instr", 0xA , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DA link to FP grp |
||
| 296 | {"x87 instr", 0xB , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DB link to FP grp |
||
| 297 | {"x87 instr", 0xC , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DC link to FP grp |
||
| 298 | {"x87 instr", 0xD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DD link to FP grp |
||
| 299 | {"x87 instr", 0xE , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DE link to FP grp |
||
| 300 | {"x87 instr", 0xF , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // DF link to FP grp |
||
| 301 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 302 | {"loopne", 0 , 0x80 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // E0 |
||
| 303 | {"loope", 0 , 0x80 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // E1 |
||
| 304 | {"loop", 0 , 0x80 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // E2 |
||
| 305 | {"j(e/r)cxz", 0x3D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA , 0 }, // E3 link to map |
||
| 306 | {"in", 0x800 , 0 , 0x41 , 0xA1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // E4 in al,ib |
||
| 307 | {"in", 0x800 , 0x100 , 0x41 , 0xA8 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // E5 in ax,ib |
||
| 308 | {"out", 0x800 , 0 , 0x41 , 0x32 , 0xA1 , 0 , 0 , 0 , 0 , 0 , 0 }, // E6 out ib,al |
||
| 309 | {"out", 0x800 , 0x100 , 0x41 , 0x32 , 0xA8 , 0 , 0 , 0 , 0 , 0 , 0 }, // E7 out ib,ax |
||
| 310 | {"call", 0 , 0xAA , 0x82 , 0x83 , 0 , 0 , 0 , 0 , 0 , 0 , 0x28 }, // E8 call near |
||
| 311 | {"jmp", 0 , 0xA8 , 0x82 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xB0 }, // E9 jmp near |
||
| 312 | {"jmp", 0x8000, 0x80 , 0x202 , 0x84 , 0 , 0 , 0 , 0 , 0 , 0 , 0x30 }, // EA jmp far |
||
| 313 | {"jmp", 0 , 0xA8 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0x30 }, // EB jmp short |
||
| 314 | {"in", 0x800 , 0 , 0x1 , 0xA1 , 0xB2 , 0 , 0 , 0 , 0 , 0 , 0 }, // EC in al,dx |
||
| 315 | {"in", 0x800 , 0x100 , 0x1 , 0xA8 , 0xB2 , 0 , 0 , 0 , 0 , 0 , 0 }, // ED in ax,dx |
||
| 316 | {"out", 0x800 , 0 , 0x1 , 0xB2 , 0xA1 , 0 , 0 , 0 , 0 , 0 , 0 }, // EE out dx,al |
||
| 317 | {"out", 0x800 , 0x100 , 0x1 , 0xB2 , 0xA8 , 0 , 0 , 0 , 0 , 0 , 0 }, // EF out dx,ax |
||
| 318 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 319 | {"lock:", 0 , 0 , 0x8000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F0 lock prefix |
||
| 320 | {"icebp", 0x8000, 0 , 0x4002, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F1 ICE breakpoint, undocumented opcode |
||
| 321 | {"repne:", 0 , 0 , 0x8000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 repne prefix |
||
| 322 | {"repe:", 0 , 0 , 0x8000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F3 repe prefix |
||
| 323 | {"hlt", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x48 }, // F4 |
||
| 324 | {"cmc", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F5 |
||
| 325 | {"grp3", 0x24 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // F6 link to grp 3 |
||
| 326 | {"grp3", 0x25 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // F7 link to grp 3 |
||
| 327 | {"clc", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F8 |
||
| 328 | {"stc", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F9 |
||
| 329 | {"cli", 0x800 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // FA |
||
| 330 | {"sti", 0x800 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // FB |
||
| 331 | {"cld", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // FC |
||
| 332 | {"std", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // FD |
||
| 333 | {"grp4", 0x26 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // FE link to grp 4 |
||
| 334 | {"grp5", 0x27 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 } // FF link to grp 5 |
||
| 335 | }; |
||
| 336 | |||
| 337 | // Secondary opcode map for 2-byte opcode. First byte = 0F |
||
| 338 | // Indexed by second opcode byte |
||
| 339 | SOpcodeDef OpcodeMap1[256] = { |
||
| 340 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 341 | {"grp6", 0x2A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 00 link to grp 6; sldt etc. |
||
| 342 | {"grp7", 0x2B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // 0F 01 link to grp 7; sgdt etc. |
||
| 343 | {0, 0x5E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 02 link to lar |
||
| 344 | {0, 0x5F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 03 link to lsl |
||
| 345 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 04 Illegal |
||
| 346 | {"syscall", 0x5 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 05 |
||
| 347 | {"clts", 0x805 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 06 |
||
| 348 | {"sysret", 0x805 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // 0F 07 |
||
| 349 | {"invd", 0x804 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 08 |
||
| 350 | {"wbinvd", 0x804 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 09 |
||
| 351 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0A Illegal |
||
| 352 | {"ud2", 0x3 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // 0F 0B |
||
| 353 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0C Illegal |
||
| 354 | {0, 0xD1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 0D Link to prefetch |
||
| 355 | {"FEMS", 0x1001, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F OE. AMD only |
||
| 356 | {0, 0x6 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // 0F 0F. Link to tertiary map for AMD 3DNow instructions |
||
| 357 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 358 | {0, 0x40 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 10 Link to tertiary map: movups, etc. |
||
| 359 | {0, 0x41 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 11 Link to tertiary map: movups, etc. |
||
| 360 | {0, 0x42 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 12 Link to tertiary map: movlps, etc. |
||
| 361 | {"movl", 0x11 ,0x812200, 0x13 , 0x234F, 0x144F, 0 , 0 , 0x1000, 0 , 0 , 0x3 }, // 0F 13 movlps/pd |
||
| 362 | {"unpckl", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x31 , 0 , 0 , 0x3 }, // 0F 14 unpcklps/pd |
||
| 363 | {"unpckh", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x31 , 0 , 0 , 0x3 }, // 0F 15 unpckhps/pd |
||
| 364 | {0, 0x44 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 16 Link to tertiary map: movhps, etc. |
||
| 365 | {"movh", 0x11 ,0x812200, 0x13 , 0x234F, 0x144F, 0 , 0 , 0x1000, 0 , 0 , 0x3 }, // 0F 17 movhps/pd |
||
| 366 | {0, 0x35 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 18 Link to tertiary map: group 16 |
||
| 367 | {"hint", 0x6 , 0 , 0x2012, 0 , 0x6 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 19. Hint instructions reserved for future use |
||
| 368 | {0, 0x110 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 1A. Link to BNDMK etc |
||
| 369 | {0, 0x111 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 1B. Link to BNDCL etc |
||
| 370 | {"hint", 0x6 , 0 , 0x2012, 0 , 0x6 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 1C. Hint instructions reserved for future use |
||
| 371 | {"hint", 0x6 , 0 , 0x2012, 0 , 0x6 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 1D. Hint instructions reserved for future use |
||
| 372 | {"hint", 0x135 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // 0F 1E. link to endbr64 etc. |
||
| 373 | {"nop", 0x6 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // 0F 1F. Multi-byte nop |
||
| 374 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 375 | {"mov", 0x803 , 0 , 0x13 , 0x100A, 0x92 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 20. mov r32/64,cr |
||
| 376 | {"mov", 0x803 , 0x1000 , 0x13 , 0x1009, 0x93 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 21. mov r32,dr |
||
| 377 | {"mov", 0x803 , 0 , 0x12 , 0x92 , 0x100A, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 22. mov cr,r32/64 |
||
| 378 | {"mov", 0x803 , 0x1000 , 0x12 , 0x93 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 23. mov dr,r32 |
||
| 379 | #if 0 // Opcode 0F 24 has two meanings: |
||
| 380 | // 1: mov r32,tr (obsolete, 80386 only) |
||
| 381 | {"mov;80386 only",0x803,0x0 , 0x4013, 0x1003, 0x94 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 24. mov r32,tr (80386 only) |
||
| 382 | #else |
||
| 383 | // 2: start of 3-byte opcode for AMD SSE5 instructions with DREX byte |
||
| 384 | {0, 0x68 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 24. Link to tertiary map for 3-byte opcodes AMD SSE5 with four operands |
||
| 385 | #endif |
||
| 386 | {0, 0x69 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 25. Link to tertiary map for 3-byte opcodes AMD SSE5 with three operands + immediate byte |
||
| 387 | {"mov;80386 only",0x803,0 , 0x4012, 0x94 , 0x1003, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 26. mov tr,r32 (80386 only) |
||
| 388 | {0, 0x803 , 0 , 0x4012, 0x1003, 0x1003, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 27. illegal |
||
| 389 | {"mova", 0x11 ,0xC52200, 0x12 , 0x124F, 0x24F, 0 , 0 , 0x30 , 0x1204, 0 , 0x103 }, // 0F 28. movaps/pd |
||
| 390 | {"mova", 0xBC , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 29. Link to movaps/pd |
||
| 391 | {0, 0x46 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2A. Link to tertiary map: cvtpi2ps, etc. |
||
| 392 | {0, 0xD2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2B. Link to tertiary map: movntps/pd,AMD: also ss/sd |
||
| 393 | {0, 0x47 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2C. Link to tertiary map: cvttps2pi, etc. |
||
| 394 | {0, 0x48 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2D. Link to tertiary map: cvtps2pi, etc. |
||
| 395 | {0, 0x4B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2E. Link to tertiary map: ucomiss/sd |
||
| 396 | {0, 0x4C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 2F. Link to tertiary map: comiss/sd |
||
| 397 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 398 | {"wrmsr", 0x805 , 0x1000 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 30 |
||
| 399 | {"rdtsc", 0x5 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 31 |
||
| 400 | {"rdmsr", 0x805 , 0x1000 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 32 |
||
| 401 | {"rdpmc", 0x5 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 33 |
||
| 402 | {"sysenter", 0x8 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 34 |
||
| 403 | {"sysexit;Same name with or without 48h prefix",0x808,0x1000,1,0,0,0,0, 0 ,0x0 , 0 , 0 }, // 0F 35 |
||
| 404 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 36 Illegal |
||
| 405 | {"getsec", 0x14 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 37 |
||
| 406 | {0, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 38. Link to tertiary map for 3-byte opcodes |
||
| 407 | {0, 0x3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 39. Link to tertiary map for 3-byte opcodes |
||
| 408 | {0, 0x4 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 3A. Link to tertiary map for 3-byte opcodes |
||
| 409 | {0, 0x5 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 3B. Link to tertiary map for 3-byte opcodes |
||
| 410 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3C Illegal |
||
| 411 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3D Illegal |
||
| 412 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3E Illegal |
||
| 413 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3F (VIA/Centaur ALTINST ?) |
||
| 414 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 415 | {"cmovo", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 40. cmov |
||
| 416 | {"cmovno", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 41. cmov |
||
| 417 | {"cmovc", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 42. cmov |
||
| 418 | {"cmovnc", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 43. cmov |
||
| 419 | {"cmove", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 44. cmov |
||
| 420 | {"cmovne", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 45. cmov |
||
| 421 | {"cmovbe", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 46. cmov |
||
| 422 | {"cmova", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 47. cmov |
||
| 423 | {"cmovs", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 48. cmov |
||
| 424 | {"cmovns", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 49. cmov |
||
| 425 | {"cmovpe", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4A. cmov |
||
| 426 | {"cmovpo", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4B. cmov |
||
| 427 | {"cmovl", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4C. cmov |
||
| 428 | {"cmovge", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4D. cmov |
||
| 429 | {"cmovle", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4E cmov |
||
| 430 | {"cmovg", 0x6 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 4F. cmov |
||
| 431 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 432 | {"movmskp", 0xCA , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 50. Link to movmskps/pd |
||
| 433 | {"sqrt", 0x76 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 51. Link to sqrtps/pd/ss/sd |
||
| 434 | {"rsqrt", 0x77 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 52. Link to rsqrtps/ss |
||
| 435 | {"rcp", 0x78 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 53. Link to rcpps/ss |
||
| 436 | {"and", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F 54. andps/pd |
||
| 437 | {"andn", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F 55. andnps/pd |
||
| 438 | {"or", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F 56. orps/pd |
||
| 439 | {"xor", 0x11 ,0x8D2200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F 57. xorps/pd |
||
| 440 | {"add", 0x11 ,0xE92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x3 }, // 0F 58. addps/pd/ss/sd |
||
| 441 | {"mul", 0x11 ,0xE92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x3 }, // 0F 59. mulps/pd/ss/sd |
||
| 442 | {0, 0x49 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 5A. Link to cvtps2pd, etc. |
||
| 443 | {0, 0x4A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 5B. Link to cvtdq2ps, etc. |
||
| 444 | {"sub", 0x11 ,0xE92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x3 }, // 0F 5C. subps/pd/ss/sd |
||
| 445 | {"min", 0x11 ,0xA92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x33 , 0 , 0 , 0x3 }, // 0F 5D. minps/pd/ss/sd |
||
| 446 | {"div", 0x11 ,0xA92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x3 }, // 0F 5E. divps/pd/ss/sd |
||
| 447 | {"max", 0x11 ,0xA92E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x33 , 0 , 0 , 0x3 }, // 0F 5F. maxps/pd/ss/sd |
||
| 448 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 449 | {"punpcklbw", 0x7 ,0x8D0200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 60 |
||
| 450 | {"punpcklwd", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 61 |
||
| 451 | {"punpckldq", 0x7 ,0x8D0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F 62 |
||
| 452 | {"packsswb", 0x7 ,0x8D2200, 0x19 , 0x1201, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 63 |
||
| 453 | {"pcmpgtb", 0x118 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 64 |
||
| 454 | {"pcmpgtw", 0x119 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 65 |
||
| 455 | {"pcmpgtd", 0xC8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 66. link to pcmpgtd |
||
| 456 | {"packuswb", 0x7 ,0x8D0200, 0x19 , 0x1201, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 67 |
||
| 457 | {"punpckhbw", 0x7 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 68 |
||
| 458 | {"punpckhwd", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 69 |
||
| 459 | {"punpckhdq", 0x7 ,0x8D0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x31 , 0 , 0 , 0x2 }, // 0F 6A |
||
| 460 | {"packssdw", 0x7 ,0x8D0200, 0x19 , 0x1202, 0x1203, 0x203 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F 6B |
||
| 461 | {"punpcklqdq",0x12 ,0x8DB200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F 6C |
||
| 462 | {"punpckhqdq",0x12 ,0x8DB200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F 6D |
||
| 463 | {0, 0x58 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 0F 6E. Link to tertiary map: movd/movq |
||
| 464 | {0, 0x4D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 6F. Link to tertiary map: movq/movdqa/movdqu |
||
| 465 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 466 | {0, 0x4F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 70. Link to tertiary map: pshufw, etc. |
||
| 467 | {0, 0x31 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 71. Link to tertiary map for group 12 |
||
| 468 | {0, 0x32 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 72. Link to tertiary map for group 13 |
||
| 469 | {0, 0x33 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 73. Link to tertiary map for group 14 |
||
| 470 | {"pcmpeqb", 0x116 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 74 |
||
| 471 | {"pcmpeqw", 0x117 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 75 |
||
| 472 | {"pcmpeqd", 0xC7 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 76. link to pcmpeqd |
||
| 473 | {"emms", 0x79 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xB , 0 }, // 0F 77. Link to emms, vzeroupper, vzeroall |
||
| 474 | {0, 0x6C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 78. Link to map for wmread, insrtq, extrq |
||
| 475 | {0, 0x6D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 79 without EVEX. Link to map for wmread, insrtq, extrq |
||
| 476 | {0, 0x6A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 7A. Link to map for obsolete 3-byte opcodes AMD SSE5. Note: VEX 0F 7A is in map B1 |
||
| 477 | {0, 0x6B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 , 0 }, // 0F 7B. Link to map for obsolete 3-byte opcodes AMD SSE5. Note: VEX 0F 7B is in map B1 |
||
| 478 | {0, 0x5C , 0xA00 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 7C. Link to map: hadd |
||
| 479 | {0, 0x5D , 0xA00 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 7D. Link to map: hsub |
||
| 480 | {0, 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 7E. Link to map: movd/movq |
||
| 481 | {0, 0x4E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 7F. Link to map: movq/movdqa/movdqu |
||
| 482 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 483 | {"jo", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 80 |
||
| 484 | {"jno", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 81 |
||
| 485 | {"jc", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 82 |
||
| 486 | {"jnc", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 83 |
||
| 487 | {"je", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 84 |
||
| 488 | {"jne", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 85 |
||
| 489 | {"jbe", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 86 |
||
| 490 | {"ja", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 87 |
||
| 491 | {"js", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 88 |
||
| 492 | {"jns", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 89 |
||
| 493 | {"jpe", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8A |
||
| 494 | {"jpo", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8B |
||
| 495 | {"jl", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8C |
||
| 496 | {"jge", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8D |
||
| 497 | {"jle", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8E |
||
| 498 | {"jg", 0x3 , 0x8 , 0x80 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0xA0 }, // 0F 8F |
||
| 499 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 500 | {"seto", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 90 |
||
| 501 | {"setno", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 91 |
||
| 502 | {"setb", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 92 |
||
| 503 | {"setae", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 93 |
||
| 504 | {"sete", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 94 |
||
| 505 | {"setne", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 95 |
||
| 506 | {"setbe", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 96 |
||
| 507 | {"seta", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 97 |
||
| 508 | {"sets", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 98 |
||
| 509 | {"setns", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 99 |
||
| 510 | {"setpe", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9A |
||
| 511 | {"setpo", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9B |
||
| 512 | {"setl", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9C |
||
| 513 | {"setge", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9D |
||
| 514 | {"setle", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9E |
||
| 515 | {"setg", 0x3 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 9F |
||
| 516 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 517 | {"push fs", 0x3 , 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A0 |
||
| 518 | {"pop fs", 0x3 , 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A1 |
||
| 519 | {"cpuid", 0x4 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F A2 |
||
| 520 | {"bt", 0x3 , 0x1100 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A3 |
||
| 521 | {"shld", 0x3 , 0x1100 , 0x53 , 0x9 , 0x1009, 0x11 , 0 , 0 , 0 , 0 , 0 }, // 0F A4 |
||
| 522 | {"shld", 0x3 , 0x1100 , 0x13 , 0x9 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 }, // 0F A5 |
||
| 523 | {0, 0xA6 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // 0F A6. Link to VIA instructions |
||
| 524 | {0, 0xA7 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // 0F A7. Link to VIA instructions |
||
| 525 | {"push gs", 0x3 , 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A8 |
||
| 526 | {"pop gs", 0x3 , 0x2 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A9 |
||
| 527 | {"rsm", 0x803 , 0 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AA |
||
| 528 | {"bts", 0x3 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AB |
||
| 529 | {"shrd", 0x3 , 0x1100 , 0x53 , 0x9 , 0x1009, 0x11 , 0 , 0 , 0 , 0 , 0 }, // 0F AC |
||
| 530 | {"shrd", 0x3 , 0x1100 , 0x13 , 0x9 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 }, // 0F AD |
||
| 531 | {0, 0x34 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // 0F AE. Link to tertiary map for group 15 |
||
| 532 | {"imul", 0x1 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AF |
||
| 533 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 534 | {"cmpxchg", 0x3 , 0xC50 , 0x13 , 0x2001, 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B0 |
||
| 535 | {"cmpxchg", 0x3 , 0x1D50 , 0x13 , 0x2009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B1 |
||
| 536 | {"lss", 0 , 0x1100 , 0x812 , 0x1009, 0x200D, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B2 (valid in 64-bit mode) |
||
| 537 | {"btr", 0x3 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B3 |
||
| 538 | {"lfs", 0 , 0x1100 , 0x812 , 0x1009, 0x200D, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B4 |
||
| 539 | {"lgs", 0 , 0x1100 , 0x812 , 0x1009, 0x200D, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B5 |
||
| 540 | {"movzx", 0x3 , 0x1100 , 0x12 , 0x1009, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B6 |
||
| 541 | {"movzx", 0x3 , 0x1100 , 0x12 , 0x1009, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F B7 |
||
| 542 | {0, 0x60 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F B8. Link to tertiary map for popcnt, jmpe |
||
| 543 | {0, 0x2E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F B9. Link to tertiary map for group 10: ud1 |
||
| 544 | {0, 0x2C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F BA. Link to tertiary map for group 8: bt |
||
| 545 | {"btc", 0x3 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BB |
||
| 546 | {"bsf", 0xAE , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F BC. Link to bsf etc. |
||
| 547 | {0, 0xD3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F BD. Link to tertiary map for BSR and LZCNT |
||
| 548 | {"movsx", 0x3 , 0x1100 , 0x12 , 0x1009, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BE |
||
| 549 | {"movsx", 0x3 , 0x1100 , 0x12 , 0x1009, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BF |
||
| 550 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 551 | {"xadd", 0x4 , 0x0C50 , 0x13 , 0x1 , 0x1001, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C0 |
||
| 552 | {"xadd", 0x4 , 0x1D50 , 0x13 , 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C1 |
||
| 553 | {0, 0xF5 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F C2. Link to cmpps etc. |
||
| 554 | {"movnti", 0x11 , 0x1000 , 0x13 , 0x2009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C3 |
||
| 555 | {0, 0x29 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F C4. Link to pinsrw |
||
| 556 | {"pextrw", 0x7 ,0x812200, 0x52 , 0x1002, 0x1102, 0x11 , 0 , 0x1000, 0 , 0 , 0x2 }, // 0F C5 |
||
| 557 | {"shuf", 0x11 ,0x8D2200, 0x59 , 0x124F, 0x124F, 0x24F , 0x11 , 0x31 , 0 , 0 , 0x3 }, // 0F C6 |
||
| 558 | {0, 0x50 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F C7. Link to tertiary map for group 9 |
||
| 559 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C8. bswap eax |
||
| 560 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C9. bswap ecx |
||
| 561 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CA. bswap edx |
||
| 562 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CB. bswap ebx |
||
| 563 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CC. bswap esp |
||
| 564 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CD. bswap ebp |
||
| 565 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CE. bswap esi |
||
| 566 | {"bswap", 0x3 , 0x1000 , 0x3 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F CF. bswap edi |
||
| 567 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 568 | {0, 0x2D , 0xA00 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F D0. Link to addsubps/pd |
||
| 569 | {"psrlw", 0x99 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F D1. Link to map for psrlw |
||
| 570 | {"psrld", 0x9A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F D2. Link to map for psrld |
||
| 571 | {"psrlq", 0x9B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F D3. Link to map for psrlq |
||
| 572 | {"paddq", 0x12 ,0x8D3200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F D4 |
||
| 573 | {"pmullw", 0x7 ,0x8DA200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D5 |
||
| 574 | {0, 0x53 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F D6. Link to tertiary map for movq2dq etc. |
||
| 575 | {"pmovmskb", 0x93 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0B , 0 }, // 0F D7. Link pmovmskb |
||
| 576 | {"psubusb", 0x7 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D8 |
||
| 577 | {"psubusw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D9 |
||
| 578 | {"pminub", 0x7 ,0x8D0200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F DA |
||
| 579 | {"pand", 0xC2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F DB. link to pand |
||
| 580 | {"paddusb", 0x7 ,0x8D2200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F DC |
||
| 581 | {"paddusw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F DD |
||
| 582 | {"pmaxub", 0x7 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F DE |
||
| 583 | {"pandn", 0xC3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F DF. link to pandn |
||
| 584 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 585 | {"pavgb", 0x7 ,0x8D2200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E0 |
||
| 586 | {"psraw", 0x9C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F E1. Link to map for psraw |
||
| 587 | {"psrad", 0x9D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F E2. Link to map for psrad |
||
| 588 | {"pavgw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E3 |
||
| 589 | {"pmulhuw", 0x7 ,0x8DA200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E4 |
||
| 590 | {"pmulhw", 0x7 ,0x8DA200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E5 |
||
| 591 | {0, 0x54 , 0xE00 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F E6. Link to tertiary map for cvtpd2dq etc. |
||
| 592 | {0, 0x55 , 0x200 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F E7. Link to tertiary map for movntq |
||
| 593 | {"psubsb", 0x7 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E8 |
||
| 594 | {"psubsw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E9 |
||
| 595 | {"pminsw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F EA |
||
| 596 | {"por", 0xC4 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F EB. link to por |
||
| 597 | {"paddsb", 0x7 ,0x8D2200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F EC |
||
| 598 | {"paddsw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F ED |
||
| 599 | {"pmaxsw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F EE |
||
| 600 | {"pxor", 0xC5 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F EF. link to pxor |
||
| 601 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 602 | {0, 0x56 , 0x800 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F F0. Link to tertiary map for lddqu |
||
| 603 | {"psllw", 0x96 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F F1. Link to map for psllw |
||
| 604 | {"pslld", 0x97 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F F2. Link to map for pslld |
||
| 605 | {"psllq", 0x98 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F F3. Link to map for psllq |
||
| 606 | {"pmuludq", 0x7 ,0x8D2200, 0x19 , 0x1104, 0x1104, 0x104 , 0 , 0x31 , 0 , 0 , 0x2 }, // 0F F4 (32 bit memory operand is broadcast as 64 bit into every second dword) |
||
| 607 | {"pmaddwd", 0x7 ,0x8D2200, 0x19 , 0x1103, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F5 |
||
| 608 | {"psadbw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F F6 |
||
| 609 | {0, 0x57 , 0x200 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F F7. Link to tertiary map for maskmovq |
||
| 610 | {"psubb", 0x7 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F8 |
||
| 611 | {"psubw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F9 |
||
| 612 | {"psubd", 0x7 ,0xCD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x21 , 0x1406, 0 , 0x2 }, // 0F FA |
||
| 613 | {"psubq", 0x7 ,0x8D2200, 0x19 , 0x1104, 0x1104, 0x104 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F FB |
||
| 614 | {"paddb", 0x7 ,0x8D2200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F FC |
||
| 615 | {"paddw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F FD |
||
| 616 | {"paddd", 0x7 ,0xCD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x31 , 0x1406, 0 , 0x2 }, // 0F FE |
||
| 617 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F FF |
||
| 618 | |||
| 619 | |||
| 620 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 38 |
||
| 621 | // or VEX encoded with mmmm = 2 |
||
| 622 | // Indexed by third opcode byte |
||
| 623 | SOpcodeDef OpcodeMap2[] = { |
||
| 624 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 625 | {"pshufb", 0x14 ,0x8D2200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 00 |
||
| 626 | {"phaddw", 0x14 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 01 |
||
| 627 | {"phaddd", 0x14 , 0xD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 02 |
||
| 628 | {"phaddsw", 0x14 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 03 |
||
| 629 | {"pmaddubsw", 0x14 ,0x8D2200, 0x19 , 0x1102, 0x1101, 0x101 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 04 |
||
| 630 | {"phsubw", 0x14 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 05 |
||
| 631 | {"phsubd", 0x14 , 0xD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 06 |
||
| 632 | {"phsubsw", 0x14 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 07 |
||
| 633 | {"psignb", 0x14 , 0xD0200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 08 |
||
| 634 | {"psignw", 0x14 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 09 |
||
| 635 | {"psignd", 0x14 , 0xD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 0A |
||
| 636 | |||
| 637 | {"pmulhrsw", 0x14 ,0x8DA200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 0B |
||
| 638 | {"vpermilps", 0x19 ,0x8FA200, 0x19 , 0x124B, 0x124B, 0x24B , 0 , 0x31 , 0 , 0 , 0 }, // 0F 38 0C |
||
| 639 | {"vpermilpd", 0x19 ,0x8FA200, 0x19 , 0x124C, 0x124C, 0x24C , 0 , 0x31 , 0 , 0 , 0 }, // 0F 38 0D |
||
| 640 | {"vtestps", 0x19 , 0x78200, 0x12 , 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 0E |
||
| 641 | {"vtestpd", 0x19 , 0x78200, 0x12 , 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 0F |
||
| 642 | |||
| 643 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 644 | {0, 0xEA , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 10. Link pblendvb and vpsrlvw |
||
| 645 | {"vpsravw", 0x1C ,0x8FC200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 11 |
||
| 646 | {"vpsllvw", 0x20 ,0x8FC200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 12 |
||
| 647 | {"vcvtph2ps", 0x19 ,0x878200, 0x12 , 0x250 , 0xF4A , 0 , 0 , 0x2232, 0 , 0 , 0 }, // 0F 38 13 |
||
| 648 | {0, 0x8D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xB , 0 }, // 0F 38 14. Link to vprorvd blendvps and vpmovqw |
||
| 649 | {0, 0x8E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xB , 0 }, // 0F 38 15. Link to vprolvd blendvpd and vpmovqd |
||
| 650 | {"vpermp", 0x1C ,0x9F9200 ,0x19 , 0x124F, 0x1203, 0x24F , 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 16 |
||
| 651 | {"ptest", 0x15 , 0x58200, 0x12 , 0x1250, 0x250 , 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 17. Also in AMD SSE5 instruction set |
||
| 652 | {"vbroadcastss",0x19,0xC78200, 0x12 , 0x124B, 0x04B , 0 , 0 , 0x20 , 0x1048, 0 , 0 }, // 0F 38 18 |
||
| 653 | {0, 0x12A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0E , 0 }, // 0F 38 19. Link to vbroadcastsd |
||
| 654 | {0, 0xE5 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0C , 0 }, // 0F 38 1A. Link to broadcast instructions |
||
| 655 | {0, 0x38 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0C , 0 }, // 0F 38 1B. Link to vbroadcastf64x4 |
||
| 656 | {"pabsb", 0x14 ,0x85A200, 0x12 , 0x1201, 0x201 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 1C |
||
| 657 | {"pabsw", 0x14 ,0x85A200, 0x12 , 0x1202, 0x202 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 1D |
||
| 658 | {"pabsd", 0x14 ,0x85B200, 0x12 , 0x1203, 0x203 , 0 , 0 , 0x31 , 0 , 0 , 0x2 }, // 0F 38 1E |
||
| 659 | {"vpabsq", 0x20 ,0x85B200, 0x12 , 0x1203, 0x203 , 0 , 0 , 0x31 , 0 , 0 , 0x0 }, // 0F 38 1F |
||
| 660 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 661 | {0, 0x7A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 20. Link pmovsxbw |
||
| 662 | {0, 0x7B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 21. Link pmovsxbd and vpmovdb |
||
| 663 | {0, 0x7D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 22. Link pmovsxbq and vpmovqb |
||
| 664 | {0, 0x7F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 23. Link pmovsxwd and vpmovdw |
||
| 665 | {0, 0x80 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 24. Link pmovsxwq and vpmovqw |
||
| 666 | {0, 0x82 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 25. Link pmovsxdq and vpmovqd |
||
| 667 | {"vptestm", 0x20 ,0x8BC200, 0x19 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 1 }, // 0F 38 27 |
||
| 668 | {"vptestm", 0x20 ,0xCBB200, 0x19 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 1 }, // 0F 38 27 |
||
| 669 | {"pmuldq", 0x15 ,0x8DA200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x31 , 0 , 0 , 0x2 }, // 0F 38 28 (32 bit memory operand is broadcast as 64 bit into every second dword) |
||
| 670 | {0, 0xE3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 29. Link to pcmpeqq |
||
| 671 | {0, 0x91 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 2A. Link to movntdqa and vpbroadcastmb2q |
||
| 672 | {"packusdw", 0x15 ,0x8D8200, 0x19 , 0x1202, 0x1203, 0x203 , 0 , 0x21 , 0 , 0 , 0x2 }, // 0F 38 2B |
||
| 673 | {0, 0xFD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 2C. Link to vmaskmovps and vscalefps |
||
| 674 | {0, 0xFE , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 2D. Link to vmaskmovss and vscalefss |
||
| 675 | {"vmaskmovps",0x19 , 0xF8200, 0x1A, 0x224B, 0x124B, 0x124B, 0 , 0 , 0 , 0 , 0 }, // 0F 38 2E |
||
| 676 | {"vmaskmovpd",0x19 , 0xF8200, 0x1A, 0x224C, 0x124C, 0x124C, 0 , 0 , 0 , 0 , 0 }, // 0F 38 2F |
||
| 677 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 678 | {0, 0x83 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 30. Link pmovzxbv |
||
| 679 | {0, 0x85 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 31. Link pmovzxbd and vpmovdb |
||
| 680 | {0, 0x87 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 32. Link pmovzxbq and vpmovqb |
||
| 681 | {0, 0x89 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 33. Link pmovzxwd and vpmovdw |
||
| 682 | {0, 0x8A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 34. Link pmovzxwq and vpmovqw |
||
| 683 | {0, 0x8C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 35. Link pmovzxdq and vpmovqd |
||
| 684 | {"vperm", 0x1C , 0xCFB200,0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1000, 0 , 0x1 }, // 0F 38 36 |
||
| 685 | {0, 0xE4 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 37 |
||
| 686 | {0, 0x12C , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 38. Link to pminsb etc. |
||
| 687 | {0, 0xE6 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 39. Link pminsd |
||
| 688 | {0, 0xFF , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 3A |
||
| 689 | {0 , 0xE7 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0x2 }, // 0F 38 3B. Link pminud |
||
| 690 | {"pmaxsb", 0x15 ,0x8DA200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 3C |
||
| 691 | {0, 0xE8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 3D. Link pmaxsd |
||
| 692 | {"pmaxuw", 0x15 ,0x8DA200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F 38 3E |
||
| 693 | {0, 0xE9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 3F. Link pmaxud |
||
| 694 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 695 | {"pmull", 0x15 ,0xCDB200, 0x19 , 0x1203, 0x1203, 0x203 , 0 , 0x31 , 0x1406, 0 , 0x3 }, // 0F 38 40 |
||
| 696 | {"phminposuw",0x15 ,0x18200, 0x12 , 0x1402, 0x402 , 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 41 |
||
| 697 | {"vgetexpp", 0x20 ,0xC29200, 0x12 , 0x124F, 0x24F , 0 , 0 , 0x33 , 0x1204, 0 , 0x101 }, // 0F 38 42 |
||
| 698 | {"vgetexps", 0x20 ,0xCA9200, 0x19 , 0x144F, 0x24F , 0x04F , 0 , 0x32 , 0x1204, 0 , 0x101 }, // 0F 38 43 |
||
| 699 | {"vplzcnt", 0x21 ,0x80B200, 0x12 , 0x1209, 0x0209, 0 , 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 44 |
||
| 700 | {"vpsrlv", 0x1C ,0xCFB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }, // 0F 38 45 |
||
| 701 | {"vpsrav", 0x1C ,0xCFB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }, // 0F 38 46 |
||
| 702 | {"vpsllv", 0x1C ,0xCFB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }, // 0F 38 47 |
||
| 703 | {"(reserved)",0x0 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 48 |
||
| 704 | {"(reserved)",0x0 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 49 |
||
| 705 | {"(reserved)",0x0 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 4A |
||
| 706 | {"(reserved)",0x0 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 4B |
||
| 707 | {"vrcp14p" ,0x20 ,0x8D9200, 0x12 , 0x124F, 0x024F, 0 , 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 4C |
||
| 708 | {"vrcp14s" ,0x20 ,0x8D9200, 0x19 , 0x144F, 0x144F, 0x004F, 0 , 0x30 , 0 , 0 , 0x1 }, // 0F 38 4D |
||
| 709 | {"vrsqrt14p", 0x20 ,0x8D9200, 0x12 , 0x124F, 0x024F, 0 , 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 4E |
||
| 710 | {"vrsqrt14s", 0x20 ,0x8D9200, 0x19 , 0x144F, 0x144F, 0x004F, 0 , 0x30 , 0 , 0 , 0x1 }, // 0F 38 4F |
||
| 711 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 712 | {"vaddnp", 0x80 ,0x4A9200, 0x19, 0x164F, 0x164F, 0x64F , 0 , 0 , 0x1304, 0 , 0x101 }, // 0F 38 50 |
||
| 713 | {"vgmaxabsps",0x80 ,0x428200, 0x12 , 0x164F, 0x64F , 0 , 0 , 0 , 0x1204, 0 , 0x100 }, // 0F 38 51 |
||
| 714 | {"vgminp", 0x80 ,0x429200, 0x12 , 0x164F, 0x64F , 0 , 0 , 0 , 0x1204, 0 , 0x101 }, // 0F 38 52 |
||
| 715 | {"vgmaxp", 0x80 ,0x429200, 0x12 , 0x164F, 0x64F , 0 , 0 , 0 , 0x1204, 0 , 0x101 }, // 0F 38 53 |
||
| 716 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 54 |
||
| 717 | {"vfixupnanp",0x80 ,0x4A9200, 0x19, 0x164F, 0x164F, 0x603 , 0 , 0 , 0x1206, 0 , 0x101 }, // 0F 38 55 |
||
| 718 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 56 |
||
| 719 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 57 |
||
| 720 | {"vpbroadcastd",0xA0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 58. Link to vpbroadcastd |
||
| 721 | {"vpbroadcastq",0xA1, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 59. Link to vpbroadcastq |
||
| 722 | {0, 0x84 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 5A. Link to broadcast instructions |
||
| 723 | {"vbroadcasti64x4",0x80,0xC29200,0x12, 0x1604, 0x2504, 0 , 0 , 0x20 , 0x1013, 0 , 0x100 }, // 0F 38 5B |
||
| 724 | {"vpadcd", 0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 5C |
||
| 725 | {"vpaddsetcd",0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 5D |
||
| 726 | {"vpsbbd", 0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 5E |
||
| 727 | {"vpsubsetbd",0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 5F |
||
| 728 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 729 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 60 |
||
| 730 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 61 |
||
| 731 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 62 |
||
| 732 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 63 |
||
| 733 | {"vpblendm", 0x20 ,0xCAB200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x21 , 0x1406, 0 , 0x001 }, // 0F 38 64 (alignment required only in Knights Corner) |
||
| 734 | {"vblendmp", 0x80 ,0xCA9200, 0x19, 0x124F, 0x124F, 0x24F , 0 , 0x21 , 0x1404, 0 , 0x101 }, // 0F 38 65 |
||
| 735 | {"vpblendm", 0x20 ,0x8AC200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x21 , 0x1406, 0 , 0x001 }, // 0F 38 66 |
||
| 736 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 67 |
||
| 737 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 68 |
||
| 738 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 69 |
||
| 739 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 6A |
||
| 740 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 6B |
||
| 741 | {"vpsubrd", 0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 6C |
||
| 742 | {"vsubrp", 0x80 ,0x4A9200, 0x19, 0x164F, 0x164F, 0x64F , 0 , 0 , 0x1304, 0 , 0x101 }, // 0F 38 6D |
||
| 743 | {"vpsbbrd", 0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 6E |
||
| 744 | {"vpsubrsetbd",0x80 , 0x4A8200,0x19 , 0x1603, 0x95 , 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 6F |
||
| 745 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 746 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 70 |
||
| 747 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 71 |
||
| 748 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 72 |
||
| 749 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 73 |
||
| 750 | {"vpcmpltd", 0x80 ,0x4B8200, 0x19 , 0x95 , 0x1603, 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 74 |
||
| 751 | {"vpermi2" , 0x23 ,0x8EC200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 1 }, // 0F 38 75 (instruction set avx512vbmi for byte version) |
||
| 752 | {"vpermi2", 0x20 ,0x8AB200, 0x19, 0x1609, 0x1609, 0x0609, 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 76 |
||
| 753 | {"vpermi2p", 0x20 ,0x8A9200, 0x19, 0x164F, 0x164F, 0x064F, 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 77 |
||
| 754 | {"vpbroadcastb",0x9E, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 78. Link to vpbroadcastb |
||
| 755 | {"vpbroadcastw",0x9F, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 38 79. Link to vpbroadcastw |
||
| 756 | {"vpbroadcastb",0x20,0x828200, 0x12, 0x1201, 0x1001, 0 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 7A |
||
| 757 | {"vpbroadcastw",0x20,0x828200, 0x12, 0x1202, 0x1002, 0 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 7B |
||
| 758 | {"vpbroadcast",0x20 ,0x82B200, 0x12, 0x1209, 0x1009, 0 , 0 , 0x20 , 0 , 0 , 0x1 }, // 0F 38 7C |
||
| 759 | {"vpermt2" , 0x20 ,0x8EC200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 1 }, // 0F 38 7D (instruction set avx512vbmi for byte version) |
||
| 760 | {"vpermt2", 0x20 ,0x8AB200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x21 , 0 , 0 , 0x1 }, // 0F 38 7E |
||
| 761 | {"vpermt2p", 0x20 ,0x8A9200, 0x19, 0x164F, 0x164F, 0x064F, 0 , 0x21 , 0 , 0 , 0x1 }, // 0F 38 7F |
||
| 762 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 763 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 80 |
||
| 764 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 81 |
||
| 765 | {"invpcid", 0x81D , 0x9200 , 0x12 , 0x1009, 0x2406, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 82 |
||
| 766 | {"vpmultishiftqb",0x23,0x8E9200,0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0 }, // 0F 38 83 |
||
| 767 | {"vscaleps", 0x80 ,0x4B8200, 0x19 , 0x164B, 0x164B, 0x603 , 0 , 0 , 0x1306, 0 , 0x100 }, // 0F 38 84 |
||
| 768 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 85 |
||
| 769 | {"vpmulhud", 0x80 ,0x4A8200, 0x19 , 0x1603, 0x1603, 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 86 |
||
| 770 | {"vpmulhd", 0x80 ,0x4A8200, 0x19 , 0x1603, 0x1603, 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }, // 0F 38 87 |
||
| 771 | {"vexpandp", 0x20 ,0x801200, 0x12 , 0x164F, 0x064F, 0 , 0 , 0x1030, 0 , 0 , 1 }, // 0F 38 88 |
||
| 772 | {"vpexpand", 0x20 ,0x83B200, 0x12 , 0x1209, 0x0209, 0 , 0 , 0x30 , 0 , 0 , 1 }, // 0F 38 89 |
||
| 773 | {"vcompressp",0x20 ,0x809200, 0x13, 0x024F, 0x124F, 0 , 0 , 0x1030, 0 , 0 , 1 }, // 0F 38 8A |
||
| 774 | {"vpcompress",0x20 ,0x80B200, 0x13, 0x0209, 0x1209, 0 , 0 , 0x1030, 0 , 0 , 1 }, // 0F 38 8B |
||
| 775 | {"vpmaskmov", 0x1C , 0xFB200, 0x19, 0x1209, 0x1209, 0x2209, 0 , 0 , 0 , 0 , 1 }, // 0F 38 8C |
||
| 776 | {"vperm" , 0x23 ,0x8EC200, 0x19, 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 1 }, // 0F 38 8D |
||
| 777 | {"vpmaskmov", 0x1C , 0xFB200, 0x1A, 0x2209, 0x1209, 0x1209, 0 , 0 , 0 , 0 , 1 }, // 0F 38 8E |
||
| 778 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 8F |
||
| 779 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 780 | {0, 0x102 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 90. link to vpgatherd/q |
||
| 781 | {0, 0x94 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 91. Link to vpgatherqd/q |
||
| 782 | {0, 0xB6 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 92. Link to vpgatherdps/pd |
||
| 783 | {0, 0xE0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 38 93. Link to vpgatherqps/pd |
||
| 784 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 94 |
||
| 785 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 95 |
||
| 786 | {"vfmaddsub132p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 96 |
||
| 787 | {"vfmsubadd132p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 97 |
||
| 788 | {"vfmadd132p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 98 |
||
| 789 | {"vfmadd132s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 99 |
||
| 790 | {"vfmsub132p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 9A |
||
| 791 | {"vfmsub132s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 9B |
||
| 792 | {"vfnmadd132p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 9C |
||
| 793 | {"vfnmadd132s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 9D |
||
| 794 | {"vfnmsub132p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 9E |
||
| 795 | {"vfnmsub132s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 9F |
||
| 796 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 797 | {0, 0xD7 , 0 ,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 A0. Link to vpscatterdd |
||
| 798 | {0, 0xD8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 A1. Link to vpscatterqd |
||
| 799 | {0, 0x100 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 A2. Link to vpscatterdps |
||
| 800 | {0, 0x101 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 A3. Link to vpscatterqps |
||
| 801 | {"vfmadd233ps",0x80 ,0x4F8200, 0x19 , 0x124B, 0x124B, 0x24B , 0 , 0 , 0x1316, 0 , 0x100 }, // 0F 38 A4 |
||
| 802 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 A5 |
||
| 803 | {"vfmaddsub213p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 A6 |
||
| 804 | {"vfmsubadd213p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 A7 |
||
| 805 | {"vfmadd213p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 A8 |
||
| 806 | {"vfmadd213s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 A9 |
||
| 807 | {"vfmsub213p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 AA |
||
| 808 | {"vfmsub213s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 AB |
||
| 809 | {"vfnmadd213p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 AC |
||
| 810 | {"vfnmadd213s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 AD |
||
| 811 | {"vfnmsub213p",0x1A ,0xCF9200, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 AE |
||
| 812 | {"vfnmsub213s",0x1A ,0x8B9200, 0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 AF |
||
| 813 | |||
| 814 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 815 | {"(reserved)",0x00 ,0x4D2E00, 0x401E, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 B0 |
||
| 816 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 B1 |
||
| 817 | {"(reserved)",0x00 ,0x4D2E00, 0x401E, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 B2 |
||
| 818 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 B3 |
||
| 819 | {0, 0x128 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 B4. Link to vpmadd52luq |
||
| 820 | {0, 0x129 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 B5. Link to vpmadd52huq |
||
| 821 | {"vfmaddsub231p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 B6 |
||
| 822 | {"vfmsubadd231p",0x1A,0x8F9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0 , 0 , 0x1 }, // 0F 38 B7 |
||
| 823 | {"vfmadd231p", 0x1A,0xCF9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 B8 |
||
| 824 | {"vfmadd231s", 0x1A,0x8B9200,0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 B9 |
||
| 825 | {"vfmsub231p", 0x1A,0xCF9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 BA |
||
| 826 | {"vfmsub231s", 0x1A,0x8B9200,0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 BB |
||
| 827 | {"vfnmadd231p", 0x1A,0xCF9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 BC |
||
| 828 | {"vfnmadd231s", 0x1A,0x8B9200,0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 BD |
||
| 829 | {"vfnmsub231p", 0x1A,0xCF9200,0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x37 , 0x1304, 0 , 0x1 }, // 0F 38 BE |
||
| 830 | {"vfnmsub231s", 0x1A,0x8B9200,0x19 , 0x144F, 0x144F, 0x04F , 0 , 0x36 , 0 , 0 , 0x1 }, // 0F 38 BF |
||
| 831 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 832 | {"(reserved)",0x0 ,0x4D2E00 , 0x401E, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 C0 |
||
| 833 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 C1 |
||
| 834 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 C2 |
||
| 835 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 C3 |
||
| 836 | {"vpconflict",0x21 ,0x80B200, 0x12 , 0x1209, 0x0209, 0 , 0 , 0x31 , 0 , 0 , 0x1 }, // 0F 38 C4 |
||
| 837 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 C5 |
||
| 838 | {0, 0xB7 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 C6. Link to vgatherpf0dps |
||
| 839 | {0, 0x10F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 38 C7. Link to vgatherpf0qps |
||
| 840 | {0, 0x107 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 C8 |
||
| 841 | {0, 0x108 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 C9 |
||
| 842 | {0, 0x109 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 CA |
||
| 843 | {0, 0x10A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 CB |
||
| 844 | {0, 0x10B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 CC |
||
| 845 | {0, 0x10C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x11 , 0 }, // 0F 38 CD |
||
| 846 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 CE |
||
| 847 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 CF |
||
| 848 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 849 | {0, 0xBE , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 D0. Link to vloadunpackld |
||
| 850 | {0, 0xBF , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 D1. Link to vloadunpacklps |
||
| 851 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D2 |
||
| 852 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D3 |
||
| 853 | {0, 0xC0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 D4. Link to vloadunpackhd |
||
| 854 | {0, 0xC1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 D5. Link to vloadunpackhps |
||
| 855 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D6 |
||
| 856 | {"(reserved)",0x00 ,0x4D2E00, 0x4012, 0x609 , 0x609 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D7 |
||
| 857 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D8 |
||
| 858 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D9 |
||
| 859 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 DA |
||
| 860 | {"aesimc", 0x17 ,0x98200 , 0x19, 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 DB |
||
| 861 | {"aesenc", 0x17 ,0x98200 , 0x19, 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 DC |
||
| 862 | {"aesenclast",0x17 ,0x98200 , 0x19, 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 DD |
||
| 863 | {"aesdec", 0x17 ,0x98200 , 0x19, 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 DE |
||
| 864 | {"aesdeclast",0x17 ,0x98200 , 0x19, 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 DF |
||
| 865 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 866 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E0 |
||
| 867 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E1 |
||
| 868 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E2 |
||
| 869 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E3 |
||
| 870 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E4 |
||
| 871 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E5 |
||
| 872 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E6 |
||
| 873 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E7 |
||
| 874 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E8 |
||
| 875 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 E9 |
||
| 876 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 EA |
||
| 877 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 EB |
||
| 878 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 EC |
||
| 879 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 ED |
||
| 880 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 EE |
||
| 881 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 EF |
||
| 882 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 883 | {"crc32", 0x16 ,0x19900 , 0x12 , 0x1009, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F0 |
||
| 884 | {"crc32", 0x07 ,0x19900 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 0F 38 F1. Link to crc32 16/32/64 bit |
||
| 885 | {"andn", 0x1D ,0xB1000 , 0x19 , 0x1009, 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F2 |
||
| 886 | {"blsi", 0xA2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 0F 38 F3. Link to blsi etc. by reg bit |
||
| 887 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F4 |
||
| 888 | {"bzhi", 0xA3 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 F5. Link to bzhi, pdep, pext |
||
| 889 | {"mulx", 0xD0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 F6. Link to mulx, adcx, adox |
||
| 890 | {"bextr", 0xAD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 38 F7. Link to bextr etc. |
||
| 891 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F8 |
||
| 892 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F9 |
||
| 893 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 FA |
||
| 894 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 FB |
||
| 895 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 FC |
||
| 896 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 FD |
||
| 897 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 FE |
||
| 898 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 38 FF |
||
| 899 | |||
| 900 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 39 |
||
| 901 | // Reserved by Intel for future extensions, but never used |
||
| 902 | SOpcodeDef OpcodeMap3[] = { |
||
| 903 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 904 | {0, 0 , 0 , 0x2012, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 39 00 |
||
| 905 | |||
| 906 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 3A |
||
| 907 | // or VEX encoded with mmmm = 3 |
||
| 908 | // Indexed by third opcode byte |
||
| 909 | SOpcodeDef OpcodeMap4[] = { |
||
| 910 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 911 | {"vpermq", 0x1C ,0x97B200, 0x52 , 0x1204, 0x204 , 0x31 , 0 , 0x31 , 0 , 0 , 0 }, // 0F 3A 00 |
||
| 912 | {"vpermpd", 0x1C ,0x97B200, 0x52 , 0x124C, 0x24C , 0x31 , 0 , 0x31 , 0 , 0 , 0 }, // 0F 3A 01 |
||
| 913 | {"vpblendd", 0x1C , 0xF8200, 0x59, 0x1203, 0x1203, 0x203 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 3A 02 |
||
| 914 | {"valign", 0x20 ,0xCAB200, 0x59, 0x1209, 0x1209, 0x209 , 0x31 , 0x21 , 0x1000, 0 , 0x101 }, // 0F 3A 03 |
||
| 915 | {"vpermilps", 0x19 ,0x8F8200, 0x52, 0x124B, 0x24B , 0x31 , 0 , 0x31 , 0 , 0 , 0 }, // 0F 3A 04 |
||
| 916 | {"vpermilpd", 0x19 ,0x8FA200, 0x52, 0x124C, 0x24C , 0x31 , 0 , 0x31 , 0 , 0 , 0 }, // 0F 3A 05 |
||
| 917 | {"vperm2f128",0x19 ,0x1F8200, 0x59, 0x1550, 0x1550, 0x550 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 3A 06 |
||
| 918 | {"vpermf32x4",0x80 ,0x438200, 0x52, 0x124B, 0x24B , 0x31 , 0 , 0 , 0x1000, 0 , 0x100 }, // 0F 3A 07 |
||
| 919 | {0, 0xF9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 08. Also in AMD instruction set |
||
| 920 | {0, 0xFA , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 09. Also in AMD instruction set |
||
| 921 | {0, 0xFB , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 0A. Also in AMD instruction set |
||
| 922 | {0, 0xFC , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 0B. Also in AMD instruction set |
||
| 923 | {"blendps", 0x15 , 0xD8200, 0x59 , 0x124B, 0x124B, 0x24B , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 0C |
||
| 924 | {"blendpd", 0x15 , 0xD8200, 0x59 , 0x124C, 0x124C, 0x24C , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 0D |
||
| 925 | {"pblendw", 0x15 , 0xD8200, 0x59 , 0x1202, 0x1202, 0x202 , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 0E |
||
| 926 | {"palignr", 0x14 ,0x8D2200, 0x59 , 0x1201, 0x1201, 0x201 , 0x31 , 0x20 , 0 , 0 , 0x2 }, // 0F 3A 0F |
||
| 927 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 928 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 10 |
||
| 929 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 11 |
||
| 930 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 12 |
||
| 931 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 13 |
||
| 932 | {0, 0x61 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 3A 14. Link to pextrb |
||
| 933 | {0, 0x62 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 3A 15. Link to pextrw |
||
| 934 | {0, 0x63 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 0F 3A 16. Link to pextrd, pextrq |
||
| 935 | {"extractps" ,0x15 ,0x819200, 0x53 , 0x3 , 0x144B, 0x31 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 3A 17 |
||
| 936 | {0 ,0x122 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 18 |
||
| 937 | {0 ,0x11E , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 19. Link to vextractf128 |
||
| 938 | {0 ,0x124 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 1A. Link to vinsertf64x4 |
||
| 939 | {0, 0xDE , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 1B. Link to vextractf64x4 |
||
| 940 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 1C |
||
| 941 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 942 | {"vcvtps2ph", 0x1D ,0x878200, 0x53, 0xF4A , 0x250 , 0x31 , 0 , 0x22 , 0 , 0 , 0 }, // 0F 3A 1D |
||
| 943 | {0, 0x114 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // 0F 3A 1E. link to vpcmpud |
||
| 944 | {0, 0x115 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // 0F 3A 1F. link to vpcmpd |
||
| 945 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 946 | {0, 0xA5 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 0F 3A 20. Link to pinsrb |
||
| 947 | {"insertps", 0x15 ,0x898200, 0x59 , 0x144B, 0x144B, 0x4B , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 21 |
||
| 948 | {"pinsrd/q", 0x75 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 0F 3A 22. Link to pinsrd/q |
||
| 949 | {0, 0x8F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 23. Link to vshuff32x4 |
||
| 950 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 24 |
||
| 951 | {"vpternlog", 0x20 ,0x88B200, 0x59 , 0x1209, 0x1209, 0x0209, 0x31 , 0x31 , 0 , 0 , 0x1 }, // 0F 3A 25 |
||
| 952 | {"vgetmantp", 0x20 , 0xC29200,0x52 , 0x124F, 0x24F , 0x31 , 0 , 0x33 , 0x1204, 0 , 0x001 }, // 0F 3A 26 |
||
| 953 | {"vgetmants", 0x20 , 0xCA9200,0x59 , 0x144F, 0x24F , 0x04F , 0x31 , 0x32 , 0x1204, 0 , 0x001 }, // 0F 3A 27 |
||
| 954 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 28 |
||
| 955 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 29 |
||
| 956 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2A |
||
| 957 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2B |
||
| 958 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2C |
||
| 959 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2D |
||
| 960 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2E |
||
| 961 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 2F |
||
| 962 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 963 | {"kshiftr", 0x20 , 0x3C200, 0x52 , 0x1095, 0x1095, 0x11 , 0 , 0 , 0 , 0 , 1 }, // 0F 3A 30 |
||
| 964 | {"kshiftr", 0x20 , 0x3B200, 0x52 , 0x1095, 0x1095, 0x11 , 0 , 0 , 0 , 0 , 1 }, // 0F 3A 30 |
||
| 965 | {"kshiftl", 0x20 , 0x3C200, 0x52 , 0x1095, 0x1095, 0x11 , 0 , 0 , 0 , 0 , 1 }, // 0F 3A 32 |
||
| 966 | {"kshiftl", 0x20 , 0x3B200, 0x52 , 0x1095, 0x1095, 0x11 , 0 , 0 , 0 , 0 , 1 }, // 0F 3A 33 |
||
| 967 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 34 |
||
| 968 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 35 |
||
| 969 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 36 |
||
| 970 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 37 |
||
| 971 | {0, 0x125 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 38. Link to vinserti128 |
||
| 972 | {0, 0x120 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 39. Link to vextracti128 |
||
| 973 | {0, 0x127 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 3A. Link to vinserti64x4 |
||
| 974 | {0, 0xDF , 0 , 0x53 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 3B. Link to vextracti64x4 |
||
| 975 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 3C |
||
| 976 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 3D |
||
| 977 | {0, 0xC6 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 0F 3A 3E. Link to kextract and vpcmp |
||
| 978 | {0, 0x113 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // 0F 3A 3F. Link to vpcmp |
||
| 979 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 980 | {"dpps", 0x15 , 0xD8200, 0x59 , 0x124B, 0x124B, 0x24B , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 40 |
||
| 981 | {"dppd", 0x15 , 0x98200, 0x59 , 0x144C, 0x144C, 0x44C , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 41 (No ymm version) |
||
| 982 | {0, 0x11D , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0x2 }, // 0F 3A 42. Link to mpsadbw |
||
| 983 | {0, 0x90 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 3A 43. Link to vshufi32x4 |
||
| 984 | {"pclmulqdq", 0x18 , 0x98200, 0x59, 0x1404, 0x1404, 0x404 , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 44 |
||
| 985 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 45 |
||
| 986 | {"vperm2i128",0x1C , 0x1FB200,0x59 , 0x1506, 0x1506, 0x506 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 3A 46 |
||
| 987 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 47 |
||
| 988 | {"vpermil2ps",0x1005, 0xFF200, 0x5C, 0x124B, 0x124B, 0x24B , 0x24B , 0 , 0x31 , 0 , 0 }, // 0F 3A 48 AMD XOP |
||
| 989 | {"vpermil2pd",0x1005, 0xFF200, 0x5C, 0x124C, 0x124C, 0x24C , 0x24C , 0 , 0x31 , 0 , 0 }, // 0F 3A 49 AMD XOP |
||
| 990 | {"vblendvps", 0x19 , 0xF8200, 0x5C , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 4A |
||
| 991 | {"vblendvpd", 0x19 , 0xF8200, 0x5C , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 4B |
||
| 992 | {"vpblendvb", 0x19 , 0xF8200, 0x5C , 0x1201, 0x1201, 0x201 , 0x201 , 0 , 0 , 0 , 0 }, // 0F 3A 4C |
||
| 993 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 4D |
||
| 994 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 4E |
||
| 995 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 4F |
||
| 996 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 997 | {"vrangep", 0x20 ,0x8EB200, 0x59, 0x124F, 0x124F, 0x24F , 0x31 , 0x23 , 0 , 0 , 1 }, // 0F 3A 50 |
||
| 998 | {"vranges", 0x20 ,0x8EB200, 0x59, 0x144F, 0x144F, 0x44F , 0x31 , 0x33 , 0 , 0 , 1 }, // 0F 3A 50 |
||
| 999 | {"vrndfxpntp",0x80 , 0x4B9200,0x52 , 0x124F, 0x24F , 0x11 , 0 , 0 , 0x1204, 0 , 0x101 }, // 0F 3A 52 |
||
| 1000 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 53 |
||
| 1001 | {"vfixupimmp",0x20 ,0x881200, 0x59 , 0x124F, 0x124F, 0x024F, 0x31 , 0x33 , 0 , 0 , 1 }, // 0F 3A 54 |
||
| 1002 | {"vfixupimms",0x20 ,0x8C1200, 0x59 , 0x104F, 0x104F, 0x004F, 0x31 , 0x32 , 0 , 0 , 1 }, // 0F 3A 55 |
||
| 1003 | {"vreducep", 0x20 ,0x86B200, 0x52 , 0x124F, 0x24f , 0 , 0x31 , 0x23 , 0 , 0 , 1 }, // 0F 3A 56 |
||
| 1004 | {"vreduces", 0x20 ,0x8EB200, 0x52 , 0x144F, 0x44f , 0 , 0x31 , 0x22 , 0 , 0 , 1 }, // 0F 3A 57 |
||
| 1005 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 58 |
||
| 1006 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 59 |
||
| 1007 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 5A |
||
| 1008 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 5B |
||
| 1009 | {"vfmaddsubps",0x1006,0xFF200,0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 5C |
||
| 1010 | {"vfmaddsubpd",0x1006,0xFF200,0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 5D |
||
| 1011 | {"vfmsubaddps",0x1006,0xFF200,0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 5E |
||
| 1012 | {"vfmsubaddpd",0x1006,0xFF200,0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 5F |
||
| 1013 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1014 | {"pcmpestrm", 0x16 , 0x18200, 0x52 , 0x1401, 0x451 , 0x31 , 0 , 0 , 0 , 0 , 0x202 }, // 0F 3A 60 |
||
| 1015 | {"pcmpestri", 0x16 , 0x18200, 0x52 , 0x1401, 0x451 , 0x31 , 0 , 0 , 0 , 0 , 0x202 }, // 0F 3A 61 |
||
| 1016 | {"pcmpistrm", 0x16 , 0x18200, 0x52 , 0x1401, 0x451 , 0x31 , 0 , 0 , 0 , 0 , 0x202 }, // 0F 3A 62 |
||
| 1017 | {"pcmpistri", 0x16 , 0x18200, 0x52 , 0x1401, 0x451 , 0x31 , 0 , 0 , 0 , 0 , 0x202 }, // 0F 3A 63 |
||
| 1018 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 64 |
||
| 1019 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 65 |
||
| 1020 | {"vfpclassp", 0x20 ,0x82B200, 0x52 , 0x95 , 0x24F , 0x31 , 0 , 0x10 , 0 , 0 , 1 }, // 0F 3A 66 |
||
| 1021 | {"vfpclasss", 0x20 ,0x82B200, 0x52 , 0x95 , 0x44F , 0x31 , 0 , 0x10 , 0 , 0 , 1 }, // 0F 3A 67 |
||
| 1022 | // 4-operand FMA instructions. First specified by Intel, then Intel changed their plans, now supported by AMD |
||
| 1023 | {"vfmaddps", 0x1006,0xFF200 , 0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 68 |
||
| 1024 | {"vfmaddpd", 0x1006,0xFF200 , 0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 69 |
||
| 1025 | {"vfmaddss", 0x1006,0xBF200 , 0x5C , 0x44B , 0x44B , 0x44B , 0x44B , 0 , 0 , 0 , 0 }, // 0F 3A 6A |
||
| 1026 | {"vfmaddsd", 0x1006,0xBF200 , 0x5C , 0x44C , 0x44C , 0x44C , 0x44C , 0 , 0 , 0 , 0 }, // 0F 3A 6B |
||
| 1027 | {"vfmsubps", 0x1006,0xFF200 , 0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 6C |
||
| 1028 | {"vfmsubpd", 0x1006,0xFF200 , 0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 6D |
||
| 1029 | {"vfmsubss", 0x1006,0xBF200 , 0x5C , 0x44B , 0x44B , 0x44B , 0x44B , 0 , 0 , 0 , 0 }, // 0F 3A 6E |
||
| 1030 | {"vfmsubsd", 0x1006,0xBF200 , 0x5C , 0x44C , 0x44C , 0x44C , 0x44C , 0 , 0 , 0 , 0 }, // 0F 3A 6F |
||
| 1031 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1032 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 70 |
||
| 1033 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 71 |
||
| 1034 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 72 |
||
| 1035 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 73 |
||
| 1036 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 74 |
||
| 1037 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 75 |
||
| 1038 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 76 |
||
| 1039 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 77 |
||
| 1040 | {"vfnmaddps", 0x1006,0xFF200 , 0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 78 |
||
| 1041 | {"vfnmaddpd", 0x1006,0xFF200 , 0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 79 |
||
| 1042 | {"vfnmaddss", 0x1006,0xBF200 , 0x5C , 0x44B , 0x44B , 0x44B , 0x44B , 0 , 0 , 0 , 0 }, // 0F 3A 7A |
||
| 1043 | {"vfnmaddsd", 0x1006,0xBF200 , 0x5C , 0x44C , 0x44C , 0x44C , 0x44C , 0 , 0 , 0 , 0 }, // 0F 3A 7B |
||
| 1044 | {"vfnmsubps", 0x1006,0xFF200 , 0x5C , 0x24B , 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 3A 7C |
||
| 1045 | {"vfnmsubpd", 0x1006,0xFF200 , 0x5C , 0x24C , 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 3A 7D |
||
| 1046 | {"vfnmsubss", 0x1006,0xBF200 , 0x5C , 0x44B , 0x44B , 0x44B , 0x44B , 0 , 0 , 0 , 0 }, // 0F 3A 7E |
||
| 1047 | {"vfnmsubsd", 0x1006,0xBF200 , 0x5C , 0x44C , 0x44C , 0x44C , 0x44C , 0 , 0 , 0 , 0 }, // 0F 3A 7F |
||
| 1048 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1049 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 80 |
||
| 1050 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 81 |
||
| 1051 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 82 |
||
| 1052 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 83 |
||
| 1053 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 84 |
||
| 1054 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 85 |
||
| 1055 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 86 |
||
| 1056 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 87 |
||
| 1057 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 88 |
||
| 1058 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 89 |
||
| 1059 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8A |
||
| 1060 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8B |
||
| 1061 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8C |
||
| 1062 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8D |
||
| 1063 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8E |
||
| 1064 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 8F |
||
| 1065 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1066 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 90 |
||
| 1067 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 91 |
||
| 1068 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 92 |
||
| 1069 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 93 |
||
| 1070 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 94 |
||
| 1071 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 95 |
||
| 1072 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 96 |
||
| 1073 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 97 |
||
| 1074 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 98 |
||
| 1075 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 99 |
||
| 1076 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9A |
||
| 1077 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9B |
||
| 1078 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9C |
||
| 1079 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9D |
||
| 1080 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9E |
||
| 1081 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 9F |
||
| 1082 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1083 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A0 |
||
| 1084 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A1 |
||
| 1085 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A2 |
||
| 1086 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A3 |
||
| 1087 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A4 |
||
| 1088 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A5 |
||
| 1089 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A6 |
||
| 1090 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A7 |
||
| 1091 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A8 |
||
| 1092 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A A9 |
||
| 1093 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AA |
||
| 1094 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AB |
||
| 1095 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AC |
||
| 1096 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AD |
||
| 1097 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AE |
||
| 1098 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A AF |
||
| 1099 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1100 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B0 |
||
| 1101 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B1 |
||
| 1102 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B2 |
||
| 1103 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B3 |
||
| 1104 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B4 |
||
| 1105 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B5 |
||
| 1106 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B6 |
||
| 1107 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B7 |
||
| 1108 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B8 |
||
| 1109 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A B9 |
||
| 1110 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BA |
||
| 1111 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BB |
||
| 1112 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BC |
||
| 1113 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BD |
||
| 1114 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BE |
||
| 1115 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A BF |
||
| 1116 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1117 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C0 |
||
| 1118 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C1 |
||
| 1119 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C2 |
||
| 1120 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C3 |
||
| 1121 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C4 |
||
| 1122 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C5 |
||
| 1123 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C6 |
||
| 1124 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C7 |
||
| 1125 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C8 |
||
| 1126 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A C9 |
||
| 1127 | {0, 0xB4 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 3A CA. Link to vcvtfxpntpd2udq etc |
||
| 1128 | {0, 0xB5 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 3A CB. Link to vcvtfxpntdq2ps etc |
||
| 1129 | {"sha1rnds4", 0x22 , 0 , 0x52 , 0x1403, 0x0403, 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A CC |
||
| 1130 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A CD |
||
| 1131 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A CE |
||
| 1132 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A CF |
||
| 1133 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1134 | {"(reserved)",0x00 ,0x4D2E00, 0x4052, 0x609 , 0x609 , 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D0 |
||
| 1135 | {"(reserved)",0x00 ,0x4D2E00, 0x4052, 0x609 , 0x609 , 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 D1 |
||
| 1136 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D2 |
||
| 1137 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D3 |
||
| 1138 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D4 |
||
| 1139 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D5 |
||
| 1140 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D6 |
||
| 1141 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D7 |
||
| 1142 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D8 |
||
| 1143 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A D9 |
||
| 1144 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A DA |
||
| 1145 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A DB |
||
| 1146 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A DC |
||
| 1147 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A DD |
||
| 1148 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A DE |
||
| 1149 | {"aeskeygenassist",0x17,0x18200 , 0x52, 0x1101, 0x101 , 0x31 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 3A DF |
||
| 1150 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1151 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E0 |
||
| 1152 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E1 |
||
| 1153 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E2 |
||
| 1154 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E3 |
||
| 1155 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E4 |
||
| 1156 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E5 |
||
| 1157 | {"vcvtfxpntpd2dq",0x80 ,0x42B800, 0x52, 0x1603, 0x64C , 0x31 , 0 , 0 , 0x1205, 0 , 0x100 }, // 0F 3A E6 |
||
| 1158 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E7 |
||
| 1159 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E8 |
||
| 1160 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A E9 |
||
| 1161 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A EA |
||
| 1162 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A EB |
||
| 1163 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A EC |
||
| 1164 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A ED |
||
| 1165 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A EE |
||
| 1166 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A EF |
||
| 1167 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1168 | {0, 0xA4 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F 3A F0. Link to rorx |
||
| 1169 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F1 |
||
| 1170 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F2 |
||
| 1171 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F3 |
||
| 1172 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F4 |
||
| 1173 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F5 |
||
| 1174 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F6 |
||
| 1175 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F7 |
||
| 1176 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F8 |
||
| 1177 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F9 |
||
| 1178 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A FA |
||
| 1179 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A FB |
||
| 1180 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A FC |
||
| 1181 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A FD |
||
| 1182 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A FE |
||
| 1183 | {0, 0 , 0 , 0x2052, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 3A FF |
||
| 1184 | |||
| 1185 | |||
| 1186 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 3B |
||
| 1187 | // Reserved by Intel for future extensions, but never used |
||
| 1188 | SOpcodeDef OpcodeMap5[1] = { |
||
| 1189 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1190 | {0, 0 , 0 , 0x2000, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 3B 00 |
||
| 1191 | |||
| 1192 | |||
| 1193 | // Tertiary opcode map for AMD 3DNow instructions (obsolete). First two bytes = 0F 0F |
||
| 1194 | // Indexed by immediate byte following operands |
||
| 1195 | SOpcodeDef OpcodeMap6[] = { |
||
| 1196 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1197 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 00 |
||
| 1198 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 01 |
||
| 1199 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 02 |
||
| 1200 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 03 |
||
| 1201 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 04 |
||
| 1202 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 05 |
||
| 1203 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 06 |
||
| 1204 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 07 |
||
| 1205 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 08 |
||
| 1206 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 09 |
||
| 1207 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0A |
||
| 1208 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0B |
||
| 1209 | {"PFI2FW", 0x1001, 0 , 0x52 , 0x134B, 0x302 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0C |
||
| 1210 | {"PI2FD", 0x1001, 0 , 0x52 , 0x134B, 0x303 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0D |
||
| 1211 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0E |
||
| 1212 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 0F |
||
| 1213 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1214 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 10 |
||
| 1215 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 11 |
||
| 1216 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 12 |
||
| 1217 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 13 |
||
| 1218 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 14 |
||
| 1219 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 15 |
||
| 1220 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 16 |
||
| 1221 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 17 |
||
| 1222 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 18 |
||
| 1223 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 19 |
||
| 1224 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1A |
||
| 1225 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1B |
||
| 1226 | {"PF2IW", 0x1002, 0 , 0x52 , 0x1302, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1C |
||
| 1227 | {"PF2ID", 0x1001, 0 , 0x52 , 0x1303, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1D |
||
| 1228 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1E |
||
| 1229 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 1F |
||
| 1230 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1231 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 20 |
||
| 1232 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 21 |
||
| 1233 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 22 |
||
| 1234 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 23 |
||
| 1235 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 24 |
||
| 1236 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 25 |
||
| 1237 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 26 |
||
| 1238 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 27 |
||
| 1239 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 28 |
||
| 1240 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 29 |
||
| 1241 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2A |
||
| 1242 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2B |
||
| 1243 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2C |
||
| 1244 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2D |
||
| 1245 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2E |
||
| 1246 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 2F |
||
| 1247 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1248 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 30 |
||
| 1249 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 31 |
||
| 1250 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 32 |
||
| 1251 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 33 |
||
| 1252 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 34 |
||
| 1253 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 35 |
||
| 1254 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 36 |
||
| 1255 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 37 |
||
| 1256 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 38 |
||
| 1257 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 39 |
||
| 1258 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3A |
||
| 1259 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3B |
||
| 1260 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3C |
||
| 1261 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3D |
||
| 1262 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3E |
||
| 1263 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 3F |
||
| 1264 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1265 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 40 |
||
| 1266 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 41 |
||
| 1267 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 42 |
||
| 1268 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 43 |
||
| 1269 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 44 |
||
| 1270 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 45 |
||
| 1271 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 46 |
||
| 1272 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 47 |
||
| 1273 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 48 |
||
| 1274 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 49 |
||
| 1275 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4A |
||
| 1276 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4B |
||
| 1277 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4C |
||
| 1278 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4D |
||
| 1279 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4E |
||
| 1280 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 4F |
||
| 1281 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1282 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 50 |
||
| 1283 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 51 |
||
| 1284 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 52 |
||
| 1285 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 53 |
||
| 1286 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 54 |
||
| 1287 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 55 |
||
| 1288 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 56 |
||
| 1289 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 57 |
||
| 1290 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 58 |
||
| 1291 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 59 |
||
| 1292 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5A |
||
| 1293 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5B |
||
| 1294 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5C |
||
| 1295 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5D |
||
| 1296 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5E |
||
| 1297 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 5F |
||
| 1298 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1299 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 60 |
||
| 1300 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 61 |
||
| 1301 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 62 |
||
| 1302 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 63 |
||
| 1303 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 64 |
||
| 1304 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 65 |
||
| 1305 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 66 |
||
| 1306 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 67 |
||
| 1307 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 68 |
||
| 1308 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 69 |
||
| 1309 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6A |
||
| 1310 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6B |
||
| 1311 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6C |
||
| 1312 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6D |
||
| 1313 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6E |
||
| 1314 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 6F |
||
| 1315 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1316 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 70 |
||
| 1317 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 71 |
||
| 1318 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 72 |
||
| 1319 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 73 |
||
| 1320 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 74 |
||
| 1321 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 75 |
||
| 1322 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 76 |
||
| 1323 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 77 |
||
| 1324 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 78 |
||
| 1325 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 79 |
||
| 1326 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7A |
||
| 1327 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7B |
||
| 1328 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7C |
||
| 1329 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7D |
||
| 1330 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7E |
||
| 1331 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 7F |
||
| 1332 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1333 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 80 |
||
| 1334 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 81 |
||
| 1335 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 82 |
||
| 1336 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 83 |
||
| 1337 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 84 |
||
| 1338 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 85 |
||
| 1339 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 86 |
||
| 1340 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 87 |
||
| 1341 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 88 |
||
| 1342 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 89 |
||
| 1343 | {"PFNACC", 0x1002, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8A |
||
| 1344 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8B |
||
| 1345 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8C |
||
| 1346 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8D |
||
| 1347 | {"PFPNACC", 0x1002, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8E |
||
| 1348 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 8F |
||
| 1349 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1350 | {"PFCMPGE", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 90 |
||
| 1351 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 91 |
||
| 1352 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 92 |
||
| 1353 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 93 |
||
| 1354 | {"PFMIN", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 94 |
||
| 1355 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 95 |
||
| 1356 | {"PFRCP", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 96 |
||
| 1357 | {"PFRSQRT", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 97 |
||
| 1358 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 98 |
||
| 1359 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 99 |
||
| 1360 | {"PFSUB", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9A |
||
| 1361 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9B |
||
| 1362 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9C |
||
| 1363 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9D |
||
| 1364 | {"PFADD", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9E |
||
| 1365 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op 9F |
||
| 1366 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1367 | {"PFCMPGT", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A0 |
||
| 1368 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A1 |
||
| 1369 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A2 |
||
| 1370 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A3 |
||
| 1371 | {"PFMAX", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A4 |
||
| 1372 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A5 |
||
| 1373 | {"PFRCPIT1", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A6 |
||
| 1374 | {"PFRSQIT1", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A7 |
||
| 1375 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A8 |
||
| 1376 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op A9 |
||
| 1377 | {"PFSUBR", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AA |
||
| 1378 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AB |
||
| 1379 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AC |
||
| 1380 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AD |
||
| 1381 | {"PFACC", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AE |
||
| 1382 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op AF |
||
| 1383 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1384 | {"PFCMPEQ", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B0 |
||
| 1385 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B1 |
||
| 1386 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B2 |
||
| 1387 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B3 |
||
| 1388 | {"PFMUL", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B4 |
||
| 1389 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B5 |
||
| 1390 | {"PFRCPIT2", 0x1001, 0 , 0x52 , 0x134B, 0x34B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B6 |
||
| 1391 | {"PMULHRW", 0x1001, 0 , 0x52 , 0x1302, 0x302 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B7 |
||
| 1392 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B8 |
||
| 1393 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op B9 |
||
| 1394 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BA |
||
| 1395 | {"PSWAPD", 0x1002, 0 , 0x52 , 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BB |
||
| 1396 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BC |
||
| 1397 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BD |
||
| 1398 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BE |
||
| 1399 | {"PAVGUSB", 0x1001, 0 , 0x52 , 0x1301, 0x301 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0F op BF |
||
| 1400 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1401 | {0, 0x1001, 0 , 0x2052, 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 0F op C0 |
||
| 1402 | |||
| 1403 | // Opcode map for crc32. Opcode byte = 0F 38 F1 |
||
| 1404 | // Indexed by operand size (16, 32, 64) |
||
| 1405 | SOpcodeDef OpcodeMap7[3] = { |
||
| 1406 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1407 | {"crc32", 0x16 ,0x19900 , 0x12 , 0x1003, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F1 |
||
| 1408 | {"crc32", 0x16 ,0x19900 , 0x12 , 0x1003, 0x3 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F1 |
||
| 1409 | {"crc32", 0x16 ,0x19900 , 0x12 , 0x1004, 0x4 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 38 F1 |
||
| 1410 | |||
| 1411 | // Secondary opcode map for x87 f.p. instructions. Opcode D8 |
||
| 1412 | // Indexed by reg bits and mod == 3 |
||
| 1413 | SOpcodeDef OpcodeMap8[16] = { |
||
| 1414 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1415 | {"fadd", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fadd m32 |
||
| 1416 | {"fmul", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fmul m32 |
||
| 1417 | {"fcom", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcom m32 |
||
| 1418 | {"fcomp", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcomp m32 |
||
| 1419 | {"fsub", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fsub m32 |
||
| 1420 | {"fsubr", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fsubr m32 |
||
| 1421 | {"fdiv", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fdiv m32 |
||
| 1422 | {"fdivr", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fdivr m32 |
||
| 1423 | {"fadd", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fadd st,st(i) |
||
| 1424 | {"fmul", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fmul st,st(i) |
||
| 1425 | {"fcom", 0x100 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcom st,st(i) |
||
| 1426 | {"fcomp", 0x100 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcomp st,st(i) |
||
| 1427 | {"fsub", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fsub st,st(i) |
||
| 1428 | {"fsubr", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fsubr st,st(i) |
||
| 1429 | {"fdiv", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fdiv st,st(i) |
||
| 1430 | {"fdivr", 0x100 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }}; // fdivr st,st(i) |
||
| 1431 | |||
| 1432 | // Secondary opcode map for x87 f.p. instructions. Opcode D9 |
||
| 1433 | // Indexed by reg bits and mod == 3 |
||
| 1434 | SOpcodeDef OpcodeMap9[16] = { |
||
| 1435 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1436 | {"fld", 0x100 , 0 , 0x11 , 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // fld m32 |
||
| 1437 | {0, 0 , 0 , 0x4011, 0 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1438 | {"fst", 0x100 , 0 , 0x11 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fst m32 |
||
| 1439 | {"fstp", 0x100 , 0 , 0x11 , 0x2043, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fstp m32 |
||
| 1440 | {"fldenv", 0x100 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // fldenv m |
||
| 1441 | {"fldcw", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fldcw m16 |
||
| 1442 | {"fnstenv", 0x100 , 0 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fnstenv m |
||
| 1443 | {"fnstcw", 0x100 , 0 , 0x11 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fnstcw m16 |
||
| 1444 | {"fld", 0x100 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fld st(i) |
||
| 1445 | {"fxch", 0x100 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fxch st(i) |
||
| 1446 | {"fnop", 0x10 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x10 fnop |
||
| 1447 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1448 | {0, 0x11 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x11 fchs etc. |
||
| 1449 | {0, 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x12 fld1 etc. |
||
| 1450 | {0, 0x13 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x13 f2xm1 etc. |
||
| 1451 | {0, 0x14 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }}; // Link to tertiary map 0x14 fprem etc. |
||
| 1452 | |||
| 1453 | // Secondary opcode map for x87 f.p. instructions. Opcode DA |
||
| 1454 | // Indexed by reg bits and mod == 3 |
||
| 1455 | SOpcodeDef OpcodeMapA[16] = { |
||
| 1456 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1457 | {"fiadd", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fiadd m32 |
||
| 1458 | {"fimul", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fimul m32 |
||
| 1459 | {"ficom", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0x4 }, // ficom m32 |
||
| 1460 | {"ficomp", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0x4 }, // ficomp m32 |
||
| 1461 | {"fisub", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fisub m32 |
||
| 1462 | {"fisubr", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fisubr m32 |
||
| 1463 | {"fidiv", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fidiv m32 |
||
| 1464 | {"fidivr", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fidivr m32 |
||
| 1465 | {"fcmovb", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovb st,st(i) |
||
| 1466 | {"fcmove", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovb st,st(i) |
||
| 1467 | {"fcmovbe", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovbe st,st(i) |
||
| 1468 | {"fcmovu", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovbe st,st(i) |
||
| 1469 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1470 | {0, 0x15 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x15 fucompp |
||
| 1471 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1472 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 1473 | |||
| 1474 | // Secondary opcode map for x87 f.p. instructions. Opcode DB |
||
| 1475 | // Indexed by reg bits and mod == 3 |
||
| 1476 | SOpcodeDef OpcodeMapB[16] = { |
||
| 1477 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1478 | {"fild", 0x100 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fild m32 |
||
| 1479 | {"fisttp", 0x13 , 0 , 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // fisttp m32 |
||
| 1480 | {"fist", 0x100 , 0 , 0x11 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fist m32 |
||
| 1481 | {"fistp", 0x100 , 0 , 0x11 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fistp m32 |
||
| 1482 | {0, 0 , 0 , 0x4011, 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1483 | {"fld", 0x100 , 0 , 0x11 , 0 , 0x2045, 0 , 0 , 0 , 0 , 0 , 0 }, // fld m80 |
||
| 1484 | {0, 0 , 0 , 0x4011, 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1485 | {"fstp", 0x100 , 0 , 0x11 , 0x2045, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fst m80 |
||
| 1486 | {"fcmovnb", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovnb st,st(i) |
||
| 1487 | {"fcmovne", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovne st,st(i) |
||
| 1488 | {"fcmovnbe", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovnbe st,st(i) |
||
| 1489 | {"fcmovnu", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fcmovnu st,st(i) |
||
| 1490 | {0, 0x16 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x16 fclex etc. |
||
| 1491 | {"fucomi", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fucomi st,st(i) |
||
| 1492 | {"fcomi", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcomi st,st(i) |
||
| 1493 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1494 | |||
| 1495 | // Secondary opcode map for x87 f.p. instructions. Opcode DC |
||
| 1496 | // Indexed by reg bits and mod == 3 |
||
| 1497 | SOpcodeDef OpcodeMapC[16] = { |
||
| 1498 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1499 | {"fadd", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fadd m64 |
||
| 1500 | {"fmul", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fmul m64 |
||
| 1501 | {"fcom", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcom m64 |
||
| 1502 | {"fcomp", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcomp m64 |
||
| 1503 | {"fsub", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fsub m64 |
||
| 1504 | {"fsubr", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fsubr m64 |
||
| 1505 | {"fdiv", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fdiv m64 |
||
| 1506 | {"fdivr", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fdivr m64 |
||
| 1507 | {"fadd", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fadd st(i),st |
||
| 1508 | {"fmul", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fmul st(i),st |
||
| 1509 | {0, 0 , 0 , 0x4011, 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1510 | {0, 0 , 0 , 0x4011, 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1511 | {"fsubr", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fsubr st(i),st |
||
| 1512 | {"fsub", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fsub st(i),st |
||
| 1513 | {"fdivr", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fdivr st(i),st |
||
| 1514 | {"fdiv", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }}; // fdiv st(i),st |
||
| 1515 | |||
| 1516 | // Secondary opcode map for x87 f.p. instructions. Opcode DD |
||
| 1517 | // Indexed by reg bits and mod == 3 |
||
| 1518 | SOpcodeDef OpcodeMapD[16] = { |
||
| 1519 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1520 | {"fld", 0x100 , 0 , 0x11 , 0 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 }, // fld m64 |
||
| 1521 | {"fisttp", 0x13 , 0 , 0x11 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fisttp m64 |
||
| 1522 | {"fst", 0x100 , 0 , 0x11 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fst m64 |
||
| 1523 | {"fstp", 0x100 , 0 , 0x11 , 0x2044, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fstp m64 |
||
| 1524 | {"frstor", 0x100 , 0 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // frstor 108 bytes |
||
| 1525 | {0, 0 , 0 , 0x4011, 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1526 | {"fnsave", 0x100 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // fnsave 108 bytes |
||
| 1527 | {"fnstsw", 0x100 , 0 , 0x11 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fstsw m16 |
||
| 1528 | {"ffree", 0x100 , 0 , 0x11 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // ffree st(i) |
||
| 1529 | {0, 0 , 0 , 0x4011, 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1530 | {"fst", 0x100 , 0 , 0x11 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fst st(i) |
||
| 1531 | {"fstp", 0x100 , 0 , 0x11 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fstp st(i) |
||
| 1532 | {"fucom", 0x101 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fucom st(i) |
||
| 1533 | {"fucomp", 0x101 , 0 , 0x11 , 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // fucomp st(i) |
||
| 1534 | {0, 0 , 0 , 0x4011, 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1535 | {0, 0 , 0 , 0x4011, 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1536 | |||
| 1537 | // Secondary opcode map for x87 f.p. instructions. Opcode DE |
||
| 1538 | // Indexed by reg bits and mod == 3 |
||
| 1539 | SOpcodeDef OpcodeMapE[16] = { |
||
| 1540 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1541 | {"fiadd", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fiadd m16 |
||
| 1542 | {"fimul", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fimul m16 |
||
| 1543 | {"ficom", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0x4 }, // ficom m16 |
||
| 1544 | {"ficomp", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0x4 }, // ficomp m16 |
||
| 1545 | {"fisub", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fisub m16 |
||
| 1546 | {"fisubr", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fisubr m16 |
||
| 1547 | {"fidiv", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fidiv m16 |
||
| 1548 | {"fidivr", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fidivr m16 |
||
| 1549 | {"faddp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // faddp st(i),st |
||
| 1550 | {"fmulp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fmulp st(i),st |
||
| 1551 | {0, 0 , 0 , 0x4011, 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1552 | {0, 0x17 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x17 fcompp |
||
| 1553 | {"fsubrp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fsubrp st(i),st (Yes, the order is illogical here) |
||
| 1554 | {"fsubp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fsubp st(i),st |
||
| 1555 | {"fdivrp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }, // fdivrp st(i),st |
||
| 1556 | {"fdivp", 0x100 , 0 , 0x11 , 0x1040, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 }}; // fdivp st(i),st |
||
| 1557 | |||
| 1558 | // Secondary opcode map for x87 f.p. instructions. Opcode DF |
||
| 1559 | // Indexed by reg bits and mod == 3 |
||
| 1560 | SOpcodeDef OpcodeMapF[16] = { |
||
| 1561 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1562 | {"fild", 0x100 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fild m16 |
||
| 1563 | {"fisttp", 0x13 , 0 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // fisttp m16 |
||
| 1564 | {"fist", 0x100 , 0 , 0x11 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fist m16 |
||
| 1565 | {"fistp", 0x100 , 0 , 0x11 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fistp m16 |
||
| 1566 | {"fbld", 0x100 , 0 , 0x11 , 0 , 0x2005, 0 , 0 , 0 , 0 , 0 , 0 }, // fbld m80 |
||
| 1567 | {"fild", 0x100 , 0 , 0x11 , 0 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 }, // fild m64 |
||
| 1568 | {"fbstp", 0x100 , 0 , 0x11 , 0x2005, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fbstp m80 |
||
| 1569 | {"fistp", 0x100 , 0 , 0x11 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fistp m64 |
||
| 1570 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1571 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1572 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1573 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1574 | {0, 0x18 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x5 , 0 }, // Link to tertiary map 0x18 fnstsw ax |
||
| 1575 | {"fucomip", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fucomp st,st(i) |
||
| 1576 | {"fcomip", 0x6 , 0 , 0x11 , 0xAF , 0x1040, 0 , 0 , 0 , 0 , 0 , 0x4 }, // fcomp st,st(i) |
||
| 1577 | {0, 0 , 0 , 0x4011, 0 , 0x1040, 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1578 | |||
| 1579 | // Tertiary opcode map for f.p. D9 / reg = 010 |
||
| 1580 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1581 | SOpcodeDef OpcodeMap10[2] = { |
||
| 1582 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1583 | {"fnop", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // fnop |
||
| 1584 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // the rest is illegal |
||
| 1585 | |||
| 1586 | // Tertiary opcode map for f.p. D9 / reg = 100 |
||
| 1587 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1588 | SOpcodeDef OpcodeMap11[8] = { |
||
| 1589 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1590 | {"fchs", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fchs |
||
| 1591 | {"fabs", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fabs |
||
| 1592 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1593 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1594 | {"ftst", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // ftst |
||
| 1595 | {"fxam", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fxam |
||
| 1596 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1597 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1598 | |||
| 1599 | // Tertiary opcode map for f.p. D9 / reg = 101 |
||
| 1600 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1601 | SOpcodeDef OpcodeMap12[8] = { |
||
| 1602 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1603 | {"fld1", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // fld1 |
||
| 1604 | {"fldl2t", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1605 | {"fldl2e", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1606 | {"fldpi", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1607 | {"fldlg2", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1608 | {"fldln2", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1609 | {"fldz", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1610 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1611 | |||
| 1612 | // Tertiary opcode map for f.p. D9 / reg = 110 |
||
| 1613 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1614 | SOpcodeDef OpcodeMap13[8] = { |
||
| 1615 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1616 | {"f2xm1", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // f2xm1 |
||
| 1617 | {"fyl2x", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1618 | {"fptan", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1619 | {"fpatan", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1620 | {"fxtract", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1621 | {"fprem1", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1622 | {"fdecstp", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1623 | {"fincstp", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 1624 | |||
| 1625 | // Tertiary opcode map for f.p. D9 / reg = 111 |
||
| 1626 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1627 | SOpcodeDef OpcodeMap14[8] = { |
||
| 1628 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1629 | {"fprem", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1630 | {"fyl2xp1", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1631 | {"fsqrt", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1632 | {"fsincos", 0x101 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1633 | {"frndint", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1634 | {"fscale", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1635 | {"fsin", 0x101 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1636 | {"fcos", 0x101 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 1637 | |||
| 1638 | // Tertiary opcode map for f.p. DA / reg = 101 |
||
| 1639 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1640 | SOpcodeDef OpcodeMap15[3] = { |
||
| 1641 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1642 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1643 | {"fucompp", 0x101 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1644 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1645 | |||
| 1646 | // Tertiary opcode map for f.p. DB / reg = 100 |
||
| 1647 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1648 | SOpcodeDef OpcodeMap16[5] = { |
||
| 1649 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1650 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1651 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1652 | {"fnclex", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1653 | {"fninit", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // |
||
| 1654 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1655 | |||
| 1656 | // Tertiary opcode map for f.p. DE / reg = 011 |
||
| 1657 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1658 | SOpcodeDef OpcodeMap17[3] = { |
||
| 1659 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1660 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1661 | {"fcompp", 0x100 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // |
||
| 1662 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1663 | |||
| 1664 | // Tertiary opcode map for f.p. DF / reg = 100 |
||
| 1665 | // Indexed by rm bits of mod/reg/rm byte |
||
| 1666 | SOpcodeDef OpcodeMap18[2] = { |
||
| 1667 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1668 | {"fnstsw", 0x100 , 0 , 0x10 , 0xA2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1669 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1670 | |||
| 1671 | // Secondary opcode map for IRET. Opcode byte = 0xCF |
||
| 1672 | // Indexed by operand size |
||
| 1673 | SOpcodeDef OpcodeMap19[3] = { |
||
| 1674 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1675 | {"iret", 0 , 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // CF |
||
| 1676 | {"iretd", 0 , 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }, // CF |
||
| 1677 | {"iretq", 0 , 0x1102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x10 }}; // CF |
||
| 1678 | |||
| 1679 | // Secondary opcode map for immediate group 1. Opcode byte = 0x80 |
||
| 1680 | // Indexed by reg bits = 0 - 7 |
||
| 1681 | SOpcodeDef OpcodeMap1A[8] = { |
||
| 1682 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1683 | {"add", 0 , 0x10 , 0x51 , 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /0 |
||
| 1684 | {"or", 0 , 0x10 , 0x51 , 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /1 |
||
| 1685 | {"adc", 0 , 0x10 , 0x51 , 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /2 |
||
| 1686 | {"sbb", 0 , 0x10 , 0x51 , 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /3 |
||
| 1687 | {"and", 0 , 0x10 , 0x51 , 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /4 |
||
| 1688 | {"sub", 0 , 0x10 , 0x51 , 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /5 |
||
| 1689 | {"xor", 0 , 0x10 , 0x51 , 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 80 /6 |
||
| 1690 | {"cmp", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x4 }}; // 80 /7 |
||
| 1691 | |||
| 1692 | // Secondary opcode map for immediate group 1. Opcode byte = 0x81 |
||
| 1693 | // Indexed by reg bits = 0 - 7 |
||
| 1694 | SOpcodeDef OpcodeMap1B[8] = { |
||
| 1695 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1696 | {"add", 0 , 0x1110 , 0x91 , 0x9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /0 |
||
| 1697 | {"or", 0 , 0x1110 , 0x91 , 0x9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /1 |
||
| 1698 | {"adc", 0 , 0x1110 , 0x91 , 0x9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /2 |
||
| 1699 | {"sbb", 0 , 0x1110 , 0x91 , 0x9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /3 |
||
| 1700 | {"and", 0 , 0x1110 , 0x91 , 0x9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /4 |
||
| 1701 | {"sub", 0 , 0x1110 , 0x91 , 0x9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /5 |
||
| 1702 | {"xor", 0 , 0x1110 , 0x91 , 0x9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // 81 /6 |
||
| 1703 | {"cmp", 0 , 0x1100 , 0x91 , 0x9 , 0x28 , 0 , 0 , 0 , 0 , 0 , 0x84 }}; // 81 /7 |
||
| 1704 | |||
| 1705 | // Secondary opcode map for immediate group 1. Opcode byte = 0x82. |
||
| 1706 | // Undocumented opcode. Signed byte instructions do the same as unsigned byte instructions at 0x80 |
||
| 1707 | SOpcodeDef OpcodeMap1C[8] = { |
||
| 1708 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1709 | {"add", 0x8000, 0x10 , 0x4051, 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /0 |
||
| 1710 | {"or", 0x8000, 0x10 , 0x4051, 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /1 |
||
| 1711 | {"adc", 0x8000, 0x10 , 0x4051, 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /2 |
||
| 1712 | {"sbb", 0x8000, 0x10 , 0x4051, 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /3 |
||
| 1713 | {"and", 0x8000, 0x10 , 0x4051, 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /4 |
||
| 1714 | {"sub", 0x8000, 0x10 , 0x4051, 0x1 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /5 |
||
| 1715 | {"xor", 0x8000, 0x10 , 0x4051, 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 82 /6 |
||
| 1716 | {"cmp", 0x8000, 0 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x4 }}; // 82 /7 |
||
| 1717 | |||
| 1718 | // Secondary opcode map for immediate group 1. Opcode byte = 0x83 |
||
| 1719 | // Indexed by reg bits = 0 - 7 |
||
| 1720 | SOpcodeDef OpcodeMap1D[8] = { |
||
| 1721 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1722 | {"add", 0 , 0x1110 , 0x51 , 0x9 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /0 |
||
| 1723 | {"or", 0 , 0x1110 , 0x51 , 0x9 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /1 |
||
| 1724 | {"adc", 0 , 0x1110 , 0x51 , 0x9 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /2 |
||
| 1725 | {"sbb", 0 , 0x1110 , 0x51 , 0x9 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /3 |
||
| 1726 | {"and", 0 , 0x1110 , 0x51 , 0x9 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /4 |
||
| 1727 | {"sub", 0 , 0x1110 , 0x51 , 0x9 , 0x21 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /5 |
||
| 1728 | {"xor", 0 , 0x1110 , 0x51 , 0x9 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }, // 83 /6 |
||
| 1729 | {"cmp", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0x4 }}; // 83 /7 |
||
| 1730 | |||
| 1731 | // Secondary opcode map for shift group 2. Opcode byte = 0xC0 |
||
| 1732 | // Indexed by reg bits = 0 - 7. |
||
| 1733 | SOpcodeDef OpcodeMap1E[8] = { |
||
| 1734 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1735 | {"rol", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /0 rol byte ptr r/m,ib |
||
| 1736 | {"ror", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /1 |
||
| 1737 | {"rcl", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /2 |
||
| 1738 | {"rcr", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /3 |
||
| 1739 | {"shl", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /4 |
||
| 1740 | {"shr", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /5 |
||
| 1741 | {"sal", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C0 /6 |
||
| 1742 | {"sar", 0 , 0 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C0 /7 |
||
| 1743 | |||
| 1744 | // Secondary opcode map for shift group 2. Opcode byte = 0xC1 |
||
| 1745 | // Indexed by reg bits = 0 - 7. |
||
| 1746 | SOpcodeDef OpcodeMap1F[8] = { |
||
| 1747 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1748 | {"rol", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /0 rol word ptr r/m,ib |
||
| 1749 | {"ror", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /1 |
||
| 1750 | {"rcl", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /2 |
||
| 1751 | {"rcr", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /3 |
||
| 1752 | {"shl", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /4 |
||
| 1753 | {"shr", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /5 |
||
| 1754 | {"sal", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C1 /6 |
||
| 1755 | {"sar", 0 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C1 /7 |
||
| 1756 | |||
| 1757 | // Secondary opcode map for shift group 2. Opcode byte = 0xD0 |
||
| 1758 | // Indexed by reg bits = 0 - 7. |
||
| 1759 | SOpcodeDef OpcodeMap20[8] = { |
||
| 1760 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1761 | {"rol", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /0 rol byte ptr r/m,1 |
||
| 1762 | {"ror", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /1 |
||
| 1763 | {"rcl", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /2 |
||
| 1764 | {"rcr", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /3 |
||
| 1765 | {"shl", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /4 |
||
| 1766 | {"shr", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /5 |
||
| 1767 | {"sal", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /6 |
||
| 1768 | {"sar", 0 , 0 , 0x11 , 0x1 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C2 /7 |
||
| 1769 | |||
| 1770 | // Secondary opcode map for shift group 2. Opcode byte = 0xD1 |
||
| 1771 | // Indexed by reg bits = 0 - 7. |
||
| 1772 | SOpcodeDef OpcodeMap21[8] = { |
||
| 1773 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1774 | {"rol", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /0 rol word ptr r/m,1 |
||
| 1775 | {"ror", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /1 |
||
| 1776 | {"rcl", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /2 |
||
| 1777 | {"rcr", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /3 |
||
| 1778 | {"shl", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /4 |
||
| 1779 | {"shr", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /5 |
||
| 1780 | {"sal", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /6 |
||
| 1781 | {"sar", 0 , 0x1100 , 0x11 , 0x9 , 0xB1 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C3 /7 |
||
| 1782 | |||
| 1783 | // Secondary opcode map for shift group 2. Opcode byte = 0xD2 |
||
| 1784 | // Indexed by reg bits = 0 - 7. |
||
| 1785 | SOpcodeDef OpcodeMap22[8] = { |
||
| 1786 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1787 | {"rol", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /0 rol byte ptr r/m,cl |
||
| 1788 | {"ror", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /1 |
||
| 1789 | {"rcl", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /2 |
||
| 1790 | {"rcr", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /3 |
||
| 1791 | {"shl", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /4 |
||
| 1792 | {"shr", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /5 |
||
| 1793 | {"sal", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C2 /6 |
||
| 1794 | {"sar", 0 , 0 , 0x11 , 0x1 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C2 /7 |
||
| 1795 | |||
| 1796 | // Secondary opcode map for shift group 2. Opcode byte = 0xD3 |
||
| 1797 | // Indexed by reg bits = 0 - 7. |
||
| 1798 | SOpcodeDef OpcodeMap23[8] = { |
||
| 1799 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1800 | {"rol", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /0 rol word ptr r/m,cl |
||
| 1801 | {"ror", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /1 |
||
| 1802 | {"rcl", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /2 |
||
| 1803 | {"rcr", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /3 |
||
| 1804 | {"shl", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /4 |
||
| 1805 | {"shr", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /5 |
||
| 1806 | {"sal", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }, // C3 /6 |
||
| 1807 | {"sar", 0 , 0x1100 , 0x11 , 0x9 , 0xB3 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C3 /7 |
||
| 1808 | |||
| 1809 | // Secondary opcode map for group 3. Opcode byte = 0xF6 |
||
| 1810 | // Indexed by reg bits = 0 - 7. |
||
| 1811 | SOpcodeDef OpcodeMap24[8] = { |
||
| 1812 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1813 | {"test", 0 , 0 , 0x51 , 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // test rm8,ib |
||
| 1814 | {"test", 0 , 0 , 0x4051, 0x1 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // test rm8,ib. undocumented |
||
| 1815 | {"not", 0 , 0x1C50 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // not rm8 |
||
| 1816 | {"neg", 0 , 0x1C50 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // neg rm8 |
||
| 1817 | {"mul", 0 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // mul rm8 |
||
| 1818 | {"imul", 0 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // imul rm8 |
||
| 1819 | {"div", 0 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // div rm8 |
||
| 1820 | {"idiv", 0 , 0 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // idiv rm8 |
||
| 1821 | |||
| 1822 | // Secondary opcode map for group 3. Opcode byte = 0xF7 |
||
| 1823 | // Indexed by reg bits = 0 - 7. |
||
| 1824 | SOpcodeDef OpcodeMap25[8] = { |
||
| 1825 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1826 | {"test", 0 , 0x1100 , 0x91 , 0x9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // test rm,i |
||
| 1827 | {"test", 0 , 0x1100 , 0x4091, 0x9 , 0x39 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // test rm,i. undocumented |
||
| 1828 | {"not", 0 , 0x1D50 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // not rm |
||
| 1829 | {"neg", 0 , 0x1D50 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // neg rm |
||
| 1830 | {"mul", 0 , 0x1100 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // mul rm |
||
| 1831 | {"imul", 0 , 0x1100 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // imul rm |
||
| 1832 | {"div", 0 , 0x1100 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // div rm |
||
| 1833 | {"idiv", 0 , 0x1100 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // idiv rm |
||
| 1834 | |||
| 1835 | // Secondary opcode map for group 4. Opcode byte = 0xFE |
||
| 1836 | // Indexed by reg bits = 0 - 7. |
||
| 1837 | SOpcodeDef OpcodeMap26[8] = { |
||
| 1838 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1839 | {"inc", 0 , 0xC50 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // inc rm8 |
||
| 1840 | {"dec", 0 , 0xC50 , 0x11 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // dec rm8 |
||
| 1841 | {0, 0 , 0 , 0x4011, 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal opcode |
||
| 1842 | |||
| 1843 | // Secondary opcode map for group 5. Opcode byte = 0xFF |
||
| 1844 | // Indexed by reg bits = 0 - 7. |
||
| 1845 | SOpcodeDef OpcodeMap27[8] = { |
||
| 1846 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1847 | {"inc", 0 , 0x1D50 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // inc rm |
||
| 1848 | {"dec", 0 , 0x1D50 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // dec rm |
||
| 1849 | {"call", 0 , 0x2182 , 0x11 , 0xC , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // call indirect rm |
||
| 1850 | {"call", 0 , 0x1102 , 0x811 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 , 0x28 }, // call indirect far |
||
| 1851 | {"jmp", 0 , 0x2180 , 0x11 , 0xB , 0 , 0 , 0 , 0 , 0 , 0 , 0x14 }, // jmp indirect rm |
||
| 1852 | {"jmp", 0 , 0x1100 , 0x811 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 , 0x30 }, // jmp indirect far |
||
| 1853 | {"push", 0 , 0x2102 , 0x11 , 0xA , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 }, // push rm |
||
| 1854 | {0, 0 , 0 , 0x4011, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal opcode |
||
| 1855 | |||
| 1856 | // Secondary opcode map for immediate group 1A. Opcode byte = 0x8F |
||
| 1857 | // Indexed by reg bits = 0 - 7. Values != 0 are discouraged |
||
| 1858 | SOpcodeDef OpcodeMap28[2] = { |
||
| 1859 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1860 | {"pop", 0 , 0x2102 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 8F |
||
| 1861 | {"pop", 0 , 0x2102 , 0x4011, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 8F |
||
| 1862 | |||
| 1863 | // Tertiary opcode map for pinsrw. Opcode byte = 0F C4 |
||
| 1864 | // Indexed by mod bits 0 register vs. memory operand |
||
| 1865 | SOpcodeDef OpcodeMap29[2] = { |
||
| 1866 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1867 | {"pinsrw", 0x7 ,0x892200, 0x59 , 0x1102, 0x1102, 0x2002, 0x11 , 0x1000, 0 , 0 , 0x2 }, // 0F C4 mem16 |
||
| 1868 | {"pinsrw", 0x7 ,0x892200, 0x59 , 0x1102, 0x1102, 0x1009, 0x11 , 0 , 0 , 0 , 0x2 }}; // 0F C4 register |
||
| 1869 | |||
| 1870 | // Tertiary opcode map for group 6. Opcode byte = 0F 00 |
||
| 1871 | // Indexed by reg bits = 0 - 7. |
||
| 1872 | SOpcodeDef OpcodeMap2A[8] = { |
||
| 1873 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1874 | {"sldt", 0x2 , 0x1100 , 0x11 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1875 | {"str", 0x802 , 0x100 , 0x11 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1876 | {"lldt", 0x802 , 0x2000 , 0x11 , 0 , 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1877 | {"ltr", 0x802 , 0 , 0x11 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1878 | {"verr", 0x802 , 0 , 0x11 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1879 | {"verw", 0x802 , 0 , 0x11 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1880 | {0, 0 , 0 , 0x4011, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 1881 | {0, 0 , 0 , 0x4011, 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 1882 | |||
| 1883 | // Tertiary opcode map for group 7. Opcode byte = 0F 01 |
||
| 1884 | // Indexed by reg bits = 0 - 7 and mod = 11b. |
||
| 1885 | SOpcodeDef OpcodeMap2B[16] = { |
||
| 1886 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1887 | {"sgdt", 0x802 , 0x1100 , 0x11 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod<3, reg=0 |
||
| 1888 | {"sidt", 0x802 , 0x1100 , 0x11 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1889 | {"lgdt", 0x802 , 0x1100 , 0x11 , 0 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1890 | {"lidt", 0x802 , 0x1100 , 0x11 , 0 , 0x200D, 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1891 | {"smsw", 0x2 , 0 , 0x11 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1892 | {0, 0x133 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // link to rstorssp |
||
| 1893 | {"lmsw", 0x802 , 0 , 0x11 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1894 | {"invlpg", 0x4 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // mod<3, reg=7 |
||
| 1895 | |||
| 1896 | {0, 0x36 , 0 , 0x4011, 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }, // link to quarternary map, vmcall etc. |
||
| 1897 | {0, 0x37 , 0 , 0x4011, 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }, // link to quarternary map, monitor, mwait |
||
| 1898 | {0, 0xA9 , 0 , 0x4011, 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }, // link to quarternary map, xgetbv, xsetbv |
||
| 1899 | {0, 0xAA , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }, // link AMD virtualization |
||
| 1900 | {"smsw", 0x2 , 0x1100 , 0x11 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1901 | {0, 0x130 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }, // link to incssp etc. |
||
| 1902 | {"lmsw", 0x802 , 0 , 0x11 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1903 | {0, 0xAB , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }}; // link SWAPGS and RDTSCP |
||
| 1904 | |||
| 1905 | // Secondary opcode map for group 8. Opcode byte = 0F BA: bt |
||
| 1906 | // Indexed by reg bits = 0 - 7. |
||
| 1907 | SOpcodeDef OpcodeMap2C[8] = { |
||
| 1908 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1909 | {0, 0 , 0 , 0x51 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1910 | {0, 0 , 0 , 0x51 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1911 | {0, 0 , 0 , 0x51 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1912 | {0, 0 , 0 , 0x51 , 0x9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 1913 | {"bt", 0x3 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1914 | {"bts", 0x3 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1915 | {"btr", 0x3 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 1916 | {"btc", 0x3 , 0x1100 , 0x51 , 0x9 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 1917 | |||
| 1918 | // Secondary opcode map for addsub. Opcode byte = 0F D0 |
||
| 1919 | // Indexed by prefix = none, 66, F2, F3 |
||
| 1920 | SOpcodeDef OpcodeMap2D[4] = { |
||
| 1921 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1922 | {"addsub", 0x13 , 0xD0000, 0x4019, 0x124F, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0x2 }, // 0F D0. undefined |
||
| 1923 | {"addsubpd", 0x13 , 0xD0200, 0x19 , 0x124C, 0x124C, 0x24C , 0 , 0 , 0 , 0 , 0x2 }, // 66 0F D0. addsubpd |
||
| 1924 | {"addsubps", 0x13 , 0xD0800, 0x19 , 0x124B, 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0x2 }, // F2 0F D0. addsubps |
||
| 1925 | {"addsub", 0x13 , 0xD0400, 0x4019, 0x124F, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0x2 }}; // F3 0F D0. undefined |
||
| 1926 | |||
| 1927 | // Secondary opcode map for group 10. Opcode byte = 0F B9 |
||
| 1928 | // Indexed by reg bits = 0 - 7. |
||
| 1929 | SOpcodeDef OpcodeMap2E[1] = { |
||
| 1930 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1931 | {"ud1", 0 , 0 , 0x4012, 0x1009, 0x6 , 0 , 0 , 0 , 0 , 0 , 0 }}; // Invalid opcode, possibly used for emulation |
||
| 1932 | |||
| 1933 | // Secondary opcode map for mov group 11. Opcode byte = 0xC6 |
||
| 1934 | // Indexed by reg bits and mod. |
||
| 1935 | SOpcodeDef OpcodeMap2F[16] = { |
||
| 1936 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1937 | {"mov", 0 , 0xC45 , 0x51 , 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /0 mov m,ib |
||
| 1938 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /1 |
||
| 1939 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /2 |
||
| 1940 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /3 |
||
| 1941 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /4 |
||
| 1942 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /5 |
||
| 1943 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /6 |
||
| 1944 | {"mov", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 m /7 |
||
| 1945 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /0 |
||
| 1946 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /1 |
||
| 1947 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /2 |
||
| 1948 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /3 |
||
| 1949 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /4 |
||
| 1950 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /5 |
||
| 1951 | {"", 0 , 0x5 , 0x4051, 0x1 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 }, // C6 r /6 |
||
| 1952 | {"xabort", 0x1D , 0 , 0x50 , 0 , 0x31 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C6 r /7 |
||
| 1953 | |||
| 1954 | // Secondary opcode map for mov group 11. Opcode byte = 0xC7 |
||
| 1955 | // Indexed by reg bits and mod. |
||
| 1956 | SOpcodeDef OpcodeMap30[16] = { |
||
| 1957 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1958 | {"mov", 0 , 0x1D45 , 0x91 , 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /0 mov m,iw |
||
| 1959 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /1 |
||
| 1960 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /2 |
||
| 1961 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /3 |
||
| 1962 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /4 |
||
| 1963 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /5 |
||
| 1964 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /6 |
||
| 1965 | {"mov", 0 , 0x5 , 0x4091, 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 m /7 |
||
| 1966 | {"mov", 0 , 0x1105 , 0x91 , 0x9 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /0 mov r,iw |
||
| 1967 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /1 |
||
| 1968 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /2 |
||
| 1969 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /3 |
||
| 1970 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /4 |
||
| 1971 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /5 |
||
| 1972 | {"", 0 , 0 , 0x91 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }, // C7 r /6 |
||
| 1973 | {"xbegin", 0x1D , 0x100 , 0x90 , 0 , 0x29 , 0 , 0 , 0 , 0 , 0 , 0 }}; // C7 r /7 |
||
| 1974 | |||
| 1975 | // Secondary opcode map for group 12. Opcode byte = 0F 71 |
||
| 1976 | // Indexed by reg bits = 0 - 7. |
||
| 1977 | SOpcodeDef OpcodeMap31[8] = { |
||
| 1978 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1979 | {0, 0x7 , 0x90200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1980 | {0, 0x7 , 0x90200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1981 | {"psrlw", 0x7 ,0x8D2200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0x20 , 0 , 0 , 0x2 }, // 2 |
||
| 1982 | {0, 0x7 , 0x90200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1983 | {"psraw", 0x7 ,0x8D2200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0x20 , 0 , 0 , 0x2 }, // 4 |
||
| 1984 | {0, 0x7 , 0x90200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1985 | {"psllw", 0x7 ,0x8D2200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0x20 , 0 , 0 , 0x2 }, // 6 |
||
| 1986 | {0, 0x7 , 0x90200, 0x58 , 0x1102, 0x1102, 0x11 , 0 , 0 , 0 , 0 , 0x2 }}; // Illegal |
||
| 1987 | |||
| 1988 | // Secondary opcode map for group 13. Opcode byte = 0F 72 |
||
| 1989 | // Indexed by reg bits = 0 - 7. |
||
| 1990 | SOpcodeDef OpcodeMap32[8] = { |
||
| 1991 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 1992 | {"vpror", 0x20 ,0x893200, 0x58 , 0x1209, 0x209 , 0x11 , 0 , 0x21 , 0 , 0 , 0x1 }, // /0 |
||
| 1993 | {"vprol", 0x20 ,0x893200, 0x58 , 0x1209, 0x209 , 0x11 , 0 , 0x21 , 0 , 0 , 0x1 }, // /1 |
||
| 1994 | {"psrld", 0x12 ,0xCD3200, 0x58 , 0x1103, 0x103 , 0x11 , 0 , 0x21 , 0x1406, 0 , 0x2 }, // /2 |
||
| 1995 | {0, 0x12 , 0x90200, 0x58 , 0x1103, 0x103 , 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1996 | {"psra", 0x12 ,0xCD3200, 0x58 , 0x1109, 0x109 , 0x11 , 0 , 0x31 , 0x1406, 0 , 0x3 }, // /4. W bit controls operand size only if EVEX |
||
| 1997 | {0, 0x12 , 0x90200, 0x58 , 0x1103, 0x103 , 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // Illegal |
||
| 1998 | {"pslld", 0x12 ,0xCD3200, 0x58 , 0x1103, 0x103 , 0x11 , 0 , 0x21 , 0x1406, 0 , 0x2 }, // /6 |
||
| 1999 | {0, 0x12 , 0x90200, 0x58 , 0x1103, 0x103 , 0x11 , 0 , 0 , 0 , 0 , 0x2 }}; // Illegal |
||
| 2000 | |||
| 2001 | // Secondary opcode map for group 14. Opcode byte = 0F 73 |
||
| 2002 | // Indexed by reg bits = 0 - 7. |
||
| 2003 | SOpcodeDef OpcodeMap33[8] = { |
||
| 2004 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2005 | {0, 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // /0 Illegal |
||
| 2006 | {0, 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // /1 Illegal |
||
| 2007 | {"psrlq", 0x12 ,0x8D3200, 0x58 , 0x1104, 0x104 , 0x11 , 0 , 0x21 , 0 , 0 , 0x2 }, // /2 |
||
| 2008 | {"psrldq", 0x12 , 0xDA200, 0x58 , 0x1204, 0x204 , 0x11 , 0 , 0 , 0 , 0 , 0x2 }, // /3 Not valid without 66 prefix |
||
| 2009 | {0, 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // /4 Illegal |
||
| 2010 | {0, 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // /5 Illegal |
||
| 2011 | {"psllq", 0x12 ,0x8D3200, 0x58 , 0x1104, 0x104 , 0x11 , 0 , 0x21 , 0 , 0 , 0x2 }, // /6 |
||
| 2012 | {"pslldq", 0x12 ,0x8DA200, 0x58 , 0x1204, 0x204 , 0x11 , 0 , 0 , 0 , 0 , 0x2 }}; // /7 Not valid without 66 prefix |
||
| 2013 | |||
| 2014 | // Secondary opcode map for group 15. Opcode byte = 0F AE |
||
| 2015 | // Indexed by reg bits = 0 - 7 and mod = 3 |
||
| 2016 | // These codes are without VEX prefix. Same codes with VEX or MVEX prefix are in OpcodeMapCD |
||
| 2017 | SOpcodeDef OpcodeMap34[16] = { |
||
| 2018 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2019 | {"fxsave", 0x11 , 0 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AE /0 |
||
| 2020 | {"fxrstor", 0x11 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F AE /1 |
||
| 2021 | {"ldmxcsr", 0x11 , 0x10000, 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F AE /2 |
||
| 2022 | {"stmxcsr", 0x11 , 0x10000, 0x11 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F AE /3 |
||
| 2023 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2024 | {0, 0x134 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // 0F AE /5. Link setssbsy |
||
| 2025 | {0, 0xF3 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // 0F AE /6. Link xsaveopt |
||
| 2026 | {0, 0xF2 , 0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // 0F AE /7. Link clflush |
||
| 2027 | {"rdfsbase", 0x10000,0x1400 , 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F3 0F AE m-0 |
||
| 2028 | {"rdgsbase", 0x10000,0x1400 , 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F3 0F AE m-1 |
||
| 2029 | {"wrfsbase", 0x10000,0x1400 , 0x11 , 0 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // F3 0F AE m-2 |
||
| 2030 | {"wrgsbase", 0x10000,0x1400 , 0x11 , 0 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // F3 0F AE m-3 |
||
| 2031 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2032 | {"lfence", 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // m-5 |
||
| 2033 | {"mfence", 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // m-6 |
||
| 2034 | {0, 0xF4 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }}; // m-7. Link sfence, pcommit |
||
| 2035 | |||
| 2036 | // Secondary opcode map for group 16. Opcode byte = 0F 18 |
||
| 2037 | // Indexed by reg bits = 0 - 7. |
||
| 2038 | SOpcodeDef OpcodeMap35[8] = { |
||
| 2039 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2040 | {"prefetchnta",0x13 ,0x410000, 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0x2 }, // 0F 18 /0 |
||
| 2041 | {"prefetcht0",0x13 ,0x410000, 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0x2 }, // 0F 18 /1 |
||
| 2042 | {"prefetcht1",0x13 ,0x410000, 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0x2 }, // 0F 18 /2 |
||
| 2043 | {"prefetcht2",0x13 ,0x410000, 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0x2 }, // 0F 18 /3 |
||
| 2044 | {"vprefetchenta",0x13,0x430000,0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0 }, // 0F 18 /4 |
||
| 2045 | {"vprefetche0",0x13 ,0x430000,0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0 }, // 0F 18 /5 |
||
| 2046 | {"vprefetche1",0x13 ,0x430000,0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0 }, // 0F 18 /6 |
||
| 2047 | {"vprefetche2",0x13 ,0x430000,0x11 , 0 , 0x2006, 0 , 0 , 0 , 0x2 , 0 , 0 }}; // 0F 18 /7 |
||
| 2048 | |||
| 2049 | // Quarternary opcode map for group 7. 0F 01 reg = 0 |
||
| 2050 | // Indexed by rm bits of mod/reg/rm byte |
||
| 2051 | SOpcodeDef OpcodeMap36[6] = { |
||
| 2052 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2053 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // illegal |
||
| 2054 | {"vmcall", 0x813 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // Intel processor only? |
||
| 2055 | {"vmlaunch", 0x813 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // Intel processor only? |
||
| 2056 | {"vmresume", 0x813 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Intel processor only? |
||
| 2057 | {"vmxoff", 0x813 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Intel processor only? |
||
| 2058 | {0, 0 , 0 , 0x4010, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 2059 | |||
| 2060 | // Quarternary opcode map for group 7. 0F 01 reg = 1 |
||
| 2061 | // Indexed by rm bits of mod/reg/rm byte |
||
| 2062 | SOpcodeDef OpcodeMap37[5] = { |
||
| 2063 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2064 | {"monitor", 0x813 , 0x4 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1 - 0 |
||
| 2065 | {"mwait", 0x813 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1 - 1 |
||
| 2066 | {"clac", 0x81D , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1 - 2 |
||
| 2067 | {"stac", 0x81D , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 1 - 3 |
||
| 2068 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // illegal |
||
| 2069 | |||
| 2070 | // EVEX 0F 38 1B, indexed by W bit |
||
| 2071 | SOpcodeDef OpcodeMap38[] = { |
||
| 2072 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2073 | {"vbroadcastf32x8",0x20,0xC69200,0x12, 0x164B, 0x254B, 0 , 0 , 0x20 , 0x1011, 0 , 0x100 }, // EVEX W0 0F 38 1B |
||
| 2074 | {"vbroadcastf64x4",0x20,0xC69200,0x12, 0x164C, 0x254C, 0 , 0 , 0x20 , 0x1011, 0 , 0x100 }}; // EVEX W1 0F 38 1B |
||
| 2075 | |||
| 2076 | // Secondary opcode map for cbw/cwde/cdqe. Opcode byte = 0x98 |
||
| 2077 | // Indexed by operand size = 16, 32, 64 |
||
| 2078 | SOpcodeDef OpcodeMap39[3] = { |
||
| 2079 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2080 | {"cbw", 0 , 0x100 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 98 |
||
| 2081 | {"cwde", 0 , 0x100 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 98 |
||
| 2082 | {"cdqe", 0x4000, 0x1000 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // 98 |
||
| 2083 | |||
| 2084 | // Secondary opcode map for cwd/cdq/cqo. Opcode byte = 0x99 |
||
| 2085 | // Indexed by operand size = 16, 32, 64 |
||
| 2086 | SOpcodeDef OpcodeMap3A[3] = { |
||
| 2087 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2088 | {"cwd", 0 , 0x100 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 99 |
||
| 2089 | {"cdq", 0 , 0x100 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 99 |
||
| 2090 | {"cqo", 0x4000, 0x1000 , 0x1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // 99 |
||
| 2091 | |||
| 2092 | |||
| 2093 | // Secondary opcode map for arpl/movsxd. Opcode byte = 0x63 |
||
| 2094 | // Indexed by mode = 16, 32, 64 |
||
| 2095 | SOpcodeDef OpcodeMap3B[3] = { |
||
| 2096 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2097 | {"arpl", 0x8802, 0 , 0x13 , 0x2 , 0x1002, 0 , 0 , 0 , 0 , 0 , 0 }, // 63 |
||
| 2098 | {"arpl", 0x8802, 0 , 0x13 , 0x2 , 0x1002, 0 , 0 , 0 , 0 , 0 , 0 }, // 63 |
||
| 2099 | {"movsxd", 0x4000, 0x1000 , 0x12 , 0x1009, 0x3 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 63 |
||
| 2100 | |||
| 2101 | // Secondary opcode map for nop/pause. Opcode byte = 0x90 |
||
| 2102 | // Indexed by prefix = none, 66, F2, F3 |
||
| 2103 | SOpcodeDef OpcodeMap3C[4] = { |
||
| 2104 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2105 | {"nop", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // 90 |
||
| 2106 | {"nop", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // 66 90 |
||
| 2107 | {"nop", 0 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x40 }, // F2 90 |
||
| 2108 | {"pause", 0 , 0x400 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 90. (No instset indicated because backwards compatible) |
||
| 2109 | |||
| 2110 | // Secondary opcode map for jcxz. Opcode byte = 0xE3 |
||
| 2111 | // Indexed by address size |
||
| 2112 | SOpcodeDef OpcodeMap3D[4] = { |
||
| 2113 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2114 | {"jcxz", 0 , 0x81 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // E3 |
||
| 2115 | {"jecxz", 0 , 0x81 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, |
||
| 2116 | {"jrcxz", 0x4000, 0x81 , 0x42 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 2117 | |||
| 2118 | // Secondary opcode map for pushf/d/q. Opcode byte = 0x9C |
||
| 2119 | // Indexed by operand size |
||
| 2120 | SOpcodeDef OpcodeMap3E[3] = { |
||
| 2121 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2122 | {"pushf", 0 , 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 9C pushf |
||
| 2123 | {"pushf", 0 , 0x2102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 }, // 9C pushf/d/q |
||
| 2124 | {"pushf", 0 , 0x2102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 }}; // 9C pushf/d/q |
||
| 2125 | |||
| 2126 | // Secondary opcode map for poof/d/q. Opcode byte = 0x9D |
||
| 2127 | // Indexed by operand size |
||
| 2128 | SOpcodeDef OpcodeMap3F[3] = { |
||
| 2129 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2130 | {"popf", 0 , 0x102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 9D popf |
||
| 2131 | {"popf", 0 , 0x2102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 }, // 9D popf/d/q |
||
| 2132 | {"popf", 0 , 0x2102 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x1 }}; // 9D popf/d/q |
||
| 2133 | |||
| 2134 | // Tertiary opcode map for movups etc. Opcode byte = 0F 10 |
||
| 2135 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2136 | SOpcodeDef OpcodeMap40[4] = { |
||
| 2137 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2138 | {"movups", 0x11 ,0x850000, 0x12 , 0x124B, 0x251 , 0 , 0 , 0x30 , 0 , 0 , 0x202 }, // 0F 10 |
||
| 2139 | {"movupd", 0x12 ,0x852200, 0x12 , 0x124C, 0x251 , 0 , 0 , 0x30 , 0 , 0 , 0x202 }, // 66 0F 10 |
||
| 2140 | {"movsd", 0x71 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 3 , 0 }, // F2 0F 10 Link for memory/register |
||
| 2141 | {"movss", 0x72 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 3 , 0 }}; // F3 0F 10 Link for memory/register |
||
| 2142 | |||
| 2143 | // Tertiary opcode map for movups etc. Opcode byte = 0F 11 |
||
| 2144 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2145 | SOpcodeDef OpcodeMap41[4] = { |
||
| 2146 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2147 | {"movups", 0x11 ,0x850000, 0x13 , 0x251 , 0x124B, 0 , 0 , 0x30 , 0 , 0 , 0x202 }, // 0F 11 |
||
| 2148 | {"movupd", 0x12 ,0x852200, 0x13 , 0x251 , 0x124C, 0 , 0 , 0x30 , 0 , 0 , 0x202 }, // 66 0F 11 |
||
| 2149 | {"movsd", 0x73 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 3 , 0 }, // F2 0F 11 Link for memory/register |
||
| 2150 | {"movss", 0x74 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 3 , 0 }}; // F3 0F 11 Link for memory/register |
||
| 2151 | |||
| 2152 | // Tertiary opcode map for movlps etc. Opcode byte = 0F 12 |
||
| 2153 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2154 | SOpcodeDef OpcodeMap42[4] = { |
||
| 2155 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2156 | {0, 0x43 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // Link to quarternary map |
||
| 2157 | {"movlpd", 0x12 ,0x892200, 0x19 , 0x144C, 0x144C, 0x204C, 0 , 0 , 0 , 0 , 0x2 }, // 66 0F 12 |
||
| 2158 | {"movddup", 0x70 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xB , 0 }, // F2 0F 12 |
||
| 2159 | {"movsldup", 0x13 ,0x852400, 0x12 , 0x124B, 0x24B , 0 , 0 , 0x30 , 0 , 0 , 0x2 }}; // F3 0F 12 |
||
| 2160 | |||
| 2161 | // Quarternary opcode map for movlps and movhlps. Opcode byte = 0F 12 |
||
| 2162 | // Indexed by mod bits |
||
| 2163 | SOpcodeDef OpcodeMap43[2] = { |
||
| 2164 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2165 | {"movlps", 0x11 ,0x892000, 0x19 , 0x144B, 0x144B, 0x234B, 0 , 0x1000, 0 , 0 , 0x2 }, // 0F 12 (mem) |
||
| 2166 | {"movhlps", 0x11 ,0x892000, 0x19 , 0x144B, 0x144B, 0x144B, 0 , 0x00 , 0 , 0 , 0x2 }}; // 0F 12 (reg) |
||
| 2167 | |||
| 2168 | // Tertiary opcode map for movlps etc. Opcode byte = 0F 16 |
||
| 2169 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2170 | SOpcodeDef OpcodeMap44[4] = { |
||
| 2171 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2172 | {0, 0x45 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // Link to quarternary map |
||
| 2173 | {"movhpd", 0x12 ,0x892200, 0x19 , 0x144C, 0x144C, 0x204C, 0 , 0x00 , 0 , 0 , 0x2 }, // 66 0F 16 |
||
| 2174 | {0, 0x13 , 0x800 , 0x4012, 0x124C, 0x4C , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 16 |
||
| 2175 | {"movshdup", 0x13 ,0x852400, 0x12 , 0x124B, 0x24B , 0 , 0 , 0x30 , 0 , 0 , 0x2 }}; // F3 0F 16 |
||
| 2176 | |||
| 2177 | // Quarternary opcode map for movhps and movlhps. Opcode byte = 0F 16 |
||
| 2178 | // Indexed by mod bits |
||
| 2179 | SOpcodeDef OpcodeMap45[2] = { |
||
| 2180 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2181 | {"movhps", 0x11 ,0x890000, 0x19 , 0x144B, 0x144B, 0x234B, 0 , 0x1000, 0 , 0 , 0x2 }, // 0F 12 (mem) |
||
| 2182 | {"movlhps", 0x11 ,0x890000, 0x19 , 0x144B, 0x144B, 0x144B, 0 , 0x0 , 0 , 0 , 0x2 }}; // 0F 12 (reg) |
||
| 2183 | |||
| 2184 | // Tertiary opcode map for cvtpi2ps etc. Opcode byte = 0F 2A |
||
| 2185 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2186 | SOpcodeDef OpcodeMap46[4] = { |
||
| 2187 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2188 | {"cvtpi2ps", 0x11 , 0 , 0x12 , 0x124B, 0x303 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 2A |
||
| 2189 | {"cvtpi2pd", 0x12 , 0x200 , 0x12 , 0x124C, 0x303 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 2A |
||
| 2190 | {"cvtsi2sd", 0x12 ,0x891800, 0x19 , 0x104C, 0x104C, 0x9 , 0 , 0x6 , 0 , 0 , 0x2 }, // F2 0F 2A |
||
| 2191 | {"cvtsi2ss", 0x12 ,0x891400, 0x19 , 0x104B, 0x104B, 0x9 , 0 , 0x6 , 0 , 0 , 0x2 }}; // F3 0F 2A |
||
| 2192 | |||
| 2193 | // Tertiary opcode map for cvttps2pi etc. Opcode byte = 0F 2C |
||
| 2194 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2195 | SOpcodeDef OpcodeMap47[4] = { |
||
| 2196 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2197 | {"cvttps2pi", 0x11 , 0 , 0x12 , 0x1303, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 2C |
||
| 2198 | {"cvttpd2pi", 0x12 , 0x200 , 0x12 , 0x1303, 0x24C , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 2C |
||
| 2199 | {"cvttsd2si", 0x12 ,0x811800, 0x12 , 0x1009, 0x4C , 0 , 0 , 0x2 , 0 , 0 , 0x2 }, // F2 0F 2C |
||
| 2200 | {"cvttss2si", 0x12 ,0x811400, 0x12 , 0x1009, 0x4B , 0 , 0 , 0x2 , 0 , 0 , 0x2 }}; // F3 0F 2C |
||
| 2201 | |||
| 2202 | // Tertiary opcode map for cvtps2pi etc. Opcode byte = 0F 2D |
||
| 2203 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2204 | SOpcodeDef OpcodeMap48[4] = { |
||
| 2205 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2206 | {"cvtps2pi", 0x11 ,0x000000, 0x12 , 0x1303, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 2D |
||
| 2207 | {"cvtpd2pi", 0x12 ,0x000200, 0x12 , 0x1303, 0x24C , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 2D |
||
| 2208 | {"cvtsd2si", 0x12 ,0x811800, 0x12 , 0x1009, 0x4C , 0 , 0 , 0x6 , 0 , 0 , 0x2 }, // F2 0F 2D |
||
| 2209 | {"cvtss2si", 0x12 ,0x811400, 0x12 , 0x1009, 0x4B , 0 , 0 , 0x6 , 0 , 0 , 0x2 }}; // F3 0F 2D |
||
| 2210 | |||
| 2211 | // Tertiary opcode map for cvtps2pd etc. Opcode byte = 0F 5A |
||
| 2212 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2213 | SOpcodeDef OpcodeMap49[4] = { |
||
| 2214 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2215 | {"cvtps2pd", 0x12 ,0xC50000, 0x12 , 0x124C, 0xF4B , 0 , 0 , 0x33 , 0x1215, 0 , 0x2 }, // 0F 5A |
||
| 2216 | {"cvtpd2ps", 0x12 ,0xC52200, 0x12 , 0x1F4B, 0x24C , 0 , 0 , 0x37, 0x1305, 0 , 0x2 }, // 66 0F 5A |
||
| 2217 | {"cvtsd2ss", 0x12 ,0x892800, 0x19 , 0x104B, 0x4C , 0x4C , 0 , 0x36 , 0 , 0 , 0x2 }, // F2 0F 5A |
||
| 2218 | {"cvtss2sd", 0x12 ,0x892400, 0x19 , 0x104C, 0x104C, 0x4B , 0 , 0x32 , 0 , 0 , 0x2 }}; // F3 0F 5A |
||
| 2219 | |||
| 2220 | // Tertiary opcode map for cvtdq2ps etc. Opcode byte = 0F 5B |
||
| 2221 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2222 | SOpcodeDef OpcodeMap4A[4] = { |
||
| 2223 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2224 | {"cvtdq2ps", 0x12 ,0x850000, 0x12 , 0x124B, 0x203 , 0 , 0 , 0x37 , 0 , 0 , 0x2 }, // 0F 5B |
||
| 2225 | {"cvtps2dq", 0x12 ,0x850200, 0x12 , 0x1203, 0x24B , 0 , 0 , 0x37 , 0 , 0 , 0x2 }, // 66 0F 5B |
||
| 2226 | {0, 0x12 ,0x800 , 0x4012, 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 5B. Illegal |
||
| 2227 | {"cvttps2dq", 0x12 ,0x852400, 0x12 , 0x1203, 0x24B , 0 , 0 , 0x37 , 0 , 0 , 0x2 }}; // F3 0F 5B |
||
| 2228 | |||
| 2229 | // Tertiary opcode map for ucomiss/sd etc. Opcode byte = 0F 2E |
||
| 2230 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2231 | SOpcodeDef OpcodeMap4B[3] = { |
||
| 2232 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2233 | {"ucomiss", 0x11 ,0x810200, 0x12 , 0x124B, 0x4B , 0 , 0 , 0x2 , 0 , 0 , 0x6 }, // 0F 2E. ucomiss |
||
| 2234 | {"ucomisd", 0x11 ,0x812200, 0x12 , 0x124C, 0x4C , 0 , 0 , 0x2 , 0 , 0 , 0x6 }, // 66 0F 2E. ucomisd |
||
| 2235 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 2236 | |||
| 2237 | // Tertiary opcode map for comiss/sd etc. Opcode byte = 0F 2F |
||
| 2238 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2239 | SOpcodeDef OpcodeMap4C[3] = { |
||
| 2240 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2241 | {"comiss", 0x11 ,0x812200, 0x12 , 0x124B, 0x4B , 0 , 0 , 0x2 , 0 , 0 , 0x6 }, // 0F 2F. comiss |
||
| 2242 | {"comisd", 0x11 ,0x812200, 0x12 , 0x124C, 0x4C , 0 , 0 , 0x2 , 0 , 0 , 0x6 }, // 66 0F 2F. comisd |
||
| 2243 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 2244 | |||
| 2245 | // Tertiary opcode map for movq/movdqa/movdqu. Opcode byte = 0F 6F |
||
| 2246 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2247 | SOpcodeDef OpcodeMap4D[4] = { |
||
| 2248 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2249 | {"movq", 0x7 , 0 , 0x12 , 0x1351, 0x351 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 6F |
||
| 2250 | {"movdqa", 0xB8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 66 0F 6F. Link to movdqa and vmovdqa32 |
||
| 2251 | {"vmovdqu", 0x19 ,0x864800, 0x12 , 0x1209, 0x209 , 0 , 0 , 0x20 , 0 , 0 , 0x1200}, // F2 0F 6F |
||
| 2252 | {"movdqu", 0xB9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }}; // F3 0F 6F. Link to movdqu and vmovdqu32 |
||
| 2253 | |||
| 2254 | // Tertiary opcode map for movq/movdqa/movdqu. Opcode byte = 0F 7F |
||
| 2255 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2256 | SOpcodeDef OpcodeMap4E[4] = { |
||
| 2257 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2258 | {"movq", 0x7 , 0 , 0x13 , 0x351 , 0x1351, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7F |
||
| 2259 | {"movdqa", 0xBA , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // 66 0F 7F. Link to movdqa and vmovdqa32 |
||
| 2260 | {"vmovdqu", 0x19 ,0x864800, 0x13 , 0x209 , 0x1209, 0 , 0 , 0x20 , 0 , 0 ,0x1200 }, // E/MVEX F3 0F 7F |
||
| 2261 | {"movdqu", 0xBB , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }}; // F3 0F 7F. Link to movdqu and vmovdqu32 |
||
| 2262 | |||
| 2263 | // Tertiary opcode map for pshufw etc. Opcode byte = 0F 70 |
||
| 2264 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2265 | SOpcodeDef OpcodeMap4F[4] = { |
||
| 2266 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2267 | {"pshufw", 0x7 , 0 , 0x52 , 0x1302, 0x302 , 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 70 |
||
| 2268 | {"pshufd", 0x12 ,0xC52100, 0x52 , 0x1203, 0x203 , 0x31 , 0 , 0x21 , 0x1000, 0 , 0x2 }, // 66 0F 70 |
||
| 2269 | {"pshuflw", 0x12 ,0x852800, 0x52 , 0x1202, 0x202 , 0x31 , 0 , 0x20 , 0 , 0 , 0x2 }, // F2 0F 70 |
||
| 2270 | {"pshufhw", 0x12 ,0x852400, 0x52 , 0x1202, 0x202 , 0x31 , 0 , 0x20 , 0 , 0 , 0x2 }}; // F3 0F 70 |
||
| 2271 | |||
| 2272 | // Tertiary opcode map for group 9. Opcode byte = 0F C7 |
||
| 2273 | // Indexed by reg bits = 0 - 7. |
||
| 2274 | SOpcodeDef OpcodeMap50[8] = { |
||
| 2275 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2276 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0. Illegal |
||
| 2277 | {0, 0x51 , 0x1010 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 1. Link to map: cmpxchg8b |
||
| 2278 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2279 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2280 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2281 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2282 | {0, 0xAC , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 6. Link to map: vmptrld etc |
||
| 2283 | {0, 0xAF , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }}; // 7. Link to map: vmptrst, rdseed |
||
| 2284 | |||
| 2285 | // Quarternary opcode map for cmpxchg8b. Opcode byte = 0F C7 /1 |
||
| 2286 | // Indexed by operand size: 16, 32, 64 |
||
| 2287 | SOpcodeDef OpcodeMap51[3] = { |
||
| 2288 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2289 | {"cmpxchg8b", 0x5 , 0x1C50 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 2290 | {"cmpxchg8b", 0x5 , 0x1C50 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 2291 | {"cmpxchg16b",0x5 , 0x1C50 , 0x11 , 0x2450, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 2292 | |||
| 2293 | // Quarternary opcode map for vmptrld etc. Opcode byte = 0F C7 /6 mem |
||
| 2294 | // Indexed by prefix: none/66/F2/F3 |
||
| 2295 | SOpcodeDef OpcodeMap52[4] = { |
||
| 2296 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2297 | {"vmptrld", 0x813 , 0 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C7 /6 mem |
||
| 2298 | {"vmclear", 0x813 , 0x200 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 2299 | {0, 0x813 , 0x800 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2300 | {"vmxon", 0x813 , 0x400 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 2301 | |||
| 2302 | // Quarternary opcode map for movdq2q etc. Opcode byte = 0F D6 |
||
| 2303 | // Indexed by prefix: none/66/F2/F3 |
||
| 2304 | SOpcodeDef OpcodeMap53[4] = { |
||
| 2305 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2306 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2307 | {"movq", 0x6F , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }, // 66: Link to movq m64,xmm / movq xmm,xmm |
||
| 2308 | {"movdq2q", 0x12 , 0x800 , 0x12 , 0x1351, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 2309 | {"movq2dq", 0x12 , 0x400 , 0x12 , 0x1450, 0x1351, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 |
||
| 2310 | |||
| 2311 | // Quarternary opcode map for cvtpd2dq etc. Opcode byte = 0F E6 |
||
| 2312 | // Indexed by prefix: none/66/F2/F3 |
||
| 2313 | SOpcodeDef OpcodeMap54[4] = { |
||
| 2314 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2315 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2316 | {"cvttpd2dq", 0x12 ,0x852200, 0x12 , 0x1F03, 0x24C , 0 , 0 , 0x33 , 0 , 0 , 0x2 }, // 66 |
||
| 2317 | {"cvtpd2dq", 0x12 ,0x852800, 0x12 , 0x1F03, 0x24C , 0 , 0 , 0x37 , 0 , 0 , 0x2 }, // F2 |
||
| 2318 | {"cvtdq2pd", 0x12 ,0xC50400, 0x12 , 0x124C, 0xF03 , 0 , 0 , 0x31 , 0x1214, 0 , 0x2 }}; // F3 |
||
| 2319 | |||
| 2320 | // Quarternary opcode map for movntq etc. Opcode byte = 0F E7 |
||
| 2321 | // Indexed by prefix: none/66/F2/F3 |
||
| 2322 | SOpcodeDef OpcodeMap55[3] = { |
||
| 2323 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2324 | {"movntq", 0x11 , 0 , 0x13 , 0x2351, 0x1351, 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 2325 | {"movntdq", 0x12 ,0x850200, 0x13 , 0x2250, 0x1250, 0 , 0 , 0x00 , 0 , 0 , 0x102 }, // |
||
| 2326 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 2327 | |||
| 2328 | // Quarternary opcode map for lddqu. Opcode byte = 0F F0 |
||
| 2329 | // Indexed by prefix: none/66/F2/F3 |
||
| 2330 | SOpcodeDef OpcodeMap56[4] = { |
||
| 2331 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2332 | {0, 0 , 0 , 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }, // Illegal |
||
| 2333 | {0, 0 , 0x200 , 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 2334 | {"lddqu", 0x13 , 0x58800, 0x12 , 0x1250, 0x251, 0 , 0 , 0 , 0 , 0 , 0x202 }, // |
||
| 2335 | {0, 0 , 0x400 , 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 2336 | |||
| 2337 | // Quarternary opcode map for maskmovq. Opcode byte = 0F F7 |
||
| 2338 | // Indexed by prefix: none/66/F2/F3 |
||
| 2339 | SOpcodeDef OpcodeMap57[3] = { |
||
| 2340 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2341 | {"maskmovq", 0x7 , 0x5 , 0x12 , 0x1351, 0x1351, 0 , 0 , 0 , 0 , 0 , 0x20 }, // |
||
| 2342 | {"maskmovdqu",0x12 , 0x18205, 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0x22 }, // |
||
| 2343 | {0, 0 , 0 , 0x12 , 0x1450, 0x2450, 0 , 0 , 0 , 0 , 0 , 0 }}; // Illegal |
||
| 2344 | |||
| 2345 | // Tertiary opcode map for movd/movq. Opcode byte = 0F 6E |
||
| 2346 | // Indexed by operand size 16/32/64 |
||
| 2347 | // First two lines are identical because operand size is determined only by REX.W prefix, |
||
| 2348 | // while 66 prefix determines mmx or xmm register |
||
| 2349 | // Note: VEX/EVEX version is in map B1 |
||
| 2350 | SOpcodeDef OpcodeMap58[3] = { |
||
| 2351 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2352 | {"movd", 0x7 , 0x11200, 0x12 , 0x1103, 0x3 , 0 , 0 , 0x00 , 0 , 0 , 0x2 }, // 0F 6E |
||
| 2353 | {"movd", 0x7 , 0x11200, 0x12 , 0x1103, 0x3 , 0 , 0 , 0x00 , 0 , 0 , 0x2 }, // 0F 6E |
||
| 2354 | {"movq", 0x4000, 0x11200, 0x12 , 0x1104, 0x4 , 0 , 0 , 0x00 , 0 , 0 , 0x2 }}; // 0F 6E. Name varies: movd or movq, though the operand is 64 bits |
||
| 2355 | |||
| 2356 | // Tertiary opcode map for movd/movq. Opcode byte = 0F 7E |
||
| 2357 | // Indexed by prefix: none/66/F2/F3 |
||
| 2358 | SOpcodeDef OpcodeMap59[4] = { |
||
| 2359 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2360 | {0, 0x5A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 0F 7E. Link to map 5A. Name depends on REX.W prefix |
||
| 2361 | {0, 0x5A , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 , 0 }, // 66 0F 7E. Link to map 5A. Name depends on REX.W prefix |
||
| 2362 | {0, 0x7 , 0 , 0x4013, 0x3 , 0x1103, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 7E. Doesn't exist |
||
| 2363 | {0, 0x5B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }}; // F3 0F 7E. Link to map 5B. movq xmm,xmm/m64 |
||
| 2364 | |||
| 2365 | // Quarternary opcode map for movd/movq. Opcode byte = 66 0F 7E |
||
| 2366 | // Indexed by operand size 16/32/64 |
||
| 2367 | // First two lines are identical because operand size is determined only by REX.W prefix, |
||
| 2368 | // while 66 prefix determines mmx or xmm register |
||
| 2369 | SOpcodeDef OpcodeMap5A[3] = { |
||
| 2370 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2371 | {"movd", 0x7 , 0x11200, 0x13 , 0x3 , 0x1103, 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 7E |
||
| 2372 | {"movd", 0x7 , 0x11200, 0x13 , 0x3 , 0x1103, 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 7E |
||
| 2373 | {"movq", 0x4000, 0x11200, 0x13 , 0x4 , 0x1104, 0x0 , 0 , 0 , 0 , 0 , 0x2 }}; // 0F 7E. Name varies: movd or movq, though the operand is 64 bits |
||
| 2374 | |||
| 2375 | // Quarternary opcode map for movq xmm,xmm/m64. Opcode byte = F3 0F 7E |
||
| 2376 | // Indexed by memory vs. register operand |
||
| 2377 | // Link to here from both map 59 (without VEX) and map E2 (with VEX) |
||
| 2378 | SOpcodeDef OpcodeMap5B[2] = { |
||
| 2379 | {"movq", 0x12 ,0x812400, 0x12 , 0x1404, 0x4 , 0 , 0 , 0 , 0 , 0 , 0x2 }, // F3 0F 7E. movq xmm,m64 |
||
| 2380 | {"movq", 0x12 ,0x812400, 0x12 , 0x1404, 0x404 , 0 , 0 , 0 , 0 , 0 , 0x2 }}; // F3 0F 7E. movq xmm,xmm |
||
| 2381 | |||
| 2382 | // Tertiary opcode map for haddps/pd etc. Opcode byte = 0F 7C |
||
| 2383 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2384 | SOpcodeDef OpcodeMap5C[4] = { |
||
| 2385 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2386 | {0, 0 , 0 , 0x4012, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7C |
||
| 2387 | {"haddpd", 0x13 , 0xD0A00, 0x19 , 0x124C, 0x124C, 0x24C , 0 , 0 , 0 , 0 , 0x2 }, // 66 0F 7C |
||
| 2388 | {"haddps", 0x13 , 0xD0A00, 0x19 , 0x124B, 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0x2 }, // F2 0F 7C |
||
| 2389 | {0, 0 , 0 , 0x4012, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 7C |
||
| 2390 | |||
| 2391 | // Tertiary opcode map for hsubps/pd etc. Opcode byte = 0F 7D |
||
| 2392 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2393 | SOpcodeDef OpcodeMap5D[4] = { |
||
| 2394 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2395 | {0, 0 , 0 , 0x4012, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7D |
||
| 2396 | {"hsubpd", 0x13 , 0xD0A00, 0x19 , 0x124C, 0x124C, 0x24C , 0 , 0 , 0 , 0 , 0x2 }, // 66 0F 7D |
||
| 2397 | {"hsubps", 0x13 , 0xD0A00, 0x19 , 0x124B, 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0x2 }, // F2 0F 7D |
||
| 2398 | {0, 0 , 0 , 0x4012, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 7D |
||
| 2399 | |||
| 2400 | // Tertiary opcode map for lar. Opcode byte = 0F 02 |
||
| 2401 | // Indexed by memory vs. register operand |
||
| 2402 | SOpcodeDef OpcodeMap5E[2] = { |
||
| 2403 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2404 | {"lar", 0x802 , 0x1100 , 0x12 , 0x1009, 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 02 memory |
||
| 2405 | {"lar", 0x802 , 0x1100 , 0x12 , 0x1009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 02 register |
||
| 2406 | |||
| 2407 | // Tertiary opcode map for lsl. Opcode byte = 0F 03 |
||
| 2408 | // Indexed by memory vs. register operand |
||
| 2409 | SOpcodeDef OpcodeMap5F[2] = { |
||
| 2410 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2411 | {"lsl", 0x802 , 0x1100 , 0x12 , 0x1009, 0x2002, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 03 memory |
||
| 2412 | {"lsl", 0x802 , 0x1100 , 0x12 , 0x1009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 03 register |
||
| 2413 | |||
| 2414 | // Tertiary opcode map for popcnt. Opcode byte = 0F B8 |
||
| 2415 | // Indexed by prefixes (none, 66, F2, F3) |
||
| 2416 | SOpcodeDef OpcodeMap60[4] = { |
||
| 2417 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2418 | {"jmpe;Itanium only",0,0 , 0x11 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F B8 |
||
| 2419 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F B8 |
||
| 2420 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F B8 |
||
| 2421 | {"popcnt", 0x16 ,0x11500 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F B8 |
||
| 2422 | |||
| 2423 | // Quarternary opcode map for pextrb. Opcode byte = 0F 3A 14 |
||
| 2424 | // Indexed by memory vs. register operand |
||
| 2425 | SOpcodeDef OpcodeMap61[2] = { |
||
| 2426 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2427 | {"pextrb", 0x15 ,0x81A200, 0x53 , 0x2001, 0x1401, 0x31 , 0 , 0x1000, 0 , 0 , 0x2 }, // 0F 3A 14 memory |
||
| 2428 | {"pextrb", 0x15 ,0x81A200, 0x53 , 0x1009, 0x1401, 0x31 , 0 , 0 , 0 , 0 , 0x2 }}; // 0F 3A 14 register |
||
| 2429 | |||
| 2430 | // Quarternary opcode map for pextrw. Opcode byte = 0F 3A 15 |
||
| 2431 | // Indexed by memory vs. register operand |
||
| 2432 | SOpcodeDef OpcodeMap62[2] = { |
||
| 2433 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2434 | {"pextrw", 0x15 ,0x81A200, 0x53 , 0x2002, 0x1402, 0x31 , 0 , 0x1000, 0 , 0 , 0x2 }, // 0F 3A 15 memory |
||
| 2435 | {"pextrw", 0x15 ,0x81A200, 0x53 , 0x1002, 0x1402, 0x31 , 0 , 0 , 0 , 0 , 0x2 }}; // 0F 3A 15 register |
||
| 2436 | |||
| 2437 | // Quarternary opcode map for pextrd/q. Opcode byte = 0F 3A 16 |
||
| 2438 | // Indexed by operand size (16, 32, 64) |
||
| 2439 | SOpcodeDef OpcodeMap63[3] = { |
||
| 2440 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2441 | {"pextr", 0x15 ,0x81B200, 0x53 , 0x3 , 0x1403, 0x31 , 0 , 0x1000, 0 , 0 , 3 }, // 0F 3A 16 pextrd |
||
| 2442 | {"pextr", 0x15 ,0x81B200, 0x53 , 0x3 , 0x1403, 0x31 , 0 , 0x1000, 0 , 0 , 3 }, // 0F 3A 16 pextrd |
||
| 2443 | {"pextr", 0x15 ,0x81B200, 0x53 , 0x4 , 0x1404, 0x31 , 0 , 0x1000, 0 , 0 , 3 }}; // 0F 3A 16 pextrq |
||
| 2444 | |||
| 2445 | // Opcode map for AMD instructions with XOP prefix and mmmmm = 01000 |
||
| 2446 | // Indexed by first opcode byte after XOP prefix. Has one byte immediate data |
||
| 2447 | SOpcodeDef OpcodeMap64[] = { |
||
| 2448 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2449 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 00 |
||
| 2450 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 01 |
||
| 2451 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 02 |
||
| 2452 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 03 |
||
| 2453 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 04 |
||
| 2454 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 05 |
||
| 2455 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 06 |
||
| 2456 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 07 |
||
| 2457 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 08 |
||
| 2458 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 09 |
||
| 2459 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0A |
||
| 2460 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0B |
||
| 2461 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0C |
||
| 2462 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0D |
||
| 2463 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0E |
||
| 2464 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 0F |
||
| 2465 | |||
| 2466 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 10 |
||
| 2467 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 11 |
||
| 2468 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 12 |
||
| 2469 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 13 |
||
| 2470 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 14 |
||
| 2471 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 15 |
||
| 2472 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 16 |
||
| 2473 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 17 |
||
| 2474 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 18 |
||
| 2475 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 19 |
||
| 2476 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1A |
||
| 2477 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1B |
||
| 2478 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1C |
||
| 2479 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1D |
||
| 2480 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1E |
||
| 2481 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 1F |
||
| 2482 | |||
| 2483 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 20 |
||
| 2484 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 21 |
||
| 2485 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 22 |
||
| 2486 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 23 |
||
| 2487 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 24 |
||
| 2488 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 25 |
||
| 2489 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 26 |
||
| 2490 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 27 |
||
| 2491 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 28 |
||
| 2492 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 29 |
||
| 2493 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2A |
||
| 2494 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2B |
||
| 2495 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2C |
||
| 2496 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2D |
||
| 2497 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2E |
||
| 2498 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 2F |
||
| 2499 | |||
| 2500 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 30 |
||
| 2501 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 31 |
||
| 2502 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 32 |
||
| 2503 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 33 |
||
| 2504 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 34 |
||
| 2505 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 35 |
||
| 2506 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 36 |
||
| 2507 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 37 |
||
| 2508 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 38 |
||
| 2509 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 39 |
||
| 2510 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3A |
||
| 2511 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3B |
||
| 2512 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3C |
||
| 2513 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3D |
||
| 2514 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3E |
||
| 2515 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 3F |
||
| 2516 | |||
| 2517 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 40 |
||
| 2518 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 41 |
||
| 2519 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 42 |
||
| 2520 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 43 |
||
| 2521 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 44 |
||
| 2522 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 45 |
||
| 2523 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 46 |
||
| 2524 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 47 |
||
| 2525 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 48 |
||
| 2526 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 49 |
||
| 2527 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4A |
||
| 2528 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4B |
||
| 2529 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4C |
||
| 2530 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4D |
||
| 2531 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4E |
||
| 2532 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 4F |
||
| 2533 | |||
| 2534 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 50 |
||
| 2535 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 51 |
||
| 2536 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 52 |
||
| 2537 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 53 |
||
| 2538 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 54 |
||
| 2539 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 55 |
||
| 2540 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 56 |
||
| 2541 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 57 |
||
| 2542 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 58 |
||
| 2543 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 59 |
||
| 2544 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5A |
||
| 2545 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5B |
||
| 2546 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5C |
||
| 2547 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5D |
||
| 2548 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5E |
||
| 2549 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 5F |
||
| 2550 | |||
| 2551 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 60 |
||
| 2552 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 61 |
||
| 2553 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 62 |
||
| 2554 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 63 |
||
| 2555 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 64 |
||
| 2556 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 65 |
||
| 2557 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 66 |
||
| 2558 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 67 |
||
| 2559 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 68 |
||
| 2560 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 69 |
||
| 2561 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6A |
||
| 2562 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6B |
||
| 2563 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6C |
||
| 2564 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6D |
||
| 2565 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6E |
||
| 2566 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 6F |
||
| 2567 | |||
| 2568 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 70 |
||
| 2569 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 71 |
||
| 2570 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 72 |
||
| 2571 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 73 |
||
| 2572 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 74 |
||
| 2573 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 75 |
||
| 2574 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 76 |
||
| 2575 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 77 |
||
| 2576 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 78 |
||
| 2577 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 79 |
||
| 2578 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7A |
||
| 2579 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7B |
||
| 2580 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7C |
||
| 2581 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7D |
||
| 2582 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7E |
||
| 2583 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 7F |
||
| 2584 | |||
| 2585 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 80 |
||
| 2586 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 81 |
||
| 2587 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 82 |
||
| 2588 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 83 |
||
| 2589 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 84 |
||
| 2590 | {"vpmacssww", 0x1005, 0xB0000, 0x5C, 0x1202, 0x1202, 0x202 , 0x1202, 0 , 0 , 0 , 0 }, // XOP(8) 85 |
||
| 2591 | {"vpmacsswd", 0x1005, 0xB0000, 0x5C, 0x1203, 0x1202, 0x202 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) 86 |
||
| 2592 | {"vpmacssdql",0x1005, 0xB0000, 0x5C, 0x1204, 0x1203, 0x203 , 0x1204, 0 , 0 , 0 , 0 }, // XOP(8) 87 |
||
| 2593 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 88 |
||
| 2594 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 89 |
||
| 2595 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 8A |
||
| 2596 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 8B |
||
| 2597 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 8C |
||
| 2598 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 8D |
||
| 2599 | {"vpmacssdd", 0x1005, 0xB0000, 0x5C, 0x1203, 0x1203, 0x203 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) 8E |
||
| 2600 | {"vpmacssdqh",0x1005, 0xB0000, 0x5C, 0x1204, 0x1203, 0x203 , 0x1204, 0 , 0 , 0 , 0 }, // XOP(8) 8F |
||
| 2601 | |||
| 2602 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 90 |
||
| 2603 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 91 |
||
| 2604 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 92 |
||
| 2605 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 93 |
||
| 2606 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 94 |
||
| 2607 | {"vpmacsww", 0x1005, 0xB0000, 0x5C, 0x1202, 0x1202, 0x202 , 0x1202, 0 , 0 , 0 , 0 }, // XOP(8) 95 |
||
| 2608 | {"vpmacswd", 0x1005, 0xB0000, 0x5C, 0x1203, 0x1202, 0x202 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) 96 |
||
| 2609 | {"vpmacsdql", 0x1005, 0xB0000, 0x5C, 0x1204, 0x1203, 0x203 , 0x1204, 0 , 0 , 0 , 0 }, // XOP(8) 97 |
||
| 2610 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 98 |
||
| 2611 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 99 |
||
| 2612 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 9A |
||
| 2613 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 9B |
||
| 2614 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 9C |
||
| 2615 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) 9D |
||
| 2616 | {"vpmacsdd", 0x1005, 0xB0000, 0x5C, 0x1203, 0x1203, 0x203 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) 9E |
||
| 2617 | {"vpmacsdqh", 0x1005, 0xB0000, 0x5C, 0x1204, 0x1203, 0x203 , 0x1204, 0 , 0 , 0 , 0 }, // XOP(8) 9F |
||
| 2618 | |||
| 2619 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2620 | {"cvtph2ps", 0x1D , 0x70000, 0x52 , 0x124B, 0x402 , 0x31 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A0 |
||
| 2621 | {"cvtps2ph", 0x1D , 0x70000, 0x53 , 0x402, 0x124B, 0x31 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A1 |
||
| 2622 | {"vpcmov", 0x1005, 0xF7000, 0x5C, 0x1201, 0x1201, 0x201 , 0x201 , 0 , 0 , 0 , 0 }, // XOP(8) A2 |
||
| 2623 | {"vpperm", 0x1005, 0xB7000, 0x5C, 0x1201, 0x1201, 0x201 , 0x201 , 0 , 0 , 0 , 0 }, // XOP(8) A3 |
||
| 2624 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A4 |
||
| 2625 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A5 |
||
| 2626 | {"vpmadcsswd",0x1005, 0xB0000, 0x5C, 0x1203, 0x1202, 0x202 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) A6 |
||
| 2627 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A7 |
||
| 2628 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A8 |
||
| 2629 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) A9 |
||
| 2630 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AA |
||
| 2631 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AB |
||
| 2632 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AC |
||
| 2633 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AD |
||
| 2634 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AE |
||
| 2635 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) AF |
||
| 2636 | |||
| 2637 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B0 |
||
| 2638 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B1 |
||
| 2639 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B2 |
||
| 2640 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B3 |
||
| 2641 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B4 |
||
| 2642 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B5 |
||
| 2643 | {"vpmadcswd", 0x1005, 0xB0000, 0x5C, 0x1203, 0x1202, 0x202 , 0x1203, 0 , 0 , 0 , 0 }, // XOP(8) B6 |
||
| 2644 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B7 |
||
| 2645 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B8 |
||
| 2646 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) B9 |
||
| 2647 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BA |
||
| 2648 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BB |
||
| 2649 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BC |
||
| 2650 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BD |
||
| 2651 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BE |
||
| 2652 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) BF |
||
| 2653 | |||
| 2654 | {"vprotb", 0x1005, 0x30000, 0x52 , 0x1401, 0x401 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C0 |
||
| 2655 | {"vprotw", 0x1005, 0x30000, 0x52 , 0x1402, 0x402 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C1 |
||
| 2656 | {"vprotd", 0x1005, 0x30000, 0x52 , 0x1403, 0x403 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C2 |
||
| 2657 | {"vprotq", 0x1005, 0x30000, 0x52 , 0x1404, 0x404 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C3 |
||
| 2658 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C4 |
||
| 2659 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C5 |
||
| 2660 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C6 |
||
| 2661 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C7 |
||
| 2662 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C8 |
||
| 2663 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) C9 |
||
| 2664 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) CA |
||
| 2665 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) CB |
||
| 2666 | {"vpcomb", 0x1005, 0xB0000, 0x59 , 0x1401, 0x1401, 0x401 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) CC |
||
| 2667 | {"vpcomw", 0x1005, 0xB0000, 0x59 , 0x1402, 0x1402, 0x402 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) CD |
||
| 2668 | {"vpcomd", 0x1005, 0xB0000, 0x59 , 0x1403, 0x1403, 0x403 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) CE |
||
| 2669 | {"vpcomq", 0x1005, 0xB0000, 0x59 , 0x1404, 0x1404, 0x404 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) CF |
||
| 2670 | |||
| 2671 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D0 |
||
| 2672 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D1 |
||
| 2673 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D2 |
||
| 2674 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D3 |
||
| 2675 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D4 |
||
| 2676 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D5 |
||
| 2677 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D6 |
||
| 2678 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D7 |
||
| 2679 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D8 |
||
| 2680 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) D9 |
||
| 2681 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DA |
||
| 2682 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DB |
||
| 2683 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DC |
||
| 2684 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DD |
||
| 2685 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DE |
||
| 2686 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) DF |
||
| 2687 | |||
| 2688 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E0 |
||
| 2689 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E1 |
||
| 2690 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E2 |
||
| 2691 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E3 |
||
| 2692 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E4 |
||
| 2693 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E5 |
||
| 2694 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E6 |
||
| 2695 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E7 |
||
| 2696 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E8 |
||
| 2697 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) E9 |
||
| 2698 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) EA |
||
| 2699 | {0, 0 , 0 , 0x2059, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(8) EB |
||
| 2700 | {"vpcomub", 0x1005, 0xB0000, 0x59 , 0x1401, 0x1401, 0x401 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) EC |
||
| 2701 | {"vpcomuw", 0x1005, 0xB0000, 0x59 , 0x1402, 0x1402, 0x402 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) ED |
||
| 2702 | {"vpcomud", 0x1005, 0xB0000, 0x59 , 0x1403, 0x1403, 0x403 , 0x31 , 0 , 0 , 0 , 0 }, // XOP(8) EE |
||
| 2703 | {"vpcomuq", 0x1005, 0xB0000, 0x59 , 0x1404, 0x1404, 0x404 , 0x31 , 0 , 0 , 0 , 0 }}; // XOP(8) EF |
||
| 2704 | |||
| 2705 | |||
| 2706 | // Opcode map for AMD instructions with XOP prefix and mmmmm = 01001 |
||
| 2707 | // Indexed by first opcode byte after XOP prefix. Has no immediate data |
||
| 2708 | SOpcodeDef OpcodeMap65[] = { |
||
| 2709 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2710 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 00 |
||
| 2711 | {0, 0xD4 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // XOP(9) 01. Link blcfill etc. |
||
| 2712 | {0, 0xD5 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // XOP(9) 02. Link blcmsk etc. |
||
| 2713 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 03 |
||
| 2714 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 04 |
||
| 2715 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 05 |
||
| 2716 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 06 |
||
| 2717 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 07 |
||
| 2718 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 08 |
||
| 2719 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 09 |
||
| 2720 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0A |
||
| 2721 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0B |
||
| 2722 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0C |
||
| 2723 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0D |
||
| 2724 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0E |
||
| 2725 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 0F |
||
| 2726 | |||
| 2727 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 10 |
||
| 2728 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 11 |
||
| 2729 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 12 |
||
| 2730 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 13 |
||
| 2731 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 14 |
||
| 2732 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 15 |
||
| 2733 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 16 |
||
| 2734 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 17 |
||
| 2735 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 18 |
||
| 2736 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 19 |
||
| 2737 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1A |
||
| 2738 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1B |
||
| 2739 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1C |
||
| 2740 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1D |
||
| 2741 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1E |
||
| 2742 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 1F |
||
| 2743 | |||
| 2744 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 20 |
||
| 2745 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 21 |
||
| 2746 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 22 |
||
| 2747 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 23 |
||
| 2748 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 24 |
||
| 2749 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 25 |
||
| 2750 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 26 |
||
| 2751 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 27 |
||
| 2752 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 28 |
||
| 2753 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 29 |
||
| 2754 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2A |
||
| 2755 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2B |
||
| 2756 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2C |
||
| 2757 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2D |
||
| 2758 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2E |
||
| 2759 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 2F |
||
| 2760 | |||
| 2761 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 30 |
||
| 2762 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 31 |
||
| 2763 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 32 |
||
| 2764 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 33 |
||
| 2765 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 34 |
||
| 2766 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 35 |
||
| 2767 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 36 |
||
| 2768 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 37 |
||
| 2769 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 38 |
||
| 2770 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 39 |
||
| 2771 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3A |
||
| 2772 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3B |
||
| 2773 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3C |
||
| 2774 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3D |
||
| 2775 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3E |
||
| 2776 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 3F |
||
| 2777 | |||
| 2778 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 40 |
||
| 2779 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 41 |
||
| 2780 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 42 |
||
| 2781 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 43 |
||
| 2782 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 44 |
||
| 2783 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 45 |
||
| 2784 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 46 |
||
| 2785 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 47 |
||
| 2786 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 48 |
||
| 2787 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 49 |
||
| 2788 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4A |
||
| 2789 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4B |
||
| 2790 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4C |
||
| 2791 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4D |
||
| 2792 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4E |
||
| 2793 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 4F |
||
| 2794 | |||
| 2795 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 50 |
||
| 2796 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 51 |
||
| 2797 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 52 |
||
| 2798 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 53 |
||
| 2799 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 54 |
||
| 2800 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 55 |
||
| 2801 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 56 |
||
| 2802 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 57 |
||
| 2803 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 58 |
||
| 2804 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 59 |
||
| 2805 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5A |
||
| 2806 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5B |
||
| 2807 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5C |
||
| 2808 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5D |
||
| 2809 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5E |
||
| 2810 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 5F |
||
| 2811 | |||
| 2812 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 60 |
||
| 2813 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 61 |
||
| 2814 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 62 |
||
| 2815 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 63 |
||
| 2816 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 64 |
||
| 2817 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 65 |
||
| 2818 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 66 |
||
| 2819 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 67 |
||
| 2820 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 68 |
||
| 2821 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 69 |
||
| 2822 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6A |
||
| 2823 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6B |
||
| 2824 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6C |
||
| 2825 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6D |
||
| 2826 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6E |
||
| 2827 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 6F |
||
| 2828 | |||
| 2829 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 70 |
||
| 2830 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 71 |
||
| 2831 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 72 |
||
| 2832 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 73 |
||
| 2833 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 74 |
||
| 2834 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 75 |
||
| 2835 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 76 |
||
| 2836 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 77 |
||
| 2837 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 78 |
||
| 2838 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 79 |
||
| 2839 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7A |
||
| 2840 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7B |
||
| 2841 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7C |
||
| 2842 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7D |
||
| 2843 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7E |
||
| 2844 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 7F |
||
| 2845 | |||
| 2846 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2847 | {"frczps", 0x11005,0x70000, 0x12 , 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 80 |
||
| 2848 | {"frczpd", 0x11005,0x70000, 0x12 , 0x124C, 0x24C , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 81 |
||
| 2849 | {"frczss", 0x11005,0x70000, 0x12 , 0x124B, 0x4B , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 82 |
||
| 2850 | {"frczsd", 0x11005,0x70000, 0x12 , 0x124C, 0x4C , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 83 |
||
| 2851 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 84 |
||
| 2852 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 85 |
||
| 2853 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 86 |
||
| 2854 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 87 |
||
| 2855 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 88 |
||
| 2856 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 89 |
||
| 2857 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8A |
||
| 2858 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8B |
||
| 2859 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8C |
||
| 2860 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8D |
||
| 2861 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8E |
||
| 2862 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 8F |
||
| 2863 | |||
| 2864 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2865 | {"vprotb", 0x1005, 0xB7000, 0x19 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 90 |
||
| 2866 | {"vprotw", 0x1005, 0xB7000, 0x19 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 91 |
||
| 2867 | {"vprotd", 0x1005, 0xB7000, 0x19 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 92 |
||
| 2868 | {"vprotq", 0x1005, 0xB7000, 0x19 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 93 |
||
| 2869 | {"vpshlb", 0x1005, 0xB7000, 0x19 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 94 |
||
| 2870 | {"vpshlw", 0x1005, 0xB7000, 0x19 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 95 |
||
| 2871 | {"vpshld", 0x1005, 0xB7000, 0x19 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 96 |
||
| 2872 | {"vpshlq", 0x1005, 0xB7000, 0x19 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 97 |
||
| 2873 | {"vpshab", 0x1005, 0xB7000, 0x19 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 98 |
||
| 2874 | {"vpshaw", 0x1005, 0xB7000, 0x19 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 99 |
||
| 2875 | {"vpshad", 0x1005, 0xB7000, 0x19 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9A |
||
| 2876 | {"vpshaq", 0x1005, 0xB7000, 0x19 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9B |
||
| 2877 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9C |
||
| 2878 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9D |
||
| 2879 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9E |
||
| 2880 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 9F |
||
| 2881 | |||
| 2882 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A0 |
||
| 2883 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A1 |
||
| 2884 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A2 |
||
| 2885 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A3 |
||
| 2886 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A4 |
||
| 2887 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A5 |
||
| 2888 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A6 |
||
| 2889 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A7 |
||
| 2890 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A8 |
||
| 2891 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) A9 |
||
| 2892 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AA |
||
| 2893 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AB |
||
| 2894 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AC |
||
| 2895 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AD |
||
| 2896 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AE |
||
| 2897 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) AF |
||
| 2898 | |||
| 2899 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B0 |
||
| 2900 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B1 |
||
| 2901 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B2 |
||
| 2902 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B3 |
||
| 2903 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B4 |
||
| 2904 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B5 |
||
| 2905 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B6 |
||
| 2906 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B7 |
||
| 2907 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B8 |
||
| 2908 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) B9 |
||
| 2909 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BA |
||
| 2910 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BB |
||
| 2911 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BC |
||
| 2912 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BD |
||
| 2913 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BE |
||
| 2914 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) BF |
||
| 2915 | |||
| 2916 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2917 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C0 |
||
| 2918 | {"vphaddbw", 0x1005, 0x30000, 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C1 |
||
| 2919 | {"vphaddbd", 0x1005, 0x30000, 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C2 |
||
| 2920 | {"vphaddbq", 0x1005, 0x30000, 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C3 |
||
| 2921 | {0, 0 , 0 , 0x2019, 0x0, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C4 |
||
| 2922 | {0, 0 , 0 , 0x2019, 0x0, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C5 |
||
| 2923 | {"vphaddwd", 0x1005, 0x30000, 0x12 , 0x1403, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C6 |
||
| 2924 | {"vphaddwq", 0x1005, 0x30000, 0x12 , 0x1404, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C7 |
||
| 2925 | {0, 0 , 0 , 0x2019, 0x0, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C8 |
||
| 2926 | {0, 0 , 0 , 0x2019, 0x0, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) C9 |
||
| 2927 | {0, 0 , 0 , 0x2019, 0x0, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CA |
||
| 2928 | {"vphadddq", 0x1005, 0x30000, 0x12 , 0x1404, 0x403 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CB |
||
| 2929 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CC |
||
| 2930 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CD |
||
| 2931 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CE |
||
| 2932 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) CF |
||
| 2933 | |||
| 2934 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D0 |
||
| 2935 | {"vphaddubw", 0x1005, 0x30000, 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D1 |
||
| 2936 | {"vphaddubd", 0x1005, 0x30000, 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D2 |
||
| 2937 | {"vphaddubq", 0x1005, 0x30000, 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D3 |
||
| 2938 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D3 |
||
| 2939 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D4 |
||
| 2940 | {"vphadduwd", 0x1005, 0x30000, 0x12 , 0x1403, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D6 |
||
| 2941 | {"vphadduwq", 0x1005, 0x30000, 0x12 , 0x1404, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D7 |
||
| 2942 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D7 |
||
| 2943 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D8 |
||
| 2944 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) D9 |
||
| 2945 | {"vphaddudq", 0x1005, 0x30000, 0x12 , 0x1404, 0x403 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) DB |
||
| 2946 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) DC |
||
| 2947 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) DD |
||
| 2948 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) DE |
||
| 2949 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) DF |
||
| 2950 | |||
| 2951 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E0 |
||
| 2952 | {"vphsubbw", 0x1005, 0x30000, 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E1 |
||
| 2953 | {"vphsubwd", 0x1005, 0x30000, 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E2 |
||
| 2954 | {"vphsubdq", 0x1005, 0x30000, 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E3 |
||
| 2955 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E4 |
||
| 2956 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E5 |
||
| 2957 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E6 |
||
| 2958 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E7 |
||
| 2959 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E8 |
||
| 2960 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) E9 |
||
| 2961 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) EA |
||
| 2962 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) EB |
||
| 2963 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) EC |
||
| 2964 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) ED |
||
| 2965 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) EE |
||
| 2966 | {0, 0 , 0 , 0x2019, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // XOP(9) EF |
||
| 2967 | |||
| 2968 | // Opcode map for AMD instructions with XOP prefix and mmmmm = 01010 |
||
| 2969 | // Indexed by first opcode byte after XOP prefix. Has 4 bytes immediate data |
||
| 2970 | SOpcodeDef OpcodeMap66[] = { |
||
| 2971 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2972 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 00 |
||
| 2973 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 01 |
||
| 2974 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 02 |
||
| 2975 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 03 |
||
| 2976 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 04 |
||
| 2977 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 05 |
||
| 2978 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 06 |
||
| 2979 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 07 |
||
| 2980 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 08 |
||
| 2981 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 09 |
||
| 2982 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0A |
||
| 2983 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0B |
||
| 2984 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0C |
||
| 2985 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0D |
||
| 2986 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0E |
||
| 2987 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 0F |
||
| 2988 | |||
| 2989 | {"bextr", 0x1007, 0x11000, 0x92 , 0x1009, 0x9 , 0x33 , 0 , 0 , 0 , 0 , 0 }, // XOP(0xA) 10 |
||
| 2990 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // XOP(0xA) 11 |
||
| 2991 | |||
| 2992 | |||
| 2993 | // Opcode map for AMD instructions with XOP prefix and mmmmm = 01011 or whatever (vacant) |
||
| 2994 | // Indexed by first opcode byte after XOP prefix. |
||
| 2995 | SOpcodeDef OpcodeMap67[] = { |
||
| 2996 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 2997 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // XOP(0xB) 00 |
||
| 2998 | |||
| 2999 | |||
| 3000 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 24 |
||
| 3001 | // Indexed by third opcode byte |
||
| 3002 | // AMD SSE5 instructions with three or four operands |
||
| 3003 | |||
| 3004 | //************************* NOTE *********************** |
||
| 3005 | // These proposed codes have never been implemented. |
||
| 3006 | // Specifications have been changed for the sake of compatibility with Intel AVX coding scheme |
||
| 3007 | // ***************************************************** |
||
| 3008 | SOpcodeDef OpcodeMap68[] = { |
||
| 3009 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3010 | {"fmaddps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 00 |
||
| 3011 | {"fmaddpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 01 |
||
| 3012 | {"fmaddss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 02 |
||
| 3013 | {"fmaddsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 03 |
||
| 3014 | {"fmaddps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 04 |
||
| 3015 | {"fmaddpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 05 |
||
| 3016 | {"fmaddss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 06 |
||
| 3017 | {"fmaddsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 07 |
||
| 3018 | {"fmsubps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 08 |
||
| 3019 | {"fmsubpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 09 |
||
| 3020 | {"fmsubss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 0A |
||
| 3021 | {"fmsubsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 0B |
||
| 3022 | {"fmsubps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 0C |
||
| 3023 | {"fmsubpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 0D |
||
| 3024 | {"fmsubss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 0E |
||
| 3025 | {"fmsubsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 0F |
||
| 3026 | |||
| 3027 | {"fnmaddps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 10 |
||
| 3028 | {"fnmaddpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 11 |
||
| 3029 | {"fnmaddss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 12 |
||
| 3030 | {"fnmaddsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 13 |
||
| 3031 | {"fnmaddps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 14 |
||
| 3032 | {"fnmaddpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 15 |
||
| 3033 | {"fnmaddss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 16 |
||
| 3034 | {"fnmaddsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 17 |
||
| 3035 | {"fnmsubps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 18 |
||
| 3036 | {"fnmsubpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 19 |
||
| 3037 | {"fnmsubss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 1A |
||
| 3038 | {"fnmsubsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 1B |
||
| 3039 | {"fnmsubps", 0x21006,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 1C |
||
| 3040 | {"fnmsubpd", 0x21006,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 1D |
||
| 3041 | {"fnmsubss", 0x21006,0x0 , 0x15 , 0x104B, 0x4B , 0x4B , 0x4B , 0 , 0 , 0 , 0 }, // 0F 24 1E |
||
| 3042 | {"fnmsubsd", 0x21006,0x0 , 0x15 , 0x104C, 0x4C , 0x4C , 0x4C , 0 , 0 , 0 , 0 }, // 0F 24 1F |
||
| 3043 | |||
| 3044 | {"permps", 0x21005,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 20 |
||
| 3045 | {"permpd", 0x21005,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 21 |
||
| 3046 | {"pcmov", 0x21005,0x0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 22 |
||
| 3047 | {"pperm", 0x21005,0x0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 23 |
||
| 3048 | {"permps", 0x21005,0x0 , 0x15 , 0x124B, 0x24B , 0x24B , 0x24B , 0 , 0 , 0 , 0 }, // 0F 24 24 |
||
| 3049 | {"permpd", 0x21005,0x0 , 0x15 , 0x124C, 0x24C , 0x24C , 0x24C , 0 , 0 , 0 , 0 }, // 0F 24 25 |
||
| 3050 | {"pcmov", 0x21005,0x0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 26 |
||
| 3051 | {"pperm", 0x21005,0x0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 27 |
||
| 3052 | |||
| 3053 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 28 |
||
| 3054 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 29 |
||
| 3055 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2A |
||
| 3056 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2B |
||
| 3057 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2C |
||
| 3058 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2D |
||
| 3059 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2E |
||
| 3060 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 2F |
||
| 3061 | |||
| 3062 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 30 |
||
| 3063 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 31 |
||
| 3064 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 32 |
||
| 3065 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 33 |
||
| 3066 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 34 |
||
| 3067 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 35 |
||
| 3068 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 36 |
||
| 3069 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 37 |
||
| 3070 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 38 |
||
| 3071 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 39 |
||
| 3072 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3A |
||
| 3073 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3B |
||
| 3074 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3C |
||
| 3075 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3D |
||
| 3076 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3E |
||
| 3077 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 3F |
||
| 3078 | |||
| 3079 | {"protb", 0x21005,0x0 , 0x14 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 40 |
||
| 3080 | {"protw", 0x21005,0x0 , 0x14 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 41 |
||
| 3081 | {"protd", 0x21005,0x0 , 0x14 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 42 |
||
| 3082 | {"protq", 0x21005,0x0 , 0x14 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 43 |
||
| 3083 | {"pshlb", 0x21005,0x0 , 0x14 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 44 |
||
| 3084 | {"pshlw", 0x21005,0x0 , 0x14 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 45 |
||
| 3085 | {"pshld", 0x21005,0x0 , 0x14 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 46 |
||
| 3086 | {"pshlq", 0x21005,0x0 , 0x14 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 47 |
||
| 3087 | {"pshab", 0x21005,0x0 , 0x14 , 0x1401, 0x401 , 0x401 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 48 |
||
| 3088 | {"pshaw", 0x21005,0x0 , 0x14 , 0x1402, 0x402 , 0x402 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 49 |
||
| 3089 | {"pshad", 0x21005,0x0 , 0x14 , 0x1403, 0x403 , 0x403 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 4A |
||
| 3090 | {"pshaq", 0x21005,0x0 , 0x14 , 0x1404, 0x404 , 0x404 , 0 , 0 , 0 , 0 , 0 }, // 0F 24 4B |
||
| 3091 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 4C |
||
| 3092 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 4D |
||
| 3093 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 4E |
||
| 3094 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 4F |
||
| 3095 | |||
| 3096 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 50 |
||
| 3097 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 51 |
||
| 3098 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 52 |
||
| 3099 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 53 |
||
| 3100 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 54 |
||
| 3101 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 55 |
||
| 3102 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 56 |
||
| 3103 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 57 |
||
| 3104 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 58 |
||
| 3105 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 59 |
||
| 3106 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5A |
||
| 3107 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5B |
||
| 3108 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5C |
||
| 3109 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5D |
||
| 3110 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5E |
||
| 3111 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 5F |
||
| 3112 | |||
| 3113 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 60 |
||
| 3114 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 61 |
||
| 3115 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 62 |
||
| 3116 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 63 |
||
| 3117 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 64 |
||
| 3118 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 65 |
||
| 3119 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 66 |
||
| 3120 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 67 |
||
| 3121 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 68 |
||
| 3122 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 69 |
||
| 3123 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6A |
||
| 3124 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6B |
||
| 3125 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6C |
||
| 3126 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6D |
||
| 3127 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6E |
||
| 3128 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 6F |
||
| 3129 | |||
| 3130 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 70 |
||
| 3131 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 71 |
||
| 3132 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 72 |
||
| 3133 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 73 |
||
| 3134 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 74 |
||
| 3135 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 75 |
||
| 3136 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 76 |
||
| 3137 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 77 |
||
| 3138 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 78 |
||
| 3139 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 79 |
||
| 3140 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7A |
||
| 3141 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7B |
||
| 3142 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7C |
||
| 3143 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7D |
||
| 3144 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7E |
||
| 3145 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 7F |
||
| 3146 | |||
| 3147 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 80 |
||
| 3148 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 81 |
||
| 3149 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 82 |
||
| 3150 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 83 |
||
| 3151 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 84 |
||
| 3152 | {"pmacssww", 0x21005,0x0 , 0x15 , 0x1402, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 85 |
||
| 3153 | {"pmacsswd", 0x21005,0x0 , 0x15 , 0x1403, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 86 |
||
| 3154 | {"pmacssdql", 0x21005,0x0 , 0x15 , 0x1404, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 87 |
||
| 3155 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 88 |
||
| 3156 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 89 |
||
| 3157 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 8A |
||
| 3158 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 8B |
||
| 3159 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 8C |
||
| 3160 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 8D |
||
| 3161 | {"pmacssdd", 0x21005,0x0 , 0x15 , 0x1403, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 8E |
||
| 3162 | {"pmacssdqh", 0x21005,0x0 , 0x15 , 0x1404, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 8F |
||
| 3163 | |||
| 3164 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 90 |
||
| 3165 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 91 |
||
| 3166 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 92 |
||
| 3167 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 93 |
||
| 3168 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 94 |
||
| 3169 | {"pmacsww", 0x21005,0x0 , 0x15 , 0x1402, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 95 |
||
| 3170 | {"pmacswd", 0x21005,0x0 , 0x15 , 0x1403, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 96 |
||
| 3171 | {"pmacsdql", 0x21005,0x0 , 0x15 , 0x1404, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 97 |
||
| 3172 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 98 |
||
| 3173 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 99 |
||
| 3174 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 9A |
||
| 3175 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 9B |
||
| 3176 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 9C |
||
| 3177 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 9D |
||
| 3178 | {"pmacsdd", 0x21005,0x0 , 0x15 , 0x1403, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 9E |
||
| 3179 | {"pmacsdqh", 0x21005,0x0 , 0x15 , 0x1404, 0x403 , 0x403 , 0x403 , 0 , 0 , 0 , 0 }, // 0F 24 9F |
||
| 3180 | |||
| 3181 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A0 |
||
| 3182 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A1 |
||
| 3183 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A2 |
||
| 3184 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A3 |
||
| 3185 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A4 |
||
| 3186 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A5 |
||
| 3187 | {"pmadcsswd", 0x21005,0x0 , 0x15 , 0x1403, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 A6 |
||
| 3188 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A7 |
||
| 3189 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A8 |
||
| 3190 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 A9 |
||
| 3191 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AA |
||
| 3192 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AB |
||
| 3193 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AC |
||
| 3194 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AD |
||
| 3195 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AE |
||
| 3196 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 AF |
||
| 3197 | |||
| 3198 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B0 |
||
| 3199 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B1 |
||
| 3200 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B2 |
||
| 3201 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B3 |
||
| 3202 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B4 |
||
| 3203 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B5 |
||
| 3204 | {"pmadcswd", 0x21005,0x0 , 0x15 , 0x1403, 0x402 , 0x402 , 0x402 , 0 , 0 , 0 , 0 }, // 0F 24 B6 |
||
| 3205 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B7 |
||
| 3206 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B8 |
||
| 3207 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 B9 |
||
| 3208 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BA |
||
| 3209 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BB |
||
| 3210 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BC |
||
| 3211 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BD |
||
| 3212 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BE |
||
| 3213 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }, // 0F 24 BF |
||
| 3214 | |||
| 3215 | {0, 0 , 0 , 0x15 , 0x1450, 0x450 , 0x450 , 0x450 , 0 , 0 , 0 , 0 }}; // 0F 24 C0+. Reserved for future opcodes |
||
| 3216 | |||
| 3217 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 25 |
||
| 3218 | // Indexed by third opcode byte |
||
| 3219 | // AMD SSE5 instructions with three operands + immediate byte |
||
| 3220 | // Note: These proposed codes have never been implemented. |
||
| 3221 | SOpcodeDef OpcodeMap69[] = { |
||
| 3222 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3223 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 00 |
||
| 3224 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 01 |
||
| 3225 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 02 |
||
| 3226 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 03 |
||
| 3227 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 04 |
||
| 3228 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 05 |
||
| 3229 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 06 |
||
| 3230 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 07 |
||
| 3231 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 08 |
||
| 3232 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 09 |
||
| 3233 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0A |
||
| 3234 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0B |
||
| 3235 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0C |
||
| 3236 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0D |
||
| 3237 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0E |
||
| 3238 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 0F |
||
| 3239 | |||
| 3240 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 10 |
||
| 3241 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 11 |
||
| 3242 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 12 |
||
| 3243 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 13 |
||
| 3244 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 14 |
||
| 3245 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 15 |
||
| 3246 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 16 |
||
| 3247 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 17 |
||
| 3248 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 18 |
||
| 3249 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 19 |
||
| 3250 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1A |
||
| 3251 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1B |
||
| 3252 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1C |
||
| 3253 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1D |
||
| 3254 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1E |
||
| 3255 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 1F |
||
| 3256 | |||
| 3257 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 20 |
||
| 3258 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 21 |
||
| 3259 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 22 |
||
| 3260 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 23 |
||
| 3261 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 24 |
||
| 3262 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 25 |
||
| 3263 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 26 |
||
| 3264 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 27 |
||
| 3265 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 28 |
||
| 3266 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 29 |
||
| 3267 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2A |
||
| 3268 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2B |
||
| 3269 | {"comps", 0x21005,0x0 , 0x54 , 0x124B, 0x24B , 0x24B , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2C |
||
| 3270 | {"compd", 0x21005,0x0 , 0x54 , 0x124C, 0x24C , 0x24C , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2D |
||
| 3271 | {"comss", 0x21005,0x0 , 0x54 , 0x104B, 0x4B , 0x4B , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2E |
||
| 3272 | {"comsd", 0x21005,0x0 , 0x54 , 0x104C, 0x4C , 0x4C , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 2F |
||
| 3273 | |||
| 3274 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 30 |
||
| 3275 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 31 |
||
| 3276 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 32 |
||
| 3277 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 33 |
||
| 3278 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 34 |
||
| 3279 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 35 |
||
| 3280 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 36 |
||
| 3281 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 37 |
||
| 3282 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 38 |
||
| 3283 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 39 |
||
| 3284 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3A |
||
| 3285 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3B |
||
| 3286 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3C |
||
| 3287 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3D |
||
| 3288 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3E |
||
| 3289 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 3F |
||
| 3290 | |||
| 3291 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 40 |
||
| 3292 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 41 |
||
| 3293 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 42 |
||
| 3294 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 43 |
||
| 3295 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 44 |
||
| 3296 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 45 |
||
| 3297 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 46 |
||
| 3298 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 47 |
||
| 3299 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 48 |
||
| 3300 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 49 |
||
| 3301 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4A |
||
| 3302 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4B |
||
| 3303 | {"pcomb", 0x21005,0x0 , 0x54 , 0x1401, 0x401 , 0x401 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4C |
||
| 3304 | {"pcomw", 0x21005,0x0 , 0x54 , 0x1402, 0x402 , 0x402 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4D |
||
| 3305 | {"pcomd", 0x21005,0x0 , 0x54 , 0x1403, 0x403 , 0x403 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4E |
||
| 3306 | {"pcomq", 0x21005,0x0 , 0x54 , 0x1404, 0x404 , 0x404 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 4F |
||
| 3307 | |||
| 3308 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 50 |
||
| 3309 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 51 |
||
| 3310 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 52 |
||
| 3311 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 53 |
||
| 3312 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 54 |
||
| 3313 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 55 |
||
| 3314 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 56 |
||
| 3315 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 57 |
||
| 3316 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 58 |
||
| 3317 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 59 |
||
| 3318 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5A |
||
| 3319 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5B |
||
| 3320 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5C |
||
| 3321 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5D |
||
| 3322 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5E |
||
| 3323 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 5F |
||
| 3324 | |||
| 3325 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 60 |
||
| 3326 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 61 |
||
| 3327 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 62 |
||
| 3328 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 63 |
||
| 3329 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 64 |
||
| 3330 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 65 |
||
| 3331 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 66 |
||
| 3332 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 67 |
||
| 3333 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 68 |
||
| 3334 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 69 |
||
| 3335 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6A |
||
| 3336 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6B |
||
| 3337 | {"pcomub", 0x21005,0x0 , 0x54 , 0x1401, 0x401 , 0x401 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6C |
||
| 3338 | {"pcomuw", 0x21005,0x0 , 0x54 , 0x1402, 0x402 , 0x402 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6D |
||
| 3339 | {"pcomud", 0x21005,0x0 , 0x54 , 0x1403, 0x403 , 0x403 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6E |
||
| 3340 | {"pcomuq", 0x21005,0x0 , 0x54 , 0x1404, 0x404 , 0x404 , 0x31 , 0 , 0 , 0 , 0 }, // 0F 25 6F |
||
| 3341 | |||
| 3342 | {0, 0 , 0 , 0x54 , 0x1450, 0x450 , 0x450 , 0x31 , 0 , 0 , 0 , 0 }}; // 0F 25 70+. Reserved for future opcodes |
||
| 3343 | |||
| 3344 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 7A |
||
| 3345 | // Indexed by third opcode byte |
||
| 3346 | // AMD SSE5 instructions with two operands |
||
| 3347 | // Note: These proposed codes have never been implemented. |
||
| 3348 | SOpcodeDef OpcodeMap6A[] = { |
||
| 3349 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3350 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 00 |
||
| 3351 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 01 |
||
| 3352 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 02 |
||
| 3353 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 03 |
||
| 3354 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 04 |
||
| 3355 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 05 |
||
| 3356 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 06 |
||
| 3357 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 07 |
||
| 3358 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 08 |
||
| 3359 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 09 |
||
| 3360 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0A |
||
| 3361 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0B |
||
| 3362 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0C |
||
| 3363 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0D |
||
| 3364 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0E |
||
| 3365 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 0F |
||
| 3366 | |||
| 3367 | {"frczps", 0x21005,0x0 , 0x12 , 0x124B, 0x24B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 10 |
||
| 3368 | {"frczpd", 0x21005,0x0 , 0x12 , 0x124C, 0x24C , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 11 |
||
| 3369 | {"frczss", 0x21005,0x0 , 0x12 , 0x104B, 0x4B , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 12 |
||
| 3370 | {"frczsd", 0x21005,0x0 , 0x12 , 0x104C, 0x4C , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 13 |
||
| 3371 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 14 |
||
| 3372 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 15 |
||
| 3373 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 16 |
||
| 3374 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 17 |
||
| 3375 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 18 |
||
| 3376 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 19 |
||
| 3377 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1A |
||
| 3378 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1B |
||
| 3379 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1C |
||
| 3380 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1D |
||
| 3381 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1E |
||
| 3382 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 1F |
||
| 3383 | |||
| 3384 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 20 |
||
| 3385 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 21 |
||
| 3386 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 22 |
||
| 3387 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 23 |
||
| 3388 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 24 |
||
| 3389 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 25 |
||
| 3390 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 26 |
||
| 3391 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 27 |
||
| 3392 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 28 |
||
| 3393 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 29 |
||
| 3394 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2A |
||
| 3395 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2B |
||
| 3396 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2C |
||
| 3397 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2D |
||
| 3398 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2E |
||
| 3399 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 2F |
||
| 3400 | |||
| 3401 | {"cvtph2ps", 0x21007,0x0 , 0x12 , 0x124B, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 30 |
||
| 3402 | {"cvtps2ph", 0x21007,0x0 , 0x13 , 0x402, 0x124B, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 31 |
||
| 3403 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 32 |
||
| 3404 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 33 |
||
| 3405 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 34 |
||
| 3406 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 35 |
||
| 3407 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 36 |
||
| 3408 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 37 |
||
| 3409 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 38 |
||
| 3410 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 39 |
||
| 3411 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3A |
||
| 3412 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3B |
||
| 3413 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3C |
||
| 3414 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3D |
||
| 3415 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3E |
||
| 3416 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 3F |
||
| 3417 | |||
| 3418 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 40 |
||
| 3419 | {"phaddbw", 0x21005,0x0 , 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 41 |
||
| 3420 | {"phaddbd", 0x21005,0x0 , 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 42 |
||
| 3421 | {"phaddbq", 0x21005,0x0 , 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 43 |
||
| 3422 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 44 |
||
| 3423 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 45 |
||
| 3424 | {"phaddwd", 0x21005,0x0 , 0x12 , 0x1403, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 46 |
||
| 3425 | {"phaddwq", 0x21005,0x0 , 0x12 , 0x1404, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 47 |
||
| 3426 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 48 |
||
| 3427 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 49 |
||
| 3428 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4A |
||
| 3429 | {"phadddq", 0x21005,0x0 , 0x12 , 0x1404, 0x403 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4B |
||
| 3430 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4C |
||
| 3431 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4D |
||
| 3432 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4E |
||
| 3433 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 4F |
||
| 3434 | |||
| 3435 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 50 |
||
| 3436 | {"phaddubw", 0x21005,0x0 , 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 51 |
||
| 3437 | {"phaddubd", 0x21005,0x0 , 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 52 |
||
| 3438 | {"phaddubq", 0x21005,0x0 , 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 53 |
||
| 3439 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 54 |
||
| 3440 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 55 |
||
| 3441 | {"phadduwd", 0x21005,0x0 , 0x12 , 0x1403, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 56 |
||
| 3442 | {"phadduwq", 0x21005,0x0 , 0x12 , 0x1404, 0x402 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 57 |
||
| 3443 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 58 |
||
| 3444 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 59 |
||
| 3445 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5A |
||
| 3446 | {"phaddudq", 0x21005,0x0 , 0x12 , 0x1404, 0x403 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5B |
||
| 3447 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5C |
||
| 3448 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5D |
||
| 3449 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5E |
||
| 3450 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 5F |
||
| 3451 | |||
| 3452 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 60 |
||
| 3453 | {"phsubbw", 0x21005,0x0 , 0x12 , 0x1402, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 61 |
||
| 3454 | {"phsubwd", 0x21005,0x0 , 0x12 , 0x1403, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 62 |
||
| 3455 | {"phsubdq", 0x21005,0x0 , 0x12 , 0x1404, 0x401 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 63 |
||
| 3456 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 64 |
||
| 3457 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 65 |
||
| 3458 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 66 |
||
| 3459 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 67 |
||
| 3460 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 68 |
||
| 3461 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 69 |
||
| 3462 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 6A |
||
| 3463 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 6B |
||
| 3464 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 6C |
||
| 3465 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 6D |
||
| 3466 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7A 6E |
||
| 3467 | {0, 0 , 0 , 0x12 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 7A 6F |
||
| 3468 | |||
| 3469 | // Tertiary opcode map for 3-byte opcode. First two bytes = 0F 7B |
||
| 3470 | // Indexed by third opcode byte |
||
| 3471 | // AMD SSE5 instructions with two operands and an immediate byte operand |
||
| 3472 | // Note: These proposed codes have never been implemented. |
||
| 3473 | SOpcodeDef OpcodeMap6B[] = { |
||
| 3474 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3475 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 00 |
||
| 3476 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 01 |
||
| 3477 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 02 |
||
| 3478 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 03 |
||
| 3479 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 04 |
||
| 3480 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 05 |
||
| 3481 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 06 |
||
| 3482 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 07 |
||
| 3483 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 08 |
||
| 3484 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 09 |
||
| 3485 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0A |
||
| 3486 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0B |
||
| 3487 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0C |
||
| 3488 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0D |
||
| 3489 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0E |
||
| 3490 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 0F |
||
| 3491 | |||
| 3492 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 10 |
||
| 3493 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 11 |
||
| 3494 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 12 |
||
| 3495 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 13 |
||
| 3496 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 14 |
||
| 3497 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 15 |
||
| 3498 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 16 |
||
| 3499 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 17 |
||
| 3500 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 18 |
||
| 3501 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 19 |
||
| 3502 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1A |
||
| 3503 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1B |
||
| 3504 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1C |
||
| 3505 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1D |
||
| 3506 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1E |
||
| 3507 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 1F |
||
| 3508 | |||
| 3509 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 20 |
||
| 3510 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 21 |
||
| 3511 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 22 |
||
| 3512 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 23 |
||
| 3513 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 24 |
||
| 3514 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 25 |
||
| 3515 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 26 |
||
| 3516 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 27 |
||
| 3517 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 28 |
||
| 3518 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 29 |
||
| 3519 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2A |
||
| 3520 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2B |
||
| 3521 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2C |
||
| 3522 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2D |
||
| 3523 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2E |
||
| 3524 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 2F |
||
| 3525 | |||
| 3526 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 30 |
||
| 3527 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 31 |
||
| 3528 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 32 |
||
| 3529 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 33 |
||
| 3530 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 34 |
||
| 3531 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 35 |
||
| 3532 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 36 |
||
| 3533 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 37 |
||
| 3534 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 38 |
||
| 3535 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 39 |
||
| 3536 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3A |
||
| 3537 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3B |
||
| 3538 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3C |
||
| 3539 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3D |
||
| 3540 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3E |
||
| 3541 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 3F |
||
| 3542 | |||
| 3543 | {"protb" , 0x21005,0x0 , 0x52 , 0x1401, 0x401 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 40 |
||
| 3544 | {"protw" , 0x21005,0x0 , 0x52 , 0x1402, 0x402 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 41 |
||
| 3545 | {"protd" , 0x21005,0x0 , 0x52 , 0x1403, 0x403 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 42 |
||
| 3546 | {"protq" , 0x21005,0x0 , 0x52 , 0x1404, 0x404 , 0x21 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 43 |
||
| 3547 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 44 |
||
| 3548 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 45 |
||
| 3549 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 46 |
||
| 3550 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 47 |
||
| 3551 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 48 |
||
| 3552 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 49 |
||
| 3553 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4A |
||
| 3554 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4B |
||
| 3555 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4C |
||
| 3556 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4D |
||
| 3557 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4E |
||
| 3558 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 7B 4F |
||
| 3559 | |||
| 3560 | {0, 0 , 0 , 0x52 , 0x1450, 0x450 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 7B 50+ |
||
| 3561 | |||
| 3562 | |||
| 3563 | // Tertiary opcode map for vmread, insrtw, extrq. Opcode byte = 0F 78 |
||
| 3564 | // Indexed by prefix = none, 66, F2, F3 |
||
| 3565 | SOpcodeDef OpcodeMap6C[4] = { |
||
| 3566 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3567 | {"vmread", 0x813 , 0x1000 , 0x13 , 0x4 , 0x1004, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 78. vmread |
||
| 3568 | {0, 0x6E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // 66 0F 78. link to map 6E: extrq xmm,xmm (AMD SSE4a) |
||
| 3569 | {"insrtq", 0x1004, 0x800 , 0x32 , 0x1450, 0x1450, 0x11 , 0x11 , 0 , 0 , 0 , 0 }, // F2 0F 78. insrtq xmm,xmm,i,i (AMD SSE4a) |
||
| 3570 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 78. |
||
| 3571 | |||
| 3572 | // Tertiary opcode map for vmwrite, insrtw, extrq. Opcode byte = 0F 79 without VEX prefix |
||
| 3573 | // Indexed by prefix = none, 66, F2, F3 |
||
| 3574 | SOpcodeDef OpcodeMap6D[4] = { |
||
| 3575 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3576 | {"vmwrite", 0x813 , 0x1000 , 0x12 , 0x1004, 0x4 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 79. vmwrite |
||
| 3577 | {"extrq", 0x1004, 0x200 , 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 79. link to map 6E: extrq xmm,xmm (AMD SSE4a) |
||
| 3578 | {"insrtq", 0x1004, 0x800 , 0x12 , 0x1450, 0x1450, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 79. insrtq xmm,xmm (AMD SSE4a) |
||
| 3579 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 79. |
||
| 3580 | |||
| 3581 | // Quarternary opcode map for extrq. Opcode byte = 66 0F 78 |
||
| 3582 | // Indexed by reg bits = 0 - 7 |
||
| 3583 | SOpcodeDef OpcodeMap6E[] = { |
||
| 3584 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3585 | {"extrq", 0x1004, 0x200 , 0x31 , 0x1450, 0x11 , 0x11 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 78. extrq xmm,i,i (AMD SSE4a) |
||
| 3586 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // reg bits must be 0 |
||
| 3587 | |||
| 3588 | // Submap for movq xmm/m64,xmm. Opcode byte = 66 0F D6 |
||
| 3589 | // Indexed by memory vs. register operand |
||
| 3590 | SOpcodeDef OpcodeMap6F[2] = { |
||
| 3591 | {"movq", 0x12 ,0x812200, 0x13 , 0x4 , 0x1450, 0 , 0 , 0 , 0 , 0 , 0x2 }, // movq m64,xmm |
||
| 3592 | {"movq", 0x12 ,0x812200, 0x13 , 0x450 , 0x1450, 0 , 0 , 0 , 0 , 0 , 0x2 }}; // movq xmm,xmm |
||
| 3593 | |||
| 3594 | // Submap for movddup. Opcode byte = F2 0F 12 |
||
| 3595 | // Indexed by VEX.L |
||
| 3596 | SOpcodeDef OpcodeMap70[4] = { |
||
| 3597 | {"movddup", 0x13 , 0x00800, 0x12 , 0x124C, 0x4C , 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX prefix |
||
| 3598 | {"vmovddup", 0x19 ,0x852800, 0x12 , 0x124C, 0x4C , 0 , 0 , 0x20 , 0 , 0 , 0 }, // VEX.L = 0 |
||
| 3599 | {"vmovddup", 0x19 ,0x852800, 0x12 , 0x124C, 0x24C , 0 , 0 , 0x20 , 0 , 0 , 0 }, // VEX.L = 1 |
||
| 3600 | {"vmovddup", 0x19 ,0x852800, 0x12 , 0x124C, 0x24C , 0 , 0 , 0x20 , 0 , 0 , 0 }}; // EVEX.LL = 2 |
||
| 3601 | |||
| 3602 | // Submap for movsd. Opcode byte = F2 0F 10 |
||
| 3603 | // Indexed by memory/register operand |
||
| 3604 | SOpcodeDef OpcodeMap71[2] = { |
||
| 3605 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3606 | {"movsd", 0x12 ,0x812800, 0x12 , 0x104C, 0x4C , 0 , 0 , 0x30 , 0 , 0 , 0x2 }, // F2 0F 10 mem |
||
| 3607 | {"movsd", 0x12 ,0x892800, 0x19 , 0x104C, 0x104C, 0x104C, 0 , 0x30 , 0 , 0 , 0x2 }}; // F2 0F 10 reg |
||
| 3608 | |||
| 3609 | // Submap for movss. Opcode byte = F3 0F 10 |
||
| 3610 | // Indexed by memory/register operand |
||
| 3611 | SOpcodeDef OpcodeMap72[2] = { |
||
| 3612 | {"movss", 0x12 ,0x812400, 0x12 , 0x104B, 0x4B , 0 , 0 , 0x30 , 0 , 0 , 0x2 }, // F3 0F 10 mem |
||
| 3613 | {"movss", 0x12 ,0x892400, 0x19 , 0x104B, 0x104B, 0x104B, 0 , 0x30 , 0 , 0 , 0x2 }}; // F3 0F 10 reg |
||
| 3614 | |||
| 3615 | // Submap for movsd. Opcode byte = F2 0F 11 |
||
| 3616 | // Indexed by memory/register operand |
||
| 3617 | SOpcodeDef OpcodeMap73[2] = { |
||
| 3618 | {"movsd", 0x12 ,0x812800, 0x13 , 0x4C , 0x104C, 0 , 0 , 0x30 , 0 , 0 , 0x2 }, // F2 0F 11 mem |
||
| 3619 | {"movsd", 0x12 ,0x892800, 0x19 , 0x104C, 0x104C, 0x104C, 0 , 0x10 , 0 , 0 , 0x2 }}; // F2 0F 11 reg |
||
| 3620 | |||
| 3621 | // Submap for movss. Opcode byte = F3 0F 11 |
||
| 3622 | // Indexed by memory/register operand |
||
| 3623 | SOpcodeDef OpcodeMap74[2] = { |
||
| 3624 | {"movss", 0x12 ,0x812400, 0x13 , 0x4B , 0x104B, 0 , 0 , 0x10 , 0 , 0 , 0x2 }, // F3 0F 11 mem |
||
| 3625 | {"movss", 0x12 ,0x892400, 0x19 , 0x104B, 0x104B, 0x104B, 0 , 0x30 , 0 , 0 , 0x2 }}; // F3 0F 11 reg |
||
| 3626 | |||
| 3627 | // Submap for pinsrd/pinsrq. Opcode byte = 0F 3A 22 |
||
| 3628 | // Indexed by operand size |
||
| 3629 | SOpcodeDef OpcodeMap75[3] = { |
||
| 3630 | {"pinsrd", 0x15 ,0x89B200, 0x59 , 0x1403, 0x1403, 0x3 , 0x11 , 0x1000, 0 , 0 , 0x2 }, // (16 bit). 66 prefix actually is 32 bits |
||
| 3631 | {"pinsrd", 0x15 ,0x89B200, 0x59 , 0x1403, 0x1403, 0x3 , 0x11 , 0x1000, 0 , 0 , 0x2 }, // 32 bit |
||
| 3632 | {"pinsrq", 0x15 ,0x89B200, 0x59 , 0x1404, 0x1404, 0x4 , 0x11 , 0x1000, 0 , 0 , 0x2 }}; // 64 bit. REX.W prefix |
||
| 3633 | |||
| 3634 | // Submap for sqrtps/pd/sd/ss. Opcode byte = 0F 51 |
||
| 3635 | // Indexed by prefix = none, 66, F2, F3 |
||
| 3636 | SOpcodeDef OpcodeMap76[4] = { |
||
| 3637 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3638 | {"sqrtps", 0x11 ,0x852E00, 0x12 , 0x124F, 0x24F , 0 , 0 , 0x37 , 0 , 0 , 0x2 }, // 0F 51. sqrtps |
||
| 3639 | {"sqrtpd", 0x11 ,0x852E00, 0x12 , 0x124F, 0x24F , 0 , 0 , 0x37 , 0 , 0 , 0x2 }, // 66 0F 51. sqrtpd |
||
| 3640 | {"sqrtsd", 0x11 ,0x892E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x36 , 0 , 0 , 0x2 }, // F2 0F 51. sqrtsd |
||
| 3641 | {"sqrtss", 0x11 ,0x892E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0x36 , 0 , 0 , 0x2 }}; // F3 0F 51. sqrtss |
||
| 3642 | |||
| 3643 | // Submap for rsqrtps/ss. Opcode byte = 0F 52 |
||
| 3644 | // Indexed by prefix = none, 66, F2, F3 |
||
| 3645 | SOpcodeDef OpcodeMap77[4] = { |
||
| 3646 | {"rsqrtps", 0x11 , 0x50E00, 0x12 , 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 52. rsqrtps |
||
| 3647 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // illegal |
||
| 3648 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // illegal |
||
| 3649 | {"rsqrtss", 0x11 , 0x90E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0x2 }}; // F3 0F 52. rsqrtss |
||
| 3650 | |||
| 3651 | // Submap for rcpps/ss. Opcode byte = 0F 53 |
||
| 3652 | // Indexed by prefix = none, 66, F2, F3 |
||
| 3653 | SOpcodeDef OpcodeMap78[4] = { |
||
| 3654 | {"rcpps", 0x11 , 0x50E00, 0x12 , 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 53. rcpps |
||
| 3655 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // illegal |
||
| 3656 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // illegal |
||
| 3657 | {"rcpss", 0x11 , 0x90E00, 0x19 , 0x124F, 0x124F, 0x24F , 0 , 0 , 0 , 0 , 0x2 }}; // F3 0F 53. rcpss |
||
| 3658 | |||
| 3659 | // Submap for emms/vzeroupper/vzeroall. Opcode byte = 0F 77 |
||
| 3660 | // Indexed by VEX prefix and VEX.L |
||
| 3661 | SOpcodeDef OpcodeMap79[3] = { |
||
| 3662 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3663 | {"emms", 0x7 , 0 , 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 77 |
||
| 3664 | {"vzeroupper",0x19 , 0x10000, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 77, L=0 |
||
| 3665 | {"vzeroall", 0x19 , 0x50000, 0x2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // VEX 0F 77, L=1 |
||
| 3666 | |||
| 3667 | // Submap for pmovsxbw. Opcode byte = 0F 38 20. Indexed by memory/register operand |
||
| 3668 | SOpcodeDef OpcodeMap7A[2] = { |
||
| 3669 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3670 | {"pmovsxbw", 0x15 ,0x85A200, 0x12 , 0x1202, 0xF01 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 20 mem, link by VEX.L |
||
| 3671 | {"pmovsxbw", 0x15 ,0x85A200, 0x12 , 0x1202, 0xF01 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }}; // 0F 38 20 reg |
||
| 3672 | |||
| 3673 | // Submap for pmovsxbd. Opcode byte = 0F 38 21. Indexed by memory/register operand |
||
| 3674 | SOpcodeDef OpcodeMap7B[2] = { |
||
| 3675 | {0, 0x7C , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 21 mem, link by VEX.L |
||
| 3676 | {"pmovsxbd", 0x15 ,0x85A200, 0x12 , 0x1203, 0x401 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 21 reg |
||
| 3677 | |||
| 3678 | // Submap for pmovsxbd. Opcode byte = 0F 38 21 mem. Indexed by VEX.L |
||
| 3679 | SOpcodeDef OpcodeMap7C[] = { |
||
| 3680 | {"pmovsxbd", 0x15 ,0x85A200, 0x12 , 0x1203, 0x3 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }, // 0F 38 21 L0 |
||
| 3681 | {"pmovsxbd", 0x15 ,0x85A200, 0x12 , 0x1203, 0x301 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }, // 0F 38 21 L1 |
||
| 3682 | {"pmovsxbd", 0x15 ,0x85A200, 0x12 , 0x1203, 0x401 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }}; // 0F 38 21 L2 |
||
| 3683 | |||
| 3684 | // Submap for pmovsxbq. Opcode byte = 0F 38 22. Indexed by memory/register operand |
||
| 3685 | SOpcodeDef OpcodeMap7D[2] = { |
||
| 3686 | {"pmovsxbq", 0x7E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 22 mem, link by VEX.L |
||
| 3687 | {"pmovsxbq", 0x15 ,0x858200, 0x12 , 0x1204, 0x401 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 22 reg |
||
| 3688 | |||
| 3689 | // Submap for pmovsxbq. Opcode byte = 0F 38 22 mem. Indexed by VEX.L |
||
| 3690 | SOpcodeDef OpcodeMap7E[] = { |
||
| 3691 | {"pmovsxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x2 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }, // 0F 38 22 L0 |
||
| 3692 | {"pmovsxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x3 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }, // 0F 38 22 L1 |
||
| 3693 | {"pmovsxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x4 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }}; // 0F 38 22 L2 |
||
| 3694 | |||
| 3695 | // Submap for pmovsxwd. Opcode byte = 0F 38 23. Indexed by memory/register operand |
||
| 3696 | SOpcodeDef OpcodeMap7F[2] = { |
||
| 3697 | {"pmovsxwd", 0x15 ,0x85A200, 0x12 , 0x1203, 0xF02 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 23 mem, link by VEX.L |
||
| 3698 | {"pmovsxwd", 0x15 ,0x85A200, 0x12 , 0x1203, 0xF02 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 23 reg |
||
| 3699 | |||
| 3700 | // Submap for pmovsxwq. Opcode byte = 0F 38 24. Indexed by memory/register operand |
||
| 3701 | SOpcodeDef OpcodeMap80[2] = { |
||
| 3702 | {"pmovsxwq", 0x81 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 24 mem, link by VEX.L |
||
| 3703 | {"pmovsxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x402 , 0 , 0 , 0x30 , 0 , 0 , 0x2 }}; // 0F 38 24 reg |
||
| 3704 | |||
| 3705 | // Submap for pmovsxwq. Opcode byte = 0F 38 24 mem. Indexed by VEX.L |
||
| 3706 | SOpcodeDef OpcodeMap81[] = { |
||
| 3707 | {"pmovsxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x3 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }, // 0F 38 24 L0 |
||
| 3708 | {"pmovsxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x302 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }, // 0F 38 24 L1 |
||
| 3709 | {"pmovsxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x402 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }}; // 0F 38 24 L1 |
||
| 3710 | |||
| 3711 | // Submap for pmovsxdq. Opcode byte = 0F 38 25. Indexed by memory/register operand |
||
| 3712 | SOpcodeDef OpcodeMap82[2] = { |
||
| 3713 | {"pmovsxdq", 0x15 ,0x85A200, 0x12 , 0x1204, 0xF03 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 25 mem, link by VEX.L |
||
| 3714 | {"pmovsxdq", 0x15 ,0x85A200, 0x12 , 0x1204, 0xF03 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }}; // 0F 38 25 reg |
||
| 3715 | |||
| 3716 | // Submap for pmovzxbw. Opcode byte = 0F 38 30. Indexed by memory/register operand |
||
| 3717 | SOpcodeDef OpcodeMap83[2] = { |
||
| 3718 | {"pmovzxbw", 0x15 ,0x85A200, 0x12 , 0x1202, 0xF01 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 30 L0 |
||
| 3719 | {"pmovzxbw", 0x15 ,0x85A200, 0x12 , 0x1202, 0xF01 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }}; // 0F 38 30 reg |
||
| 3720 | |||
| 3721 | // Submap for 0F 38 5A, indexed by L bit and MVEX for vector size |
||
| 3722 | SOpcodeDef OpcodeMap84[] = { |
||
| 3723 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 5A, 128 bits |
||
| 3724 | {"vbroadcasti128",0x1C,0x978200,0x12 , 0x1550, 0x2451, 0 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 5A, 256 bits |
||
| 3725 | {"vbroadcasti32x4",0x80,0xC28200,0x12, 0x1603, 0x2403, 0 , 0 , 0x20 , 0x1012, 0 , 0x100 }, // 0F 38 5A, 512 bits |
||
| 3726 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 3727 | |||
| 3728 | // Submap for pmovzxbd. Opcode byte = 0F 38 31. Indexed by memory/register operand |
||
| 3729 | SOpcodeDef OpcodeMap85[2] = { |
||
| 3730 | {"pmovzxbd", 0x86 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 31 mem, link by VEX.L |
||
| 3731 | {"pmovzxbd", 0x15 ,0x85A200, 0x12 , 0x1203, 0x401 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 31 reg |
||
| 3732 | |||
| 3733 | // Submap for pmovzxbd. Opcode byte = 0F 38 31 mem. Indexed by VEX.L |
||
| 3734 | SOpcodeDef OpcodeMap86[] = { |
||
| 3735 | {"pmovzxbd", 0x15 ,0x85A200, 0x12 , 0x1403, 0x3 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }, // 0F 38 31 L0 |
||
| 3736 | {"pmovzxbd", 0x15 ,0x85A200, 0x12 , 0x1503, 0x301 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }, // 0F 38 31 L1 |
||
| 3737 | {"pmovzxbd", 0x15 ,0x85A200, 0x12 , 0x1603, 0x401 , 0 , 0 , 0x2420 , 0 , 0 , 0x2 }}; // 0F 38 31 L2 |
||
| 3738 | |||
| 3739 | // Submap for pmovzxbq. Opcode byte = 0F 38 32. Indexed by memory/register operand |
||
| 3740 | SOpcodeDef OpcodeMap87[2] = { |
||
| 3741 | {"pmovzxbq", 0x88 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 32 mem, link by VEX.L |
||
| 3742 | {"pmovzxbq", 0x15 ,0x858200, 0x12 , 0x1204, 0x401 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 32 reg |
||
| 3743 | |||
| 3744 | // Submap for pmovzxbq. Opcode byte = 0F 38 32 mem. Indexed by VEX.L |
||
| 3745 | SOpcodeDef OpcodeMap88[] = { |
||
| 3746 | {"pmovzxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x2 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }, // 0F 38 32 L0 |
||
| 3747 | {"pmovzxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x3 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }, // 0F 38 32 L1 |
||
| 3748 | {"pmovzxbq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x4 , 0 , 0 , 0x2620, 0 , 0 , 0x2 }}; // 0F 38 32 L2 |
||
| 3749 | |||
| 3750 | // Submap for pmovzxwd. Opcode byte = 0F 38 33. Indexed by memory/register operand |
||
| 3751 | SOpcodeDef OpcodeMap89[2] = { |
||
| 3752 | {"pmovzxwd", 0x15 ,0x85A200, 0x12 , 0x1203, 0xF02 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 33 mem, link by VEX.L |
||
| 3753 | {"pmovzxwd", 0x15 ,0x85A200, 0x12 , 0x1203, 0xF02 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }}; // 0F 38 33 reg |
||
| 3754 | |||
| 3755 | // Submap for pmovzxwq. Opcode byte = 0F 38 34. Indexed by memory/register operand |
||
| 3756 | SOpcodeDef OpcodeMap8A[2] = { |
||
| 3757 | {"pmovzxwq", 0x8B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x0D , 0 }, // 0F 38 34 mem, link by VEX.L |
||
| 3758 | {"pmovzxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x402 , 0 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F 38 34 reg |
||
| 3759 | |||
| 3760 | // Submap for pmovzxwq. Opcode byte = 0F 38 34 mem. Indexed by VEX.L |
||
| 3761 | SOpcodeDef OpcodeMap8B[] = { |
||
| 3762 | {"pmovzxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x3 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }, // 0F 38 34 L0 |
||
| 3763 | {"pmovzxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x302 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }, // 0F 38 34 L1 |
||
| 3764 | {"pmovzxwq", 0x15 ,0x85A200, 0x12 , 0x1204, 0x402 , 0 , 0 , 0x2420, 0 , 0 , 0x2 }}; // 0F 38 34 L1 |
||
| 3765 | |||
| 3766 | // Submap for pmovzxwq. Opcode byte = 0F 38 35. Indexed by memory/register operand |
||
| 3767 | SOpcodeDef OpcodeMap8C[2] = { |
||
| 3768 | {"pmovzxdq", 0x15 ,0x85A200, 0x12 , 0x1204, 0xF03 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }, // 0F 38 35 mem |
||
| 3769 | {"pmovzxdq", 0x15 ,0x85A200, 0x12 , 0x1204, 0xF03 , 0 , 0 , 0x2220, 0 , 0 , 0x2 }}; // 0F 38 35 reg |
||
| 3770 | |||
| 3771 | // submap for 0F 38 14. Indexed by VEX prefix |
||
| 3772 | SOpcodeDef OpcodeMap8D[] = { |
||
| 3773 | {"blendvps", 0x15 , 0x8200 , 0x12 , 0x124B, 0x24B , 0xAE , 0 , 0 , 0 , 0 , 0 }, // 0F 38 14 |
||
| 3774 | {"vprorv", 0x20 ,0x883200, 0x19 , 0x1209, 0x1209, 0x0209, 0 , 0x31 , 0 , 0 , 0x1 }}; // VEX 0F 38 14 |
||
| 3775 | |||
| 3776 | // submap for 0F 38 15. Indexed by VEX prefix |
||
| 3777 | SOpcodeDef OpcodeMap8E[] = { |
||
| 3778 | {"blendvpd", 0x15 , 0x8200 , 0x12 , 0x124C, 0x24C , 0xAE , 0 , 0 , 0 , 0 , 0 }, // 0F 38 15 |
||
| 3779 | {"vprolv", 0x20 ,0x883200, 0x19 , 0x1209, 0x1209, 0x0209, 0 , 0x31 , 0 , 0 , 0x1 }}; // VEX 0F 38 15 |
||
| 3780 | |||
| 3781 | // submap for 0F 3A 23. Index by W bit |
||
| 3782 | SOpcodeDef OpcodeMap8F[] = { |
||
| 3783 | {"vshuff32x4",0x20 ,0x88B200, 0x59 , 0x124F, 0x124F, 0x024F, 0x31 , 0x31 , 0 , 0 , 0 }, // 0F 3A 23. W0 |
||
| 3784 | {"vshuff64x2",0x20 ,0x88B200, 0x59 , 0x124F, 0x124F, 0x024F, 0x31 , 0x31 , 0 , 0 , 0 }}; // 0F 3A 23. W1 |
||
| 3785 | |||
| 3786 | // submap for 0F 3A 43. Index by W bit |
||
| 3787 | SOpcodeDef OpcodeMap90[] = { |
||
| 3788 | {"vshufi32x4",0x20 ,0x88B200, 0x59 , 0x1209, 0x1209, 0x0209, 0x31 , 0x31 , 0 , 0 , 0 }, // 0F 3A 43. W0 |
||
| 3789 | {"vshufi64x2",0x20 ,0x88B200, 0x59 , 0x1209, 0x1209, 0x0209, 0x31 , 0x31 , 0 , 0 , 0 }}; // 0F 3A 43. W1 |
||
| 3790 | |||
| 3791 | // submap for 0F 38 2A. Index by 66 F2 F3 prefix |
||
| 3792 | SOpcodeDef OpcodeMap91[] = { |
||
| 3793 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 2A |
||
| 3794 | {"movntdqa", 0x15 ,0x85A200, 0x12 , 0x1250, 0x2250, 0 , 0 , 0x00 , 0 , 0 , 0x102 }, // 66 0F 38 2A |
||
| 3795 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 2A |
||
| 3796 | {"vpbroadcastmb2q",0x20,0x823400,0x12, 0x1204, 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 38 2A. W1 |
||
| 3797 | |||
| 3798 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3799 | // Submap for xlat. Opcode byte = D7. Indexed by assembly syntax: 0=MASM, 1=NASM/YASM, 2=GAS |
||
| 3800 | SOpcodeDef OpcodeMap92[3] = { |
||
| 3801 | {"xlat", 0 , 0x5 , 0x1 , 0 , 0x20C0, 0 , 0 , 0 , 0 , 0 , 0x8 }, // D7 |
||
| 3802 | {"xlatb", 0 , 0x5 , 0x1 , 0 , 0x20C0, 0 , 0 , 0 , 0 , 0 , 0x8 }, // D7 |
||
| 3803 | {"xlat", 0 , 0x5 , 0x1 , 0 , 0x20C0, 0 , 0 , 0 , 0 , 0 , 0x8 }}; // D7 |
||
| 3804 | |||
| 3805 | // Submap for pmovmskb, Opcode 0F D7, Indexed by VEX prefix and VEX.L bit |
||
| 3806 | SOpcodeDef OpcodeMap93[3] = { |
||
| 3807 | {"pmovmskb", 0x7 , 0x51200, 0x12 , 0x1009, 0x1150, 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F D7 |
||
| 3808 | {"pmovmskb", 0x7 , 0x51200, 0x12 , 0x100A, 0x1150, 0 , 0 , 0 , 0 , 0 , 0x2 }, // 0F D7, VEX (32/64 bit dest. depending on mode) |
||
| 3809 | {"pmovmskb", 0x7 , 0x51200, 0x12 , 0x100A, 0x1150, 0 , 0 , 0 , 0 , 0 , 0x2 }}; // 0F D7, VEX.L (32/64 bit dest. depending on mode) |
||
| 3810 | |||
| 3811 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3812 | // Submap for vpgatherq, Opcode 0F 38 91, Indexed by VEX/EVEX |
||
| 3813 | SOpcodeDef OpcodeMap94[2] = { |
||
| 3814 | {0, 0x105 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // |
||
| 3815 | {0, 0x106 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // |
||
| 3816 | |||
| 3817 | // Submap for vgatherqps/pd, Opcode 0F 38 93, Indexed by VEX.W bit |
||
| 3818 | SOpcodeDef OpcodeMap95[2] = { |
||
| 3819 | {"vgatherqps",0x1C , 0xE9200, 0x1E, 0xF4B , 0x224B, 0xF4B , 0 , 0 , 0 , 0 , 0 }, // 0F 38 93, W0 |
||
| 3820 | {"vgatherqpd",0x1C , 0xE9200, 0x1E, 0x24C , 0x224C, 0x24C , 0 , 0 , 0 , 0 , 0 }}; // 0F 38 93, W1 |
||
| 3821 | |||
| 3822 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3823 | // Submap for psllw, Opcode 0F F1, Indexed by VEX.L bit |
||
| 3824 | SOpcodeDef OpcodeMap96[] = { |
||
| 3825 | {"psllw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F1 |
||
| 3826 | {"psllw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F1, L1 |
||
| 3827 | {"psllw", 0x20 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F F1, L2 |
||
| 3828 | |||
| 3829 | // Submap for pslld, Opcode 0F F2, Indexed by VEX.L bit |
||
| 3830 | SOpcodeDef OpcodeMap97[] = { |
||
| 3831 | {"pslld", 0x7 ,0x8D2200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F2 |
||
| 3832 | {"pslld", 0x7 ,0x8D2200, 0x19 , 0x1203, 0x1203, 0x403 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F F2, L1 |
||
| 3833 | {"pslld", 0x20 ,0x8D2200, 0x19 , 0x1203, 0x1203, 0x403 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F F2, L1 |
||
| 3834 | |||
| 3835 | // Submap for psllq, Opcode 0F F3, Indexed by VEX.L bit |
||
| 3836 | SOpcodeDef OpcodeMap98[] = { |
||
| 3837 | {"psllq", 0x7 ,0x8D2200, 0x19 , 0x1104, 0x1104, 0x104 , 0 , 0x30 , 0 , 0 , 0x2 }, // 0F F3 |
||
| 3838 | {"psllq", 0x7 ,0x8D2200, 0x19 , 0x1204, 0x1204, 0x404 , 0 , 0x30 , 0 , 0 , 0x2 }, // 0F F3, L1 |
||
| 3839 | {"psllq", 0x20 ,0x8D2200, 0x19 , 0x1204, 0x1204, 0x404 , 0 , 0x30 , 0 , 0 , 0x2 }}; // 0F F3, L1 |
||
| 3840 | |||
| 3841 | // Submap for psrlw, Opcode 0F D1, Indexed by VEX.L bit |
||
| 3842 | SOpcodeDef OpcodeMap99[] = { |
||
| 3843 | {"psrlw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D1 |
||
| 3844 | {"psrlw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D1 |
||
| 3845 | {"psrlw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F D1 |
||
| 3846 | |||
| 3847 | // Submap for psrld, Opcode 0F D2, Indexed by VEX.L bit |
||
| 3848 | SOpcodeDef OpcodeMap9A[] = { |
||
| 3849 | {"psrld", 0x7 ,0x8D2200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D2 |
||
| 3850 | {"psrld", 0x7 ,0x8D2200, 0x19 , 0x1203, 0x1203, 0x403 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D2 |
||
| 3851 | {"psrld", 0x7 ,0x8D2200, 0x19 , 0x1203, 0x1203, 0x403 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F D2 |
||
| 3852 | |||
| 3853 | // Submap for psrlq, Opcode 0F D3, Indexed by VEX.L bit |
||
| 3854 | SOpcodeDef OpcodeMap9B[] = { |
||
| 3855 | {"psrlq", 0x7 ,0x8D2200, 0x19 , 0x1104, 0x1104, 0x104 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D3 |
||
| 3856 | {"psrlq", 0x7 ,0x8D2200, 0x19 , 0x1204, 0x1204, 0x404 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F D3 |
||
| 3857 | {"psrlq", 0x7 ,0x8D2200, 0x19 , 0x1204, 0x1204, 0x404 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F D3 |
||
| 3858 | |||
| 3859 | // Submap for psraw, Opcode 0F E1, Indexed by VEX.L bit |
||
| 3860 | SOpcodeDef OpcodeMap9C[] = { |
||
| 3861 | {"psraw", 0x7 ,0x8D2200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E1 |
||
| 3862 | {"psraw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }, // 0F E1 |
||
| 3863 | {"psraw", 0x7 ,0x8D2200, 0x19 , 0x1202, 0x1202, 0x402 , 0 , 0x20 , 0 , 0 , 0x2 }}; // 0F E1 |
||
| 3864 | |||
| 3865 | // Submap for psrad, Opcode 0F E2, Indexed by VEX.L bit |
||
| 3866 | SOpcodeDef OpcodeMap9D[] = { |
||
| 3867 | {"psra", 0x7 ,0x8D3200, 0x19 , 0x1109, 0x1109, 0x109 , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F E2 |
||
| 3868 | {"psra", 0x7 ,0x8D3200, 0x19 , 0x1109, 0x1109, 0x409 , 0 , 0x21 , 0 , 0 , 0x3 }, // 0F E2. w bit specifies operand size only if EVEX |
||
| 3869 | {"psra", 0x7 ,0x8D3200, 0x19 , 0x1109, 0x1109, 0x409 , 0 , 0x21 , 0 , 0 , 0x3 }}; // 0F E2. w bit specifies operand size only if EVEX |
||
| 3870 | |||
| 3871 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3872 | // Submap for vpbroadcastb, Opcode 0F 38 78, Indexed by memory/register |
||
| 3873 | SOpcodeDef OpcodeMap9E[2] = { |
||
| 3874 | {"vpbroadcastb",0x1C,0x878200, 0x12, 0x1201, 0x1 , 0 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 78 mem |
||
| 3875 | {"vpbroadcastb",0x1C,0x878200, 0x12, 0x1201, 0x401 , 0 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 38 78 reg |
||
| 3876 | |||
| 3877 | // Submap for vpbroadcastw, Opcode 0F 38 79, Indexed by memory/register |
||
| 3878 | SOpcodeDef OpcodeMap9F[2] = { |
||
| 3879 | {"vpbroadcastw",0x1C,0x878200, 0x12, 0x1201, 0x2 , 0 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 38 79 mem |
||
| 3880 | {"vpbroadcastw",0x1C,0x878200, 0x12, 0x1201, 0x402 , 0 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 38 79 reg |
||
| 3881 | |||
| 3882 | // Submap for vpbroadcastd, Opcode 0F 38 58, Indexed by memory/register |
||
| 3883 | SOpcodeDef OpcodeMapA0[2] = { |
||
| 3884 | {"vpbroadcastd",0x1C,0xC78200, 0x12, 0x1201, 0x3 , 0 , 0 , 0x20 , 0x100A, 0 , 0 }, // 0F 38 58 mem |
||
| 3885 | {"vpbroadcastd",0x1C,0x878200, 0x12, 0x1201, 0x403 , 0 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 38 58 reg |
||
| 3886 | |||
| 3887 | // Submap for vpbroadcastq, Opcode 0F 38 59, Indexed by memory/register |
||
| 3888 | SOpcodeDef OpcodeMapA1[2] = { |
||
| 3889 | {"vpbroadcastq",0x1C,0xC7B200, 0x12, 0x1201, 0x4 , 0 , 0 , 0x20 , 0x100B, 0 , 0 }, // 0F 38 59 mem. (manuals disagree on W bit?) |
||
| 3890 | {"vpbroadcastq",0x1C,0x879200, 0x12, 0x1201, 0x404 , 0 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 38 59 reg |
||
| 3891 | |||
| 3892 | // Submap for 0F 38 F3. Indexed by reg bit |
||
| 3893 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3894 | SOpcodeDef OpcodeMapA2[8] = { |
||
| 3895 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /0 |
||
| 3896 | {"blsr" , 0x1D , 0xB1000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /3 |
||
| 3897 | {"blsmsk", 0x1D , 0xB1000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /3 |
||
| 3898 | {"blsi" , 0x1D , 0xB1000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /3 |
||
| 3899 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /4 |
||
| 3900 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /5 |
||
| 3901 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F3 /6 |
||
| 3902 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 38 F3 /7 |
||
| 3903 | |||
| 3904 | // Submap for 0F 38 F5. Indexed by prefixes |
||
| 3905 | SOpcodeDef OpcodeMapA3[4] = { |
||
| 3906 | {"bzhi" , 0x1D , 0xB1000, 0x1B , 0x1009, 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 }, // 0F 38 F5 |
||
| 3907 | {"wruss" , 0 , 0x1200 , 0x13 , 0x2009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 38 F5 |
||
| 3908 | {"pdep" , 0x1D , 0xB1000, 0x19 , 0x1009, 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 F5 |
||
| 3909 | {"pext" , 0x1D , 0xB1000, 0x19 , 0x1009, 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 38 F5 |
||
| 3910 | |||
| 3911 | // Submap for 0F 3A F0. Indexed by prefixes |
||
| 3912 | SOpcodeDef OpcodeMapA4[4] = { |
||
| 3913 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A F0 |
||
| 3914 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 3A F0 |
||
| 3915 | {"rorx" , 0x1D , 0x31000, 0x52 , 0x1009, 0x9 , 0x31 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 3A F0 |
||
| 3916 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 3A F0 |
||
| 3917 | |||
| 3918 | // Quarternary opcode map for pinsrb. Opcode byte = 0F 3A 20 |
||
| 3919 | // Indexed by memory vs. register operand |
||
| 3920 | SOpcodeDef OpcodeMapA5[2] = { |
||
| 3921 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3922 | {"pinsrb", 0x15 ,0x89A200, 0x59 , 0x1401, 0x1401, 0x2001, 0x31 , 0x1000, 0 , 0 , 0x2 }, // 0F 3A 20 memory 8 |
||
| 3923 | {"pinsrb", 0x15 ,0x89A200, 0x59 , 0x1401, 0x1401, 0x1003, 0x31 , 0 , 0 , 0 , 0x2 }}; // 0F 3A 20 register 32 |
||
| 3924 | |||
| 3925 | // Opcode map for VIA instructions. Opcode byte = 0F A6 .. |
||
| 3926 | // Indexed by mod and reg fields of mod/reg/rm byte |
||
| 3927 | SOpcodeDef OpcodeMapA6[] = { |
||
| 3928 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3929 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=0 |
||
| 3930 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=1 |
||
| 3931 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=2 |
||
| 3932 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=3 |
||
| 3933 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=4 |
||
| 3934 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=5 |
||
| 3935 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=6 |
||
| 3936 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A6, mod<3, reg=7 |
||
| 3937 | {"rep montmul;VIA",0x2001,0x8021,0x10, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A6 /0 |
||
| 3938 | {"rep xsha1;VIA",0x2001,0x8021,0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A6 /1 |
||
| 3939 | {"rep xsha256;VIA",0x2001,0x8021,0x10, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A6 /2 |
||
| 3940 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F A6, mod=3, reg=3 |
||
| 3941 | |||
| 3942 | // Opcode map for VIA instructions. Opcode byte = 0F A7 .. |
||
| 3943 | // Indexed by mod and reg fields of mod/reg/rm byte |
||
| 3944 | SOpcodeDef OpcodeMapA7[] = { |
||
| 3945 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3946 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=0 |
||
| 3947 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=1 |
||
| 3948 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=2 |
||
| 3949 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=3 |
||
| 3950 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=4 |
||
| 3951 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=5 |
||
| 3952 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=6 |
||
| 3953 | {0, 0 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7, mod<3, reg=7 |
||
| 3954 | {0, 0xA8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F A7, mod=3, reg=0. Link to XSTORE |
||
| 3955 | {"rep xcryptecb;VIA",0x2001,0x8021,0x10,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A7 /1 |
||
| 3956 | {"rep xcryptcbc;VIA",0x2001,0x8021,0x10,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A7 /2 |
||
| 3957 | {"rep xcryptctr;VIA",0x2001,0x8021,0x10,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A7 /3 |
||
| 3958 | {"rep xcryptcfb;VIA",0x2001,0x8021,0x10,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A7 /4 |
||
| 3959 | {"rep xcryptofb;VIA",0x2001,0x8021,0x10,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // F3 0F A7 /5 |
||
| 3960 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F A7, mod=3, reg=6 |
||
| 3961 | |||
| 3962 | // Opcode map for VIA XSTORE instruction. Opcode byte = 0F A7 /0 |
||
| 3963 | // Indexed by prefixes |
||
| 3964 | SOpcodeDef OpcodeMapA8[] = { |
||
| 3965 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3966 | {"xstore;VIA",0x2001, 1 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F A7 /0 |
||
| 3967 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F A7 /0 |
||
| 3968 | {0, 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F A7 /0 |
||
| 3969 | {"rep xstore;VIA",0x2001,0x21, 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // F3 0F A7 /0 |
||
| 3970 | |||
| 3971 | // Opcode map for XGETBV, XSETBV instruction. Opcode byte = 0F 01 /2 |
||
| 3972 | // Indexed by rm bits |
||
| 3973 | SOpcodeDef OpcodeMapA9[] = { |
||
| 3974 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 3975 | {"xgetbv", 0x16 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 D0 |
||
| 3976 | {"xsetbv", 0x16 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D1 |
||
| 3977 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D2 |
||
| 3978 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D3 |
||
| 3979 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D4 |
||
| 3980 | {"xend" , 0x1D , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D5 |
||
| 3981 | {"xtest" , 0x1D , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 D6 |
||
| 3982 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 01 D7 |
||
| 3983 | |||
| 3984 | // Opcode map for AMD virtualization instructions 0F 1F 11/011/xxx |
||
| 3985 | // Indexed by rm bits |
||
| 3986 | SOpcodeDef OpcodeMapAA[] = { |
||
| 3987 | {"vmrun" , 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 D8 |
||
| 3988 | {"vmmcall", 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 D9 |
||
| 3989 | {"vmload", 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 DA |
||
| 3990 | {"vmsave", 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 DB |
||
| 3991 | {"stgi" , 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 DC |
||
| 3992 | {"clgi" , 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 DD |
||
| 3993 | {"skinit", 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 DE |
||
| 3994 | {0 , 0x1804 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }}; // 0F 01 DF |
||
| 3995 | |||
| 3996 | // Opcode map for swapgs and RDTSCP instructions 0F 1F 11/111/xxx |
||
| 3997 | // Indexed by rm bits |
||
| 3998 | SOpcodeDef OpcodeMapAB[] = { |
||
| 3999 | {"swapgs", 0x800 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 F8. instruction set unknown |
||
| 4000 | {"rdtscp", 0x19 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x8 }, // 0F 01 F9. AMD SSE4.A and Intel AVX? |
||
| 4001 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 FA |
||
| 4002 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 FB |
||
| 4003 | {"clzero", 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 FC. AMD |
||
| 4004 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 FD |
||
| 4005 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 01 FE |
||
| 4006 | {0 , 0 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F 01 FF |
||
| 4007 | |||
| 4008 | // Opcode map for 0F C7 /6 |
||
| 4009 | // Indexed by mem/reg |
||
| 4010 | SOpcodeDef OpcodeMapAC[] = { |
||
| 4011 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4012 | {0, 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // 0F C7 /6 mem link to vmptrld etc |
||
| 4013 | {"rdrand", 0x1D , 0x1100 , 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 0F C7 /6 reg |
||
| 4014 | |||
| 4015 | // Submap for 0F 38 F7, indexed by prefixes |
||
| 4016 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4017 | SOpcodeDef OpcodeMapAD[] = { |
||
| 4018 | {"bextr", 0x1D , 0xB3000, 0x1B , 0x1009, 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 }, // 0F 38 F7 |
||
| 4019 | {"shlx", 0x1D , 0xB3200, 0x1B , 0x1009, 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 }, // 66 0F 38 F7 |
||
| 4020 | {"shrx", 0x1D , 0xB3800, 0x1B , 0x1009, 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 F7 |
||
| 4021 | {"sarx", 0x1D , 0xB3400, 0x1B , 0x1009, 0x9 , 0x1009, 0 , 0 , 0 , 0 , 0 }}; // F3 0F 38 F7 |
||
| 4022 | |||
| 4023 | // Submap for 0F BC, indexed by prefixes |
||
| 4024 | SOpcodeDef OpcodeMapAE[4] = { |
||
| 4025 | {"bsf" , 0x3 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BC |
||
| 4026 | {"bsf" , 0x3 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F BC |
||
| 4027 | {"tzcnti", 0x20 ,0x31800 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F BC |
||
| 4028 | {"tzcnt" , 0x1D ,0x11500 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F BC, or 66 F3 0F BC. Does not work for F3 66 0F BC! |
||
| 4029 | |||
| 4030 | // Submap for 0F C7 /7, Indexed by mem/reg |
||
| 4031 | SOpcodeDef OpcodeMapAF[] = { |
||
| 4032 | {"vmptrst", 0x813 , 0 , 0x11 , 0x2351, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C7 /7 mem |
||
| 4033 | {0 , 0x138 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }}; // 0F C7 /7 reg. link to rdseed, rdpid |
||
| 4034 | |||
| 4035 | |||
| 4036 | // Shortcut opcode map for VEX prefix and mmmm = 0000 |
||
| 4037 | // Indexed by first opcode byte after VEX prefix. With or without mod/reg/rm byte, and any number of immediate bytes |
||
| 4038 | SOpcodeDef OpcodeMapB0[] = { |
||
| 4039 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4040 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 00 |
||
| 4041 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 01 |
||
| 4042 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 02 |
||
| 4043 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 03 |
||
| 4044 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 04 |
||
| 4045 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 05 |
||
| 4046 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 06 |
||
| 4047 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 07 |
||
| 4048 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 08 |
||
| 4049 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 09 |
||
| 4050 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0A |
||
| 4051 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0B |
||
| 4052 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0C |
||
| 4053 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0D |
||
| 4054 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0E |
||
| 4055 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F |
||
| 4056 | |||
| 4057 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 10 |
||
| 4058 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 11 |
||
| 4059 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 12 |
||
| 4060 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 13 |
||
| 4061 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 14 |
||
| 4062 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 15 |
||
| 4063 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 16 |
||
| 4064 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 17 |
||
| 4065 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 18 |
||
| 4066 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 19 |
||
| 4067 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1A |
||
| 4068 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1B |
||
| 4069 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1C |
||
| 4070 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1D |
||
| 4071 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1E |
||
| 4072 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 1F |
||
| 4073 | |||
| 4074 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 20 |
||
| 4075 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 21 |
||
| 4076 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 22 |
||
| 4077 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 23 |
||
| 4078 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 24 |
||
| 4079 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 25 |
||
| 4080 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 26 |
||
| 4081 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 27 |
||
| 4082 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 28 |
||
| 4083 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 29 |
||
| 4084 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2A |
||
| 4085 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2B |
||
| 4086 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2C |
||
| 4087 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2D |
||
| 4088 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2E |
||
| 4089 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 2F |
||
| 4090 | |||
| 4091 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 30 |
||
| 4092 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 31 |
||
| 4093 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 32 |
||
| 4094 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 33 |
||
| 4095 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 34 |
||
| 4096 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 35 |
||
| 4097 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 36 |
||
| 4098 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 37 |
||
| 4099 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 38 |
||
| 4100 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 39 |
||
| 4101 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3A |
||
| 4102 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3B |
||
| 4103 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3C |
||
| 4104 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3D |
||
| 4105 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3E |
||
| 4106 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 3F |
||
| 4107 | |||
| 4108 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 40 |
||
| 4109 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 41 |
||
| 4110 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 42 |
||
| 4111 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 43 |
||
| 4112 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 44 |
||
| 4113 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 45 |
||
| 4114 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 46 |
||
| 4115 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 47 |
||
| 4116 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 48 |
||
| 4117 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 49 |
||
| 4118 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4A |
||
| 4119 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4B |
||
| 4120 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4C |
||
| 4121 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4D |
||
| 4122 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4E |
||
| 4123 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 4F |
||
| 4124 | |||
| 4125 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 50 |
||
| 4126 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 51 |
||
| 4127 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 52 |
||
| 4128 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 53 |
||
| 4129 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 54 |
||
| 4130 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 55 |
||
| 4131 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 56 |
||
| 4132 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 57 |
||
| 4133 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 58 |
||
| 4134 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 59 |
||
| 4135 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5A |
||
| 4136 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5B |
||
| 4137 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5C |
||
| 4138 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5D |
||
| 4139 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5E |
||
| 4140 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 5F |
||
| 4141 | |||
| 4142 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 60 |
||
| 4143 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 61 |
||
| 4144 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 62 |
||
| 4145 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 63 |
||
| 4146 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 64 |
||
| 4147 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 65 |
||
| 4148 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 66 |
||
| 4149 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 67 |
||
| 4150 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 68 |
||
| 4151 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 69 |
||
| 4152 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6A |
||
| 4153 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6B |
||
| 4154 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6C |
||
| 4155 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6D |
||
| 4156 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6E |
||
| 4157 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 6F |
||
| 4158 | |||
| 4159 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 70 |
||
| 4160 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 71 |
||
| 4161 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 72 |
||
| 4162 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 73 |
||
| 4163 | {"jkzd", 0x20 , 0xB0080, 0x44 , 0x95 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // VEX 74 |
||
| 4164 | {"jknzd", 0x20 , 0xB0080, 0x44 , 0x95 , 0x81 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // VEX 75 |
||
| 4165 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 76 |
||
| 4166 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 77 |
||
| 4167 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 78 |
||
| 4168 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 79 |
||
| 4169 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 7A |
||
| 4170 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 7B |
||
| 4171 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 7C |
||
| 4172 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 7D |
||
| 4173 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 7E |
||
| 4174 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // VEX 7F |
||
| 4175 | |||
| 4176 | // Shortcut opcode map for VEX or EVEX prefix and mmmm = 0001 |
||
| 4177 | // Important: if VEX prefix is optional then use OpcodeMap1 instead. Don't put the same code in both maps! |
||
| 4178 | // Indexed by first opcode byte after VEX prefix. With or without mod/reg/rm byte, and any number of immediate bytes |
||
| 4179 | SOpcodeDef OpcodeMapB1[] = { |
||
| 4180 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4181 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 00 |
||
| 4182 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 01 |
||
| 4183 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 02 |
||
| 4184 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 03 |
||
| 4185 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 04 |
||
| 4186 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 05 |
||
| 4187 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 06 |
||
| 4188 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 07 |
||
| 4189 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 08 |
||
| 4190 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 09 |
||
| 4191 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0A |
||
| 4192 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0B |
||
| 4193 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0C |
||
| 4194 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0D |
||
| 4195 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0E |
||
| 4196 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 0F |
||
| 4197 | |||
| 4198 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 10 |
||
| 4199 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 11 |
||
| 4200 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 12 |
||
| 4201 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 13 |
||
| 4202 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 14 |
||
| 4203 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 15 |
||
| 4204 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 16 |
||
| 4205 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 17 |
||
| 4206 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 18 |
||
| 4207 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 19 |
||
| 4208 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1A |
||
| 4209 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1B |
||
| 4210 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1C |
||
| 4211 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1D |
||
| 4212 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1E |
||
| 4213 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 1F |
||
| 4214 | |||
| 4215 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 20 |
||
| 4216 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 21 |
||
| 4217 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 22 |
||
| 4218 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 23 |
||
| 4219 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 24 |
||
| 4220 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 25 |
||
| 4221 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 26 |
||
| 4222 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 27 |
||
| 4223 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 28 |
||
| 4224 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 29 |
||
| 4225 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2A |
||
| 4226 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2B |
||
| 4227 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2C |
||
| 4228 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2D |
||
| 4229 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2E |
||
| 4230 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 2F |
||
| 4231 | |||
| 4232 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 30 |
||
| 4233 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 31 |
||
| 4234 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 32 |
||
| 4235 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 33 |
||
| 4236 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 34 |
||
| 4237 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 35 |
||
| 4238 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 36 |
||
| 4239 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 37 |
||
| 4240 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 38 |
||
| 4241 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 39 |
||
| 4242 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3A |
||
| 4243 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3B |
||
| 4244 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3C |
||
| 4245 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3D |
||
| 4246 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3E |
||
| 4247 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3F |
||
| 4248 | |||
| 4249 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4250 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 40 |
||
| 4251 | {"kand", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 41 |
||
| 4252 | {"kandn", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 42 |
||
| 4253 | {"kandnr", 0x80 , 0x30000, 0x12 , 0x95 , 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 43 |
||
| 4254 | {"knot", 0x20 , 0xE5200, 0x12 , 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 44 |
||
| 4255 | {"kor", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 45 |
||
| 4256 | {"kxnor", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 46 |
||
| 4257 | {"kxor", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 47 |
||
| 4258 | {"kmerge2l1h",0x80 , 0x30000, 0x12 , 0x95 , 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 48 |
||
| 4259 | {"kmerge2l1l",0x80 , 0x30000, 0x12 , 0x95 , 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 49 |
||
| 4260 | {"kadd", 0x20 , 0xE5200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 1 }, // VEX 0F 41 |
||
| 4261 | {0, 0xF0 , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // VEX 0F 4B. Link to kunpckbw |
||
| 4262 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 4C |
||
| 4263 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 4D |
||
| 4264 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 4E |
||
| 4265 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 4F |
||
| 4266 | |||
| 4267 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 50 |
||
| 4268 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 51 |
||
| 4269 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 52 |
||
| 4270 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 53 |
||
| 4271 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 54 |
||
| 4272 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 55 |
||
| 4273 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 56 |
||
| 4274 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 57 |
||
| 4275 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 58 |
||
| 4276 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 59 |
||
| 4277 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5A |
||
| 4278 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5B |
||
| 4279 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5C |
||
| 4280 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5D |
||
| 4281 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5E |
||
| 4282 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 5F |
||
| 4283 | |||
| 4284 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 60 |
||
| 4285 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 61 |
||
| 4286 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 62 |
||
| 4287 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 63 |
||
| 4288 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 64 |
||
| 4289 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 65 |
||
| 4290 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 66 |
||
| 4291 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 67 |
||
| 4292 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 68 |
||
| 4293 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 69 |
||
| 4294 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 6A |
||
| 4295 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 6B |
||
| 4296 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 6C |
||
| 4297 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 6D |
||
| 4298 | {"vmov", 0x7 ,0x813200, 0x12 , 0x1409, 0x9 , 0 , 0 , 0x00 , 0 , 0 , 0x1 }, // VEX 0F 6E |
||
| 4299 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 6F |
||
| 4300 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 70 |
||
| 4301 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 71 |
||
| 4302 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 72 |
||
| 4303 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 73 |
||
| 4304 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 74 |
||
| 4305 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 75 |
||
| 4306 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 76 |
||
| 4307 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 77 |
||
| 4308 | {0, 0xDA , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // EVEX 0F 78. Link to vcvttpd2udq |
||
| 4309 | {0, 0xD6 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // EVEX 0F 79. Link to vcvtps etc |
||
| 4310 | {0, 0xDC , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // E/MVEX 0F 7A. Link to vcvtudq2pd |
||
| 4311 | {0, 0xDD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // EVEX 0F 7B. Link to vcvtusi2sd etc |
||
| 4312 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 7C |
||
| 4313 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 7D |
||
| 4314 | {0, 0xE2 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // VEX 0F 7E. Link to movq |
||
| 4315 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 7F |
||
| 4316 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 80 |
||
| 4317 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 81 |
||
| 4318 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 82 |
||
| 4319 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 83 |
||
| 4320 | {"jkzd", 0x20 , 0xB0080, 0x84 , 0x95 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // VEX 0F 84 |
||
| 4321 | {"jknzd", 0x20 , 0xB0080, 0x84 , 0x95 , 0x82 , 0 , 0 , 0 , 0 , 0 , 0x80 }, // VEX 0F 85 |
||
| 4322 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 86 |
||
| 4323 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 87 |
||
| 4324 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 88 |
||
| 4325 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 89 |
||
| 4326 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8A |
||
| 4327 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8B |
||
| 4328 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8C |
||
| 4329 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8D |
||
| 4330 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8E |
||
| 4331 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 8F |
||
| 4332 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4333 | {0, 0xEB , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 3 , }, // VEX 0F 90. Link to kmov |
||
| 4334 | {"kmov", 0x20 , 0x35200, 0x13 , 0x2009, 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 91. Name without w in KNC syntax, but code identical |
||
| 4335 | {0, 0xEC , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // VEX 0F 92. Link to kmov r, k |
||
| 4336 | {0, 0xEE , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }, // VEX 0F 93. Link to kmov k, r |
||
| 4337 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 94 |
||
| 4338 | {"kconcath", 0x80 , 0xB0000, 0x19 , 0x1004, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 }, // VEX 0F 95 |
||
| 4339 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 96 |
||
| 4340 | {"kconcatl", 0x80 , 0xB0000, 0x19 , 0x1004, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 }, // VEX 0F 97 |
||
| 4341 | {"kortest", 0x20 , 0x25200, 0x12 , 0x95 , 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 98 |
||
| 4342 | {"ktest", 0x20 , 0x25200, 0x12 , 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 99 |
||
| 4343 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9A |
||
| 4344 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9B |
||
| 4345 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9C |
||
| 4346 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9D |
||
| 4347 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9E |
||
| 4348 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 9F |
||
| 4349 | |||
| 4350 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A0 |
||
| 4351 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A1 |
||
| 4352 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A2 |
||
| 4353 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A3 |
||
| 4354 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A4 |
||
| 4355 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A5 |
||
| 4356 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A6 |
||
| 4357 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A7 |
||
| 4358 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A8 |
||
| 4359 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F A9 |
||
| 4360 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AA |
||
| 4361 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AB |
||
| 4362 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AC |
||
| 4363 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AD |
||
| 4364 | {0, 0xCD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x4 , 0 }, // VEX 0F AE. Link |
||
| 4365 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // VEX 0F AF |
||
| 4366 | |||
| 4367 | |||
| 4368 | // Shortcut opcode map for EVEX F2 0F 38 |
||
| 4369 | // Indexed by first opcode byte after EVEX prefix |
||
| 4370 | SOpcodeDef OpcodeMapB2[] = { |
||
| 4371 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 00 |
||
| 4372 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 01 |
||
| 4373 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 02 |
||
| 4374 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 03 |
||
| 4375 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 04 |
||
| 4376 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 05 |
||
| 4377 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 06 |
||
| 4378 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 07 |
||
| 4379 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 08 |
||
| 4380 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 09 |
||
| 4381 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0A |
||
| 4382 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0B |
||
| 4383 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0C |
||
| 4384 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0D |
||
| 4385 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0E |
||
| 4386 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 0F |
||
| 4387 | |||
| 4388 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 10 |
||
| 4389 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 11 |
||
| 4390 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 12 |
||
| 4391 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 13 |
||
| 4392 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 14 |
||
| 4393 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 15 |
||
| 4394 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 16 |
||
| 4395 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 17 |
||
| 4396 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 18 |
||
| 4397 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 19 |
||
| 4398 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1A |
||
| 4399 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1B |
||
| 4400 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1C |
||
| 4401 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1D |
||
| 4402 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1E |
||
| 4403 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 1F |
||
| 4404 | |||
| 4405 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4406 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 20 |
||
| 4407 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 21 |
||
| 4408 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 22 |
||
| 4409 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 23 |
||
| 4410 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 24 |
||
| 4411 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 25 |
||
| 4412 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 26 |
||
| 4413 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 27 |
||
| 4414 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 28 |
||
| 4415 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 29 |
||
| 4416 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2A |
||
| 4417 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2B |
||
| 4418 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2C |
||
| 4419 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2D |
||
| 4420 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2E |
||
| 4421 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 2F |
||
| 4422 | |||
| 4423 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 30 |
||
| 4424 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 31 |
||
| 4425 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 32 |
||
| 4426 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 33 |
||
| 4427 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 34 |
||
| 4428 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 35 |
||
| 4429 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 36 |
||
| 4430 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 37 |
||
| 4431 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 38 |
||
| 4432 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 39 |
||
| 4433 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3A |
||
| 4434 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3B |
||
| 4435 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3C |
||
| 4436 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3D |
||
| 4437 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3E |
||
| 4438 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 3F |
||
| 4439 | |||
| 4440 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4441 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 40 |
||
| 4442 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 41 |
||
| 4443 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 42 |
||
| 4444 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 43 |
||
| 4445 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 44 |
||
| 4446 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 45 |
||
| 4447 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 46 |
||
| 4448 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 47 |
||
| 4449 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 48 |
||
| 4450 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 49 |
||
| 4451 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4A |
||
| 4452 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4B |
||
| 4453 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4C |
||
| 4454 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4D |
||
| 4455 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4E |
||
| 4456 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 4F |
||
| 4457 | |||
| 4458 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 50 |
||
| 4459 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 51 |
||
| 4460 | {"vp4dpwssd" ,0x24 ,0x8F9800, 0x19 , 0x164B, 0x164B, 0x244B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 52 |
||
| 4461 | {"vp4dpwssds",0x24 ,0x8F9800, 0x19 , 0x164B, 0x164B, 0x244B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 53 |
||
| 4462 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 54 |
||
| 4463 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 55 |
||
| 4464 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 56 |
||
| 4465 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 57 |
||
| 4466 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 58 |
||
| 4467 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 59 |
||
| 4468 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5A |
||
| 4469 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5B |
||
| 4470 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5C |
||
| 4471 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5D |
||
| 4472 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5E |
||
| 4473 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 5F |
||
| 4474 | |||
| 4475 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4476 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 60 |
||
| 4477 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 61 |
||
| 4478 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 62 |
||
| 4479 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 63 |
||
| 4480 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 64 |
||
| 4481 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 65 |
||
| 4482 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 66 |
||
| 4483 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 67 |
||
| 4484 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 68 |
||
| 4485 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 69 |
||
| 4486 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6A |
||
| 4487 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6B |
||
| 4488 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6C |
||
| 4489 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6D |
||
| 4490 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6E |
||
| 4491 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 6F |
||
| 4492 | |||
| 4493 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 70 |
||
| 4494 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 71 |
||
| 4495 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 72 |
||
| 4496 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 73 |
||
| 4497 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 74 |
||
| 4498 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 75 |
||
| 4499 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 76 |
||
| 4500 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 77 |
||
| 4501 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 78 |
||
| 4502 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 79 |
||
| 4503 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7A |
||
| 4504 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7B |
||
| 4505 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7C |
||
| 4506 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7D |
||
| 4507 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7E |
||
| 4508 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 7F |
||
| 4509 | |||
| 4510 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4511 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 80 |
||
| 4512 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 81 |
||
| 4513 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 82 |
||
| 4514 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 83 |
||
| 4515 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 84 |
||
| 4516 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 85 |
||
| 4517 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 86 |
||
| 4518 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 87 |
||
| 4519 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 88 |
||
| 4520 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 89 |
||
| 4521 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8A |
||
| 4522 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8B |
||
| 4523 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8C |
||
| 4524 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8D |
||
| 4525 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8E |
||
| 4526 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 8F |
||
| 4527 | |||
| 4528 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 90 |
||
| 4529 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 91 |
||
| 4530 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 92 |
||
| 4531 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 93 |
||
| 4532 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 94 |
||
| 4533 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 95 |
||
| 4534 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 96 |
||
| 4535 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 97 |
||
| 4536 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 98 |
||
| 4537 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 99 |
||
| 4538 | {"v4fmaddps", 0x24 ,0x8F9800, 0x19 , 0x164B, 0x164B, 0x264B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 9A |
||
| 4539 | {"v4fmaddss", 0x24 ,0x8F9800, 0x19 , 0x144B, 0x144B, 0x244B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 9B |
||
| 4540 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 9C |
||
| 4541 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 9D |
||
| 4542 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 9E |
||
| 4543 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 9F |
||
| 4544 | |||
| 4545 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4546 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A0 |
||
| 4547 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A1 |
||
| 4548 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A2 |
||
| 4549 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A3 |
||
| 4550 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A4 |
||
| 4551 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A5 |
||
| 4552 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A6 |
||
| 4553 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A7 |
||
| 4554 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A8 |
||
| 4555 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 A9 |
||
| 4556 | {"v4fnmaddps",0x24 ,0x8F9800, 0x19 , 0x164B, 0x164B, 0x264B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 AA |
||
| 4557 | {"v4fnmaddss",0x24 ,0x8F9800, 0x19 , 0x144B, 0x144B, 0x244B, 0 , 0x20 , 0 , 0 , 0 }, // EVEX F2 0F 38 AB |
||
| 4558 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 AC |
||
| 4559 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 AD |
||
| 4560 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F2 0F 38 AE |
||
| 4561 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // EVEX F2 0F 38 AF |
||
| 4562 | |||
| 4563 | |||
| 4564 | // Shortcut opcode map for EVEX F3 0F 38 |
||
| 4565 | // Indexed by first opcode byte after EVEX prefix |
||
| 4566 | SOpcodeDef OpcodeMapB3[] = { |
||
| 4567 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4568 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 00 |
||
| 4569 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 01 |
||
| 4570 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 02 |
||
| 4571 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 03 |
||
| 4572 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 04 |
||
| 4573 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 05 |
||
| 4574 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 06 |
||
| 4575 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 07 |
||
| 4576 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 08 |
||
| 4577 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 09 |
||
| 4578 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0A |
||
| 4579 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0B |
||
| 4580 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0C |
||
| 4581 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0D |
||
| 4582 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0E |
||
| 4583 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 0F |
||
| 4584 | |||
| 4585 | {"vpmovuswb", 0x20 ,0x820400, 0x13 , 0x0F01, 0x1202, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 10 |
||
| 4586 | {"vpmovusdb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1203, 0 , 0 , 0x2430, 0 , 0 , 0x800 }, // EVEX F3 0F 38 11 |
||
| 4587 | {"vpmovusqb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1204, 0 , 0 , 0x2630, 0 , 0 , 0x800 }, // EVEX F3 0F 38 12 |
||
| 4588 | {"vpmovusdw", 0x20 ,0x820400, 0x13 , 0x0F02, 0x1203, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 13 |
||
| 4589 | {"vpmovusqw", 0x20 ,0x820400, 0x13 , 0x0402, 0x1204, 0 , 0 , 0x2430, 0 , 0 , 0x800 }, // EVEX F3 0F 38 14 |
||
| 4590 | {"vpmovusqd", 0x20 ,0x820400, 0x13 , 0x0F03, 0x1204, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 15 |
||
| 4591 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 16 |
||
| 4592 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 17 |
||
| 4593 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 18 |
||
| 4594 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 19 |
||
| 4595 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1A |
||
| 4596 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1B |
||
| 4597 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1C |
||
| 4598 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1D |
||
| 4599 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1E |
||
| 4600 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 1F |
||
| 4601 | |||
| 4602 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4603 | {"vpmovswb", 0x20 ,0x820400, 0x13 , 0x0F01, 0x1202, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 20 |
||
| 4604 | {"vpmovsdb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1203, 0 , 0 , 0x2430, 0 , 0 , 0x800 }, // EVEX F3 0F 38 21 |
||
| 4605 | {"vpmovsqb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1204, 0 , 0 , 0x2630, 0 , 0 , 0x800 }, // EVEX F3 0F 38 22 |
||
| 4606 | {"vpmovsdw", 0x20 ,0x820400, 0x13 , 0x0F02, 0x1203, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 23 |
||
| 4607 | {"vpmovsqw", 0x20 ,0x820400, 0x13 , 0x0402, 0x1204, 0 , 0 , 0x2430, 0 , 0 , 0x800 }, // EVEX F3 0F 38 24 |
||
| 4608 | {"vpmovsqd", 0x20 ,0x820400, 0x13 , 0x0F03, 0x1204, 0 , 0 , 0x2220, 0 , 0 , 0 }, // EVEX F3 0F 38 25 |
||
| 4609 | {"vptestnm", 0x20 ,0x8EC200, 0x19 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0 , 0 , 1 }, // EVEX F3 0F 38 26 |
||
| 4610 | {"vptestnm", 0x20 ,0x8EB200, 0x19 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0 , 0 , 1 }, // EVEX F3 0F 38 27 |
||
| 4611 | {"vpmovm2", 0x20 ,0x86C400, 0x12 , 0x1201, 0x95 , 0 , 0 , 0 , 0 , 0 , 1 }, // EVEX F3 0F 38 28 |
||
| 4612 | {0, 0x12E , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // EVEX F3 0F 38 29 |
||
| 4613 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2A |
||
| 4614 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2B |
||
| 4615 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2C |
||
| 4616 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2D |
||
| 4617 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2E |
||
| 4618 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 2F |
||
| 4619 | |||
| 4620 | {"vpmovwb", 0x20 ,0x820400, 0x13 , 0x0F01, 0x1202, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 30 |
||
| 4621 | {"vpmovdb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1203, 0 , 0 , 0x2420, 0 , 0 , 0x800 }, // EVEX F3 0F 38 31 |
||
| 4622 | {"vpmovqb", 0x20 ,0x820400, 0x13 , 0x0401, 0x1204, 0 , 0 , 0x2620, 0 , 0 , 0x800 }, // EVEX F3 0F 38 32 |
||
| 4623 | {"vpmovdw", 0x20 ,0x820400, 0x13 , 0x0F02, 0x1203, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 33 |
||
| 4624 | {"vpmovqw", 0x20 ,0x820400, 0x13 , 0x0402, 0x1204, 0 , 0 , 0x2420, 0 , 0 , 0x800 }, // EVEX F3 0F 38 34 |
||
| 4625 | {"vpmovqd", 0x20 ,0x820400, 0x13 , 0x0F03, 0x1204, 0 , 0 , 0x2220, 0 , 0 , 0x800 }, // EVEX F3 0F 38 35 |
||
| 4626 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 36 |
||
| 4627 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 37 |
||
| 4628 | {"vpmovm2", 0x20 ,0x86B400, 0x12 , 0x1201, 0x95 , 0 , 0 , 0 , 0 , 0 , 1 }, // EVEX F3 0F 38 38 |
||
| 4629 | {0, 0x12F , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // EVEX F3 0F 38 39 |
||
| 4630 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3A |
||
| 4631 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3B |
||
| 4632 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3C |
||
| 4633 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3D |
||
| 4634 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3E |
||
| 4635 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 3F |
||
| 4636 | |||
| 4637 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4638 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 40 |
||
| 4639 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 41 |
||
| 4640 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 42 |
||
| 4641 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 43 |
||
| 4642 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 44 |
||
| 4643 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 45 |
||
| 4644 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 46 |
||
| 4645 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 47 |
||
| 4646 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 48 |
||
| 4647 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 49 |
||
| 4648 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4A |
||
| 4649 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4B |
||
| 4650 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4C |
||
| 4651 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4D |
||
| 4652 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4E |
||
| 4653 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 4F |
||
| 4654 | |||
| 4655 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 50 |
||
| 4656 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 51 |
||
| 4657 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 52 |
||
| 4658 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 53 |
||
| 4659 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 54 |
||
| 4660 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 55 |
||
| 4661 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 56 |
||
| 4662 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 57 |
||
| 4663 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 58 |
||
| 4664 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 59 |
||
| 4665 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5A |
||
| 4666 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5B |
||
| 4667 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5C |
||
| 4668 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5D |
||
| 4669 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5E |
||
| 4670 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 5F |
||
| 4671 | |||
| 4672 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4673 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 60 |
||
| 4674 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 61 |
||
| 4675 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 62 |
||
| 4676 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 63 |
||
| 4677 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 64 |
||
| 4678 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 65 |
||
| 4679 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 66 |
||
| 4680 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 67 |
||
| 4681 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 68 |
||
| 4682 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 69 |
||
| 4683 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6A |
||
| 4684 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6B |
||
| 4685 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6C |
||
| 4686 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6D |
||
| 4687 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6E |
||
| 4688 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 6F |
||
| 4689 | |||
| 4690 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 70 |
||
| 4691 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 71 |
||
| 4692 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 72 |
||
| 4693 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 73 |
||
| 4694 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 74 |
||
| 4695 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 75 |
||
| 4696 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 76 |
||
| 4697 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 77 |
||
| 4698 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 78 |
||
| 4699 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 79 |
||
| 4700 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7A |
||
| 4701 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7B |
||
| 4702 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7C |
||
| 4703 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7D |
||
| 4704 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7E |
||
| 4705 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 7F |
||
| 4706 | |||
| 4707 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4708 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 80 |
||
| 4709 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 81 |
||
| 4710 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 82 |
||
| 4711 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 83 |
||
| 4712 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 84 |
||
| 4713 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 85 |
||
| 4714 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 86 |
||
| 4715 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 87 |
||
| 4716 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 88 |
||
| 4717 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 89 |
||
| 4718 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8A |
||
| 4719 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8B |
||
| 4720 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8C |
||
| 4721 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8D |
||
| 4722 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8E |
||
| 4723 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 8F |
||
| 4724 | |||
| 4725 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 90 |
||
| 4726 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 91 |
||
| 4727 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 92 |
||
| 4728 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 93 |
||
| 4729 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 94 |
||
| 4730 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 95 |
||
| 4731 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 96 |
||
| 4732 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 97 |
||
| 4733 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 98 |
||
| 4734 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 99 |
||
| 4735 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9A |
||
| 4736 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9B |
||
| 4737 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9C |
||
| 4738 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9D |
||
| 4739 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9E |
||
| 4740 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 9F |
||
| 4741 | |||
| 4742 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4743 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A0 |
||
| 4744 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A1 |
||
| 4745 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A2 |
||
| 4746 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A3 |
||
| 4747 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A4 |
||
| 4748 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A5 |
||
| 4749 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A6 |
||
| 4750 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A7 |
||
| 4751 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A8 |
||
| 4752 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 A9 |
||
| 4753 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 AA |
||
| 4754 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 AB |
||
| 4755 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 AC |
||
| 4756 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 AD |
||
| 4757 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 AE |
||
| 4758 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // EVEX F3 0F 38 AF |
||
| 4759 | |||
| 4760 | |||
| 4761 | |||
| 4762 | // Submap for vcvtfxpntpd2udq etc. Opcode byte = 0F 3A CA |
||
| 4763 | // Indexed by prefix: none/66/F2/F3 |
||
| 4764 | SOpcodeDef OpcodeMapB4[] = { |
||
| 4765 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4766 | {"vcvtfxpntudq2ps",0x80 ,0x420000, 0x52 , 0x164B, 0x603 , 0x31 , 0 , 0 , 0x1206, 0 , 0x100 }, // 0F 3A CA |
||
| 4767 | {"vcvtfxpntps2udq",0x80 ,0x420200, 0x52 , 0x1603, 0x64B , 0x31 , 0 , 0 , 0x1204, 0 , 0x100 }, // 66 0F 3A CA |
||
| 4768 | {"vcvtfxpntpd2udq",0x80 ,0x423800, 0x52 , 0x1603, 0x64C , 0x31 , 0 , 0 , 0x1205, 0 , 0x100 }, // F2 0F 3A CA |
||
| 4769 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 3A CA |
||
| 4770 | |||
| 4771 | // Submap for vcvtfxpntdq2ps etc. Opcode byte = 0F 3A CB |
||
| 4772 | // Indexed by prefix: none/66/F2/F3 |
||
| 4773 | SOpcodeDef OpcodeMapB5[] = { |
||
| 4774 | {"vcvtfxpntdq2ps",0x80 ,0x420000, 0x52 , 0x164B, 0x603 , 0x31 , 0 , 0 , 0x1206, 0 , 0x100 }, // 0F 3B CB |
||
| 4775 | {"vcvtfxpntps2dq",0x80 ,0x420200, 0x52 , 0x1603, 0x64B , 0x31 , 0 , 0 , 0x1204, 0 , 0x100 }, // 66 0F 3B CB |
||
| 4776 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 3B CB |
||
| 4777 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 3B CB |
||
| 4778 | |||
| 4779 | // Submap for vgatherdps. Opcode byte = 0F 38 92 |
||
| 4780 | // Indexed by MVEX prefix |
||
| 4781 | SOpcodeDef OpcodeMapB6[] = { |
||
| 4782 | {"vgatherdp", 0xCC ,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // VEX 0F 38 92. link vgatherdps |
||
| 4783 | {"vgatherdp", 0xCB ,0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // EVEX/MVEX 0F 38 92. link vgatherdps, has k register as mask |
||
| 4784 | |||
| 4785 | // Submap for E/MVEX 0F 38 C6 vgatherpf.. Indexed by W bit |
||
| 4786 | SOpcodeDef OpcodeMapB7[] = { |
||
| 4787 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4788 | {0 , 0x10D , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }, // E/MVEX 0F 38 C6. W0 |
||
| 4789 | {0 , 0x10E , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x2 , 0 }}; // E/MVEX 0F 38 C6. W1 |
||
| 4790 | |||
| 4791 | // Submap for movdqa. Opcode byte = 66 0F 6F |
||
| 4792 | // Indexed by E/MVEX prefix |
||
| 4793 | SOpcodeDef OpcodeMapB8[] = { |
||
| 4794 | {"movdqa", 0x12 , 0x52100, 0x12 , 0x1250, 0x250 , 0 , 0 , 0 , 0 , 0 , 0x102 }, // 66 0F 6F |
||
| 4795 | {"vmovdqa", 0x19 ,0xC53100, 0x12 , 0x1209, 0x209 , 0 , 0 , 0x30 , 0x140A, 0 , 0x1100}}; // E/MVEX.66 0F 6F |
||
| 4796 | |||
| 4797 | // Submap for movdqu. Opcode byte = F3 0F 6F |
||
| 4798 | // Indexed by E/MVEX prefix |
||
| 4799 | SOpcodeDef OpcodeMapB9[] = { |
||
| 4800 | {"movdqu", 0x12 , 0x50400, 0x12 , 0x1250, 0x251 , 0 , 0 , 0 , 0 , 0 , 0x202 }, // F3 0F 6F |
||
| 4801 | {"vmovdqu", 0x20 ,0x853400, 0x12 , 0x1209, 0x209 , 0 , 0 , 0x30 , 0 , 0 , 0x1200}}; // F3 0F 6F |
||
| 4802 | |||
| 4803 | // Submap for movdqa. Opcode byte = 66 0F 7F |
||
| 4804 | // Indexed by E/MVEX prefix |
||
| 4805 | SOpcodeDef OpcodeMapBA[] = { |
||
| 4806 | {"movdqa", 0x12 , 0x52100, 0x13 , 0x250 , 0x1250, 0 , 0 , 0 , 0 , 0 , 0x102 }, // 66 0F 7F |
||
| 4807 | {"vmovdqa", 0x19 ,0xC53100, 0x13 , 0x203 , 0x1203, 0 , 0 , 0x30 , 0x140E, 0 , 0x1100}}; // E/MVEX.66.W0 0F 7F |
||
| 4808 | |||
| 4809 | // Submap for movdqu. Opcode byte = F3 0F 7F |
||
| 4810 | // Indexed by MVEX.W prefix |
||
| 4811 | SOpcodeDef OpcodeMapBB[] = { |
||
| 4812 | {"movdqu", 0x12 , 0x50400, 0x13 , 0x251 , 0x1250, 0 , 0 , 0 , 0 , 0 , 0x202 }, // F3 0F 7F |
||
| 4813 | {"vmovdqu", 0x20 ,0x853400, 0x13 , 0x209 , 0x1209, 0 , 0 , 0x30 , 0 , 0 ,0x1200 }}; // E/MVEX F3 0F 7F |
||
| 4814 | |||
| 4815 | // Submap for vmovaps. Opcode byte = 0F 29 |
||
| 4816 | // Indexed by prefix: none/66/F2/F3 |
||
| 4817 | SOpcodeDef OpcodeMapBC[] = { |
||
| 4818 | {"mova", 0x11 ,0xC52200, 0x13 , 0x24F , 0x124F, 0 , 0 , 0x30 , 0x140C, 0 , 0x103 }, // 0F 29. movaps |
||
| 4819 | {"mova", 0x11 ,0xC52200, 0x13 , 0x24F , 0x124F, 0 , 0 , 0x30 , 0x140C, 0 , 0x103 }, // 66 0F 29. movapd |
||
| 4820 | {0 , 0xBD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xF , 0 }, // F2 0F 29. link to vmovnraps |
||
| 4821 | {0 , 0xBD , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xF , 0 }}; // F3 0F 29. link to vmovnraps |
||
| 4822 | |||
| 4823 | // Submap for vmovnraps. Opcode byte = F2/F3 0F 29 |
||
| 4824 | // Indexed by MVEX.E bit |
||
| 4825 | SOpcodeDef OpcodeMapBD[] = { |
||
| 4826 | {"vmovnrap", 0x80 ,0x411C00, 0x13 ,0x224F , 0x124F, 0 , 0 , 0 , 0x180C, 0 , 0x101 }, // F2/F3 0F 29 |
||
| 4827 | {"vmovnrngoap",0x80 ,0x411C00, 0x13 ,0x224F , 0x124F, 0 , 0 , 0 , 0x180C, 0 , 0x101 }}; // F2/F3 0F 29, MVEX.E |
||
| 4828 | |||
| 4829 | // Submap for vloadunpackld. Opcode byte = 0F 38 D0 |
||
| 4830 | // Indexed by prefix: none/66 |
||
| 4831 | SOpcodeDef OpcodeMapBE[] = { |
||
| 4832 | {"vloadunpackl",0x80, 0x423200,0x12 , 0x1609, 0x2609, 0 , 0 , 0 , 0x100A, 0 , 0x101 }, // 0F 38 D0 |
||
| 4833 | {"vpackstorel" ,0x80, 0x423200,0x13 , 0x2609, 0x1609, 0 , 0 , 0 , 0x100E, 0 , 0x101 }}; // 66 0F 38 D0 |
||
| 4834 | |||
| 4835 | // Submap for vloadunpacklps. Opcode byte = 0F 38 D1 |
||
| 4836 | // Indexed by prefix: none/66 |
||
| 4837 | SOpcodeDef OpcodeMapBF[] = { |
||
| 4838 | {"vloadunpacklp",0x80,0x421200,0x12 , 0x164F, 0x264F, 0 , 0 , 0 , 0x1008, 0 , 0x101 }, // 0F 38 D1 |
||
| 4839 | {"vpackstorelp" ,0x80,0x421200,0x13 , 0x264F, 0x164F, 0 , 0 , 0 , 0x100C, 0 , 0x101 }}; // 66 0F 38 D1 |
||
| 4840 | |||
| 4841 | // Submap for vloadunpackhd. Opcode byte = 0F 38 D4 |
||
| 4842 | // Indexed by prefix: none/66 |
||
| 4843 | SOpcodeDef OpcodeMapC0[] = { |
||
| 4844 | {"vloadunpackh",0x80, 0x423200,0x12 , 0x1609, 0x2609, 0 , 0 , 0 , 0x100A, 0 , 0x101 }, // 0F 38 D4 |
||
| 4845 | {"vpackstoreh" ,0x80, 0x423200,0x13 , 0x2609, 0x1609, 0 , 0 , 0 , 0x100E, 0 , 0x101 }}; // 66 0F 38 D4 |
||
| 4846 | |||
| 4847 | // Submap for vloadunpackhps. Opcode byte = 0F 38 D5 |
||
| 4848 | // Indexed by prefix: none/66 |
||
| 4849 | SOpcodeDef OpcodeMapC1[] = { |
||
| 4850 | {"vloadunpackhp",0x80,0x421200,0x12 , 0x164F, 0x264F, 0 , 0 , 0 , 0x1008, 0 , 0x101 }, // 0F 38 D5 |
||
| 4851 | {"vpackstorehp" ,0x80,0x421200,0x13 , 0x264F, 0x164F, 0 , 0 , 0 , 0x100C, 0 , 0x101 }}; // 66 0F 38 D5 |
||
| 4852 | |||
| 4853 | // Submap for pand. Opcode byte = 0F DB |
||
| 4854 | // Indexed by E/MVEX prefix |
||
| 4855 | SOpcodeDef OpcodeMapC2[] = { |
||
| 4856 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4857 | {"pand", 0x7 , 0xD0200, 0x19 , 0x1150, 0x1150, 0x150 , 0 , 0 , 0 , 0 , 0x2 }, // 0F DB |
||
| 4858 | {"vpand", 0x20 ,0xC93200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // MVEX 0F DB |
||
| 4859 | |||
| 4860 | // Submap for pandn. Opcode byte = 0F DF |
||
| 4861 | // Indexed by MVEX prefix |
||
| 4862 | SOpcodeDef OpcodeMapC3[] = { |
||
| 4863 | {"pandn", 0x7 , 0xD0200, 0x19 , 0x1150, 0x1150, 0x150 , 0 , 0 , 0 , 0 , 0x2 }, // 0F DF |
||
| 4864 | {"vpandn", 0x20 ,0xC93200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // MVEX 0F DF |
||
| 4865 | |||
| 4866 | // Submap for por. Opcode byte = 0F EB |
||
| 4867 | // Indexed by E/MVEX prefix |
||
| 4868 | SOpcodeDef OpcodeMapC4[] = { |
||
| 4869 | {"por", 0x7 , 0xD0200, 0x19 , 0x1150, 0x1150, 0x150 , 0 , 0 , 0 , 0 , 0x2 }, // 0F EB |
||
| 4870 | {"vpor", 0x20 ,0xC93200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // MVEX 0F EB |
||
| 4871 | |||
| 4872 | // Submap for pxor. Opcode byte = 0F EF |
||
| 4873 | // Indexed by MVEX prefix |
||
| 4874 | SOpcodeDef OpcodeMapC5[] = { |
||
| 4875 | {"pxor", 0x7 , 0xD0200, 0x19 , 0x1150, 0x1150, 0x150 , 0 , 0 , 0 , 0 , 0x2 }, // 0F EF |
||
| 4876 | {"vpxor", 0x20 ,0xC93200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // MVEX 0F EF |
||
| 4877 | |||
| 4878 | // Submap for vpcmpd. Opcode byte = 0F 3A 3E |
||
| 4879 | // Indexed by VEX / EVEX |
||
| 4880 | SOpcodeDef OpcodeMapC6[] = { |
||
| 4881 | {"kextract", 0x80 , 0x38200, 0x52 , 0x1095, 0x1004, 0x11 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 3A 3E |
||
| 4882 | {0, 0x112 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }}; // EVEX 0F 3A 3F. Link to vpcmp |
||
| 4883 | |||
| 4884 | // Submap for pcmpeqd. Opcode byte = 0F 76 |
||
| 4885 | // Indexed by E/MVEX prefix |
||
| 4886 | SOpcodeDef OpcodeMapC7[] = { |
||
| 4887 | {"pcmpeqd", 0x7 , 0xD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 76 |
||
| 4888 | {"vpcmpeqd", 0x20 ,0xCBA200, 0x19 , 0x95 , 0x1203, 0x203 , 0 , 0x11 , 0x1406, 0 , 0x000 }}; // E/MVEX 0F 76 |
||
| 4889 | |||
| 4890 | // Submap for pcmpgtd. Opcode byte = 0F 66 |
||
| 4891 | // Indexed by E/MVEX prefix |
||
| 4892 | SOpcodeDef OpcodeMapC8[] = { |
||
| 4893 | {"pcmpgtd", 0x7 , 0xD0200, 0x19 , 0x1103, 0x1103, 0x103 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 66 |
||
| 4894 | {"vpcmpgtd", 0x20 ,0xCBA200, 0x19 , 0x95 , 0x1203, 0x203 , 0 , 0x11 , 0x1406, 0 , 0x000 }}; // E/MVEX 0F 66 |
||
| 4895 | |||
| 4896 | // Opcode map for EVEX 66 0F 79. Indexed by W bit |
||
| 4897 | SOpcodeDef OpcodeMapC9[] = { |
||
| 4898 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4899 | {"vcvtps2uqq", 0x20 ,0x840200, 0x12 , 0x204 , 0xF4B , 0 , 0 , 0x27 , 0 , 0 , 0 }, // EVEX 66 0F 79. W = 0 |
||
| 4900 | {"vcvtpd2uqq", 0x20 ,0x841200, 0x12 , 0x204 , 0x24C , 0 , 0 , 0x27 , 0 , 0 , 0 }}; // EVEX 66 0F 79. W = 1 |
||
| 4901 | |||
| 4902 | // Opcode map for 0F 50. Indexed by prefix |
||
| 4903 | SOpcodeDef OpcodeMapCA[] = { |
||
| 4904 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4905 | {"movmskps", 0x11 , 0x52000, 0x12 , 0x100A, 0x124B, 0 , 0 , 0 , 0 , 0 , 2 }, // 0F 50. movmskps |
||
| 4906 | {"movmskpd", 0x11 , 0x52200, 0x12 , 0x100A, 0x124C, 0 , 0 , 0 , 0 , 0 , 2 }, // 66 0F 50. movmskpd |
||
| 4907 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 4908 | |||
| 4909 | // Submap for EVEX vgatherdps. Opcode byte = 0F 38 92 |
||
| 4910 | // Indexed by VEX.W bit |
||
| 4911 | SOpcodeDef OpcodeMapCB[] = { |
||
| 4912 | {"vgatherdps",0x20 ,0xC39200, 0x1E, 0x24F , 0x224F, 0 , 0 , 0x1090, 0x3048, 0 , 0 }, // EVEX/MVEX 0F 38 92 has k register as mask |
||
| 4913 | {"vgatherdpd",0x20 ,0xC39200, 0x1E, 0x24F , 0x2F4F, 0 , 0 , 0x1090, 0x3048, 0 , 0 }}; // EVEX/MVEX 0F 38 92 has k register as mask |
||
| 4914 | |||
| 4915 | // Submap for vgatherdps. Opcode byte = 0F 38 92 |
||
| 4916 | // Indexed by VEX.W bit |
||
| 4917 | SOpcodeDef OpcodeMapCC[] = { |
||
| 4918 | {"vgatherdps",0x1C ,0x0E9200, 0x1E, 0x24B , 0x224B, 0x24B , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 38 92 |
||
| 4919 | {"vgatherdpd",0x1C ,0x0E9200, 0x1E, 0x24C , 0x2F4C, 0x24C , 0 , 0 , 0 , 0 , 0 }}; // VEX 0F 38 92 |
||
| 4920 | |||
| 4921 | // Submap for opcodes VEX/MVEX 0F AE |
||
| 4922 | // Indexed by reg bits = 0 - 7 and mod < 3 to mod = 3 |
||
| 4923 | // These codes are with VEX or MVEX prefix. Same codes without prefix are in OpcodeMap34 |
||
| 4924 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4925 | SOpcodeDef OpcodeMapCD[] = { |
||
| 4926 | {"fxsave", 0x11 , 0 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /0 |
||
| 4927 | {"fxrstor", 0x11 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0x8 }, // VEX 0F AE /1 |
||
| 4928 | {"vldmxcsr", 0x11 , 0x10000, 0x11 , 0 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /2 |
||
| 4929 | {"vstmxcsr", 0x11 , 0x10000, 0x11 , 0x2003, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /3 |
||
| 4930 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /4 |
||
| 4931 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /5 |
||
| 4932 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /6 |
||
| 4933 | {0 , 0xCF , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // VEX 0F AE /7. Link |
||
| 4934 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /0 |
||
| 4935 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /1 |
||
| 4936 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /2 |
||
| 4937 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /3 |
||
| 4938 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /4 |
||
| 4939 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE reg /5 |
||
| 4940 | {0 , 0xCE , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // VEX 0F AE reg /6. Link |
||
| 4941 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // VEX 0F AE reg /7 |
||
| 4942 | |||
| 4943 | // Submap for opcodes VEX/MVEX 0F AE /6 |
||
| 4944 | // Indexed by prefixes 66 F2 F3 |
||
| 4945 | SOpcodeDef OpcodeMapCE[] = { |
||
| 4946 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4947 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /6 |
||
| 4948 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 66 0F AE /6 |
||
| 4949 | {"spflt" , 0x80 , 0x33400, 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX F2 0F AE /6 |
||
| 4950 | {"delay" , 0x80 , 0x33400, 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // VEX F3 0F AE /6 |
||
| 4951 | |||
| 4952 | // Submap for opcodes VEX/MVEX 0F AE /7 |
||
| 4953 | // Indexed by prefixes 66 F2 F3 |
||
| 4954 | SOpcodeDef OpcodeMapCF[] = { |
||
| 4955 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F AE /7 |
||
| 4956 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 66 0F AE /7 |
||
| 4957 | {"clevict0", 0x80 ,0x430800, 0x11 , 0x2006, 0 , 0 , 0 , 0 , 2 , 0 , 0 }, // VEX F2 0F AE /7 |
||
| 4958 | {"clevict1", 0x80 ,0x430400, 0x11 , 0x2006, 0 , 0 , 0 , 0 , 2 , 0 , 0 }}; // VEX F3 0F AE /7 |
||
| 4959 | |||
| 4960 | // Submap for opcodes 0F 38 F6 |
||
| 4961 | // Indexed by prefixes 66 F2 F3 |
||
| 4962 | SOpcodeDef OpcodeMapD0[] = { |
||
| 4963 | {"wrss" , 0 , 0x1000 , 0x13 , 0x2009, 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 F6 |
||
| 4964 | {"adcx" , 0x1D , 0x1200 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 38 F6 |
||
| 4965 | {"mulx" , 0x1D , 0xB1000, 0x19 , 0x1009, 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 F6 |
||
| 4966 | {"adox" , 0x1D , 0x1400 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 38 F6 |
||
| 4967 | |||
| 4968 | SOpcodeDef OpcodeMapD1[] = { |
||
| 4969 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4970 | {"prefetch", 0x1001 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0D /0 AMD only. Works as NOP on Intel |
||
| 4971 | {"prefetchw", 0x1D , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0D /1 |
||
| 4972 | {"prefetchwt1",0x22 , 0 , 0x11 , 0 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 0D /2 |
||
| 4973 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 4974 | |||
| 4975 | // Tertiary opcode map for movnt. Opcode byte = 0F 2B |
||
| 4976 | // Indexed by prefix = none, 66, F2, F3 |
||
| 4977 | SOpcodeDef OpcodeMapD2[4] = { |
||
| 4978 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4979 | {"movntps", 0x11 ,0x852000, 0x13 , 0x224B, 0x124B, 0 , 0 , 0x00 , 0 , 0 , 0x102 }, // 0F 2B. movntps |
||
| 4980 | {"movntpd", 0x12 ,0x852200, 0x13 , 0x224C, 0x124C, 0 , 0 , 0x00 , 0 , 0 , 0x102 }, // 66 0F 2B. movntpd |
||
| 4981 | {"movntsd", 0x1004, 0x800 , 0x13 , 0x204C, 0x104C, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 2B. movntsd (AMD only) |
||
| 4982 | {"movntss", 0x1004, 0x400 , 0x13 , 0x204B, 0x104B, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 2B. movntss (AMD only) |
||
| 4983 | |||
| 4984 | // opcode map for bsr and lzcnt. Opcode byte = 0F BD |
||
| 4985 | // Indexed by prefix = none, 66, F2, F3 |
||
| 4986 | SOpcodeDef OpcodeMapD3[4] = { |
||
| 4987 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 4988 | {"bsr", 0x3 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BD. bsr |
||
| 4989 | {"bsr", 0x3 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BD. not allowed |
||
| 4990 | {"bsr", 0x3 , 0x1100 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F BD. not allowed |
||
| 4991 | {"lzcnt", 0x1D ,0x11500 , 0x12 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F BD. AMD SSE4a, Intel LZCNT |
||
| 4992 | |||
| 4993 | // Opcode map for blcfill etc. Opcode byte = XOP(9) 01, indexed by reg bits |
||
| 4994 | SOpcodeDef OpcodeMapD4[] = { |
||
| 4995 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /0 |
||
| 4996 | {"blcfill", 0x1007, 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /1 |
||
| 4997 | {"blsfill", 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /2 |
||
| 4998 | {"blcs" , 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /3 |
||
| 4999 | {"tzmsk" , 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /4 |
||
| 5000 | {"blcic" , 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /5 |
||
| 5001 | {"blsic" , 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 01 /6 |
||
| 5002 | {"t1mskc", 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }}; // XOP(9) 01 /7 |
||
| 5003 | |||
| 5004 | // Opcode map for blcmsk etc. Opcode byte = XOP(9) 02, indexed by reg bits |
||
| 5005 | SOpcodeDef OpcodeMapD5[] = { |
||
| 5006 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /0 |
||
| 5007 | {"blcmsk", 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /1 |
||
| 5008 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /2 |
||
| 5009 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /3 |
||
| 5010 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /4 |
||
| 5011 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /5 |
||
| 5012 | {"blci" , 0x1007 , 0x11000, 0x18 , 0x1009, 0x9 , 0 , 0 , 0 , 0 , 0 , 0 }, // XOP(9) 02 /6 |
||
| 5013 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // XOP(9) 02 /7 |
||
| 5014 | |||
| 5015 | // Opcode map for EVEX 0F 79. Indexed by 66,F2,F3 prefix |
||
| 5016 | SOpcodeDef OpcodeMapD6[] = { |
||
| 5017 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5018 | {0, 0xD9 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // EVEX 0F 79. Link to vcvtps/pd2udq |
||
| 5019 | {0, 0xC9 , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // EVEX 66 0F 79. Link to |
||
| 5020 | {"vcvtsd2usi",0x20 ,0x803800, 0x12 , 0x1009, 0x4C , 0 , 0 , 0x6 , 0 , 0 , 0 }, // EVEX F2 0F 79 |
||
| 5021 | {"vcvtss2usi",0x20 ,0x803800, 0x12 , 0x1009, 0x4B , 0 , 0 , 0x6 , 0 , 0 , 0 }}; // EVEX F3 0F 79 |
||
| 5022 | |||
| 5023 | // Opcode map for 0F 38 A0. Indexed by VEX.W bit |
||
| 5024 | SOpcodeDef OpcodeMapD7[] = { |
||
| 5025 | {"vpscatterdd",0x20 , 0xC3B200,0x1E , 0x2209, 0x1209, 0 , 0 , 0x1090, 0x304E, 0 , 0x000 }, // W0 0F 38 A0 |
||
| 5026 | {"vpscatterdq",0x20 , 0xC3B200,0x1E , 0x2F09, 0x1209, 0 , 0 , 0x1090, 0x304E, 0 , 0x000 }}; // W1 0F 38 A0 |
||
| 5027 | |||
| 5028 | // Opcode map for 0F 38 A1. Indexed by VEX.W bit |
||
| 5029 | SOpcodeDef OpcodeMapD8[] = { |
||
| 5030 | {"vpscatterqd",0x20 , 0xC3B200,0x1E , 0x2209, 0x1F09, 0 , 0 , 0x1090, 0x304E, 0 , 0x000 }, // W0 0F 38 A0 |
||
| 5031 | {"vpscatterqq",0x20 , 0xC3B200,0x1E , 0x2209, 0x1209, 0 , 0 , 0x1090, 0x304E, 0 , 0x000 }}; // W1 0F 38 A0 |
||
| 5032 | |||
| 5033 | // Opcode map for EVEX 0F 79, pp0. Indexed by W bit |
||
| 5034 | SOpcodeDef OpcodeMapD9[] = { |
||
| 5035 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5036 | {"vcvtps2udq", 0x20 ,0x840000, 0x12 , 0x203 , 0x24B , 0 , 0 , 0x37 , 0 , 0 , 0 }, // EVEX 0F 79. W = 0 |
||
| 5037 | {"vcvtpd2udq", 0x20 ,0x841000, 0x12 , 0xF03 , 0x24C , 0 , 0 , 0x37 , 0 , 0 , 0 }}; // EVEX 0F 79. W = 1 |
||
| 5038 | |||
| 5039 | // Opcode map for EVEX 0F 78. Indexed by 66,F2,F3 prefix |
||
| 5040 | SOpcodeDef OpcodeMapDA[] = { |
||
| 5041 | {0, 0xDB , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // EVEX 0F 78. Link to vcvttpd2udq |
||
| 5042 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 EVEX 0F 78 |
||
| 5043 | {"vcvttsd2usi",0x20 ,0x803800, 0x12 , 0x1009, 0x4C , 0 , 0 , 0x2 , 0 , 0 , 0 }, // F2 EVEX 0F 78 |
||
| 5044 | {"vcvttss2usi",0x20 ,0x803400, 0x12 , 0x1009, 0x4B , 0 , 0 , 0x2 , 0 , 0 , 0 }}; // F3 EVEX 0F 78 |
||
| 5045 | |||
| 5046 | // Opcode map for EVEX 0F 78. Indexed by W bit |
||
| 5047 | SOpcodeDef OpcodeMapDB[] = { |
||
| 5048 | {"vcvttps2udq",0x20 ,0x841000, 0x12 , 0x1203, 0x24B , 0 , 0 , 0x37 , 0 , 0 , 0 }, // VEX 0F 78 |
||
| 5049 | {"vcvttpd2udq",0x20 ,0x841000, 0x12 , 0x1F03, 0x24C , 0 , 0 , 0x37 , 0 , 0 , 0 }}; // VEX 0F 78 |
||
| 5050 | |||
| 5051 | // Opcode map for EVEX 0F 7A. Indexed by 66,F2,F3 prefix |
||
| 5052 | SOpcodeDef OpcodeMapDC[] = { |
||
| 5053 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX 0F 7A |
||
| 5054 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 EVEX 0F 7A |
||
| 5055 | {0 ,0x11B , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // F2 EVEX 0F 7A. Link to vcvtudq2ps |
||
| 5056 | {0 ,0x11C , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // F3 E/MVEX 0F 7A. Link to vcvtudq2pd |
||
| 5057 | |||
| 5058 | // Opcode map for EVEX 0F 7B. Indexed by 66,F2,F3 prefix |
||
| 5059 | SOpcodeDef OpcodeMapDD[] = { |
||
| 5060 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX 0F 7B |
||
| 5061 | {0, 0x11A , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 66 EVEX 0F 7B. Link to vcvtps/pd2qq |
||
| 5062 | {"vcvtusi2sd",0x20 ,0x8C3800, 0x19 , 0x104C, 0x104C, 9 , 0 , 0x06 , 0 , 0 , 0 }, // F2 EVEX 0F 7B |
||
| 5063 | {"vcvtusi2ss",0x20 ,0x8C3400, 0x19 , 0x104B, 0x104B, 9 , 0 , 0x06 , 0 , 0 , 0 }}; // F3 EVEX 0F 7B |
||
| 5064 | |||
| 5065 | // Opcode map for 0F 3A 1B. Indexed by W bit |
||
| 5066 | SOpcodeDef OpcodeMapDE[] = { |
||
| 5067 | {"vextractf32x8",0x20,0x801200,0x53 , 0x54B , 0x124B, 0x31 , 0 , 0x30 , 0 , 0 , 0 }, // 0F 3A 1B. W0 |
||
| 5068 | {"vextractf64x4",0x20,0x801200,0x53 , 0x54B , 0x124B, 0x31 , 0 , 0x30 , 0 , 0 , 0 }}; // 0F 3A 1B. W1 |
||
| 5069 | |||
| 5070 | // Opcode map for 0F 3A 3B. Indexed by W bit |
||
| 5071 | SOpcodeDef OpcodeMapDF[] = { |
||
| 5072 | {"vextracti32x8",0x20,0x800200, 0x53 , 0x504 , 0x1204, 0x31 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 3A 3B |
||
| 5073 | {"vextracti64x4",0x20,0x801200, 0x53 , 0x504 , 0x1204, 0x31 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 3A 3B |
||
| 5074 | |||
| 5075 | // Opcode map for 0F 38 93. Indexed by EVEX present |
||
| 5076 | SOpcodeDef OpcodeMapE0[] = { |
||
| 5077 | {"vgatherqp", 0x95 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // 0F 38 93. Link to vpgatherqps/pd |
||
| 5078 | {"vgatherqp", 0xE1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // EVEX/MVEX 0F 38 92 has k register as mask. Link by vector size |
||
| 5079 | |||
| 5080 | // Opcode map for 0F 38 93. Indexed by W bit |
||
| 5081 | SOpcodeDef OpcodeMapE1[] = { |
||
| 5082 | {"vgatherqps",0x20 ,0xC39200, 0x1E , 0xF4F , 0x224F, 0 , 0 , 0x1090, 0x3048, 0 , 0 }, // EVEX/MVEX 0F 38 92. W0 |
||
| 5083 | {"vgatherqpd",0x20 ,0xC39200, 0x1E , 0x24F , 0x224F, 0 , 0 , 0x1090, 0x3048, 0 , 0 }}; // EVEX/MVEX 0F 38 92. W1 |
||
| 5084 | |||
| 5085 | // map for movd/movq. Opcode byte = 0F 7E |
||
| 5086 | // Indexed by prefix: none/66/F2/F3 |
||
| 5087 | SOpcodeDef OpcodeMapE2[] = { |
||
| 5088 | {"vmov", 0x7 ,0x813200, 0x13 , 0x9 , 0x1409, 0 , 0 , 0x00 , 0 , 0 , 0x1 }, // VEX 0F 7E |
||
| 5089 | {"vmov", 0x7 ,0x813200, 0x13 , 0x9 , 0x1409, 0 , 0 , 0x00 , 0 , 0 , 0x1 }, // 66 VEX 0F 7E |
||
| 5090 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 VEX 0F 7E |
||
| 5091 | {0, 0x5B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0x3 , 0 }}; // F3 0F 7E. Link to map 5B. movq xmm,xmm/m64 |
||
| 5092 | |||
| 5093 | // map for 0F 38 29 |
||
| 5094 | // Indexed by EVEX |
||
| 5095 | SOpcodeDef OpcodeMapE3[] = { |
||
| 5096 | {"pcmpeqq", 0x16 , 0xD8200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 29 |
||
| 5097 | {"vpcmpeqq", 0x20 ,0x8FB200, 0x19 , 0x95 , 0x1204, 0x204 , 0 , 0x11 , 0 , 0 , 0 }}; // EVEX 0F 38 29 |
||
| 5098 | |||
| 5099 | // map for 0F 38 37 |
||
| 5100 | // Indexed by EVEX |
||
| 5101 | SOpcodeDef OpcodeMapE4[] = { |
||
| 5102 | {"pcmpgtq", 0x16 , 0xD8200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 38 37 |
||
| 5103 | {"vpcmpgtq", 0x20 ,0x8FB200, 0x19 , 0x95 , 0x1204, 0x204 , 0 , 0x11 , 0 , 0 , 0 }}; // EVEX 0F 38 37 |
||
| 5104 | |||
| 5105 | // Submap for 0F 38 1A, indexed by VEX.W bit |
||
| 5106 | SOpcodeDef OpcodeMapE5[] = { |
||
| 5107 | {0 , 0xF8 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xE , 0 }, // VEX 0F 38 1A /W0, link to vbroadcastf128 vbroadcastf32x4 |
||
| 5108 | {"vbroadcastf64x2",0x20,0xC6B200,0x12, 0x124C, 0x244C, 0 , 0 , 0x20 , 0x1010, 0 , 0x100 }}; // 0F 38 1A, 512 bits |
||
| 5109 | |||
| 5110 | // Map for 0F 38 39. Indexed by EVEX present |
||
| 5111 | SOpcodeDef OpcodeMapE6[] = { |
||
| 5112 | {"pminsd", 0x15 ,0x4D8200, 0x19 , 0x1203, 0x1203, 0x203 , 0 , 0 , 0x1406, 0 , 0x2 }, // 0F 38 39 |
||
| 5113 | {0, 0x12D , 0 , 0x19 , 0 , 0 , 0 , 0 , 0 , 0 , 0x9 , 0 }}; // EVEX 0F 38 39 |
||
| 5114 | |||
| 5115 | // Map for 0F 38 3B. Indexed by EVEX present |
||
| 5116 | SOpcodeDef OpcodeMapE7[] = { |
||
| 5117 | {"pminud", 0x15 ,0x4D8200, 0x19 , 0x1203, 0x1203, 0x203 , 0 , 0 , 0x1406, 0 , 0x2 }, // 0F 38 3B |
||
| 5118 | {"vpminu", 0x15 ,0xCDB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // 0F 38 3B |
||
| 5119 | |||
| 5120 | // Map for 0F 38 3D. Indexed by EVEX present |
||
| 5121 | SOpcodeDef OpcodeMapE8[] = { |
||
| 5122 | {"pmaxsd", 0x15 ,0x4D8200, 0x19 , 0x1203, 0x1203, 0x203 , 0 , 0 , 0x1406, 0 , 0x2 }, // 0F 38 3D |
||
| 5123 | {"vpmaxs", 0x15 ,0xCDB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // 0F 38 3D |
||
| 5124 | |||
| 5125 | // Map for 0F 38 3F. Indexed by EVEX present |
||
| 5126 | SOpcodeDef OpcodeMapE9[] = { |
||
| 5127 | {"pmaxud", 0x15 ,0x4D8200, 0x19 , 0x1203, 0x1203, 0x203 , 0 , 0 , 0x1406, 0 , 0x2 }, // 0F 38 3F |
||
| 5128 | {"vpmaxu", 0x15 ,0xCDB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }}; // 0F 38 3F |
||
| 5129 | |||
| 5130 | // Map for 0F 38 10. Indexed by VEX prefix type |
||
| 5131 | SOpcodeDef OpcodeMapEA[] = { |
||
| 5132 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5133 | {"pblendvb", 0x15 , 0x8200 , 0x12 , 0x1401, 0x401 , 0xAE , 0 , 0 , 0 , 0 , 0 }, // 0F 38 10 |
||
| 5134 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 38 10 |
||
| 5135 | {"vpsrlvw", 0x20 ,0x8FC200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x20 , 0 , 0 , 0 }, // EVEX 0F 38 10 |
||
| 5136 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // MVEX 0F 38 10 |
||
| 5137 | |||
| 5138 | // Map for VEX 0F 90. Indexed by memory/register |
||
| 5139 | SOpcodeDef OpcodeMapEB[] = { |
||
| 5140 | {"kmov", 0x20 , 0x35200, 0x12 , 0x1095, 0x2009, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 90. Name without w in KNC syntax, but code identical |
||
| 5141 | {"kmov", 0x20 , 0x35200, 0x12 , 0x1095, 0x95 , 0 , 0 , 0 , 0 , 0 , 1 }}; // VEX 0F 90. Name without w in KNC syntax, but code identical |
||
| 5142 | |||
| 5143 | // Map for VEX 0F 92. indexed by prefix 0 66 F2 F3 |
||
| 5144 | // The coding with F2 is different from other k instructions. Allow coding with 66 instead in case this is an error in the manual |
||
| 5145 | SOpcodeDef OpcodeMapEC[] = { |
||
| 5146 | {"kmov", 0x20 , 0x35200, 0x12 , 0x95 , 0x1003, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 92. Name without w in KNC syntax, but code identical |
||
| 5147 | {"kmov", 0x20 , 0x35200, 0x12 , 0x95 , 0x1003, 0 , 0 , 0 , 0 , 0 , 1 }, // 66 VEX 0F 92 |
||
| 5148 | {0, 0xED , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // F2 VEX 0F 92 |
||
| 5149 | |||
| 5150 | // Map for VEX 0F 92. indexed by VEX.W bit |
||
| 5151 | SOpcodeDef OpcodeMapED[] = { |
||
| 5152 | {"kmovd", 0x20 , 0x35200, 0x12 , 0x95 , 0x1003, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 VEX 0F 92. W0 |
||
| 5153 | {"kmovq", 0x20 , 0x35200, 0x12 , 0x95 , 0x1004, 0 , 0 , 0 , 0 , 0 , 0 }}; // F2 VEX 0F 92. W1 |
||
| 5154 | |||
| 5155 | // Map for VEX 0F 93. indexed by prefix 0 66 F2 F3 |
||
| 5156 | // The coding with F2 is different from other k instructions. Allow coding with 66 instead in case this is an error in the manual |
||
| 5157 | SOpcodeDef OpcodeMapEE[] = { |
||
| 5158 | {"kmov", 0x20 , 0x35200, 0x12 , 0x1003, 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // VEX 0F 93. Name without w in KNC syntax, but code identical |
||
| 5159 | {"kmov", 0x20 , 0x35200, 0x12 , 0x1003, 0x1095, 0 , 0 , 0 , 0 , 0 , 1 }, // 66 VEX 0F 93 |
||
| 5160 | {0, 0xEF , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // F2 VEX 0F 93 |
||
| 5161 | |||
| 5162 | // Map for VEX 0F 93. indexed by VEX.W bit |
||
| 5163 | SOpcodeDef OpcodeMapEF[] = { |
||
| 5164 | {"kmovd", 0x20 , 0x35200, 0x12 , 0x1003, 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 VEX 0F 93 W0 |
||
| 5165 | {"kmovq", 0x20 , 0x35200, 0x12 , 0x1004, 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }}; // F2 VEX 0F 93 W1 |
||
| 5166 | |||
| 5167 | // Map for VEX 0F 4B. indexed by prefix 0 66 F2 F3 |
||
| 5168 | SOpcodeDef OpcodeMapF0[] = { |
||
| 5169 | {0, 0xF1 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, |
||
| 5170 | {"kunpckbw", 0x20 ,0x1E3200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 }, // 66 VEX 0F 4B |
||
| 5171 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5172 | |||
| 5173 | // Map for VEX 0F 4B. indexed by VEX.W bit |
||
| 5174 | SOpcodeDef OpcodeMapF1[] = { |
||
| 5175 | {"kunpckwd", 0x20 ,0x1E3200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 }, // VEX 0F 4B |
||
| 5176 | {"kunpckdq", 0x20 ,0x1E3200, 0x19 , 0x1095, 0x1095, 0x1095, 0 , 0 , 0 , 0 , 0 }}; |
||
| 5177 | |||
| 5178 | // Map for 0F AE /7. Indexed by 66 prefix |
||
| 5179 | SOpcodeDef OpcodeMapF2[] = { |
||
| 5180 | {"clflush", 0x12 , 0 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AE /7 |
||
| 5181 | {"clflushopt",0x22 , 0x200 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // 66 0F AE /7 |
||
| 5182 | |||
| 5183 | // Map for 0F AE /6. Indexed by 66 prefix |
||
| 5184 | SOpcodeDef OpcodeMapF3[] = { |
||
| 5185 | {"xsaveopt", 0x19 , 0x2000 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F AE /6 |
||
| 5186 | {"clwb ", 0x22 , 0x200 , 0x11 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F AE /6 |
||
| 5187 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F AE /6 |
||
| 5188 | {"clrssbsy", 0 , 0x400 , 0x11 , 0 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F AE /6 |
||
| 5189 | |||
| 5190 | // Map for 0F AE reg /7. Indexed by 66 prefix |
||
| 5191 | SOpcodeDef OpcodeMapF4[] = { |
||
| 5192 | {"sfence", 0x12 , 0 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // m-7 |
||
| 5193 | {"pcommit", 0x22 , 0x200 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5194 | |||
| 5195 | // Opcode map for floating point cmpps/pd instructions. First two bytes = 0F C2 |
||
| 5196 | // Indexed by VEX prefix type |
||
| 5197 | SOpcodeDef OpcodeMapF5[] = { |
||
| 5198 | {0, 0xF6 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // 0F C2. Link to cmpps etc. |
||
| 5199 | {0, 0xF6 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // VEX 0F C2. Link to cmpps etc. |
||
| 5200 | {0, 0xF7 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }, // EVEX 0F C2. Link to cmpps etc. |
||
| 5201 | {0, 0xF7 , 0 , 0x52 , 0 , 0 , 0 , 0 , 0 , 0 , 0x6 , 0 }}; // MVEX 0F C2. Link to cmpps etc. |
||
| 5202 | |||
| 5203 | SOpcodeDef OpcodeMapF6[] = { |
||
| 5204 | // Opcode map for floating point cmpps/pd instructions. First two bytes = 0F C2 |
||
| 5205 | // Indexed by immediate byte following operands = 0 - 7 |
||
| 5206 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5207 | {"cmpeq", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 00: cmpeqps/pd |
||
| 5208 | {"cmplt", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 01: |
||
| 5209 | {"cmple", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 02: |
||
| 5210 | {"cmpunord", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 03: |
||
| 5211 | {"cmpneq", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 04: |
||
| 5212 | {"cmpnlt", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 05: |
||
| 5213 | {"cmpnle", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 06: |
||
| 5214 | {"cmpord", 0x12 ,0xCD2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 07: |
||
| 5215 | // imm > 7 only with VEX |
||
| 5216 | {"vcmpeq_uq", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 08: |
||
| 5217 | {"vcmpnge_us",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 09: |
||
| 5218 | {"vcmpngt_us",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0A: |
||
| 5219 | {"vcmpfalse_oq",0x19,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0B: |
||
| 5220 | {"vcmpneq_oq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0C: |
||
| 5221 | {"vcmpge_os", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0D: |
||
| 5222 | {"vcmpgt_os", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0E: |
||
| 5223 | {"vcmptrue_uq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0F: |
||
| 5224 | {"vcmpeq_os", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 10: |
||
| 5225 | {"vcmplt_oq", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 11: |
||
| 5226 | {"vcmple_oq", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 12: |
||
| 5227 | {"vcmpunord_s",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 13: |
||
| 5228 | {"vcmpneq_us",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 14: |
||
| 5229 | {"vcmpnlt_uq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 15: |
||
| 5230 | {"vcmpnle_uq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 16: |
||
| 5231 | {"vcmpord_s", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 17: |
||
| 5232 | {"vcmpeq_us", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 18: |
||
| 5233 | {"vcmpnge_uq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 19: |
||
| 5234 | {"vcmpngt_uq",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1A: |
||
| 5235 | {"vcmpfalse_os",0x19,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1B: |
||
| 5236 | {"vcmpneq_os",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1C: |
||
| 5237 | {"vcmpge_oq", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1D: |
||
| 5238 | {"vcmpgt_oq", 0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1E: |
||
| 5239 | {"vcmptrue_us",0x19 ,0x8E2E00, 0x59 , 0x124F, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1F: |
||
| 5240 | {"vcmp", 0x19 ,0x8E2200, 0x4059, 0x124F, 0x24F , 0x24F , 0x31 , 0x13 , 0 , 0 , 0x3 }}; // 0F C2 op > 1F: cmpps/pd, imm |
||
| 5241 | |||
| 5242 | |||
| 5243 | SOpcodeDef OpcodeMapF7[] = { |
||
| 5244 | // Opcode map for floating point cmpps/pd instructions. EVEX 0F C2 |
||
| 5245 | // Indexed by immediate byte following operands = 0 - 7 |
||
| 5246 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5247 | {"cmpeq", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 00: cmpeqps/pd |
||
| 5248 | {"cmplt", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 01: |
||
| 5249 | {"cmple", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 02: |
||
| 5250 | {"cmpunord", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 03: |
||
| 5251 | {"cmpneq", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 04: |
||
| 5252 | {"cmpnlt", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 05: |
||
| 5253 | {"cmpnle", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 06: |
||
| 5254 | {"cmpord", 0x12 ,0xCD2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0x1204, 0 , 0x3 }, // 0F C2 op 07: |
||
| 5255 | // imm > 7 only with EVEX prefix, not with MVEX |
||
| 5256 | {"vcmpeq_uq", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 08: |
||
| 5257 | {"vcmpnge_us",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 09: |
||
| 5258 | {"vcmpngt_us",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0A: |
||
| 5259 | {"vcmpfalse_oq",0x19,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0B: |
||
| 5260 | {"vcmpneq_oq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0C: |
||
| 5261 | {"vcmpge_os", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0D: |
||
| 5262 | {"vcmpgt_os", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0E: |
||
| 5263 | {"vcmptrue_uq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 0F: |
||
| 5264 | {"vcmpeq_os", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 10: |
||
| 5265 | {"vcmplt_oq", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 11: |
||
| 5266 | {"vcmple_oq", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 12: |
||
| 5267 | {"vcmpunord_s",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 13: |
||
| 5268 | {"vcmpneq_us",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 14: |
||
| 5269 | {"vcmpnlt_uq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 15: |
||
| 5270 | {"vcmpnle_uq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 16: |
||
| 5271 | {"vcmpord_s", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 17: |
||
| 5272 | {"vcmpeq_us", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 18: |
||
| 5273 | {"vcmpnge_uq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 19: |
||
| 5274 | {"vcmpngt_uq",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1A: |
||
| 5275 | {"vcmpfalse_os",0x19,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1B: |
||
| 5276 | {"vcmpneq_os",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1C: |
||
| 5277 | {"vcmpge_oq", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1D: |
||
| 5278 | {"vcmpgt_oq", 0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1E: |
||
| 5279 | {"vcmptrue_us",0x19 ,0x8E2E00, 0x59 , 0x95, 0x24F , 0x24F , 0 , 0x13 , 0 , 0 , 0x1 }, // 0F C2 op 1F: |
||
| 5280 | {"vcmp", 0x19 ,0x8E2200, 0x4059, 0x95, 0x24F , 0x24F , 0x31 , 0x13 , 0 , 0 , 0x3 }}; // 0F C2 op > 1F: cmpps/pd, imm |
||
| 5281 | |||
| 5282 | // Submap for 0F 38 1A / W0, indexed by EVEX |
||
| 5283 | SOpcodeDef OpcodeMapF8[] = { |
||
| 5284 | {"vbroadcastf128" ,0x19,0x878200,0x12, 0x154B, 0x244B, 0 , 0 , 0x20 , 0 , 0 , 0 }, // VEX 0F 38 1A |
||
| 5285 | {"vbroadcastf32x4",0x10,0xC6B200,0x12, 0x124B, 0x244B, 0 , 0 , 0x20 , 0x1010, 0 , 0x100 }}; // EVEX 0F 38 1A |
||
| 5286 | |||
| 5287 | // Map for 0F 3A 08. Indexed by EVEX present |
||
| 5288 | SOpcodeDef OpcodeMapF9[] = { |
||
| 5289 | {"roundps", 0x15 , 0x58200, 0x52 , 0x124B, 0x24B , 0x31 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 3A 08. Also in AMD instruction set |
||
| 5290 | {"vrndscaleps",0x20 ,0x858200, 0x52 , 0x124B, 0x24B , 0x31 , 0 , 0x33 , 0 , 0 , 0 }}; // EVEX 0F 3A 08 |
||
| 5291 | |||
| 5292 | // Map for 0F 3A 09. Indexed by EVEX present |
||
| 5293 | SOpcodeDef OpcodeMapFA[] = { |
||
| 5294 | {"roundpd", 0x15 ,0x858200, 0x52 , 0x124C, 0x24C , 0x31 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 3A 09. Also in AMD instruction set |
||
| 5295 | {"vrndscalepd",0x20 ,0x85A200, 0x52 , 0x124C, 0x24C , 0x31 , 0 , 0x33 , 0 , 0 , 0 }}; // EVEX 0F 3A 09 |
||
| 5296 | |||
| 5297 | // Map for 0F 3A 0A. Indexed by EVEX present |
||
| 5298 | SOpcodeDef OpcodeMapFB[] = { |
||
| 5299 | {"roundss", 0x15 , 0x98200, 0x59 , 0x104B, 0x104B, 0x4B , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 0A. Also in AMD instruction set |
||
| 5300 | {"vrndscaless",0x20 ,0x8DB200, 0x59 , 0x104B, 0x004B, 0x4B , 0x31 , 0x32 , 0 , 0 , 0 }}; // EVEX 0F 3A 08 |
||
| 5301 | |||
| 5302 | // Map for 0F 3A 0B. Indexed by EVEX present |
||
| 5303 | SOpcodeDef OpcodeMapFC[] = { |
||
| 5304 | {"roundsd", 0x15 , 0x98200, 0x59 , 0x104C, 0x104C, 0x4C , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 0B. Also in AMD instruction set |
||
| 5305 | {"vrndscalesd",0x20 ,0x8DB200, 0x59 , 0x104C, 0x004C, 0x4C , 0x31 , 0x32 , 0 , 0 , 0 }}; // EVEX 0F 3A 08 |
||
| 5306 | |||
| 5307 | // Map for 0F 38 2C. Indexed by EVEX present |
||
| 5308 | SOpcodeDef OpcodeMapFD[] = { |
||
| 5309 | {"vmaskmovps",0x19 , 0xF8200, 0x19, 0x124B, 0x124B, 0x224B, 0 , 0 , 0 , 0 , 0 }, // 0F 38 2C |
||
| 5310 | {"vscalefp" ,0x20 ,0x899200, 0x19, 0x124F, 0x124F, 0x024F, 0 , 0x37 , 0 , 0 , 0x1 }}; // EVEX 0F 38 2C |
||
| 5311 | |||
| 5312 | // Map for 0F 38 2D. Indexed by EVEX present |
||
| 5313 | SOpcodeDef OpcodeMapFE[] = { |
||
| 5314 | {"vmaskmovpd",0x19 , 0xF8200, 0x19, 0x124C, 0x124C, 0x224C, 0 , 0 , 0 , 0 , 0 }, // 0F 38 2D |
||
| 5315 | {"vscalefs" ,0x20 ,0x899200, 0x19, 0x144F, 0x144F, 0x044F, 0 , 0x36 , 0 , 0 , 0x1 }}; // EVEX 0F 38 2D |
||
| 5316 | |||
| 5317 | // Map for 0F 38 3A. Indexed by 66 F2 F3 prefixes |
||
| 5318 | SOpcodeDef OpcodeMapFF[] = { |
||
| 5319 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 3A |
||
| 5320 | {"pminuw", 0x15 ,0x8D8200, 0x19 , 0x1202, 0x1202, 0x202 , 0 , 0x20 , 0 , 0 , 0x2 }, // 66 0F 38 3A |
||
| 5321 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 3A |
||
| 5322 | {"vpbroadcastmw2d",0x20,0x860400,0x12, 0x1203, 0x1095, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 38 2A |
||
| 5323 | |||
| 5324 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5325 | // Map for 0F 38 A". Indexed by W bit |
||
| 5326 | SOpcodeDef OpcodeMap100[] = { |
||
| 5327 | {"vscatterdps",0x20 ,0xC39200, 0x1E , 0x224B, 0x1209, 0 , 0 , 0x1090, 0x304C, 0 , 0x000 }, // 0F 38 A2. W0 |
||
| 5328 | {"vscatterdpd",0x20 ,0xC39200, 0x1E , 0x2F4C, 0x1209, 0 , 0 , 0x1090, 0x304C, 0 , 0x000 }}; // 0F 38 A2. W1 |
||
| 5329 | |||
| 5330 | // Map for 0F 38 A3. Indexed by W bit |
||
| 5331 | SOpcodeDef OpcodeMap101[] = { |
||
| 5332 | {"vscatterqps",0x20 ,0xC39200, 0x1E , 0x224B, 0x1F09, 0 , 0 , 0x1090, 0x304C, 0 , 0x000 }, // 0F 38 A3. W0 |
||
| 5333 | {"vscatterqpd",0x20 ,0xC39200, 0x1E , 0x224C, 0x1209, 0 , 0 , 0x1090, 0x304C, 0 , 0x000 }}; // 0F 38 A3. W1 |
||
| 5334 | |||
| 5335 | |||
| 5336 | // Submap for vpgatherd. Opcode byte = 0F 38 90 |
||
| 5337 | // Indexed by VEX/EVEX prefix |
||
| 5338 | SOpcodeDef OpcodeMap102[] = { |
||
| 5339 | {0, 0x103 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }, // |
||
| 5340 | {0, 0x104 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // |
||
| 5341 | |||
| 5342 | // Submap for vpgatherd. Opcode byte = 0F 38 90 |
||
| 5343 | // Indexed by VEX.W bit |
||
| 5344 | SOpcodeDef OpcodeMap103[] = { |
||
| 5345 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5346 | {"vpgatherdd",0x1C ,0xCEB200, 0x1E, 0x203 , 0x2203, 0x203 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 90 |
||
| 5347 | {"vpgatherdq",0x1C ,0xCEB200, 0x1E, 0x204 , 0x2F04, 0x204 , 0 , 0 , 0x100A, 0 , 0 }}; // 0F 38 90 |
||
| 5348 | |||
| 5349 | // Submap for vpgatherd. Opcode byte = 0F 38 90 |
||
| 5350 | // Indexed by EVEX.W bit |
||
| 5351 | SOpcodeDef OpcodeMap104[] = { |
||
| 5352 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5353 | {"vpgatherdd",0x1C ,0xCEB200, 0x1E, 0x203 , 0x2203, 0 , 0 , 0x1090, 0x100A, 0 , 0 }, // EVEX 0F 38 90 |
||
| 5354 | {"vpgatherdq",0x1C ,0xCEB200, 0x1E, 0x204 , 0x2F04, 0 , 0 , 0x1090, 0x100A, 0 , 0 }}; // EVEX 0F 38 90 |
||
| 5355 | |||
| 5356 | // Submap for vpgatherq, Opcode 0F 38 91, Indexed by VEX.W bit |
||
| 5357 | SOpcodeDef OpcodeMap105[] = { |
||
| 5358 | {"vpgatherqd",0x1C ,0x8EB200, 0x1E, 0xF03 , 0x2203, 0xF03 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 91, W0 |
||
| 5359 | {"vpgatherqq",0x1C ,0x8EB200, 0x1E, 0x204 , 0x2204, 0x204 , 0 , 0 , 0 , 0 , 0 }}; // 0F 38 91, W1 |
||
| 5360 | |||
| 5361 | // Submap for vpgatherq, Opcode 0F 38 91, Indexed by EVEX.W bit |
||
| 5362 | SOpcodeDef OpcodeMap106[] = { |
||
| 5363 | {"vpgatherqd",0x1C ,0x8EB200, 0x1E, 0xF03 , 0x2203, 0 , 0 , 0x1090, 0 , 0 , 0 }, // EVEX 0F 38 91, W0 |
||
| 5364 | {"vpgatherqq",0x1C ,0x8EB200, 0x1E, 0x204 , 0x2204, 0 , 0 , 0x1090, 0 , 0 , 0 }}; // EVEX 0F 38 91, W1 |
||
| 5365 | |||
| 5366 | // Map for 0F 38 C8. Indexed by VEX prefix type |
||
| 5367 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5368 | SOpcodeDef OpcodeMap107[] = { |
||
| 5369 | {"sha1nexte", 0x22 , 0 , 0x12 , 0x1203, 0x0203, 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5370 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5371 | {"vexp2p", 0x21 ,0x809200, 0x12 , 0x124F, 0x024F, 0 , 0 , 0x33 , 0 , 0 , 0x1 }, // EVEX 0F 38 C8 |
||
| 5372 | {"vexp223ps", 0x80 ,0x428200, 0x12 , 0x164B, 0x603 , 0 , 0 , 0 , 0x1201, 0 , 0x100 }}; // MVEX 0F 38 C8 |
||
| 5373 | |||
| 5374 | // Map for 0F 38 C9. Indexed by VEX prefix type |
||
| 5375 | SOpcodeDef OpcodeMap108[] = { |
||
| 5376 | {"sha1msg1", 0x22 , 0 , 0x12 , 0x1203, 0x0203, 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5377 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5378 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX 0F 38 C9 |
||
| 5379 | {"vlog2ps", 0x80 ,0x428200, 0x12 , 0x164B, 0x603 , 0 , 0 , 0 , 0x1201, 0 , 0x100 }}; // MVEX 0F 38 C9 |
||
| 5380 | |||
| 5381 | // Map for 0F 38 CA. Indexed by VEX prefix type |
||
| 5382 | SOpcodeDef OpcodeMap109[] = { |
||
| 5383 | {"sha1msg2", 0x22 , 0 , 0x12 , 0x1203, 0x0203, 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5384 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5385 | {"vrcp28p", 0x21 ,0x809200, 0x12 , 0x124F, 0x024F, 0 , 0 , 0x33 , 0 , 0 , 0x1 }, // EVEX 0F 38 CA |
||
| 5386 | {"vrcp23ps", 0x80 ,0x428200, 0x12 , 0x164B, 0x603 , 0 , 0 , 0 , 0x1201, 0 , 0x100 }}; // MVEX 0F 38 CA |
||
| 5387 | |||
| 5388 | // Map for 0F 38 CB. Indexed by VEX prefix type |
||
| 5389 | SOpcodeDef OpcodeMap10A[] = { |
||
| 5390 | {"sha256rnds2",0x22 , 0 , 0x12 , 0x1203, 0x0203, 0xAE , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5391 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5392 | {"vrcp28s", 0x21 ,0x809200, 0x12 , 0x104F, 0x004F, 0 , 0 , 0x32 , 0 , 0 , 0x1 }, // EVEX 0F 38 CB |
||
| 5393 | {"vrsqrt23ps",0x80 ,0x428200, 0x12 , 0x164B, 0x603 , 0 , 0 , 0 , 0x1201, 0 , 0x100 }}; // MVEX 0F 38 CB |
||
| 5394 | |||
| 5395 | // Map for 0F 38 CC. Indexed by VEX prefix type |
||
| 5396 | SOpcodeDef OpcodeMap10B[] = { |
||
| 5397 | {"sha256msg1",0x22 , 0 , 0x12 , 0x1203, 0x0203, 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5398 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5399 | {"vrsqrt28p", 0x21 ,0x809200, 0x12 , 0x124F, 0x024F, 0 , 0 , 0x33 , 0 , 0 , 0x1 }, // EVEX 0F 38 CC |
||
| 5400 | {"vaddsetsps",0x80 ,0x4A8200, 0x19, 0x164B, 0x164B, 0x64B , 0 , 0 , 0x3304, 0 , 0x100 }}; // MVEX 0F 38 CC |
||
| 5401 | |||
| 5402 | // Map for 0F 38 CD. Indexed by VEX prefix type |
||
| 5403 | SOpcodeDef OpcodeMap10C[] = { |
||
| 5404 | {"sha256msg2",0x22 , 0 , 0x12 , 0x1203, 0x0203, 0 , 0 , 0 , 0 , 0 , 0 }, // no VEX |
||
| 5405 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX |
||
| 5406 | {"vrsqrt28s", 0x21 ,0x809200, 0x12 , 0x104F, 0x004F, 0 , 0 , 0x32 , 0 , 0 , 0x1 }, // EVEX 0F 38 CD |
||
| 5407 | {"vpaddsetsd",0x80 ,0x4A8200, 0x19 , 0x1603, 0x1603, 0x603 , 0 , 0 , 0x3406, 0 , 0x100 }}; // MVEX 0F 38 CD |
||
| 5408 | |||
| 5409 | // Submap for MVEX 0F 38 C6. W0 |
||
| 5410 | // Indexed by reg bits |
||
| 5411 | SOpcodeDef OpcodeMap10D[] = { |
||
| 5412 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5413 | {"vgatherpf0hintdp",0x80,0x439200, 0x1E, 0 , 0x264B, 0 , 0 , 0 , 0x1048, 0 , 0x101 }, // MVEX 0F 38 C6 /0 |
||
| 5414 | {"vgatherpf0dps",0x21,0xC38200, 0x1E, 0 , 0x224B, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /1 |
||
| 5415 | {"vgatherpf1dps",0x21,0xC38200, 0x1E, 0 , 0x224B, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /2 |
||
| 5416 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5417 | {"vscatterpf0hintdp",0x80,0x43B200,0x1E, 0 , 0x264B, 0 , 0 , 0 , 0x1048, 0 , 0x101 }, // MVEX 0F 38 C6 /4 |
||
| 5418 | {"vscatterpf0dps",0x21,0xC38200, 0x1E, 0 , 0x224B, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /5 |
||
| 5419 | {"vscatterpf1dps",0x21,0xC38200, 0x1E, 0 , 0x224B, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /6 |
||
| 5420 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 5421 | |||
| 5422 | // Submap for MVEX 0F 38 C6. W1 |
||
| 5423 | // Indexed by reg bits |
||
| 5424 | SOpcodeDef OpcodeMap10E[] = { |
||
| 5425 | {"vgatherpf0hintdpd",0x80,0x439200,0x1E, 0 , 0x264C, 0 , 0 , 0 , 0x1048, 0 , 0x100 }, // MVEX 0F 38 C6 /0 |
||
| 5426 | {"vgatherpf0dpd",0x21,0xC3A200, 0x1E, 0 , 0x2F4C, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /1 |
||
| 5427 | {"vgatherpf1dpd",0x21,0xC3A200, 0x1E, 0 , 0x2F4C, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /2 |
||
| 5428 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5429 | {"vscatterpf0hintdp",0x80,0x43B200,0x1E, 0 , 0x264c, 0 , 0 , 0 , 0x1048, 0 , 0x101 }, // MVEX 0F 38 C6 /4 |
||
| 5430 | {"vscatterpf0dpd",0x21,0xC3A200, 0x1E, 0 , 0x2F4C, 0 , 0 , 0x1010, 0x1048, 0 , 0x000 }, // MVEX 0F 38 C6 /5 |
||
| 5431 | {"vscatterpf1dpd",0x21,0xC3A200, 0x1E, 0 , 0x2F4C, 0 , 0 , 0x1010, 0x1048, 0 , 0x100 }, // MVEX 0F 38 C6 /6 |
||
| 5432 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 5433 | |||
| 5434 | // Submap for 0F 38 C7 vgatherpf.. Indexed by reg bits |
||
| 5435 | SOpcodeDef OpcodeMap10F[] = { |
||
| 5436 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5437 | {"vgatherpf0qp", 0x21 ,0xC39200, 0x1E, 0 , 0x224F, 0 , 0 , 0x1010, 0 , 0 , 0x1 }, // 0F 38 C7 /1 |
||
| 5438 | {"vgatherpf1qp", 0x21 ,0xC39200, 0x1E, 0 , 0x224F, 0 , 0 , 0x1010, 0 , 0 , 0x1 }, // 0F 38 C7 /2 |
||
| 5439 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5440 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5441 | {"vscatterpf0qp",0x21 ,0xC39200, 0x1E, 0 , 0x224F, 0 , 0 , 0x1010, 0 , 0 , 0x1 }, // 0F 38 C7 /5 |
||
| 5442 | {"vscatterpf1qp",0x21 ,0xC39200, 0x1E, 0 , 0x224F, 0 , 0 , 0x1010, 0 , 0 , 0x1 }, // 0F 38 C7 /6 |
||
| 5443 | {0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // |
||
| 5444 | |||
| 5445 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5446 | // Submap for 0F 1A. Indexed by 66 F2 F3 prefix |
||
| 5447 | SOpcodeDef OpcodeMap110[] = { |
||
| 5448 | {"bndldx", 0x22 , 0 , 0x12, 0x98 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 1A |
||
| 5449 | {"bndmov", 0x22 , 0x200 , 0x12, 0x1098, 0x98 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 1A |
||
| 5450 | {"bndcu" , 0x22 , 0x800 , 0x12, 0x98 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 1A |
||
| 5451 | {"bndcl" , 0x22 , 0x400 , 0x12, 0x98 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 1A |
||
| 5452 | |||
| 5453 | // Submap for 0F 1B. Indexed by 66 F2 F3 prefix |
||
| 5454 | SOpcodeDef OpcodeMap111[] = { |
||
| 5455 | {"bndstx", 0x22 , 0 , 0x13, 0x2006, 0x98 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 1B |
||
| 5456 | {"bndmov", 0x22 , 0x200 , 0x13, 0x98 , 0x1098, 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F 1B |
||
| 5457 | {"bndcn" , 0x22 , 0x800 , 0x12, 0x98 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 1B |
||
| 5458 | {"bndmk" , 0x22 , 0x400 , 0x12, 0x98 , 0x2006, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F 1B |
||
| 5459 | |||
| 5460 | // Submap for 0F 3A 3E. Indexed by immediate byte. VCMPUB/W |
||
| 5461 | SOpcodeDef OpcodeMap112[] = { |
||
| 5462 | {"vpcmpequ", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 0 |
||
| 5463 | {"vpcmpltu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 1 |
||
| 5464 | {"vpcmpleu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 2 |
||
| 5465 | {"vpcmpu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 3 = true |
||
| 5466 | {"vpcmpnequ", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 4 |
||
| 5467 | {"vpcmpnltu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 5 |
||
| 5468 | {"vpcmpnleu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3E / 6 |
||
| 5469 | {"vpcmpu", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x10 , 0 , 0 , 0x01 }}; // 0F 3A 3E / >= 7 = false |
||
| 5470 | |||
| 5471 | // Submap for 0F 3A 3F. Indexed by immediate byte. VCMPB/W |
||
| 5472 | SOpcodeDef OpcodeMap113[] = { |
||
| 5473 | {"vpcmpeq", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 0 |
||
| 5474 | {"vpcmplt", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 1 |
||
| 5475 | {"vpcmple", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 2 |
||
| 5476 | {"vpcmp", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 3 = true |
||
| 5477 | {"vpcmpneq", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 4 |
||
| 5478 | {"vpcmpnlt", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 5 |
||
| 5479 | {"vpcmpnle", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x10 , 0 , 0 , 0x01 }, // 0F 3A 3F / 6 |
||
| 5480 | {"vpcmp", 0x20 , 0x8FC200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x10 , 0 , 0 , 0x01 }}; // 0F 3A 3F / >= 7 = false |
||
| 5481 | |||
| 5482 | // Submap for 0F 3A 1E. Indexed by immediate byte. VCMPUD/Q |
||
| 5483 | SOpcodeDef OpcodeMap114[] = { |
||
| 5484 | {"vpcmpequ", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 0 |
||
| 5485 | {"vpcmpltu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 1 |
||
| 5486 | {"vpcmpleu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 2 |
||
| 5487 | {"vpcmpu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 3 = true |
||
| 5488 | {"vpcmpnequ", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 4 |
||
| 5489 | {"vpcmpnltu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 5 |
||
| 5490 | {"vpcmpnleu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1E / 6 |
||
| 5491 | {"vpcmpu", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x11 , 0x1406, 0 , 0x01 }}; // 0F 3A 1E / >= 7 = false |
||
| 5492 | |||
| 5493 | // Submap for 0F 3A 1F. Indexed by immediate byte. VCMPD/Q |
||
| 5494 | SOpcodeDef OpcodeMap115[] = { |
||
| 5495 | {"vpcmpeq", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 0 |
||
| 5496 | {"vpcmplt", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 1 |
||
| 5497 | {"vpcmple", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 2 |
||
| 5498 | {"vpcmp", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 3 = true |
||
| 5499 | {"vpcmpneq", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 4 |
||
| 5500 | {"vpcmpnlt", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 5 |
||
| 5501 | {"vpcmpnle", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0 , 0x11 , 0x1406, 0 , 0x01 }, // 0F 3A 1F / 6 |
||
| 5502 | {"vpcmp", 0x20 , 0xCBB200,0x59 , 0x95 , 0x1209, 0x209 , 0x31 , 0x11 , 0x1406, 0 , 0x01 }}; // 0F 3A 1F / >= 7 = false |
||
| 5503 | |||
| 5504 | // Submap for pcmpeqb. Opcode byte = 0F 74 |
||
| 5505 | // Indexed by E/MVEX prefix |
||
| 5506 | SOpcodeDef OpcodeMap116[] = { |
||
| 5507 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5508 | {"pcmpeqb", 0x7 , 0xD0200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 74 |
||
| 5509 | {"vpcmpeqb", 0x20 ,0x8FA200, 0x19 , 0x95 , 0x1201, 0x201 , 0 , 0x10 , 0 , 0 , 0 }}; // E/MVEX 0F 76 |
||
| 5510 | |||
| 5511 | // Submap for pcmpeqw. Opcode byte = 0F 75 |
||
| 5512 | // Indexed by E/MVEX prefix |
||
| 5513 | SOpcodeDef OpcodeMap117[] = { |
||
| 5514 | {"pcmpeqw", 0x7 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 75 |
||
| 5515 | {"vpcmpeqw", 0x20 ,0x8FA200, 0x19 , 0x95 , 0x1202, 0x202 , 0 , 0x10 , 0 , 0 , 0 }}; // E/MVEX 0F 76 |
||
| 5516 | |||
| 5517 | // Submap for pcmpgtb. Opcode byte = 0F 64 |
||
| 5518 | // Indexed by EVEX prefix |
||
| 5519 | SOpcodeDef OpcodeMap118[] = { |
||
| 5520 | {"pcmpgtb", 0x7 , 0xD0200, 0x19 , 0x1101, 0x1101, 0x101 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 64 |
||
| 5521 | {"vpcmpgtb", 0x20 ,0x8BA200, 0x19 , 0x95 , 0x1203, 0x203 , 0 , 0x10 , 0x1406, 0 , 0x000 }}; // E/MVEX 0F 64 |
||
| 5522 | |||
| 5523 | |||
| 5524 | // Submap for pcmpgtw. Opcode byte = 0F 65 |
||
| 5525 | // Indexed by EVEX prefix |
||
| 5526 | SOpcodeDef OpcodeMap119[] = { |
||
| 5527 | {"pcmpgtw", 0x7 , 0xD0200, 0x19 , 0x1102, 0x1102, 0x102 , 0 , 0 , 0 , 0 , 0x2 }, // 0F 65 |
||
| 5528 | {"vpcmpgtw", 0x20 ,0x8BA200, 0x19 , 0x95 , 0x1203, 0x203 , 0 , 0x10 , 0x1406, 0 , 0x000 }}; // E/MVEX 0F 65 |
||
| 5529 | |||
| 5530 | |||
| 5531 | // Opcode map for EVEX 66 0F 7B. Indexed by W bit |
||
| 5532 | SOpcodeDef OpcodeMap11A[] = { |
||
| 5533 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5534 | {"vcvtps2qq", 0x20 ,0x840200, 0x12 , 0x204 , 0xF4B , 0 , 0 , 0x27 , 0 , 0 , 0 }, // EVEX 66 0F 7B. W = 0 |
||
| 5535 | {"vcvtpd2qq", 0x20 ,0x841200, 0x12 , 0x204 , 0x24C , 0 , 0 , 0x27 , 0 , 0 , 0 }}; // EVEX 66 0F 7B. W = 1 |
||
| 5536 | |||
| 5537 | // Opcode map for EVEX F2 0F 7A. Indexed by W bit |
||
| 5538 | SOpcodeDef OpcodeMap11B[] = { |
||
| 5539 | {"vcvtudq2ps",0x20 ,0xC28800, 0x12 , 0x124B, 0x203 , 0 , 0 , 0x37 , 0x1214, 0 , 0 }, // F2 EVEX 0F 7A W0 |
||
| 5540 | {"vcvtuqq2ps",0x20 ,0x869800, 0x12 , 0x1F4B, 0x204 , 0 , 0 , 0x27 , 0 , 0 , 0 }}; // F2 EVEX 0F 7A W0 |
||
| 5541 | |||
| 5542 | // Opcode map for EVEX F3 0F 7A. Indexed by W bit |
||
| 5543 | SOpcodeDef OpcodeMap11C[] = { |
||
| 5544 | {"vcvtudq2pd",0x20 ,0xC28400, 0x12 , 0x124C, 0xF03 , 0 , 0 , 0x31 , 0x1214, 0 , 0 }, // F3 E/MVEX 0F 7A W0 |
||
| 5545 | {"vcvtuqq2pd",0x20 ,0x869800, 0x12 , 0x124C, 0x204 , 0 , 0 , 0x27 , 0 , 0 , 0 }}; // F2 EVEX 0F 7A W0 |
||
| 5546 | |||
| 5547 | // Opcode map for 0F 3A 42. Indexed by EVEX |
||
| 5548 | SOpcodeDef OpcodeMap11D[] = { |
||
| 5549 | {"mpsadbw", 0x15 , 0xD8200, 0x59 , 0x1202, 0x1202, 0x201 , 0x31 , 0 , 0 , 0 , 0x2 }, // 0F 3A 42 |
||
| 5550 | {"vdbpsadbw", 0x20 ,0x8E8200, 0x59 , 0x1202, 0x1202, 0x201 , 0x31 , 0x20 , 0 , 0 , 0 }}; // EVEX 0F 3A 42 |
||
| 5551 | |||
| 5552 | // Opcode map for 0F 3A 19. Indexed by EVEX |
||
| 5553 | SOpcodeDef OpcodeMap11E[] = { |
||
| 5554 | {"vextractf128" ,0x19,0x978200,0x53, 0x450 , 0x1550, 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 19 |
||
| 5555 | {0 ,0x11F,0 ,0x53, 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // EVEX 0F 3A 19 |
||
| 5556 | |||
| 5557 | // Opcode map for EVEX 0F 3A 19. Indexed by W bit |
||
| 5558 | SOpcodeDef OpcodeMap11F[] = { |
||
| 5559 | {"vextractf32x4",0x20,0x868200,0x53, 0x44B , 0x124B, 0x31 , 0 , 0x20 , 0 , 0 , 0 }, // EVEX W0 0F 3A 19 |
||
| 5560 | {"vextractf64x2",0x20,0x869200,0x53, 0x44C , 0x124C, 0x31 , 0 , 0x20 , 0 , 0 , 0 }}; // EVEX W1 0F 3A 19 |
||
| 5561 | |||
| 5562 | // Opcode map for EVEX 0F 3A 39. Indexed by EVEX |
||
| 5563 | SOpcodeDef OpcodeMap120[] = { |
||
| 5564 | {"vextracti128",0x1C, 0x978200,0x53 , 0x406 , 0x1506, 0x31 , 0 , 0 , 0 , 0 , 0 }, // 0F 3A 39 |
||
| 5565 | {0 ,0x121, 0 ,0x53 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // EVEX 0F 3A 39 |
||
| 5566 | |||
| 5567 | // Opcode map for EVEX 0F 3A 39. Indexed by W bit |
||
| 5568 | SOpcodeDef OpcodeMap121[] = { |
||
| 5569 | {"vextracti32x4",0x20,0x868200,0x53 , 0x406 , 0x1203, 0x31 , 0 , 0x20 , 0 , 0 , 0 }, // 0F 3A 39 |
||
| 5570 | {"vextracti64x2",0x20,0x869200,0x53 , 0x406 , 0x1203, 0x31 , 0 , 0x20 , 0 , 0 , 0 }}; // 0F 3A 39 |
||
| 5571 | |||
| 5572 | // Opcode map for 0F 3A 18. Indexed by EVEX |
||
| 5573 | SOpcodeDef OpcodeMap122[] = { |
||
| 5574 | {"vinsertf128",0x19 ,0x9F8200, 0x59 , 0x1250, 0x1250, 0x450 , 0x31 , 0x30 , 0 , 0 , 0 }, // 0F 3A 18 |
||
| 5575 | {0, 0x123 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; |
||
| 5576 | |||
| 5577 | // Opcode map for EVEX 0F 3A 18. Indexed by W bit |
||
| 5578 | SOpcodeDef OpcodeMap123[] = { |
||
| 5579 | {"vinsertf32x4",0x20,0x8AB200, 0x59 , 0x1250, 0x1250, 0x44B , 0x31 , 0x20 , 0 , 0 , 0 }, // EVEX 0F 3A 18. W0 |
||
| 5580 | {"vinsertf64x2",0x20,0x8AB200, 0x59 , 0x1250, 0x1250, 0x44C , 0x31 , 0x20 , 0 , 0 , 0 }}; // EVEX 0F 3A 18. W0 |
||
| 5581 | |||
| 5582 | // Opcode map for EVEX 0F 3A 1A. Indexed by W bit |
||
| 5583 | SOpcodeDef OpcodeMap124[] = { |
||
| 5584 | {"vinsertf32x8",0x20,0x8AB200, 0x59 , 0x1250, 0x1250, 0x54B , 0x31 , 0x30 , 0 , 0 , 0 }, // 0F 3A 1A |
||
| 5585 | {"vinsertf64x4",0x20,0x8AB200, 0x59 , 0x1250, 0x1250, 0x54C , 0x31 , 0x30 , 0 , 0 , 0 }}; // 0F 3A 1A |
||
| 5586 | |||
| 5587 | // Opcode map for 0F 3A 38. Indexed by EVEX |
||
| 5588 | SOpcodeDef OpcodeMap125[] = { |
||
| 5589 | {"vinserti128",0x1C ,0x9F8200, 0x59 , 0x1206, 0x1206, 0x406 , 0x31 , 0x30 , 0 , 0 , 0 }, // 0F 3A 38 |
||
| 5590 | {0, 0x126 , 0 , 0x59 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; |
||
| 5591 | |||
| 5592 | // Opcode map for EVEX 0F 3A 38. Indexed by W bit |
||
| 5593 | SOpcodeDef OpcodeMap126[] = { |
||
| 5594 | {"vinserti32x4",0x1C ,0x8AB200, 0x59 , 0x1203, 0x1203, 0x403 , 0x31 , 0x20 , 0 , 0 , 0 }, // EVEX 0F 3A 38. W0 |
||
| 5595 | {"vinserti64x2",0x20 ,0x8AB200, 0x59 , 0x1204, 0x1204, 0x404 , 0x31 , 0x20 , 0 , 0 , 0 }}; // EVEX 0F 3A 38. W1 |
||
| 5596 | |||
| 5597 | // Opcode map for EVEX 0F 3A 3A. Indexed by W bit |
||
| 5598 | SOpcodeDef OpcodeMap127[] = { |
||
| 5599 | {"vinserti32x8",0x20,0x8AB200, 0x59 , 0x1203, 0x1203, 0x503 , 0x31 , 0x20 , 0 , 0 , 0 }, // EVEX 0F 3A 3A. W0 |
||
| 5600 | {"vinserti64x4",0x20,0x8AB200, 0x59 , 0x1204, 0x1204, 0x504 , 0x31 , 0x20 , 0 , 0 , 0 }}; // EVEX 0F 3A 3A. W1 |
||
| 5601 | |||
| 5602 | // Opcode map for 0F 38 B4. Indexed by VEX prefix type |
||
| 5603 | SOpcodeDef OpcodeMap128[] = { |
||
| 5604 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5605 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, |
||
| 5606 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 38 B4 |
||
| 5607 | {"vpmadd52luq",0x23 ,0x8EB200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0 }, // EVEX 0F 38 B4 |
||
| 5608 | {"vpmadd233d",0x80 ,0x4A8200, 0x19 , 0x1603, 0x1603, 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }}; // MVEX 0F 38 B4 |
||
| 5609 | |||
| 5610 | // Opcode map for 0F 38 B5. Indexed by VEX prefix type |
||
| 5611 | SOpcodeDef OpcodeMap129[] = { |
||
| 5612 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, |
||
| 5613 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // VEX 0F 38 B5 |
||
| 5614 | {"vpmadd52huq",0x23 ,0x8EB200, 0x19 , 0x1204, 0x1204, 0x204 , 0 , 0x21 , 0 , 0 , 0 }, // EVEX 0F 38 B5 |
||
| 5615 | {"vpmadd231d",0x80 ,0x4A8200, 0x19 , 0x1603, 0x1603, 0x603 , 0 , 0 , 0x1406, 0 , 0x100 }}; // MVEX 0F 38 B5 |
||
| 5616 | |||
| 5617 | // 0F 38 19 indexed by VEX / EVEX |
||
| 5618 | SOpcodeDef OpcodeMap12A[] = { |
||
| 5619 | {"vbroadcastsd",0x19,0xC7A200, 0x12 , 0x124C, 0x04C , 0 , 0 , 0x20 , 0x1049, 0 , 0 }, // VEX 0F 38 19 |
||
| 5620 | {0, 0x12B , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // EVEX 0F 38 19 |
||
| 5621 | |||
| 5622 | // EVEX 0F 38 19 indexed by W bit |
||
| 5623 | SOpcodeDef OpcodeMap12B[] = { |
||
| 5624 | {"vbroadcastf32x2",0x20,0xC6B200, 0x12,0x124C, 0x04B , 0 , 0 , 0x20 , 0x1049, 0 , 0 }, // EVEX W0 0F 38 19 |
||
| 5625 | {"vbroadcastsd",0x20,0xC6B200, 0x12 , 0x124C, 0x04C , 0 , 0 , 0x20 , 0x1049, 0 , 0 }}; // EVEX W1 0F 38 19 |
||
| 5626 | |||
| 5627 | // Opcode map for 0F 38 38. Indexed by prefix |
||
| 5628 | SOpcodeDef OpcodeMap12C[] = { |
||
| 5629 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 38 |
||
| 5630 | {"pminsb", 0x15 ,0x8DA200, 0x19 , 0x1201, 0x1201, 0x201 , 0 , 0x20 , 0 , 0 , 0x2 }, // 66 0F 38 38 |
||
| 5631 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 38 |
||
| 5632 | // moved to map B2. this map can be removed |
||
| 5633 | // {"vpmovm2", 0x20 ,0x86B400, 0x12 , 0x1209, 0x95 , 0 , 0 , 0 , 0 , 0 , 1 }}; // F3 0F 38 38 |
||
| 5634 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5635 | |||
| 5636 | // Opcode map for EVEX 0F 38 39. Indexed by prefix |
||
| 5637 | SOpcodeDef OpcodeMap12D[] = { |
||
| 5638 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F 38 39 |
||
| 5639 | {"vpmins", 0x15 ,0xCDB200, 0x19 , 0x1209, 0x1209, 0x209 , 0 , 0x31 , 0x1406, 0 , 0x1 }, // 66 0F 38 39 |
||
| 5640 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F 38 39 |
||
| 5641 | // this entry has been replaced by a link from map B2. this may be removed |
||
| 5642 | // {0, 0x12F , 0 , 0x12 , 0 , 0 , 0 , 0 , 0 , 0 , 0xC , 0 }}; // F3 0F 38 39 |
||
| 5643 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5644 | |||
| 5645 | // Opcode map for EVEX 0F 38 29. Indexed by W bit |
||
| 5646 | SOpcodeDef OpcodeMap12E[] = { |
||
| 5647 | {"vpmovb2m", 0x20 ,0x86C400, 0x12 , 0x95 , 0x1209, 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 29 W0 |
||
| 5648 | {"vpmovw2m", 0x20 ,0x86C400, 0x12 , 0x95 , 0x1209, 0 , 0 , 0 , 0 , 0 , 0 }}; // EVEX F3 0F 38 29 W1 |
||
| 5649 | |||
| 5650 | // Opcode map for EVEX 0F 38 39. Indexed by W bit |
||
| 5651 | SOpcodeDef OpcodeMap12F[] = { |
||
| 5652 | {"vpmovd2m", 0x20 ,0x86B400, 0x12 , 0x95 , 0x1209, 0 , 0 , 0 , 0 , 0 , 0 }, // EVEX F3 0F 38 39 W0 |
||
| 5653 | {"vpmovq2m", 0x20 ,0x86B400, 0x12 , 0x95 , 0x1209, 0 , 0 , 0 , 0 , 0 , 0 }}; // EVEX F3 0F 38 39 W1 |
||
| 5654 | |||
| 5655 | // Opcode map for 0F 01, mod = 11b, reg = 5 |
||
| 5656 | // Indexed by rm bits |
||
| 5657 | SOpcodeDef OpcodeMap130[] = { |
||
| 5658 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 0 |
||
| 5659 | {0, 0x131 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // rm = 1. link to incssp |
||
| 5660 | {0, 0x132 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 9 , 0 }, // rm = 2. link to savessp |
||
| 5661 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 3 |
||
| 5662 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 4 |
||
| 5663 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 5 |
||
| 5664 | {"rdpkru", 0 , 0x000 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 6 |
||
| 5665 | {"wrpkru", 0 , 0x000 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // rm = 7 |
||
| 5666 | |||
| 5667 | // Opcode map for 0F 01, mod = 11b, reg = 5, rm = 1. Indexed by prefix |
||
| 5668 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5669 | SOpcodeDef OpcodeMap131[] = { |
||
| 5670 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5671 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
||
| 5672 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 5673 | {"incssp", 0 , 0x400 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 |
||
| 5674 | |||
| 5675 | // Opcode map for 0F 01, mod = 11b, reg = 5, rm = 2. Indexed by prefix |
||
| 5676 | SOpcodeDef OpcodeMap132[] = { |
||
| 5677 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5678 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
||
| 5679 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 5680 | {"savessp", 0 , 0x400 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 |
||
| 5681 | |||
| 5682 | // Opcode map for 0F 01, mod != 11b, reg = 5. Indexed by prefix |
||
| 5683 | SOpcodeDef OpcodeMap133[] = { |
||
| 5684 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5685 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
||
| 5686 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 5687 | {"rstorssp", 0 , 0x400 , 0x11 , 0 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 |
||
| 5688 | |||
| 5689 | // Opcode map for 0F AE /5. Link by prefix |
||
| 5690 | SOpcodeDef OpcodeMap134[] = { |
||
| 5691 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5692 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
||
| 5693 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 5694 | {"setssbsy", 0 , 0x400 , 0x11 , 0 , 0x2004, 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 |
||
| 5695 | |||
| 5696 | // Opcode map for 0F 1E. Hint instructions. Link by prefix |
||
| 5697 | SOpcodeDef OpcodeMap135[] = { |
||
| 5698 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5699 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 |
||
| 5700 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 |
||
| 5701 | {0, 0x136 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 4 , 0 }}; // F3 |
||
| 5702 | |||
| 5703 | // Opcode map for F3 0F 1E. Hint instructions. Link by mod / reg |
||
| 5704 | SOpcodeDef OpcodeMap136[] = { |
||
| 5705 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod < 3 |
||
| 5706 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5707 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5708 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5709 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5710 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5711 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5712 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // |
||
| 5713 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 0 |
||
| 5714 | {"rdssp", 0 , 0x1400 , 0x11 , 0 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 1 |
||
| 5715 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 2 |
||
| 5716 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 3 |
||
| 5717 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 4 |
||
| 5718 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 5 |
||
| 5719 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // mod = 3, reg = 6 |
||
| 5720 | {0, 0x137 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 5 , 0 }}; // mod = 3, reg = 7 |
||
| 5721 | |||
| 5722 | // Opcode map for F3 0F 1E. mod = 3, reg = 7. Link by rm |
||
| 5723 | SOpcodeDef OpcodeMap137[] = { |
||
| 5724 | // name instset prefix format dest. source1 source2 source3 EVEX MVEX link options |
||
| 5725 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 0 |
||
| 5726 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 1 |
||
| 5727 | {"endbr64", 0 , 0x400 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 2 |
||
| 5728 | {"endbr32", 0 , 0x400 , 0x10 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 3 |
||
| 5729 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 4 |
||
| 5730 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 5 |
||
| 5731 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // rm = 6 |
||
| 5732 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // rm = 7 |
||
| 5733 | |||
| 5734 | // Submap for 0F C7 reg /7, Indexed by prefixes |
||
| 5735 | SOpcodeDef OpcodeMap138[] = { |
||
| 5736 | {"rdseed", 0x1D , 0x1100 , 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 0F C7 reg /7 |
||
| 5737 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // 66 0F C7 reg /7 |
||
| 5738 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }, // F2 0F C7 reg /7 |
||
| 5739 | {"rdpid", 0x1D , 0x1500 , 0x11 , 0x1009, 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; // F3 0F C7 reg /7 |
||
| 5740 | |||
| 5741 | |||
| 5742 | SOpcodeDef OpcodeMap139[] = { |
||
| 5743 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5744 | |||
| 5745 | SOpcodeDef OpcodeMap13A[] = { |
||
| 5746 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5747 | |||
| 5748 | SOpcodeDef OpcodeMap13B[] = { |
||
| 5749 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5750 | |||
| 5751 | SOpcodeDef OpcodeMap13C[] = { |
||
| 5752 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5753 | |||
| 5754 | SOpcodeDef OpcodeMap13D[] = { |
||
| 5755 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5756 | |||
| 5757 | SOpcodeDef OpcodeMap13E[] = { |
||
| 5758 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5759 | |||
| 5760 | SOpcodeDef OpcodeMap13F[] = { |
||
| 5761 | {0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }}; |
||
| 5762 | |||
| 5763 | |||
| 5764 | /************** Make pointers to all opcode maps ***************************/ |
||
| 5765 | const SOpcodeDef * const OpcodeTables[] = { |
||
| 5766 | OpcodeMap0, OpcodeMap1, OpcodeMap2, OpcodeMap3, |
||
| 5767 | OpcodeMap4, OpcodeMap5, OpcodeMap6, OpcodeMap7, |
||
| 5768 | OpcodeMap8, OpcodeMap9, OpcodeMapA, OpcodeMapB, |
||
| 5769 | OpcodeMapC, OpcodeMapD, OpcodeMapE, OpcodeMapF, |
||
| 5770 | OpcodeMap10, OpcodeMap11, OpcodeMap12, OpcodeMap13, |
||
| 5771 | OpcodeMap14, OpcodeMap15, OpcodeMap16, OpcodeMap17, |
||
| 5772 | OpcodeMap18, OpcodeMap19, OpcodeMap1A, OpcodeMap1B, |
||
| 5773 | OpcodeMap1C, OpcodeMap1D, OpcodeMap1E, OpcodeMap1F, |
||
| 5774 | OpcodeMap20, OpcodeMap21, OpcodeMap22, OpcodeMap23, |
||
| 5775 | OpcodeMap24, OpcodeMap25, OpcodeMap26, OpcodeMap27, |
||
| 5776 | OpcodeMap28, OpcodeMap29, OpcodeMap2A, OpcodeMap2B, |
||
| 5777 | OpcodeMap2C, OpcodeMap2D, OpcodeMap2E, OpcodeMap2F, |
||
| 5778 | OpcodeMap30, OpcodeMap31, OpcodeMap32, OpcodeMap33, |
||
| 5779 | OpcodeMap34, OpcodeMap35, OpcodeMap36, OpcodeMap37, |
||
| 5780 | OpcodeMap38, OpcodeMap39, OpcodeMap3A, OpcodeMap3B, |
||
| 5781 | OpcodeMap3C, OpcodeMap3D, OpcodeMap3E, OpcodeMap3F, |
||
| 5782 | OpcodeMap40, OpcodeMap41, OpcodeMap42, OpcodeMap43, |
||
| 5783 | OpcodeMap44, OpcodeMap45, OpcodeMap46, OpcodeMap47, |
||
| 5784 | OpcodeMap48, OpcodeMap49, OpcodeMap4A, OpcodeMap4B, |
||
| 5785 | OpcodeMap4C, OpcodeMap4D, OpcodeMap4E, OpcodeMap4F, |
||
| 5786 | OpcodeMap50, OpcodeMap51, OpcodeMap52, OpcodeMap53, |
||
| 5787 | OpcodeMap54, OpcodeMap55, OpcodeMap56, OpcodeMap57, |
||
| 5788 | OpcodeMap58, OpcodeMap59, OpcodeMap5A, OpcodeMap5B, |
||
| 5789 | OpcodeMap5C, OpcodeMap5D, OpcodeMap5E, OpcodeMap5F, |
||
| 5790 | OpcodeMap60, OpcodeMap61, OpcodeMap62, OpcodeMap63, |
||
| 5791 | OpcodeMap64, OpcodeMap65, OpcodeMap66, OpcodeMap67, |
||
| 5792 | OpcodeMap68, OpcodeMap69, OpcodeMap6A, OpcodeMap6B, |
||
| 5793 | OpcodeMap6C, OpcodeMap6D, OpcodeMap6E, OpcodeMap6F, |
||
| 5794 | OpcodeMap70, OpcodeMap71, OpcodeMap72, OpcodeMap73, |
||
| 5795 | OpcodeMap74, OpcodeMap75, OpcodeMap76, OpcodeMap77, |
||
| 5796 | OpcodeMap78, OpcodeMap79, OpcodeMap7A, OpcodeMap7B, |
||
| 5797 | OpcodeMap7C, OpcodeMap7D, OpcodeMap7E, OpcodeMap7F, |
||
| 5798 | OpcodeMap80, OpcodeMap81, OpcodeMap82, OpcodeMap83, |
||
| 5799 | OpcodeMap84, OpcodeMap85, OpcodeMap86, OpcodeMap87, |
||
| 5800 | OpcodeMap88, OpcodeMap89, OpcodeMap8A, OpcodeMap8B, |
||
| 5801 | OpcodeMap8C, OpcodeMap8D, OpcodeMap8E, OpcodeMap8F, |
||
| 5802 | OpcodeMap90, OpcodeMap91, OpcodeMap92, OpcodeMap93, |
||
| 5803 | OpcodeMap94, OpcodeMap95, OpcodeMap96, OpcodeMap97, |
||
| 5804 | OpcodeMap98, OpcodeMap99, OpcodeMap9A, OpcodeMap9B, |
||
| 5805 | OpcodeMap9C, OpcodeMap9D, OpcodeMap9E, OpcodeMap9F, |
||
| 5806 | OpcodeMapA0, OpcodeMapA1, OpcodeMapA2, OpcodeMapA3, |
||
| 5807 | OpcodeMapA4, OpcodeMapA5, OpcodeMapA6, OpcodeMapA7, |
||
| 5808 | OpcodeMapA8, OpcodeMapA9, OpcodeMapAA, OpcodeMapAB, |
||
| 5809 | OpcodeMapAC, OpcodeMapAD, OpcodeMapAE, OpcodeMapAF, |
||
| 5810 | OpcodeMapB0, OpcodeMapB1, OpcodeMapB2, OpcodeMapB3, |
||
| 5811 | OpcodeMapB4, OpcodeMapB5, OpcodeMapB6, OpcodeMapB7, |
||
| 5812 | OpcodeMapB8, OpcodeMapB9, OpcodeMapBA, OpcodeMapBB, |
||
| 5813 | OpcodeMapBC, OpcodeMapBD, OpcodeMapBE, OpcodeMapBF, |
||
| 5814 | OpcodeMapC0, OpcodeMapC1, OpcodeMapC2, OpcodeMapC3, |
||
| 5815 | OpcodeMapC4, OpcodeMapC5, OpcodeMapC6, OpcodeMapC7, |
||
| 5816 | OpcodeMapC8, OpcodeMapC9, OpcodeMapCA, OpcodeMapCB, |
||
| 5817 | OpcodeMapCC, OpcodeMapCD, OpcodeMapCE, OpcodeMapCF, |
||
| 5818 | OpcodeMapD0, OpcodeMapD1, OpcodeMapD2, OpcodeMapD3, |
||
| 5819 | OpcodeMapD4, OpcodeMapD5, OpcodeMapD6, OpcodeMapD7, |
||
| 5820 | OpcodeMapD8, OpcodeMapD9, OpcodeMapDA, OpcodeMapDB, |
||
| 5821 | OpcodeMapDC, OpcodeMapDD, OpcodeMapDE, OpcodeMapDF, |
||
| 5822 | OpcodeMapE0, OpcodeMapE1, OpcodeMapE2, OpcodeMapE3, |
||
| 5823 | OpcodeMapE4, OpcodeMapE5, OpcodeMapE6, OpcodeMapE7, |
||
| 5824 | OpcodeMapE8, OpcodeMapE9, OpcodeMapEA, OpcodeMapEB, |
||
| 5825 | OpcodeMapEC, OpcodeMapED, OpcodeMapEE, OpcodeMapEF, |
||
| 5826 | OpcodeMapF0, OpcodeMapF1, OpcodeMapF2, OpcodeMapF3, |
||
| 5827 | OpcodeMapF4, OpcodeMapF5, OpcodeMapF6, OpcodeMapF7, |
||
| 5828 | OpcodeMapF8, OpcodeMapF9, OpcodeMapFA, OpcodeMapFB, |
||
| 5829 | OpcodeMapFC, OpcodeMapFD, OpcodeMapFE, OpcodeMapFF, |
||
| 5830 | OpcodeMap100, OpcodeMap101, OpcodeMap102, OpcodeMap103, |
||
| 5831 | OpcodeMap104, OpcodeMap105, OpcodeMap106, OpcodeMap107, |
||
| 5832 | OpcodeMap108, OpcodeMap109, OpcodeMap10A, OpcodeMap10B, |
||
| 5833 | OpcodeMap10C, OpcodeMap10D, OpcodeMap10E, OpcodeMap10F, |
||
| 5834 | OpcodeMap110, OpcodeMap111, OpcodeMap112, OpcodeMap113, |
||
| 5835 | OpcodeMap114, OpcodeMap115, OpcodeMap116, OpcodeMap117, |
||
| 5836 | OpcodeMap118, OpcodeMap119, OpcodeMap11A, OpcodeMap11B, |
||
| 5837 | OpcodeMap11C, OpcodeMap11D, OpcodeMap11E, OpcodeMap11F, |
||
| 5838 | OpcodeMap120, OpcodeMap121, OpcodeMap122, OpcodeMap123, |
||
| 5839 | OpcodeMap124, OpcodeMap125, OpcodeMap126, OpcodeMap127, |
||
| 5840 | OpcodeMap128, OpcodeMap129, OpcodeMap12A, OpcodeMap12B, |
||
| 5841 | OpcodeMap12C, OpcodeMap12D, OpcodeMap12E, OpcodeMap12F, |
||
| 5842 | OpcodeMap130, OpcodeMap131, OpcodeMap132, OpcodeMap133, |
||
| 5843 | OpcodeMap134, OpcodeMap135, OpcodeMap136, OpcodeMap137, |
||
| 5844 | OpcodeMap138, OpcodeMap139, OpcodeMap13A, OpcodeMap13B, |
||
| 5845 | OpcodeMap13C, OpcodeMap13D, OpcodeMap13E, OpcodeMap13F, |
||
| 5846 | }; |
||
| 5847 | |||
| 5848 | // size of each table pointed to by OpcodeTables[] |
||
| 5849 | const uint32 OpcodeTableLength[] = { |
||
| 5850 | TableSize(OpcodeMap0), TableSize(OpcodeMap1), TableSize(OpcodeMap2), TableSize(OpcodeMap3), |
||
| 5851 | TableSize(OpcodeMap4), TableSize(OpcodeMap5), TableSize(OpcodeMap6), TableSize(OpcodeMap7), |
||
| 5852 | TableSize(OpcodeMap8), TableSize(OpcodeMap9), TableSize(OpcodeMapA), TableSize(OpcodeMapB), |
||
| 5853 | TableSize(OpcodeMapC), TableSize(OpcodeMapD), TableSize(OpcodeMapE), TableSize(OpcodeMapF), |
||
| 5854 | TableSize(OpcodeMap10), TableSize(OpcodeMap11), TableSize(OpcodeMap12), TableSize(OpcodeMap13), |
||
| 5855 | TableSize(OpcodeMap14), TableSize(OpcodeMap15), TableSize(OpcodeMap16), TableSize(OpcodeMap17), |
||
| 5856 | TableSize(OpcodeMap18), TableSize(OpcodeMap19), TableSize(OpcodeMap1A), TableSize(OpcodeMap1B), |
||
| 5857 | TableSize(OpcodeMap1C), TableSize(OpcodeMap1D), TableSize(OpcodeMap1E), TableSize(OpcodeMap1F), |
||
| 5858 | TableSize(OpcodeMap20), TableSize(OpcodeMap21), TableSize(OpcodeMap22), TableSize(OpcodeMap23), |
||
| 5859 | TableSize(OpcodeMap24), TableSize(OpcodeMap25), TableSize(OpcodeMap26), TableSize(OpcodeMap27), |
||
| 5860 | TableSize(OpcodeMap28), TableSize(OpcodeMap29), TableSize(OpcodeMap2A), TableSize(OpcodeMap2B), |
||
| 5861 | TableSize(OpcodeMap2C), TableSize(OpcodeMap2D), TableSize(OpcodeMap2E), TableSize(OpcodeMap2F), |
||
| 5862 | TableSize(OpcodeMap30), TableSize(OpcodeMap31), TableSize(OpcodeMap32), TableSize(OpcodeMap33), |
||
| 5863 | TableSize(OpcodeMap34), TableSize(OpcodeMap35), TableSize(OpcodeMap36), TableSize(OpcodeMap37), |
||
| 5864 | TableSize(OpcodeMap38), TableSize(OpcodeMap39), TableSize(OpcodeMap3A), TableSize(OpcodeMap3B), |
||
| 5865 | TableSize(OpcodeMap3C), TableSize(OpcodeMap3D), TableSize(OpcodeMap3E), TableSize(OpcodeMap3F), |
||
| 5866 | TableSize(OpcodeMap40), TableSize(OpcodeMap41), TableSize(OpcodeMap42), TableSize(OpcodeMap43), |
||
| 5867 | TableSize(OpcodeMap44), TableSize(OpcodeMap45), TableSize(OpcodeMap46), TableSize(OpcodeMap47), |
||
| 5868 | TableSize(OpcodeMap48), TableSize(OpcodeMap49), TableSize(OpcodeMap4A), TableSize(OpcodeMap4B), |
||
| 5869 | TableSize(OpcodeMap4C), TableSize(OpcodeMap4D), TableSize(OpcodeMap4E), TableSize(OpcodeMap4F), |
||
| 5870 | TableSize(OpcodeMap50), TableSize(OpcodeMap51), TableSize(OpcodeMap52), TableSize(OpcodeMap53), |
||
| 5871 | TableSize(OpcodeMap54), TableSize(OpcodeMap55), TableSize(OpcodeMap56), TableSize(OpcodeMap57), |
||
| 5872 | TableSize(OpcodeMap58), TableSize(OpcodeMap59), TableSize(OpcodeMap5A), TableSize(OpcodeMap5B), |
||
| 5873 | TableSize(OpcodeMap5C), TableSize(OpcodeMap5D), TableSize(OpcodeMap5E), TableSize(OpcodeMap5F), |
||
| 5874 | TableSize(OpcodeMap60), TableSize(OpcodeMap61), TableSize(OpcodeMap62), TableSize(OpcodeMap63), |
||
| 5875 | TableSize(OpcodeMap64), TableSize(OpcodeMap65), TableSize(OpcodeMap66), TableSize(OpcodeMap67), |
||
| 5876 | TableSize(OpcodeMap68), TableSize(OpcodeMap69), TableSize(OpcodeMap6A), TableSize(OpcodeMap6B), |
||
| 5877 | TableSize(OpcodeMap6C), TableSize(OpcodeMap6D), TableSize(OpcodeMap6E), TableSize(OpcodeMap6F), |
||
| 5878 | TableSize(OpcodeMap70), TableSize(OpcodeMap71), TableSize(OpcodeMap72), TableSize(OpcodeMap73), |
||
| 5879 | TableSize(OpcodeMap74), TableSize(OpcodeMap75), TableSize(OpcodeMap76), TableSize(OpcodeMap77), |
||
| 5880 | TableSize(OpcodeMap78), TableSize(OpcodeMap79), TableSize(OpcodeMap7A), TableSize(OpcodeMap7B), |
||
| 5881 | TableSize(OpcodeMap7C), TableSize(OpcodeMap7D), TableSize(OpcodeMap7E), TableSize(OpcodeMap7F), |
||
| 5882 | TableSize(OpcodeMap80), TableSize(OpcodeMap81), TableSize(OpcodeMap82), TableSize(OpcodeMap83), |
||
| 5883 | TableSize(OpcodeMap84), TableSize(OpcodeMap85), TableSize(OpcodeMap86), TableSize(OpcodeMap87), |
||
| 5884 | TableSize(OpcodeMap88), TableSize(OpcodeMap89), TableSize(OpcodeMap8A), TableSize(OpcodeMap8B), |
||
| 5885 | TableSize(OpcodeMap8C), TableSize(OpcodeMap8D), TableSize(OpcodeMap8E), TableSize(OpcodeMap8F), |
||
| 5886 | TableSize(OpcodeMap90), TableSize(OpcodeMap91), TableSize(OpcodeMap92), TableSize(OpcodeMap93), |
||
| 5887 | TableSize(OpcodeMap94), TableSize(OpcodeMap95), TableSize(OpcodeMap96), TableSize(OpcodeMap97), |
||
| 5888 | TableSize(OpcodeMap98), TableSize(OpcodeMap99), TableSize(OpcodeMap9A), TableSize(OpcodeMap9B), |
||
| 5889 | TableSize(OpcodeMap9C), TableSize(OpcodeMap9D), TableSize(OpcodeMap9E), TableSize(OpcodeMap9F), |
||
| 5890 | TableSize(OpcodeMapA0), TableSize(OpcodeMapA1), TableSize(OpcodeMapA2), TableSize(OpcodeMapA3), |
||
| 5891 | TableSize(OpcodeMapA4), TableSize(OpcodeMapA5), TableSize(OpcodeMapA6), TableSize(OpcodeMapA7), |
||
| 5892 | TableSize(OpcodeMapA8), TableSize(OpcodeMapA9), TableSize(OpcodeMapAA), TableSize(OpcodeMapAB), |
||
| 5893 | TableSize(OpcodeMapAC), TableSize(OpcodeMapAD), TableSize(OpcodeMapAE), TableSize(OpcodeMapAF), |
||
| 5894 | TableSize(OpcodeMapB0), TableSize(OpcodeMapB1), TableSize(OpcodeMapB2), TableSize(OpcodeMapB3), |
||
| 5895 | TableSize(OpcodeMapB4), TableSize(OpcodeMapB5), TableSize(OpcodeMapB6), TableSize(OpcodeMapB7), |
||
| 5896 | TableSize(OpcodeMapB8), TableSize(OpcodeMapB9), TableSize(OpcodeMapBA), TableSize(OpcodeMapBB), |
||
| 5897 | TableSize(OpcodeMapBC), TableSize(OpcodeMapBD), TableSize(OpcodeMapBE), TableSize(OpcodeMapBF), |
||
| 5898 | TableSize(OpcodeMapC0), TableSize(OpcodeMapC1), TableSize(OpcodeMapC2), TableSize(OpcodeMapC3), |
||
| 5899 | TableSize(OpcodeMapC4), TableSize(OpcodeMapC5), TableSize(OpcodeMapC6), TableSize(OpcodeMapC7), |
||
| 5900 | TableSize(OpcodeMapC8), TableSize(OpcodeMapC9), TableSize(OpcodeMapCA), TableSize(OpcodeMapCB), |
||
| 5901 | TableSize(OpcodeMapCC), TableSize(OpcodeMapCD), TableSize(OpcodeMapCE), TableSize(OpcodeMapCF), |
||
| 5902 | TableSize(OpcodeMapD0), TableSize(OpcodeMapD1), TableSize(OpcodeMapD2), TableSize(OpcodeMapD3), |
||
| 5903 | TableSize(OpcodeMapD4), TableSize(OpcodeMapD5), TableSize(OpcodeMapD6), TableSize(OpcodeMapD7), |
||
| 5904 | TableSize(OpcodeMapD8), TableSize(OpcodeMapD9), TableSize(OpcodeMapDA), TableSize(OpcodeMapDB), |
||
| 5905 | TableSize(OpcodeMapDC), TableSize(OpcodeMapDD), TableSize(OpcodeMapDE), TableSize(OpcodeMapDF), |
||
| 5906 | TableSize(OpcodeMapE0), TableSize(OpcodeMapE1), TableSize(OpcodeMapE2), TableSize(OpcodeMapE3), |
||
| 5907 | TableSize(OpcodeMapE4), TableSize(OpcodeMapE5), TableSize(OpcodeMapE6), TableSize(OpcodeMapE7), |
||
| 5908 | TableSize(OpcodeMapE8), TableSize(OpcodeMapE9), TableSize(OpcodeMapEA), TableSize(OpcodeMapEB), |
||
| 5909 | TableSize(OpcodeMapEC), TableSize(OpcodeMapED), TableSize(OpcodeMapEE), TableSize(OpcodeMapEF), |
||
| 5910 | TableSize(OpcodeMapF0), TableSize(OpcodeMapF1), TableSize(OpcodeMapF2), TableSize(OpcodeMapF3), |
||
| 5911 | TableSize(OpcodeMapF4), TableSize(OpcodeMapF5), TableSize(OpcodeMapF6), TableSize(OpcodeMapF7), |
||
| 5912 | TableSize(OpcodeMapF8), TableSize(OpcodeMapF9), TableSize(OpcodeMapFA), TableSize(OpcodeMapFB), |
||
| 5913 | TableSize(OpcodeMapFC), TableSize(OpcodeMapFD), TableSize(OpcodeMapFE), TableSize(OpcodeMapFF), |
||
| 5914 | TableSize(OpcodeMap100), TableSize(OpcodeMap101), TableSize(OpcodeMap102), TableSize(OpcodeMap103), |
||
| 5915 | TableSize(OpcodeMap104), TableSize(OpcodeMap105), TableSize(OpcodeMap106), TableSize(OpcodeMap107), |
||
| 5916 | TableSize(OpcodeMap108), TableSize(OpcodeMap109), TableSize(OpcodeMap10A), TableSize(OpcodeMap10B), |
||
| 5917 | TableSize(OpcodeMap10C), TableSize(OpcodeMap10D), TableSize(OpcodeMap10E), TableSize(OpcodeMap10F), |
||
| 5918 | TableSize(OpcodeMap110), TableSize(OpcodeMap111), TableSize(OpcodeMap112), TableSize(OpcodeMap113), |
||
| 5919 | TableSize(OpcodeMap114), TableSize(OpcodeMap115), TableSize(OpcodeMap116), TableSize(OpcodeMap117), |
||
| 5920 | TableSize(OpcodeMap118), TableSize(OpcodeMap119), TableSize(OpcodeMap11A), TableSize(OpcodeMap11B), |
||
| 5921 | TableSize(OpcodeMap11C), TableSize(OpcodeMap11D), TableSize(OpcodeMap11E), TableSize(OpcodeMap11F), |
||
| 5922 | TableSize(OpcodeMap120), TableSize(OpcodeMap121), TableSize(OpcodeMap122), TableSize(OpcodeMap123), |
||
| 5923 | TableSize(OpcodeMap124), TableSize(OpcodeMap125), TableSize(OpcodeMap126), TableSize(OpcodeMap127), |
||
| 5924 | TableSize(OpcodeMap128), TableSize(OpcodeMap129), TableSize(OpcodeMap12A), TableSize(OpcodeMap12B), |
||
| 5925 | TableSize(OpcodeMap12C), TableSize(OpcodeMap12D), TableSize(OpcodeMap12E), TableSize(OpcodeMap12F), |
||
| 5926 | TableSize(OpcodeMap130), TableSize(OpcodeMap131), TableSize(OpcodeMap132), TableSize(OpcodeMap133), |
||
| 5927 | TableSize(OpcodeMap134), TableSize(OpcodeMap135), TableSize(OpcodeMap136), TableSize(OpcodeMap137), |
||
| 5928 | TableSize(OpcodeMap138), TableSize(OpcodeMap139), TableSize(OpcodeMap13A), TableSize(OpcodeMap13B), |
||
| 5929 | TableSize(OpcodeMap13C), TableSize(OpcodeMap13D), TableSize(OpcodeMap13E), TableSize(OpcodeMap13F), |
||
| 5930 | }; |
||
| 5931 | |||
| 5932 | // number of entries in OpcodeTables |
||
| 5933 | const uint32 NumOpcodeTables1 = TableSize(OpcodeTables); |
||
| 5934 | const uint32 NumOpcodeTables2 = TableSize(OpcodeTableLength); |
||
| 5935 | |||
| 5936 | // Index to start pages, depending on VEX.mmmm bits |
||
| 5937 | uint32 OpcodeStartPageVEX[] = { |
||
| 5938 | 0xB0, // no escape, VEX.mmmm = 0 |
||
| 5939 | 0xB1, // 0F escape or VEX.mmmm = 1 |
||
| 5940 | 0x2, // 0F 38 escape or VEX.mmmm = 2 |
||
| 5941 | 0x4, // 0f 3A escape or VEX.mmmm = 3 |
||
| 5942 | 0, 0, 0, 0, // reserved for higher mmmm |
||
| 5943 | 0xB2, // 0F 38 escape or EVEX.mmmm = 2 with F2 prefix (pp = 11) |
||
| 5944 | 0xB3 // 0F 38 escape or EVEX.mmmm = 2 with F3 prefix (pp = 10) |
||
| 5945 | }; |
||
| 5946 | |||
| 5947 | // Index to start pages, depending on XOP.mmmm bits |
||
| 5948 | SOpcodeDef const * OpcodeStartPageXOP[] = { |
||
| 5949 | OpcodeMap64, // XOP.mmmm = 8 |
||
| 5950 | OpcodeMap65, // XOP.mmmm = 9 |
||
| 5951 | OpcodeMap66 // XOP.mmmm = 0xA |
||
| 5952 | }; |
||
| 5953 | |||
| 5954 | // Number of entries in OpcodeStartPages |
||
| 5955 | const uint32 NumOpcodeStartPageVEX = TableSize(OpcodeStartPageVEX); |
||
| 5956 | const uint32 NumOpcodeStartPageXOP = TableSize(OpcodeStartPageXOP); |
||
| 5957 | |||
| 5958 | |||
| 5959 | // Define register names |
||
| 5960 | |||
| 5961 | // Names of 8 bit registers |
||
| 5962 | const char * RegisterNames8[8] = { |
||
| 5963 | "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" }; |
||
| 5964 | |||
| 5965 | // Names of 8 bit registers with REX prefix |
||
| 5966 | const char * RegisterNames8x[16] = { |
||
| 5967 | "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", |
||
| 5968 | "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" }; |
||
| 5969 | |||
| 5970 | // Names of 16 bit registers |
||
| 5971 | const char * RegisterNames16[16] = { |
||
| 5972 | "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", |
||
| 5973 | "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" }; |
||
| 5974 | |||
| 5975 | // Names of 32 bit registers |
||
| 5976 | const char * RegisterNames32[16] = { |
||
| 5977 | "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", |
||
| 5978 | "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" }; |
||
| 5979 | |||
| 5980 | // Names of 64 bit registers |
||
| 5981 | const char * RegisterNames64[16] = { |
||
| 5982 | "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", |
||
| 5983 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" }; |
||
| 5984 | |||
| 5985 | // Names of segment registers |
||
| 5986 | const char * RegisterNamesSeg[8] = { |
||
| 5987 | "es", "cs", "ss", "ds", "fs", "gs", "hs?", "is?" }; // Last two are illegal or undocumented |
||
| 5988 | |||
| 5989 | // Names of control registers |
||
| 5990 | const char * RegisterNamesCR[16] = { |
||
| 5991 | "cr0", "cr1 ?", "cr2", "cr3", "cr4", "cr5 ?", "cr6 ?", "cr7 ?", |
||
| 5992 | "cr8", "cr9 ?", "cr10 ?", "cr11 ?", "cr12 ?", "cr13 ?", "cr14 ?", "cr15 ?" }; // Those with ? are illegal |
||
| 5993 | |||
| 5994 | |||
| 5995 | // MVEX tables: Tables of the meaning of the sss bits in a MVEX prefix |
||
| 5996 | |||
| 5997 | SwizSpec Sf32r[8] = { // 32-bit float or integer register permutation |
||
| 5998 | {0x64B,64,4,""}, |
||
| 5999 | {0x64B,64,4,"cdab"}, |
||
| 6000 | {0x64B,64,4,"badc"}, |
||
| 6001 | {0x64B,64,4,"dacb"}, |
||
| 6002 | {0x64B,64,4,"aaaa"}, |
||
| 6003 | {0x64B,64,4,"bbbb"}, |
||
| 6004 | {0x64B,64,4,"cccc"}, |
||
| 6005 | {0x64B,64,4,"dddd"}}; |
||
| 6006 | |||
| 6007 | SwizSpec Sf64r[8] = { // 64-bit float or integer register permutation |
||
| 6008 | {0x64C,64,8,""}, |
||
| 6009 | {0x64C,64,8,"cdab"}, |
||
| 6010 | {0x64C,64,8,"badc"}, |
||
| 6011 | {0x64C,64,8,"dacb"}, |
||
| 6012 | {0x64C,64,8,"aaaa"}, |
||
| 6013 | {0x64C,64,8,"bbbb"}, |
||
| 6014 | {0x64C,64,8,"cccc"}, |
||
| 6015 | {0x64C,64,8,"dddd"}}; |
||
| 6016 | |||
| 6017 | SwizSpec Sf32m[8] = { // 32-bit float memory broadcast or conversion |
||
| 6018 | {0x64B,64,4,""}, |
||
| 6019 | {0x04B, 4,4,"1to16"}, |
||
| 6020 | {0x44B,16,4,"4to16"}, |
||
| 6021 | {0x54A,32,2,"float16"}, |
||
| 6022 | {0x401,16,1,"uint8"}, |
||
| 6023 | {0x401,16,1,"sint8 N/A!"}, |
||
| 6024 | {0x502,32,2,"uint16"}, |
||
| 6025 | {0x502,32,2,"sint16"}}; |
||
| 6026 | |||
| 6027 | SwizSpec Sf64m[8] = { // 64-bit float memory broadcast (no conversion) |
||
| 6028 | {0x64C,64,8,""}, |
||
| 6029 | {0x04C, 8,8,"1to8"}, |
||
| 6030 | {0x54C,32,8,"4to8"}, |
||
| 6031 | {0x64C,64,8,"N/A!"}, |
||
| 6032 | {0x64C,64,8,"N/A!"}, |
||
| 6033 | {0x64C,64,8,"N/A!"}, |
||
| 6034 | {0x64C,64,8,"N/A!"}, |
||
| 6035 | {0x64C,64,8,"N/A!"}}; |
||
| 6036 | |||
| 6037 | SwizSpec Si32m[8] = { // 32-bit integer memory broadcast or conversion |
||
| 6038 | {0x603,64,4,""}, |
||
| 6039 | {0x003, 4,4,"1to16"}, |
||
| 6040 | {0x403,16,4,"4to16"}, |
||
| 6041 | {0x54A,32,2,"N/A!"}, |
||
| 6042 | {0x401,16,1,"uint8"}, |
||
| 6043 | {0x401,16,1,"sint8"}, |
||
| 6044 | {0x502,32,2,"uint16"}, |
||
| 6045 | {0x502,32,2,"sint16"}}; |
||
| 6046 | |||
| 6047 | SwizSpec Si64m[8] = { // 64-bit integer memory broadcast (no conversion) |
||
| 6048 | {0x604,64,8,""}, |
||
| 6049 | {0x004, 8,8,"1to8"}, |
||
| 6050 | {0x504,32,8,"4to8"}, |
||
| 6051 | {0x604,64,8,"N/A!"}, |
||
| 6052 | {0x604,64,8,"N/A!"}, |
||
| 6053 | {0x604,64,8,"N/A!"}, |
||
| 6054 | {0x604,64,8,"N/A!"}, |
||
| 6055 | {0x604,64,8,"N/A!"}}; |
||
| 6056 | |||
| 6057 | SwizSpec Uf32m[8] = { // 32-bit float memory up- or down-conversion |
||
| 6058 | {0x64B,64,4,""}, |
||
| 6059 | {0x04B, 4,4,"N/A!"}, |
||
| 6060 | {0x54B,16,4,"N/A!"}, |
||
| 6061 | {0x54A,32,2,"float16"}, |
||
| 6062 | {0x401,16,1,"uint8"}, |
||
| 6063 | {0x401,16,1,"sint8"}, |
||
| 6064 | {0x502,32,2,"uint16"}, |
||
| 6065 | {0x502,32,2,"sint16"}}; |
||
| 6066 | |||
| 6067 | SwizSpec Uf64m[8] = { // 64-bit float memory, no up- or down-conversion |
||
| 6068 | {0x64C,64,8,""}, |
||
| 6069 | {0x64C,64,8,"N/A!"}, |
||
| 6070 | {0x64C,64,8,"N/A!"}, |
||
| 6071 | {0x64C,64,8,"N/A!"}, |
||
| 6072 | {0x64C,64,8,"N/A!"}, |
||
| 6073 | {0x64C,64,8,"N/A!"}, |
||
| 6074 | {0x64C,64,8,"N/A!"}, |
||
| 6075 | {0x64C,64,8,"N/A!"}}; |
||
| 6076 | |||
| 6077 | SwizSpec Ui32m[8] = { // 32-bit integer memory up- or down-conversion |
||
| 6078 | {0x603,64,4,""}, |
||
| 6079 | {0x003, 4,4,"N/A!"}, |
||
| 6080 | {0x503,16,4,"N/A!"}, |
||
| 6081 | {0x54A,32,2,"N/A!"}, |
||
| 6082 | {0x401,16,1,"uint8"}, |
||
| 6083 | {0x401,16,1,"sint8"}, |
||
| 6084 | {0x502,32,2,"uint16"}, |
||
| 6085 | {0x502,32,2,"sint16"}}; |
||
| 6086 | |||
| 6087 | SwizSpec Ui64m[8] = { // 64-bit integer memory, no up- or down-conversion |
||
| 6088 | {0x604,64,8,""}, |
||
| 6089 | {0x604,64,8,"N/A!"}, |
||
| 6090 | {0x604,64,8,"N/A!"}, |
||
| 6091 | {0x604,64,8,"N/A!"}, |
||
| 6092 | {0x604,64,8,"N/A!"}, |
||
| 6093 | {0x604,64,8,"N/A!"}, |
||
| 6094 | {0x604,64,8,"N/A!"}, |
||
| 6095 | {0x604,64,8,"N/A!"}}; |
||
| 6096 | |||
| 6097 | // special cases: |
||
| 6098 | |||
| 6099 | SwizSpec Uf32mx4[8] = { // 32-bit float memory up-conversion, broadcast * 4, vbroadcastf32x4 |
||
| 6100 | {0x44B,16,4*4,""}, |
||
| 6101 | {0x04B,16,4*4,"N/A!"}, |
||
| 6102 | {0x54B,16,4*4,"N/A!"}, |
||
| 6103 | {0x004, 8,2*4,"float16"}, |
||
| 6104 | {0x003, 4,1*4,"uint8"}, |
||
| 6105 | {0x003, 4,1*4,"sint8"}, |
||
| 6106 | {0x004, 8,2*4,"uint16"}, |
||
| 6107 | {0x004, 8,2*4,"sint16"}}; |
||
| 6108 | |||
| 6109 | SwizSpec Uf64mx4[8] = { // 64-bit float memory, no up-conversion, broadcast * 4, vbroadcastf64x4 |
||
| 6110 | {0x54C,32,8*4,""}, |
||
| 6111 | {0x54C,32,8*4,"N/A!"}, |
||
| 6112 | {0x54C,32,8*4,"N/A!"}, |
||
| 6113 | {0x54C,32,8*4,"N/A!"}, |
||
| 6114 | {0x54C,32,8*4,"N/A!"}, |
||
| 6115 | {0x54C,32,8*4,"N/A!"}, |
||
| 6116 | {0x54C,32,8*4,"N/A!"}, |
||
| 6117 | {0x54C,32,8*4,"N/A!"}}; |
||
| 6118 | |||
| 6119 | SwizSpec Ui32mx4[8] = { // 32-bit integer memory up-conversion, broadcast * 4, vbroadcasti32x4 |
||
| 6120 | {0x403,16,4*4,""}, |
||
| 6121 | {0x003,16,4*4,"N/A!"}, |
||
| 6122 | {0x503,16,4*4,"N/A!"}, |
||
| 6123 | {0x54A, 8,2*4,"N/A!"}, |
||
| 6124 | {0x003, 4,1*4,"uint8"}, |
||
| 6125 | {0x003, 4,1*4,"sint8"}, |
||
| 6126 | {0x004, 8,2*4,"uint16"}, |
||
| 6127 | {0x004, 8,2*4,"sint16"}}; |
||
| 6128 | |||
| 6129 | SwizSpec Ui64mx4[8] = { // 64-bit integer memory, no up-conversion, broadcast * 4, vbroadcasti64x4 |
||
| 6130 | {0x504,32,8*4,""}, |
||
| 6131 | {0x504,32,8*4,"N/A!"}, |
||
| 6132 | {0x504,32,8*4,"N/A!"}, |
||
| 6133 | {0x504,32,8*4,"N/A!"}, |
||
| 6134 | {0x504,32,8*4,"N/A!"}, |
||
| 6135 | {0x504,32,8*4,"N/A!"}, |
||
| 6136 | {0x504,32,8*4,"N/A!"}, |
||
| 6137 | {0x504,32,8*4,"N/A!"}}; |
||
| 6138 | |||
| 6139 | SwizSpec Si32mHalf[8] = { // 32-bit integer memory broadcast with conversion to double (VCVTDQ2PD) |
||
| 6140 | {0x503,32,4,""}, |
||
| 6141 | {0x003, 4,4,"1to8"}, |
||
| 6142 | {0x403,16,4,"4to8"}, |
||
| 6143 | {0x503,32,4,"N/A!"}, |
||
| 6144 | {0x503,32,4,"N/A!"}, |
||
| 6145 | {0x503,32,4,"N/A!"}, |
||
| 6146 | {0x503,32,4,"N/A!"}, |
||
| 6147 | {0x503,32,4,"N/A!"}}; |
||
| 6148 | |||
| 6149 | SwizSpec Sf32mHalf[8] = { // 32-bit float memory broadcast or conversion (vcvtps2pd) |
||
| 6150 | {0x54B,32,4,""}, |
||
| 6151 | {0x04B, 4,4,"1to8"}, |
||
| 6152 | {0x44B,16,4,"4to8"}, |
||
| 6153 | {0x54A,32,2,"N/A!"}, |
||
| 6154 | {0x401,16,1,"N/A!"}, |
||
| 6155 | {0x401,16,1,"N/A!"}, |
||
| 6156 | {0x502,32,2,"N/A!"}, |
||
| 6157 | {0x502,32,2,"N/A!"}}; |
||
| 6158 | |||
| 6159 | SwizSpec Snone[8] = { // No swizzle |
||
| 6160 | {0x600,64,8*4,""}, |
||
| 6161 | {0x600,64,8*4,"N/A!"}, |
||
| 6162 | {0x600,64,8*4,"N/A!"}, |
||
| 6163 | {0x600,64,8*4,"N/A!"}, |
||
| 6164 | {0x600,64,8*4,"N/A!"}, |
||
| 6165 | {0x600,64,8*4,"N/A!"}, |
||
| 6166 | {0x600,64,8*4,"N/A!"}, |
||
| 6167 | {0x600,64,8*4,"N/A!"}}; |
||
| 6168 | |||
| 6169 | SwizSpec Sf32mfmadd233[8] = { // 32-bit float memory, without register swizzle and limited broadcast, vfmadd233ps |
||
| 6170 | {0x64B,64,4,""}, |
||
| 6171 | {0x04B, 4,4,"N/A!"}, |
||
| 6172 | {0x44B,16,4,"4to16"}, |
||
| 6173 | {0x54A,32,2,"N/A!"}, |
||
| 6174 | {0x401,16,1,"N/A!"}, |
||
| 6175 | {0x401,16,1,"N/A!"}, |
||
| 6176 | {0x502,32,2,"N/A!"}, |
||
| 6177 | {0x502,32,2,"N/A!"}}; |
||
| 6178 | |||
| 6179 | SwizSpec Sdummy[8] = { // For unused entries |
||
| 6180 | {0,0,0,""}, |
||
| 6181 | {0,0,0,"??"}, |
||
| 6182 | {0,0,0,"??"}, |
||
| 6183 | {0,0,0,"??"}, |
||
| 6184 | {0,0,0,"??"}, |
||
| 6185 | {0,0,0,"??"}, |
||
| 6186 | {0,0,0,"??"}, |
||
| 6187 | {0,0,0,"??"}}; |
||
| 6188 | |||
| 6189 | SwizSpec Signore[8] = { // sss bits ignored or used only for sae. Offset multiplier defined |
||
| 6190 | {0x603,64,4,""}, |
||
| 6191 | {0x603,64,4,""}, |
||
| 6192 | {0x603,64,4,""}, |
||
| 6193 | {0x603,64,4,""}, |
||
| 6194 | {0x603,64,4,""}, |
||
| 6195 | {0x603,64,4,""}, |
||
| 6196 | {0x603,64,4,""}, |
||
| 6197 | {0x603,64,4,""}}; |
||
| 6198 | |||
| 6199 | SwizSpec Signore1[8] = { // sss bits ignored or used only for sae. Offset multiplier defined, vector size not defined |
||
| 6200 | {0x000,64,4,""}, |
||
| 6201 | {0x000,64,4,""}, |
||
| 6202 | {0x000,64,4,""}, |
||
| 6203 | {0x000,64,4,""}, |
||
| 6204 | {0x000,64,4,""}, |
||
| 6205 | {0x000,64,4,""}, |
||
| 6206 | {0x000,64,4,""}, |
||
| 6207 | {0x000,64,4,""}}; |
||
| 6208 | |||
| 6209 | // Table of swizzle tables |
||
| 6210 | SwizSpec const * SwizTables[][2] = { |
||
| 6211 | {Sdummy,Sdummy}, // 0 no swizzle, sss must be zero |
||
| 6212 | {Signore,Signore}, // 1 sss ignored or used only for sae, offset multiplier defined |
||
| 6213 | {Signore1,Signore1}, // 2 sss ignored or used only for sae, offset multiplier defined, no vector size |
||
| 6214 | {Sdummy,Sdummy}, // 3 unused |
||
| 6215 | {Sf32r,Sf32m}, // 4 Sf32 |
||
| 6216 | {Sf64r,Sf64m}, // 5 Sf64 |
||
| 6217 | {Sf32r,Si32m}, // 6 Si32 |
||
| 6218 | {Sf64r,Si64m}, // 7 Si64 |
||
| 6219 | {Sdummy,Uf32m}, // 8 Uf32 |
||
| 6220 | {Sdummy,Uf64m}, // 9 Uf64 |
||
| 6221 | {Sf32r,Ui32m}, // A Ui32 |
||
| 6222 | {Sf64r,Ui64m}, // B Ui64 |
||
| 6223 | {Sdummy,Uf32m}, // C Df32 |
||
| 6224 | {Sdummy,Uf64m}, // D Df64 |
||
| 6225 | {Sf32r,Ui32m}, // E Di32 |
||
| 6226 | {Sf64r,Ui64m}, // F Di64 |
||
| 6227 | // special cases |
||
| 6228 | {Sdummy,Uf32mx4}, // 10 Uf32 vbroadcastf32x4 |
||
| 6229 | {Sdummy,Uf64mx4}, // 11 Uf64 vbroadcastf64x4 |
||
| 6230 | {Sdummy,Ui32mx4}, // 12 Ui32 vbroadcasti32x4 |
||
| 6231 | {Sdummy,Ui64mx4}, // 13 Ui64 vbroadcasti64x4 |
||
| 6232 | {Sf32r,Si32mHalf}, // 14 Si32 vcvtdq2pd, vcvtudq2pd |
||
| 6233 | {Sf32r,Sf32mHalf}, // 15 Sf32 vcvtps2pd |
||
| 6234 | {Snone,Sf32mfmadd233}// 16 Sf32 without register swizzle and limited broadcast, vfmadd233ps |
||
| 6235 | }; |
||
| 6236 | |||
| 6237 | SwizSpec Sround_1[8] = { // Register operand rounding mode and suppress all exceptions |
||
| 6238 | {0x64B,32,4,"rn"}, // syntax 1 |
||
| 6239 | {0x64B,32,4,"rd"}, |
||
| 6240 | {0x64B,32,4,"ru"}, |
||
| 6241 | {0x64B,32,4,"rz"}, |
||
| 6242 | {0x64B,32,4,"rn-sae"}, |
||
| 6243 | {0x64B,32,4,"rd-sae"}, |
||
| 6244 | {0x64B,32,4,"ru-sae"}, |
||
| 6245 | {0x64B,32,4,"rz-sae"}}; |
||
| 6246 | |||
| 6247 | SwizSpec Sround_2[8] = { // Register operand rounding mode and suppress all exceptions |
||
| 6248 | {0x64B,32,4,"rn"}, // alternative syntax |
||
| 6249 | {0x64B,32,4,"rd"}, |
||
| 6250 | {0x64B,32,4,"ru"}, |
||
| 6251 | {0x64B,32,4,"rz"}, |
||
| 6252 | {0x64B,32,4,"rn} {sae"}, |
||
| 6253 | {0x64B,32,4,"rd} {sae"}, |
||
| 6254 | {0x64B,32,4,"ru} {sae"}, |
||
| 6255 | {0x64B,32,4,"rz} {sae"}}; |
||
| 6256 | |||
| 6257 | // Table of swizzle tables for rounding mode |
||
| 6258 | SwizSpec const * SwizRoundTables[1][2] = { |
||
| 6259 | {Sround_1,Sround_2} |
||
| 6260 | }; |
||
| 6261 | |||
| 6262 | // EVEX tables: Tables of rounding mode names for EVEX |
||
| 6263 | const char * EVEXRoundingNames[5] = { |
||
| 6264 | "rn-sae", "rd-sae", "ru-sae", "rz-sae", "sae" |
||
| 6265 | }; |
||
| 6266 |