WebSVN – Kolibri OS – Blame – /kernel/trunk/core/mtrrtest.asm

Rev	Author	Line No.	Line
4610	clevermous	1	; Simple test for ring-3 debugging of mtrr.inc.
		2	; Contains some inputs taken from real-life MTRRs and expected outputs.
		3	format PE console
		4	;include 'win32a.inc'
10051	ace_dent	5
4610	clevermous	6	include '../proc32.inc'
		7	include '../struct.inc'
		8	entry start
		9
		10	; one test has 8, another test has 10
		11	; this is the maximal value for storing/copying, real value is in MTRRCAP
		12	MAX_VARIABLE_MTRR = 10
		13
		14	start:
9950	turbocat	15	; Copy test inputs, run init_pat_mtrr, compare with test outputs. Repeat.
4610	clevermous	16	mov esi, test1_in_data
		17	mov edi, mtrrdata
		18	mov ecx, mtrrdata_size / 4
		19	rep movsd
9950	turbocat	20	call init_pat_mtrr
4610	clevermous	21	mov esi, test1_out_data
		22	mov edi, mtrrdata
		23	mov ecx, mtrrdata_size / 4
		24	repz cmpsd
		25	jnz .fail
		26	mov esi, test2_in_data
		27	mov edi, mtrrdata
		28	mov ecx, mtrrdata_size / 4
		29	rep movsd
9950	turbocat	30	call init_pat_mtrr
4610	clevermous	31	mov esi, test2_out_data
		32	mov edi, mtrrdata
		33	mov ecx, mtrrdata_size / 4
		34	repz cmpsd
		35	jnz .fail
		36	ret
		37
		38	.fail:
		39	int3
		40	jmp $
		41
		42	; Helper procedure for _rdmsr/_wrmsr, replacements of rdmsr/wrmsr.
		43	; Returns pointer to memory containing the given MSR.
		44	; in: ecx = MSR
		45	; out: esi -> MSR data
		46	proc get_msr_ptr
		47	mov esi, mtrrcap
		48	cmp ecx, 0xFE
		49	jz .ok
		50	mov esi, mtrr_def_type
		51	cmp ecx, 0x2FF
		52	jz .ok
		53	lea esi, [ecx-0x200]
		54	cmp esi, MAX_VARIABLE_MTRR*2
		55	jae .fail
		56	lea esi, [mtrr+esi*8]
		57	.ok:
		58	ret
		59	.fail:
		60	int3
		61	ret
		62	endp
		63
		64	; Emulates rdmsr.
		65	proc _rdmsr
		66	push esi
		67	call get_msr_ptr
		68	mov eax, [esi]
		69	mov edx, [esi+4]
		70	pop esi
		71	ret
		72	endp
		73
		74	; Emulates wrmsr.
		75	proc _wrmsr
		76	push esi
		77	call get_msr_ptr
		78	mov [esi], eax
		79	mov [esi+4], edx
		80	pop esi
		81	ret
		82	endp
		83
		84	; Macro to substitute rdmsr/wrmsr with emulating code.
		85	macro rdmsr
		86	{
		87	call _rdmsr
		88	}
		89	macro wrmsr
		90	{
		91	call _wrmsr
		92	}
		93	; Our emulation of rdmsr/wrmsr has nothing to do with real cache
		94	; and system-wide settings,
		95	; remove all attempts to wbinvd and disable/enable cache in cr0.
		96	macro wbinvd
		97	{
		98	}
		99	macro mov a,b
		100	{
		101	if ~(a eq cr0) & ~(b eq cr0)
		102	mov a, b
		103	end if
		104	}
		105	macro movi r,i
		106	{
		107	push i
		108	pop r
		109	}
		110
		111	include '../kglobals.inc'
7136	dunkaist	112	CAPS_MTRR = 12
		113	MSR_MTRR_DEF_TYPE = 0x2FF
		114	CAPS_PGE = 13
		115	CAPS_PAT = 16
		116	MSR_CR_PAT = 0x277
		117	PAT_VALUE = 0x00070106 ; (UC<<24)\|(UCM<<16)\|(WC<<8)\|WB
		118	MEM_WB = 6 ;write-back memory
		119	MEM_WC = 1 ;write combined memory
		120	MEM_UC = 0 ;uncached memory
4610	clevermous	121	include 'mtrr.inc'
		122
		123	BOOT_VARS = 0
7132	dunkaist	124	BOOT.mtrr db 1
4610	clevermous	125	align 4
		126	cpu_caps dd 1 shl CAPS_MTRR
		127	LFBAddress dd 0xE0000000
		128	LFBSize dd 0x10000000
		129	MEM_AMOUNT dd 0 ; not used, needed for compilation
		130
		131	align 4
		132	; Test 1: input
		133	test1_in_data:
		134	test1_phys_addr_width db 36
		135	rb 3
		136	test1_in_mtrrcap dq 0xD08
		137	test1_in_mtrr_def_type dq 0xC00
		138	test1_in_mtrrs:
		139	dq 0x000000006, 0xF00000800
		140	dq 0x100000006, 0xFC0000800
		141	dq 0x0BC000000, 0xFFC000800
		142	dq 0x0C0000000, 0xFC0000800
		143	dq 0x138000000, 0xFF8000800
		144	dq 0, 0
		145	dq 0, 0
		146	dq 0, 0
		147	dq -1, -1 ; not used
		148	dq -1, -1 ; not used
		149	; Test 1: output
		150	test1_out_data:
		151	dd 36 ; phys_addr_width, readonly
		152	dq 0xD08 ; MTRRCAP, readonly
		153	dq 0xC00 ; MTRR_DEF_TYPE, should be the same
		154	dq 0x000000006, 0xF80000800
		155	dq 0x080000006, 0xFC0000800
		156	dq 0x0BC000000, 0xFFC000800
		157	dq 0x100000006, 0xFC0000800
		158	dq 0x138000000, 0xFF8000800
		159	dq 0x0E0000001, 0xFFF000800 ; added for [LFBAddress]
		160	dq 0, 0
		161	dq 0, 0
		162	dq -1, -1 ; not used
		163	dq -1, -1 ; not used
		164
		165	; Test 2: input
		166	test2_in_data:
		167	test2_phys_addr_width db 39
		168	rb 3
		169	test2_in_mtrrcap dq 0xD0A
		170	test2_in_mtrr_def_type dq 0xC00
		171	test2_in_mtrrs:
		172	dq 0x0000000006, 0x7F00000800
		173	dq 0x0100000006, 0x7FE0000800
		174	dq 0x00E0000000, 0x7FE0000800
		175	dq 0x00DC000000, 0x7FFC000800
		176	dq 0x00DBC00000, 0x7FFFC00800
		177	dq 0x011F800000, 0x7FFF800800
		178	dq 0x011F400000, 0x7FFFC00800
		179	dq 0x011F200000, 0x7FFFE00800
		180	dq 0, 0
		181	dq 0, 0
		182
		183	; Test 2: output
		184	test2_out_data:
		185	dd 39 ; phys_addr_width, readonly
		186	dq 0xD0A ; MTRRCAP, readonly
		187	dq 0xC00 ; MTRR_DEF_TYPE, should be the same
		188	dq 0x0000000006, 0x7F80000800
		189	dq 0x0080000006, 0x7FC0000800
		190	dq 0x00C0000006, 0x7FE0000800
		191	dq 0x00DC000000, 0x7FFC000800
		192	dq 0x00DBC00000, 0x7FFFC00800
		193	dq 0x0100000006, 0x7FE0000800
		194	dq 0x011F800000, 0x7FFF800800
		195	dq 0x011F400000, 0x7FFFC00800
		196	dq 0x011F200000, 0x7FFFE00800
		197	dq 0x00E0000001, 0x7FFF000800 ; added for [LFBAddress]
		198	IncludeIGlobals
		199	align 4
		200	mtrrdata:
		201	cpu_phys_addr_width db ?
		202	rb 3
		203	mtrrcap dq ?
		204	mtrr_def_type dq ?
		205	mtrr rq MAX_VARIABLE_MTRR*2
		206	mtrrdata_size = $ - mtrrdata
		207	IncludeUGlobals

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(root)/kernel/trunk/core/mtrrtest.asm @ 7136 – Rev 10051