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1120 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Jerome Glisse. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Dave Airlie |
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25 | * Alex Deucher |
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26 | * Jerome Glisse |
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27 | */ |
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1125 | serge | 28 | #include "drmP.h" |
1120 | serge | 29 | #include "radeon_drm.h" |
30 | #include "radeon.h" |
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31 | #include "radeon_reg.h" |
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32 | |||
33 | /* |
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34 | * Common GART table functions. |
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35 | */ |
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36 | int radeon_gart_table_ram_alloc(struct radeon_device *rdev) |
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37 | { |
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38 | void *ptr; |
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39 | |||
1246 | serge | 40 | ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, |
41 | &rdev->gart.table_addr); |
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1120 | serge | 42 | if (ptr == NULL) { |
43 | return -ENOMEM; |
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44 | } |
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45 | #ifdef CONFIG_X86 |
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46 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || |
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47 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { |
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48 | set_memory_uc((unsigned long)ptr, |
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49 | rdev->gart.table_size >> PAGE_SHIFT); |
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50 | } |
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51 | #endif |
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52 | rdev->gart.table.ram.ptr = ptr; |
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53 | memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size); |
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54 | return 0; |
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55 | } |
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56 | |||
57 | void radeon_gart_table_ram_free(struct radeon_device *rdev) |
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58 | { |
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59 | if (rdev->gart.table.ram.ptr == NULL) { |
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60 | return; |
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61 | } |
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62 | #ifdef CONFIG_X86 |
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63 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || |
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64 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { |
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65 | set_memory_wb((unsigned long)rdev->gart.table.ram.ptr, |
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66 | rdev->gart.table_size >> PAGE_SHIFT); |
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67 | } |
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68 | #endif |
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1128 | serge | 69 | // pci_free_consistent(rdev->pdev, rdev->gart.table_size, |
70 | // (void *)rdev->gart.table.ram.ptr, |
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71 | // rdev->gart.table_addr); |
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1120 | serge | 72 | rdev->gart.table.ram.ptr = NULL; |
73 | rdev->gart.table_addr = 0; |
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74 | } |
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75 | |||
76 | int radeon_gart_table_vram_alloc(struct radeon_device *rdev) |
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77 | { |
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78 | int r; |
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79 | |||
1179 | serge | 80 | ENTER(); |
1120 | serge | 81 | |
82 | if (rdev->gart.table.vram.robj == NULL) { |
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83 | r = radeon_object_create(rdev, NULL, |
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84 | rdev->gart.table_size, |
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85 | true, |
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86 | RADEON_GEM_DOMAIN_VRAM, |
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87 | false, &rdev->gart.table.vram.robj); |
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88 | if (r) { |
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89 | return r; |
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90 | } |
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91 | } |
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1179 | serge | 92 | return 0; |
93 | } |
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94 | |||
95 | int radeon_gart_table_vram_pin(struct radeon_device *rdev) |
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96 | { |
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97 | uint64_t gpu_addr; |
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98 | int r; |
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99 | |||
1120 | serge | 100 | r = radeon_object_pin(rdev->gart.table.vram.robj, |
101 | RADEON_GEM_DOMAIN_VRAM, &gpu_addr); |
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102 | if (r) { |
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103 | // radeon_object_unref(&rdev->gart.table.vram.robj); |
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104 | return r; |
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105 | } |
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106 | r = radeon_object_kmap(rdev->gart.table.vram.robj, |
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107 | (void **)&rdev->gart.table.vram.ptr); |
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108 | if (r) { |
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109 | // radeon_object_unpin(rdev->gart.table.vram.robj); |
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110 | // radeon_object_unref(&rdev->gart.table.vram.robj); |
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111 | DRM_ERROR("radeon: failed to map gart vram table.\n"); |
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112 | return r; |
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113 | } |
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114 | |||
115 | rdev->gart.table_addr = gpu_addr; |
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116 | |||
117 | dbgprintf("alloc gart vram: gpu_base %x lin_addr %x\n", |
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118 | rdev->gart.table_addr, rdev->gart.table.vram.ptr); |
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119 | |||
120 | // gpu_addr = 0x800000; |
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121 | |||
122 | // u32_t pci_addr = rdev->mc.aper_base + gpu_addr; |
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123 | |||
124 | // rdev->gart.table.vram.ptr = (void*)MapIoMem(pci_addr, rdev->gart.table_size, PG_SW); |
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125 | |||
126 | |||
127 | // dbgprintf("alloc gart vram:\n gpu_base %x pci_base %x lin_addr %x", |
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128 | // gpu_addr, pci_addr, rdev->gart.table.vram.ptr); |
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129 | |||
130 | return 0; |
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131 | } |
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132 | |||
133 | void radeon_gart_table_vram_free(struct radeon_device *rdev) |
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134 | { |
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135 | if (rdev->gart.table.vram.robj == NULL) { |
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136 | return; |
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137 | } |
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138 | // radeon_object_kunmap(rdev->gart.table.vram.robj); |
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139 | // radeon_object_unpin(rdev->gart.table.vram.robj); |
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140 | // radeon_object_unref(&rdev->gart.table.vram.robj); |
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141 | } |
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142 | |||
143 | |||
144 | |||
145 | |||
146 | /* |
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147 | * Common gart functions. |
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148 | */ |
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149 | void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, |
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150 | int pages) |
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151 | { |
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152 | unsigned t; |
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153 | unsigned p; |
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154 | int i, j; |
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155 | |||
156 | if (!rdev->gart.ready) { |
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157 | // WARN(1, "trying to unbind memory to unitialized GART !\n"); |
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158 | return; |
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159 | } |
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160 | t = offset / 4096; |
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161 | p = t / (PAGE_SIZE / 4096); |
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162 | for (i = 0; i < pages; i++, p++) { |
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163 | if (rdev->gart.pages[p]) { |
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164 | // pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], |
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165 | // PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
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166 | rdev->gart.pages[p] = NULL; |
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167 | rdev->gart.pages_addr[p] = 0; |
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168 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { |
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169 | radeon_gart_set_page(rdev, t, 0); |
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170 | } |
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171 | } |
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172 | } |
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173 | mb(); |
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174 | radeon_gart_tlb_flush(rdev); |
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175 | } |
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176 | |||
177 | int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, |
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178 | int pages, u32_t *pagelist) |
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179 | { |
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180 | unsigned t; |
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181 | unsigned p; |
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182 | uint64_t page_base; |
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183 | int i, j; |
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184 | |||
1179 | serge | 185 | ENTER(); |
186 | |||
1120 | serge | 187 | dbgprintf("offset %x pages %x list %x\n", |
188 | offset, pages, pagelist); |
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189 | |||
190 | if (!rdev->gart.ready) { |
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191 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); |
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192 | return -EINVAL; |
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193 | } |
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194 | t = offset / 4096; |
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195 | p = t / (PAGE_SIZE / 4096); |
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196 | |||
197 | for (i = 0; i < pages; i++, p++) { |
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198 | /* we need to support large memory configurations */ |
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199 | /* assume that unbind have already been call on the range */ |
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200 | |||
201 | rdev->gart.pages_addr[p] = pagelist[i] & ~4095; |
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202 | |||
203 | //if (pci_dma_mapping_error(rdev->pdev, rdev->gart.pages_addr[p])) { |
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204 | // /* FIXME: failed to map page (return -ENOMEM?) */ |
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205 | // radeon_gart_unbind(rdev, offset, pages); |
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206 | // return -ENOMEM; |
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207 | //} |
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208 | rdev->gart.pages[p] = pagelist[i]; |
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209 | page_base = (uint32_t)rdev->gart.pages_addr[p]; |
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210 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { |
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211 | radeon_gart_set_page(rdev, t, page_base); |
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212 | page_base += 4096; |
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213 | } |
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214 | } |
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215 | mb(); |
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216 | radeon_gart_tlb_flush(rdev); |
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217 | |||
1179 | serge | 218 | LEAVE(); |
1120 | serge | 219 | |
220 | return 0; |
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221 | } |
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222 | |||
223 | int radeon_gart_init(struct radeon_device *rdev) |
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224 | { |
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225 | |||
1179 | serge | 226 | ENTER(); |
1120 | serge | 227 | |
228 | if (rdev->gart.pages) { |
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229 | return 0; |
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230 | } |
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231 | /* We need PAGE_SIZE >= 4096 */ |
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232 | if (PAGE_SIZE < 4096) { |
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233 | DRM_ERROR("Page size is smaller than GPU page size!\n"); |
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234 | return -EINVAL; |
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235 | } |
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236 | /* Compute table size */ |
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237 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; |
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238 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096; |
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239 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", |
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240 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); |
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241 | /* Allocate pages table */ |
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242 | rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages, |
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243 | GFP_KERNEL); |
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244 | if (rdev->gart.pages == NULL) { |
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245 | // radeon_gart_fini(rdev); |
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246 | return -ENOMEM; |
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247 | } |
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248 | rdev->gart.pages_addr = kzalloc(sizeof(u32_t) * |
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249 | rdev->gart.num_cpu_pages, GFP_KERNEL); |
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250 | if (rdev->gart.pages_addr == NULL) { |
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251 | // radeon_gart_fini(rdev); |
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252 | return -ENOMEM; |
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253 | } |
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254 | return 0; |
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255 | } |
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256 | |||
257 | void radeon_gart_fini(struct radeon_device *rdev) |
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258 | { |
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259 | if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) { |
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260 | /* unbind pages */ |
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261 | radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages); |
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262 | } |
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263 | rdev->gart.ready = false; |
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264 | kfree(rdev->gart.pages); |
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265 | kfree(rdev->gart.pages_addr); |
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266 | rdev->gart.pages = NULL; |
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267 | rdev->gart.pages_addr = NULL; |
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268 | }>>>>> |