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1120 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Jerome Glisse. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Dave Airlie |
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25 | * Alex Deucher |
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26 | * Jerome Glisse |
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27 | */ |
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1125 | serge | 28 | #include "drmP.h" |
1120 | serge | 29 | #include "radeon_drm.h" |
30 | #include "radeon.h" |
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31 | #include "radeon_reg.h" |
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32 | |||
1631 | serge | 33 | |
34 | static inline void * |
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35 | pci_alloc_consistent(struct pci_dev *hwdev, size_t size, |
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36 | addr_t *dma_handle) |
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37 | { |
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38 | |||
39 | size = (size + 0x7FFF) & ~0x7FFF; |
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40 | |||
41 | *dma_handle = AllocPages(size >> 12); |
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42 | return (void*)MapIoMem(*dma_handle, size, PG_SW+PG_NOCACHE); |
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43 | } |
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44 | |||
1120 | serge | 45 | /* |
46 | * Common GART table functions. |
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47 | */ |
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48 | int radeon_gart_table_ram_alloc(struct radeon_device *rdev) |
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49 | { |
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50 | void *ptr; |
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51 | |||
1246 | serge | 52 | ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, |
53 | &rdev->gart.table_addr); |
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1120 | serge | 54 | if (ptr == NULL) { |
55 | return -ENOMEM; |
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56 | } |
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57 | #ifdef CONFIG_X86 |
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58 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || |
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59 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { |
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60 | set_memory_uc((unsigned long)ptr, |
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61 | rdev->gart.table_size >> PAGE_SHIFT); |
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62 | } |
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63 | #endif |
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64 | rdev->gart.table.ram.ptr = ptr; |
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65 | memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size); |
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66 | return 0; |
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67 | } |
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68 | |||
69 | void radeon_gart_table_ram_free(struct radeon_device *rdev) |
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70 | { |
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71 | if (rdev->gart.table.ram.ptr == NULL) { |
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72 | return; |
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73 | } |
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74 | #ifdef CONFIG_X86 |
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75 | if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || |
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76 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { |
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77 | set_memory_wb((unsigned long)rdev->gart.table.ram.ptr, |
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78 | rdev->gart.table_size >> PAGE_SHIFT); |
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79 | } |
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80 | #endif |
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1128 | serge | 81 | // pci_free_consistent(rdev->pdev, rdev->gart.table_size, |
82 | // (void *)rdev->gart.table.ram.ptr, |
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83 | // rdev->gart.table_addr); |
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1120 | serge | 84 | rdev->gart.table.ram.ptr = NULL; |
85 | rdev->gart.table_addr = 0; |
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86 | } |
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87 | |||
88 | int radeon_gart_table_vram_alloc(struct radeon_device *rdev) |
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89 | { |
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90 | int r; |
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91 | |||
92 | if (rdev->gart.table.vram.robj == NULL) { |
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1404 | serge | 93 | r = radeon_bo_create(rdev, NULL, rdev->gart.table_size, |
94 | true, RADEON_GEM_DOMAIN_VRAM, |
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95 | &rdev->gart.table.vram.robj); |
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1120 | serge | 96 | if (r) { |
97 | return r; |
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98 | } |
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99 | } |
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1179 | serge | 100 | return 0; |
101 | } |
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102 | |||
103 | int radeon_gart_table_vram_pin(struct radeon_device *rdev) |
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104 | { |
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105 | uint64_t gpu_addr; |
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106 | int r; |
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107 | |||
1404 | serge | 108 | r = radeon_bo_reserve(rdev->gart.table.vram.robj, false); |
109 | if (unlikely(r != 0)) |
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110 | return r; |
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111 | r = radeon_bo_pin(rdev->gart.table.vram.robj, |
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1120 | serge | 112 | RADEON_GEM_DOMAIN_VRAM, &gpu_addr); |
113 | if (r) { |
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1404 | serge | 114 | radeon_bo_unreserve(rdev->gart.table.vram.robj); |
1120 | serge | 115 | return r; |
116 | } |
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1404 | serge | 117 | r = radeon_bo_kmap(rdev->gart.table.vram.robj, |
1120 | serge | 118 | (void **)&rdev->gart.table.vram.ptr); |
1404 | serge | 119 | if (r) |
120 | radeon_bo_unpin(rdev->gart.table.vram.robj); |
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121 | radeon_bo_unreserve(rdev->gart.table.vram.robj); |
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122 | rdev->gart.table_addr = gpu_addr; |
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123 | return r; |
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1120 | serge | 124 | } |
125 | |||
126 | void radeon_gart_table_vram_free(struct radeon_device *rdev) |
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127 | { |
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1404 | serge | 128 | int r; |
129 | |||
1120 | serge | 130 | if (rdev->gart.table.vram.robj == NULL) { |
131 | return; |
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132 | } |
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1404 | serge | 133 | r = radeon_bo_reserve(rdev->gart.table.vram.robj, false); |
134 | if (likely(r == 0)) { |
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135 | radeon_bo_kunmap(rdev->gart.table.vram.robj); |
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136 | radeon_bo_unpin(rdev->gart.table.vram.robj); |
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137 | radeon_bo_unreserve(rdev->gart.table.vram.robj); |
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138 | } |
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139 | radeon_bo_unref(&rdev->gart.table.vram.robj); |
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1120 | serge | 140 | } |
141 | |||
142 | |||
143 | |||
144 | |||
145 | /* |
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146 | * Common gart functions. |
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147 | */ |
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148 | void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, |
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149 | int pages) |
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150 | { |
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151 | unsigned t; |
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152 | unsigned p; |
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153 | int i, j; |
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1430 | serge | 154 | u64 page_base; |
1120 | serge | 155 | |
156 | if (!rdev->gart.ready) { |
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1404 | serge | 157 | WARN(1, "trying to unbind memory to unitialized GART !\n"); |
1120 | serge | 158 | return; |
159 | } |
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1268 | serge | 160 | t = offset / RADEON_GPU_PAGE_SIZE; |
161 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
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1120 | serge | 162 | for (i = 0; i < pages; i++, p++) { |
163 | if (rdev->gart.pages[p]) { |
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164 | // pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], |
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165 | // PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
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166 | rdev->gart.pages[p] = NULL; |
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1430 | serge | 167 | rdev->gart.pages_addr[p] = rdev->dummy_page.addr; |
168 | page_base = rdev->gart.pages_addr[p]; |
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1268 | serge | 169 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
1430 | serge | 170 | radeon_gart_set_page(rdev, t, page_base); |
171 | page_base += RADEON_GPU_PAGE_SIZE; |
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1120 | serge | 172 | } |
173 | } |
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174 | } |
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175 | mb(); |
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176 | radeon_gart_tlb_flush(rdev); |
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177 | } |
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178 | |||
179 | int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, |
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180 | int pages, u32_t *pagelist) |
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181 | { |
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182 | unsigned t; |
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183 | unsigned p; |
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184 | uint64_t page_base; |
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185 | int i, j; |
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186 | |||
1179 | serge | 187 | ENTER(); |
188 | |||
1120 | serge | 189 | dbgprintf("offset %x pages %x list %x\n", |
190 | offset, pages, pagelist); |
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191 | |||
192 | if (!rdev->gart.ready) { |
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193 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); |
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194 | return -EINVAL; |
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195 | } |
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1268 | serge | 196 | t = offset / RADEON_GPU_PAGE_SIZE; |
197 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
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1120 | serge | 198 | |
199 | for (i = 0; i < pages; i++, p++) { |
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200 | /* we need to support large memory configurations */ |
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201 | /* assume that unbind have already been call on the range */ |
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202 | |||
203 | rdev->gart.pages_addr[p] = pagelist[i] & ~4095; |
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204 | |||
1430 | serge | 205 | |
1120 | serge | 206 | rdev->gart.pages[p] = pagelist[i]; |
1268 | serge | 207 | page_base = rdev->gart.pages_addr[p]; |
208 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
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1120 | serge | 209 | radeon_gart_set_page(rdev, t, page_base); |
1268 | serge | 210 | page_base += RADEON_GPU_PAGE_SIZE; |
1120 | serge | 211 | } |
212 | } |
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213 | mb(); |
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214 | radeon_gart_tlb_flush(rdev); |
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215 | return 0; |
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216 | } |
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217 | |||
1430 | serge | 218 | void radeon_gart_restore(struct radeon_device *rdev) |
219 | { |
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220 | int i, j, t; |
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221 | u64 page_base; |
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222 | |||
223 | for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) { |
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224 | page_base = rdev->gart.pages_addr[i]; |
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225 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
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226 | radeon_gart_set_page(rdev, t, page_base); |
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227 | page_base += RADEON_GPU_PAGE_SIZE; |
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228 | } |
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229 | } |
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230 | mb(); |
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231 | radeon_gart_tlb_flush(rdev); |
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232 | } |
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233 | |||
1120 | serge | 234 | int radeon_gart_init(struct radeon_device *rdev) |
235 | { |
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1430 | serge | 236 | int r, i; |
237 | |||
1120 | serge | 238 | if (rdev->gart.pages) { |
239 | return 0; |
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240 | } |
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1268 | serge | 241 | /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */ |
242 | if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) { |
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1120 | serge | 243 | DRM_ERROR("Page size is smaller than GPU page size!\n"); |
244 | return -EINVAL; |
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245 | } |
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1430 | serge | 246 | r = radeon_dummy_page_init(rdev); |
247 | if (r) |
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248 | return r; |
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1120 | serge | 249 | /* Compute table size */ |
250 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; |
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1268 | serge | 251 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE; |
1120 | serge | 252 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", |
253 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); |
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254 | /* Allocate pages table */ |
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255 | rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages, |
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256 | GFP_KERNEL); |
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257 | if (rdev->gart.pages == NULL) { |
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1404 | serge | 258 | radeon_gart_fini(rdev); |
1120 | serge | 259 | return -ENOMEM; |
260 | } |
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1404 | serge | 261 | rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) * |
1120 | serge | 262 | rdev->gart.num_cpu_pages, GFP_KERNEL); |
263 | if (rdev->gart.pages_addr == NULL) { |
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1404 | serge | 264 | radeon_gart_fini(rdev); |
1120 | serge | 265 | return -ENOMEM; |
266 | } |
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1430 | serge | 267 | /* set GART entry to point to the dummy page by default */ |
268 | for (i = 0; i < rdev->gart.num_cpu_pages; i++) { |
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269 | rdev->gart.pages_addr[i] = rdev->dummy_page.addr; |
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270 | } |
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1120 | serge | 271 | return 0; |
272 | } |
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273 | |||
274 | void radeon_gart_fini(struct radeon_device *rdev) |
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275 | { |
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276 | if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) { |
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277 | /* unbind pages */ |
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278 | radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages); |
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279 | } |
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280 | rdev->gart.ready = false; |
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281 | kfree(rdev->gart.pages); |
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282 | kfree(rdev->gart.pages_addr); |
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283 | rdev->gart.pages = NULL; |
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284 | rdev->gart.pages_addr = NULL; |
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285 | }>>>>>>>> |
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1631 | serge | 286 |