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Rev | Author | Line No. | Line |
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1403 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Christian König. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Christian König |
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25 | */ |
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3192 | Serge | 26 | #include |
1403 | serge | 27 | #include "radeon.h" |
28 | #include "radeon_reg.h" |
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2005 | serge | 29 | #include "radeon_asic.h" |
1403 | serge | 30 | #include "atom.h" |
31 | |||
2997 | Serge | 32 | /* |
33 | * check if enc_priv stores radeon_encoder_atom_dig |
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34 | */ |
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35 | static bool radeon_dig_encoder(struct drm_encoder *encoder) |
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36 | { |
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37 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
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38 | switch (radeon_encoder->encoder_id) { |
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39 | case ENCODER_OBJECT_ID_INTERNAL_LVDS: |
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40 | case ENCODER_OBJECT_ID_INTERNAL_TMDS1: |
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41 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: |
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42 | case ENCODER_OBJECT_ID_INTERNAL_LVTM1: |
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43 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
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44 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
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45 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
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46 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
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47 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
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48 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
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49 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
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50 | return true; |
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51 | } |
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52 | return false; |
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53 | } |
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1403 | serge | 54 | |
55 | /* |
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56 | * check if the chipset is supported |
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57 | */ |
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58 | static int r600_audio_chipset_supported(struct radeon_device *rdev) |
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59 | { |
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5078 | serge | 60 | return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); |
1403 | serge | 61 | } |
62 | |||
5078 | serge | 63 | struct r600_audio_pin r600_audio_status(struct radeon_device *rdev) |
1403 | serge | 64 | { |
5078 | serge | 65 | struct r600_audio_pin status; |
2997 | Serge | 66 | uint32_t value; |
1403 | serge | 67 | |
2997 | Serge | 68 | value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL); |
1403 | serge | 69 | |
2997 | Serge | 70 | /* number of channels */ |
71 | status.channels = (value & 0x7) + 1; |
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72 | |||
73 | /* bits per sample */ |
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74 | switch ((value & 0xF0) >> 4) { |
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75 | case 0x0: |
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76 | status.bits_per_sample = 8; |
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77 | break; |
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78 | case 0x1: |
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79 | status.bits_per_sample = 16; |
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80 | break; |
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81 | case 0x2: |
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82 | status.bits_per_sample = 20; |
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83 | break; |
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84 | case 0x3: |
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85 | status.bits_per_sample = 24; |
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86 | break; |
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87 | case 0x4: |
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88 | status.bits_per_sample = 32; |
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89 | break; |
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90 | default: |
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91 | dev_err(rdev->dev, "Unknown bits per sample 0x%x, using 16\n", |
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1963 | serge | 92 | (int)value); |
2997 | Serge | 93 | status.bits_per_sample = 16; |
94 | } |
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1403 | serge | 95 | |
2997 | Serge | 96 | /* current sampling rate in HZ */ |
1403 | serge | 97 | if (value & 0x4000) |
2997 | Serge | 98 | status.rate = 44100; |
1403 | serge | 99 | else |
2997 | Serge | 100 | status.rate = 48000; |
101 | status.rate *= ((value >> 11) & 0x7) + 1; |
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102 | status.rate /= ((value >> 8) & 0x7) + 1; |
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1403 | serge | 103 | |
2997 | Serge | 104 | value = RREG32(R600_AUDIO_STATUS_BITS); |
1403 | serge | 105 | |
2997 | Serge | 106 | /* iec 60958 status bits */ |
107 | status.status_bits = value & 0xff; |
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1403 | serge | 108 | |
2997 | Serge | 109 | /* iec 60958 category code */ |
110 | status.category_code = (value >> 8) & 0xff; |
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1403 | serge | 111 | |
2997 | Serge | 112 | return status; |
1403 | serge | 113 | } |
114 | |||
115 | /* |
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116 | * update all hdmi interfaces with current audio parameters |
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117 | */ |
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2997 | Serge | 118 | void r600_audio_update_hdmi(struct work_struct *work) |
1403 | serge | 119 | { |
2997 | Serge | 120 | struct radeon_device *rdev = container_of(work, struct radeon_device, |
121 | audio_work); |
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1403 | serge | 122 | struct drm_device *dev = rdev->ddev; |
5078 | serge | 123 | struct r600_audio_pin audio_status = r600_audio_status(rdev); |
1403 | serge | 124 | struct drm_encoder *encoder; |
2997 | Serge | 125 | bool changed = false; |
1403 | serge | 126 | |
5078 | serge | 127 | if (rdev->audio.pin[0].channels != audio_status.channels || |
128 | rdev->audio.pin[0].rate != audio_status.rate || |
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129 | rdev->audio.pin[0].bits_per_sample != audio_status.bits_per_sample || |
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130 | rdev->audio.pin[0].status_bits != audio_status.status_bits || |
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131 | rdev->audio.pin[0].category_code != audio_status.category_code) { |
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132 | rdev->audio.pin[0] = audio_status; |
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2997 | Serge | 133 | changed = true; |
1403 | serge | 134 | } |
135 | |||
136 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
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2997 | Serge | 137 | if (!radeon_dig_encoder(encoder)) |
138 | continue; |
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139 | if (changed || r600_hdmi_buffer_status_changed(encoder)) |
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1963 | serge | 140 | r600_hdmi_update_audio_settings(encoder); |
1403 | serge | 141 | } |
142 | } |
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143 | |||
5078 | serge | 144 | /* enable the audio stream */ |
145 | void r600_audio_enable(struct radeon_device *rdev, |
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146 | struct r600_audio_pin *pin, |
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147 | bool enable) |
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1430 | serge | 148 | { |
2997 | Serge | 149 | u32 value = 0; |
5078 | serge | 150 | |
151 | if (!pin) |
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152 | return; |
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153 | |||
2997 | Serge | 154 | if (ASIC_IS_DCE4(rdev)) { |
155 | if (enable) { |
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156 | value |= 0x81000000; /* Required to enable audio */ |
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157 | value |= 0x0e1000f0; /* fglrx sets that too */ |
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158 | } |
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159 | WREG32(EVERGREEN_AUDIO_ENABLE, value); |
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160 | } else { |
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161 | WREG32_P(R600_AUDIO_ENABLE, |
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162 | enable ? 0x81000000 : 0x0, ~0x81000000); |
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163 | } |
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1430 | serge | 164 | } |
165 | |||
166 | /* |
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2997 | Serge | 167 | * initialize the audio vars |
1403 | serge | 168 | */ |
169 | int r600_audio_init(struct radeon_device *rdev) |
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170 | { |
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1430 | serge | 171 | if (!radeon_audio || !r600_audio_chipset_supported(rdev)) |
1403 | serge | 172 | return 0; |
173 | |||
5078 | serge | 174 | rdev->audio.enabled = true; |
1403 | serge | 175 | |
5078 | serge | 176 | rdev->audio.num_pins = 1; |
177 | rdev->audio.pin[0].channels = -1; |
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178 | rdev->audio.pin[0].rate = -1; |
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179 | rdev->audio.pin[0].bits_per_sample = -1; |
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180 | rdev->audio.pin[0].status_bits = 0; |
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181 | rdev->audio.pin[0].category_code = 0; |
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182 | rdev->audio.pin[0].id = 0; |
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183 | /* disable audio. it will be set up later */ |
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184 | r600_audio_enable(rdev, &rdev->audio.pin[0], false); |
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1403 | serge | 185 | |
186 | return 0; |
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187 | } |
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188 | |||
189 | /* |
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190 | * release the audio timer |
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191 | * TODO: How to do this correctly on SMP systems? |
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192 | */ |
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193 | void r600_audio_fini(struct radeon_device *rdev) |
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194 | { |
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5078 | serge | 195 | if (!rdev->audio.enabled) |
1403 | serge | 196 | return; |
197 | |||
5078 | serge | 198 | r600_audio_enable(rdev, &rdev->audio.pin[0], false); |
199 | |||
200 | rdev->audio.enabled = false; |
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1403 | serge | 201 | } |
5078 | serge | 202 | |
203 | struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev) |
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204 | { |
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205 | /* only one pin on 6xx-NI */ |
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206 | return &rdev->audio.pin[0]; |
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207 | } |