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Rev | Author | Line No. | Line |
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3031 | serge | 1 | #include |
2 | #include |
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3 | #include |
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2338 | Serge | 4 | #include "i915_drv.h" |
3031 | serge | 5 | //#include "intel_drv.h" |
2338 | Serge | 6 | |
2325 | Serge | 7 | #include |
8 | #include |
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9 | #include |
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10 | #include |
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11 | #include |
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12 | #include |
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13 | |||
2342 | Serge | 14 | #include "bitmap.h" |
2340 | Serge | 15 | |
3255 | Serge | 16 | struct pci_device { |
17 | uint16_t domain; |
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18 | uint8_t bus; |
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19 | uint8_t dev; |
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20 | uint8_t func; |
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21 | uint16_t vendor_id; |
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22 | uint16_t device_id; |
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23 | uint16_t subvendor_id; |
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24 | uint16_t subdevice_id; |
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25 | uint32_t device_class; |
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26 | uint8_t revision; |
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27 | }; |
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28 | |||
4104 | Serge | 29 | struct drm_device *main_device; |
30 | struct drm_file *drm_file_handlers[256]; |
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3033 | serge | 31 | |
2344 | Serge | 32 | void cpu_detect(); |
33 | |||
2340 | Serge | 34 | void parse_cmdline(char *cmdline, char *log); |
2338 | Serge | 35 | int _stdcall display_handler(ioctl_t *io); |
2325 | Serge | 36 | int init_agp(void); |
37 | |||
3120 | serge | 38 | int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y, |
2351 | Serge | 39 | int src_x, int src_y, u32 w, u32 h); |
2340 | Serge | 40 | |
2351 | Serge | 41 | int blit_textured(u32 hbitmap, int dst_x, int dst_y, |
42 | int src_x, int src_y, u32 w, u32 h); |
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43 | |||
2361 | Serge | 44 | int blit_tex(u32 hbitmap, int dst_x, int dst_y, |
45 | int src_x, int src_y, u32 w, u32 h); |
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46 | |||
3255 | Serge | 47 | void get_pci_info(struct pci_device *dev); |
4246 | Serge | 48 | int i915_getparam(struct drm_device *dev, void *data, |
49 | struct drm_file *file_priv); |
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3255 | Serge | 50 | |
3277 | Serge | 51 | int i915_mask_update(struct drm_device *dev, void *data, |
52 | struct drm_file *file); |
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3255 | Serge | 53 | |
3277 | Serge | 54 | |
2325 | Serge | 55 | static char log[256]; |
56 | |||
3482 | Serge | 57 | struct workqueue_struct *system_wq; |
3764 | Serge | 58 | int driver_wq_state; |
3482 | Serge | 59 | |
2344 | Serge | 60 | int x86_clflush_size; |
3482 | Serge | 61 | unsigned int tsc_khz; |
2344 | Serge | 62 | |
2338 | Serge | 63 | int i915_modeset = 1; |
64 | |||
4126 | Serge | 65 | typedef union __attribute__((packed)) |
66 | { |
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67 | uint32_t val; |
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68 | struct |
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69 | { |
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70 | uint8_t state; |
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71 | uint8_t code; |
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72 | uint16_t ctrl_key; |
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73 | }; |
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74 | }oskey_t; |
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75 | |||
76 | static inline oskey_t get_key(void) |
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77 | { |
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78 | oskey_t val; |
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79 | asm volatile("int $0x40":"=a"(val):"a"(2)); |
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80 | return val; |
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81 | }; |
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82 | |||
83 | void i915_dpms(struct drm_device *dev, int mode); |
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84 | |||
85 | void i915_driver_thread() |
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86 | { |
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87 | struct drm_i915_private *dev_priv = main_device->dev_private; |
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88 | struct workqueue_struct *cwq = dev_priv->wq; |
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89 | static int dpms = 1; |
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90 | static int dpms_lock = 0; |
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91 | oskey_t key; |
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92 | unsigned long irqflags; |
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93 | int tmp; |
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94 | |||
95 | printf("%s\n",__FUNCTION__); |
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96 | |||
97 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
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98 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
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99 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
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100 | |||
101 | while(driver_wq_state != 0) |
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102 | { |
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103 | key = get_key(); |
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104 | |||
105 | if( (key.val != 1) && (key.state == 0x02)) |
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106 | { |
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107 | if(key.code == 0x46 && dpms_lock == 0) |
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108 | { |
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109 | dpms_lock = 1; |
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110 | if(dpms == 1) |
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111 | { |
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112 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
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113 | printf("dpms off\n"); |
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114 | } |
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115 | else |
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116 | { |
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117 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
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118 | printf("dpms on\n"); |
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119 | }; |
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120 | dpms ^= 1; |
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121 | } |
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122 | else if(key.code == 0xC6) |
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123 | dpms_lock = 0; |
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124 | }; |
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125 | |||
126 | spin_lock_irqsave(&cwq->lock, irqflags); |
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127 | |||
128 | while (!list_empty(&cwq->worklist)) |
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129 | { |
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130 | struct work_struct *work = list_entry(cwq->worklist.next, |
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131 | struct work_struct, entry); |
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132 | work_func_t f = work->func; |
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133 | list_del_init(cwq->worklist.next); |
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134 | |||
135 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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136 | f(work); |
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137 | spin_lock_irqsave(&cwq->lock, irqflags); |
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138 | } |
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139 | |||
140 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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141 | |||
142 | delay(1); |
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143 | }; |
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144 | |||
145 | asm volatile ("int $0x40"::"a"(-1)); |
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146 | } |
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147 | |||
3480 | Serge | 148 | u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
2325 | Serge | 149 | { |
4104 | Serge | 150 | int err = 0; |
2325 | Serge | 151 | |
152 | if(action != 1) |
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3764 | Serge | 153 | { |
154 | driver_wq_state = 0; |
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2325 | Serge | 155 | return 0; |
3764 | Serge | 156 | }; |
2325 | Serge | 157 | |
158 | if( GetService("DISPLAY") != 0 ) |
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159 | return 0; |
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160 | |||
2340 | Serge | 161 | if( cmdline && *cmdline ) |
162 | parse_cmdline(cmdline, log); |
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2325 | Serge | 163 | |
164 | if(!dbg_open(log)) |
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165 | { |
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4126 | Serge | 166 | strcpy(log, "/tmp1/1/i915.log"); |
2325 | Serge | 167 | |
168 | if(!dbg_open(log)) |
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169 | { |
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170 | printf("Can't open %s\nExit\n", log); |
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171 | return 0; |
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172 | }; |
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173 | } |
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4104 | Serge | 174 | dbgprintf(" i915 v3.12-6\n cmdline: %s\n", cmdline); |
2325 | Serge | 175 | |
2351 | Serge | 176 | cpu_detect(); |
3480 | Serge | 177 | // dbgprintf("\ncache line size %d\n", x86_clflush_size); |
2351 | Serge | 178 | |
2325 | Serge | 179 | enum_pci_devices(); |
180 | |||
181 | err = i915_init(); |
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2338 | Serge | 182 | if(err) |
183 | { |
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3298 | Serge | 184 | dbgprintf("Epic Fail :(\n"); |
185 | return 0; |
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2338 | Serge | 186 | }; |
4104 | Serge | 187 | init_display_kms(main_device); |
2325 | Serge | 188 | |
2338 | Serge | 189 | err = RegService("DISPLAY", display_handler); |
2325 | Serge | 190 | |
2338 | Serge | 191 | if( err != 0) |
192 | dbgprintf("Set DISPLAY handler\n"); |
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193 | |||
3764 | Serge | 194 | driver_wq_state = 1; |
4104 | Serge | 195 | |
4126 | Serge | 196 | CreateKernelThread(i915_driver_thread); |
3482 | Serge | 197 | |
2325 | Serge | 198 | return err; |
199 | }; |
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200 | |||
3480 | Serge | 201 | |
2344 | Serge | 202 | #define CURRENT_API 0x0200 /* 2.00 */ |
203 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
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2338 | Serge | 204 | |
2344 | Serge | 205 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
2351 | Serge | 206 | #define DISPLAY_VERSION API_VERSION |
2338 | Serge | 207 | |
208 | |||
2352 | Serge | 209 | #define SRV_GETVERSION 0 |
210 | #define SRV_ENUM_MODES 1 |
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211 | #define SRV_SET_MODE 2 |
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212 | #define SRV_GET_CAPS 3 |
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2342 | Serge | 213 | |
2352 | Serge | 214 | #define SRV_CREATE_SURFACE 10 |
215 | #define SRV_DESTROY_SURFACE 11 |
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216 | #define SRV_LOCK_SURFACE 12 |
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217 | #define SRV_UNLOCK_SURFACE 13 |
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3039 | serge | 218 | #define SRV_RESIZE_SURFACE 14 |
3120 | serge | 219 | #define SRV_BLIT_BITMAP 15 |
220 | #define SRV_BLIT_TEXTURE 16 |
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221 | #define SRV_BLIT_VIDEO 17 |
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2344 | Serge | 222 | |
3290 | Serge | 223 | |
3260 | Serge | 224 | #define SRV_GET_PCI_INFO 20 |
4246 | Serge | 225 | #define SRV_I915_GET_PARAM 21 |
4104 | Serge | 226 | #define SRV_I915_GEM_CREATE 22 |
227 | #define SRV_DRM_GEM_CLOSE 23 |
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4246 | Serge | 228 | #define SRV_DRM_GEM_FLINK 24 |
229 | #define SRV_DRM_GEM_OPEN 25 |
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230 | #define SRV_I915_GEM_PIN 26 |
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231 | #define SRV_I915_GEM_UNPIN 27 |
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232 | #define SRV_I915_GEM_SET_CACHING 28 |
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233 | #define SRV_I915_GEM_PWRITE 29 |
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234 | #define SRV_I915_GEM_BUSY 30 |
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235 | #define SRV_I915_GEM_SET_DOMAIN 31 |
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236 | #define SRV_I915_GEM_MMAP 32 |
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237 | #define SRV_I915_GEM_SET_TILING 33 |
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238 | #define SRV_I915_GEM_GET_TILING 34 |
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239 | #define SRV_I915_GEM_GET_APERTURE 35 |
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240 | #define SRV_I915_GEM_MMAP_GTT 36 |
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241 | #define SRV_I915_GEM_THROTTLE 37 |
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242 | #define SRV_I915_GEM_EXECBUFFER2 38 |
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243 | #define SRV_I915_GEM_WAIT 39 |
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244 | #define SRV_I915_GEM_CONTEXT_CREATE 40 |
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245 | #define SRV_I915_GEM_CONTEXT_DESTROY 41 |
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246 | #define SRV_I915_REG_READ 42 |
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3260 | Serge | 247 | |
4246 | Serge | 248 | #define SRV_FBINFO 43 |
249 | #define SRV_MASK_UPDATE 44 |
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3263 | Serge | 250 | |
251 | |||
2338 | Serge | 252 | #define check_input(size) \ |
253 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
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254 | break; |
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255 | |||
256 | #define check_output(size) \ |
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257 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
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258 | break; |
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259 | |||
260 | int _stdcall display_handler(ioctl_t *io) |
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261 | { |
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3255 | Serge | 262 | struct drm_file *file; |
263 | |||
2338 | Serge | 264 | int retval = -1; |
265 | u32_t *inp; |
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266 | u32_t *outp; |
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267 | |||
268 | inp = io->input; |
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269 | outp = io->output; |
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270 | |||
3255 | Serge | 271 | file = drm_file_handlers[0]; |
272 | |||
2338 | Serge | 273 | switch(io->io_code) |
274 | { |
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275 | case SRV_GETVERSION: |
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276 | check_output(4); |
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2344 | Serge | 277 | *outp = DISPLAY_VERSION; |
2338 | Serge | 278 | retval = 0; |
279 | break; |
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280 | |||
281 | case SRV_ENUM_MODES: |
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3031 | serge | 282 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
283 | // inp, io->inp_size, io->out_size ); |
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2340 | Serge | 284 | check_output(4); |
2338 | Serge | 285 | // check_input(*outp * sizeof(videomode_t)); |
286 | if( i915_modeset) |
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287 | retval = get_videomodes((videomode_t*)inp, outp); |
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288 | break; |
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289 | |||
290 | case SRV_SET_MODE: |
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3031 | serge | 291 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
292 | // inp, io->inp_size); |
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2338 | Serge | 293 | check_input(sizeof(videomode_t)); |
294 | if( i915_modeset ) |
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295 | retval = set_user_mode((videomode_t*)inp); |
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296 | break; |
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3033 | serge | 297 | |
2351 | Serge | 298 | case SRV_GET_CAPS: |
299 | retval = get_driver_caps((hwcaps_t*)inp); |
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300 | break; |
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301 | |||
2344 | Serge | 302 | case SRV_CREATE_SURFACE: |
303 | // check_input(8); |
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3243 | Serge | 304 | // retval = create_surface(main_device, (struct io_call_10*)inp); |
2338 | Serge | 305 | break; |
306 | |||
2352 | Serge | 307 | case SRV_LOCK_SURFACE: |
3243 | Serge | 308 | // retval = lock_surface((struct io_call_12*)inp); |
2352 | Serge | 309 | break; |
2342 | Serge | 310 | |
3039 | serge | 311 | case SRV_RESIZE_SURFACE: |
3243 | Serge | 312 | // retval = resize_surface((struct io_call_14*)inp); |
3039 | serge | 313 | break; |
314 | |||
3255 | Serge | 315 | case SRV_BLIT_BITMAP: |
3243 | Serge | 316 | // srv_blit_bitmap( inp[0], inp[1], inp[2], |
317 | // inp[3], inp[4], inp[5], inp[6]); |
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3033 | serge | 318 | |
319 | // blit_tex( inp[0], inp[1], inp[2], |
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2351 | Serge | 320 | // inp[3], inp[4], inp[5], inp[6]); |
321 | |||
3255 | Serge | 322 | break; |
2338 | Serge | 323 | |
3260 | Serge | 324 | case SRV_GET_PCI_INFO: |
3255 | Serge | 325 | get_pci_info((struct pci_device *)inp); |
2338 | Serge | 326 | retval = 0; |
327 | break; |
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3031 | serge | 328 | |
4246 | Serge | 329 | case SRV_I915_GET_PARAM: |
330 | retval = i915_getparam(main_device, inp, file); |
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3255 | Serge | 331 | break; |
332 | |||
333 | case SRV_I915_GEM_CREATE: |
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334 | retval = i915_gem_create_ioctl(main_device, inp, file); |
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335 | break; |
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336 | |||
337 | case SRV_DRM_GEM_CLOSE: |
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338 | retval = drm_gem_close_ioctl(main_device, inp, file); |
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339 | break; |
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340 | |||
4246 | Serge | 341 | case SRV_DRM_GEM_FLINK: |
342 | retval = drm_gem_flink_ioctl(main_device, inp, file); |
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343 | break; |
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344 | |||
345 | case SRV_DRM_GEM_OPEN: |
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346 | retval = drm_gem_open_ioctl(main_device, inp, file); |
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347 | break; |
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348 | |||
3255 | Serge | 349 | case SRV_I915_GEM_PIN: |
350 | retval = i915_gem_pin_ioctl(main_device, inp, file); |
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351 | break; |
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3260 | Serge | 352 | |
4246 | Serge | 353 | case SRV_I915_GEM_UNPIN: |
354 | retval = i915_gem_unpin_ioctl(main_device, inp, file); |
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3260 | Serge | 355 | break; |
356 | |||
4246 | Serge | 357 | case SRV_I915_GEM_SET_CACHING: |
358 | retval = i915_gem_set_caching_ioctl(main_device, inp, file); |
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3260 | Serge | 359 | break; |
360 | |||
361 | case SRV_I915_GEM_PWRITE: |
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362 | retval = i915_gem_pwrite_ioctl(main_device, inp, file); |
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363 | break; |
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364 | |||
365 | case SRV_I915_GEM_BUSY: |
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366 | retval = i915_gem_busy_ioctl(main_device, inp, file); |
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367 | break; |
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368 | |||
369 | case SRV_I915_GEM_SET_DOMAIN: |
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370 | retval = i915_gem_set_domain_ioctl(main_device, inp, file); |
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371 | break; |
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372 | |||
3263 | Serge | 373 | case SRV_I915_GEM_MMAP: |
374 | retval = i915_gem_mmap_ioctl(main_device, inp, file); |
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375 | break; |
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376 | |||
4246 | Serge | 377 | case SRV_I915_GEM_SET_TILING: |
378 | retval = i915_gem_set_tiling(main_device, inp, file); |
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379 | break; |
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380 | |||
381 | case SRV_I915_GEM_GET_TILING: |
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382 | retval = i915_gem_get_tiling(main_device, inp, file); |
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383 | break; |
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384 | |||
385 | case SRV_I915_GEM_GET_APERTURE: |
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386 | // printf("SRV_I915_GEM_GET_APERTURE "); |
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387 | retval = i915_gem_get_aperture_ioctl(main_device, inp, file); |
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388 | // printf(" retval=%d\n", retval); |
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389 | break; |
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390 | |||
3480 | Serge | 391 | case SRV_I915_GEM_MMAP_GTT: |
392 | retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file); |
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393 | break; |
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394 | |||
4246 | Serge | 395 | case SRV_I915_GEM_THROTTLE: |
396 | retval = i915_gem_throttle_ioctl(main_device, inp, file); |
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3263 | Serge | 397 | break; |
398 | |||
399 | case SRV_I915_GEM_EXECBUFFER2: |
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4246 | Serge | 400 | // printf("SRV_I915_GEM_EXECBUFFER2\n"); |
3263 | Serge | 401 | retval = i915_gem_execbuffer2(main_device, inp, file); |
402 | break; |
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403 | |||
4246 | Serge | 404 | case SRV_I915_GEM_WAIT: |
405 | retval = i915_gem_wait_ioctl(main_device, inp, file); |
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406 | break; |
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407 | |||
408 | case SRV_I915_GEM_CONTEXT_CREATE: |
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409 | retval = i915_gem_context_create_ioctl(main_device, inp, file); |
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410 | break; |
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411 | |||
412 | case SRV_I915_GEM_CONTEXT_DESTROY: |
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413 | retval = i915_gem_context_destroy_ioctl(main_device, inp, file); |
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414 | break; |
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415 | |||
416 | case SRV_I915_REG_READ: |
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417 | retval = i915_reg_read_ioctl(main_device, inp, file); |
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418 | break; |
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419 | |||
420 | case SRV_FBINFO: |
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421 | retval = i915_fbinfo(inp); |
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422 | break; |
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423 | |||
3290 | Serge | 424 | case SRV_MASK_UPDATE: |
425 | retval = i915_mask_update(main_device, inp, file); |
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426 | break; |
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2338 | Serge | 427 | }; |
428 | |||
429 | return retval; |
||
430 | } |
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431 | |||
432 | |||
2325 | Serge | 433 | #define PCI_CLASS_REVISION 0x08 |
434 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
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435 | #define PCI_CLASS_BRIDGE_HOST 0x0600 |
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2326 | Serge | 436 | #define PCI_CLASS_BRIDGE_ISA 0x0601 |
2325 | Serge | 437 | |
438 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
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439 | { |
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440 | u16_t vendor, device; |
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441 | u32_t class; |
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442 | int ret = 0; |
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443 | |||
444 | vendor = id & 0xffff; |
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445 | device = (id >> 16) & 0xffff; |
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446 | |||
447 | if(vendor == 0x8086) |
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448 | { |
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449 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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450 | class >>= 16; |
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451 | |||
452 | if( (class == PCI_CLASS_DISPLAY_VGA) || |
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2326 | Serge | 453 | (class == PCI_CLASS_BRIDGE_HOST) || |
454 | (class == PCI_CLASS_BRIDGE_ISA)) |
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2325 | Serge | 455 | ret = 1; |
456 | } |
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457 | return ret; |
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458 | }; |
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2340 | Serge | 459 | |
460 | |||
461 | static char* parse_path(char *p, char *log) |
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462 | { |
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463 | char c; |
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464 | |||
465 | while( (c = *p++) == ' '); |
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466 | p--; |
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467 | while( (c = *log++ = *p++) && (c != ' ')); |
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468 | *log = 0; |
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469 | |||
470 | return p; |
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471 | }; |
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472 | |||
473 | void parse_cmdline(char *cmdline, char *log) |
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474 | { |
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475 | char *p = cmdline; |
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476 | |||
477 | char c = *p++; |
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478 | |||
479 | while( c ) |
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480 | { |
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481 | if( c == '-') |
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482 | { |
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483 | switch(*p++) |
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484 | { |
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485 | case 'l': |
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486 | p = parse_path(p, log); |
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487 | break; |
||
488 | }; |
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489 | }; |
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490 | c = *p++; |
||
491 | }; |
||
492 | }; |
||
493 | |||
2351 | Serge | 494 | |
2344 | Serge | 495 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, |
2351 | Serge | 496 | unsigned int *ecx, unsigned int *edx) |
2344 | Serge | 497 | { |
498 | /* ecx is often an input as well as an output. */ |
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2351 | Serge | 499 | asm volatile("cpuid" |
2344 | Serge | 500 | : "=a" (*eax), |
501 | "=b" (*ebx), |
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502 | "=c" (*ecx), |
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503 | "=d" (*edx) |
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2351 | Serge | 504 | : "0" (*eax), "2" (*ecx) |
505 | : "memory"); |
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2344 | Serge | 506 | } |
507 | |||
2351 | Serge | 508 | |
509 | |||
2344 | Serge | 510 | static inline void cpuid(unsigned int op, |
511 | unsigned int *eax, unsigned int *ebx, |
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512 | unsigned int *ecx, unsigned int *edx) |
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513 | { |
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514 | *eax = op; |
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515 | *ecx = 0; |
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516 | __cpuid(eax, ebx, ecx, edx); |
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517 | } |
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518 | |||
519 | void cpu_detect() |
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520 | { |
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521 | u32 junk, tfms, cap0, misc; |
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522 | |||
523 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
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524 | |||
525 | if (cap0 & (1<<19)) |
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526 | { |
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527 | x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
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528 | } |
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3482 | Serge | 529 | |
530 | tsc_khz = (unsigned int)(GetCpuFreq()/1000); |
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2344 | Serge | 531 | } |
532 | |||
3243 | Serge | 533 | |
534 | int get_driver_caps(hwcaps_t *caps) |
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535 | { |
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536 | int ret = 0; |
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537 | |||
538 | switch(caps->idx) |
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539 | { |
||
540 | case 0: |
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541 | caps->opt[0] = 0; |
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542 | caps->opt[1] = 0; |
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543 | break; |
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544 | |||
545 | case 1: |
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546 | caps->cap1.max_tex_width = 4096; |
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547 | caps->cap1.max_tex_height = 4096; |
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548 | break; |
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549 | default: |
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550 | ret = 1; |
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551 | }; |
||
552 | caps->idx = 1; |
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553 | return ret; |
||
554 | } |
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555 | |||
3255 | Serge | 556 | |
557 | void get_pci_info(struct pci_device *dev) |
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558 | { |
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559 | struct pci_dev *pdev = main_device->pdev; |
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560 | |||
561 | memset(dev, sizeof(*dev), 0); |
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562 | |||
563 | dev->domain = 0; |
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564 | dev->bus = pdev->busnr; |
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565 | dev->dev = pdev->devfn >> 3; |
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566 | dev->func = pdev->devfn & 7; |
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567 | dev->vendor_id = pdev->vendor; |
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568 | dev->device_id = pdev->device; |
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569 | dev->revision = pdev->revision; |
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570 | };19)) |
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4246 | Serge | 571 | |
572 | |||
573 |