Rev 2351 | Rev 2360 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
2340 | Serge | 1 | |
2 | |||
3 | |||
2338 | Serge | 4 | #include "drm.h" |
5 | #include "i915_drm.h" |
||
6 | #include "i915_drv.h" |
||
7 | #include "intel_drv.h" |
||
8 | |||
9 | |||
10 | #include |
||
11 | #include |
||
12 | #include |
||
13 | #include |
||
14 | |||
15 | |||
16 | |||
17 | |||
2340 | Serge | 18 | |
2338 | Serge | 19 | |
2351 | Serge | 20 | |
2338 | Serge | 21 | |
2351 | Serge | 22 | |
2338 | Serge | 23 | { |
24 | kobj_t header; |
||
25 | |||
26 | |||
27 | uint32_t hot_x; |
||
28 | uint32_t hot_y; |
||
29 | |||
30 | |||
31 | struct drm_i915_gem_object *cobj; |
||
32 | }cursor_t; |
||
33 | |||
34 | |||
35 | #define CURSOR_HEIGHT 64 |
||
36 | |||
37 | |||
38 | |||
39 | { |
||
40 | int x; |
||
41 | int y; |
||
42 | int width; |
||
43 | int height; |
||
44 | int bpp; |
||
45 | int vrefresh; |
||
46 | int pitch; |
||
47 | int lfb; |
||
48 | |||
49 | |||
50 | struct drm_device *ddev; |
||
51 | struct drm_connector *connector; |
||
52 | struct drm_crtc *crtc; |
||
53 | |||
54 | |||
55 | |||
56 | |||
57 | int (*init_cursor)(cursor_t*); |
||
58 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
||
59 | void (*show_cursor)(int show); |
||
60 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
||
61 | void (__stdcall *restore_cursor)(int x, int y); |
||
62 | void (*disable_mouse)(void); |
||
63 | }; |
||
64 | |||
65 | |||
66 | |||
67 | |||
68 | |||
2340 | Serge | 69 | u32_t cmd_offset; |
70 | |||
71 | |||
2351 | Serge | 72 | int sna_init(); |
73 | |||
74 | |||
2338 | Serge | 75 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
76 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
||
77 | |||
78 | |||
79 | {}; |
||
80 | |||
81 | |||
82 | {}; |
||
83 | |||
84 | |||
85 | { |
||
86 | struct drm_display_mode *mode; |
||
87 | int count = 0; |
||
88 | |||
89 | |||
90 | { |
||
91 | count++; |
||
92 | }; |
||
93 | return count; |
||
94 | }; |
||
95 | |||
96 | |||
97 | { |
||
98 | struct drm_connector *connector; |
||
99 | struct drm_connector_helper_funcs *connector_funcs; |
||
100 | struct drm_encoder *encoder; |
||
101 | struct drm_crtc *crtc = NULL; |
||
102 | struct drm_framebuffer *fb; |
||
103 | |||
104 | |||
105 | u32_t ifl; |
||
106 | |||
107 | |||
108 | |||
109 | |||
110 | { |
||
111 | if( connector->status != connector_status_connected) |
||
112 | continue; |
||
113 | |||
114 | |||
115 | encoder = connector_funcs->best_encoder(connector); |
||
116 | if( encoder == NULL) |
||
117 | { |
||
118 | dbgprintf("CONNECTOR %x ID: %d no active encoders\n", |
||
119 | connector, connector->base.id); |
||
120 | continue; |
||
121 | } |
||
122 | connector->encoder = encoder; |
||
123 | |||
124 | |||
125 | connector, connector->base.id, |
||
126 | connector->status, connector->encoder, |
||
127 | encoder->crtc); |
||
128 | |||
129 | |||
130 | break; |
||
131 | }; |
||
132 | |||
133 | |||
134 | { |
||
135 | dbgprintf("No active connectors!\n"); |
||
136 | return -1; |
||
137 | }; |
||
138 | |||
139 | |||
140 | { |
||
141 | struct drm_crtc *tmp_crtc; |
||
142 | int crtc_mask = 1; |
||
143 | |||
144 | |||
145 | { |
||
146 | if (encoder->possible_crtcs & crtc_mask) |
||
147 | { |
||
148 | crtc = tmp_crtc; |
||
149 | encoder->crtc = crtc; |
||
150 | break; |
||
151 | }; |
||
152 | crtc_mask <<= 1; |
||
153 | }; |
||
154 | }; |
||
155 | |||
156 | |||
157 | { |
||
158 | dbgprintf("No CRTC for encoder %d\n", encoder->base.id); |
||
159 | return -1; |
||
160 | }; |
||
161 | |||
162 | |||
163 | |||
164 | |||
165 | |||
166 | |||
167 | |||
168 | os_display->connector = connector; |
||
169 | os_display->crtc = crtc; |
||
170 | |||
171 | |||
172 | |||
173 | |||
174 | |||
175 | { |
||
176 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
177 | |||
178 | |||
179 | { |
||
180 | init_cursor(cursor); |
||
181 | }; |
||
182 | |||
183 | |||
184 | os_display->init_cursor = init_cursor; |
||
185 | os_display->select_cursor = select_cursor_kms; |
||
186 | os_display->show_cursor = NULL; |
||
187 | os_display->move_cursor = move_cursor_kms; |
||
188 | os_display->restore_cursor = restore_cursor; |
||
189 | os_display->disable_mouse = disable_mouse; |
||
190 | |||
191 | |||
192 | intel_crtc->cursor_y = os_display->height/2; |
||
193 | |||
194 | |||
195 | }; |
||
196 | safe_sti(ifl); |
||
197 | |||
198 | |||
2340 | Serge | 199 | #define BLT_WRITE_ALPHA (1<<21) |
200 | #define BLT_WRITE_RGB (1<<20) |
||
201 | |||
2338 | Serge | 202 | |
2342 | Serge | 203 | { |
204 | |||
205 | |||
2340 | Serge | 206 | struct drm_i915_gem_object *obj; |
207 | struct intel_ring_buffer *ring; |
||
208 | |||
209 | |||
210 | i915_gem_object_pin(obj, 4096, true); |
||
211 | |||
212 | |||
2352 | Serge | 213 | cmd_offset = obj->gtt_offset; |
2340 | Serge | 214 | }; |
2342 | Serge | 215 | #endif |
216 | |||
2340 | Serge | 217 | |
2351 | Serge | 218 | |
219 | |||
2342 | Serge | 220 | |
2340 | Serge | 221 | |
2342 | Serge | 222 | if( !err ) |
223 | { |
||
224 | printf("Initialize bitmap manager\n"); |
||
225 | }; |
||
2340 | Serge | 226 | |
227 | |||
2351 | Serge | 228 | |
229 | |||
2338 | Serge | 230 | |
231 | |||
232 | }; |
||
233 | |||
234 | |||
235 | |||
236 | videomode_t *reqmode, bool strict) |
||
237 | { |
||
238 | struct drm_display_mode *mode = NULL, *tmpmode; |
||
239 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
240 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
||
241 | |||
242 | |||
243 | |||
244 | |||
245 | |||
246 | |||
247 | reqmode->width, reqmode->height, reqmode->freq); |
||
248 | |||
249 | |||
250 | { |
||
251 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
252 | (drm_mode_height(tmpmode) == reqmode->height) && |
||
253 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
||
254 | { |
||
255 | mode = tmpmode; |
||
256 | goto do_set; |
||
257 | } |
||
258 | }; |
||
259 | |||
260 | |||
261 | { |
||
262 | list_for_each_entry(tmpmode, &connector->modes, head) |
||
263 | { |
||
264 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
265 | (drm_mode_height(tmpmode) == reqmode->height) ) |
||
266 | { |
||
267 | mode = tmpmode; |
||
268 | goto do_set; |
||
269 | } |
||
270 | }; |
||
271 | }; |
||
272 | |||
273 | |||
274 | |||
275 | |||
276 | { |
||
277 | struct drm_framebuffer *fb; |
||
278 | struct drm_encoder *encoder; |
||
279 | struct drm_crtc *crtc; |
||
280 | |||
281 | |||
282 | char *enc_name; |
||
283 | |||
284 | |||
285 | crtc = encoder->crtc; |
||
286 | |||
287 | |||
288 | enc_name = drm_get_encoder_name(encoder); |
||
289 | |||
290 | |||
291 | reqmode->width, reqmode->height, con_name, enc_name); |
||
292 | |||
293 | |||
294 | |||
295 | |||
296 | fb->height = reqmode->height; |
||
297 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
||
2342 | Serge | 298 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
299 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
||
300 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
||
301 | |||
302 | |||
2338 | Serge | 303 | fb->depth == 24; |
304 | |||
305 | |||
306 | crtc->enabled = true; |
||
307 | os_display->crtc = crtc; |
||
308 | |||
309 | |||
310 | |||
311 | |||
312 | // radeon_show_cursor_kms(crtc); |
||
313 | |||
314 | |||
315 | { |
||
316 | os_display->width = fb->width; |
||
317 | os_display->height = fb->height; |
||
318 | os_display->pitch = fb->pitches[0]; |
||
2342 | Serge | 319 | os_display->vrefresh = drm_mode_vrefresh(mode); |
2338 | Serge | 320 | |
321 | |||
2342 | Serge | 322 | |
2338 | Serge | 323 | |
324 | fb->width, fb->height, fb->pitches[0]); |
||
2342 | Serge | 325 | } |
2338 | Serge | 326 | else |
327 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
||
328 | fb->width, fb->height, crtc); |
||
329 | } |
||
330 | |||
331 | |||
332 | return ret; |
||
333 | }; |
||
334 | |||
335 | |||
336 | |||
337 | |||
338 | { |
||
339 | int err = -1; |
||
340 | |||
341 | |||
342 | |||
343 | |||
344 | |||
345 | |||
346 | { |
||
347 | *count = os_display->supported_modes; |
||
348 | err = 0; |
||
349 | } |
||
350 | else if( mode != NULL ) |
||
351 | { |
||
352 | struct drm_display_mode *drmmode; |
||
353 | int i = 0; |
||
354 | |||
355 | |||
356 | *count = os_display->supported_modes; |
||
357 | |||
358 | |||
359 | { |
||
360 | if( i < *count) |
||
361 | { |
||
362 | mode->width = drm_mode_width(drmmode); |
||
363 | mode->height = drm_mode_height(drmmode); |
||
364 | mode->bpp = 32; |
||
365 | mode->freq = drm_mode_vrefresh(drmmode); |
||
366 | i++; |
||
367 | mode++; |
||
368 | } |
||
369 | else break; |
||
370 | }; |
||
371 | *count = i; |
||
372 | err = 0; |
||
373 | }; |
||
374 | LEAVE(); |
||
375 | return err; |
||
376 | }; |
||
377 | |||
378 | |||
379 | { |
||
380 | int err = -1; |
||
381 | |||
382 | |||
383 | |||
384 | |||
385 | mode->width, mode->height, mode->freq); |
||
386 | |||
387 | |||
388 | (mode->height != 0) && |
||
389 | (mode->freq != 0 ) && |
||
390 | ( (mode->width != os_display->width) || |
||
391 | (mode->height != os_display->height) || |
||
392 | (mode->freq != os_display->vrefresh) ) ) |
||
393 | { |
||
394 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
||
395 | err = 0; |
||
396 | }; |
||
397 | |||
398 | |||
399 | return err; |
||
400 | }; |
||
401 | |||
402 | |||
403 | { |
||
404 | /* FIXME synchronization */ |
||
2342 | Serge | 405 | |
406 | |||
2338 | Serge | 407 | // radeon_bo_unpin(cursor->robj); |
408 | // KernelFree(cursor->data); |
||
409 | __DestroyObject(cursor); |
||
410 | }; |
||
411 | |||
412 | |||
413 | { |
||
414 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
415 | struct drm_i915_gem_object *obj; |
||
416 | uint32_t *bits; |
||
417 | uint32_t *src; |
||
418 | |||
419 | |||
420 | int ret; |
||
421 | |||
422 | |||
423 | |||
424 | |||
425 | { |
||
426 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
||
427 | if (unlikely(bits == NULL)) |
||
428 | return ENOMEM; |
||
429 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
||
430 | } |
||
431 | else |
||
432 | { |
||
433 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
||
434 | if (unlikely(obj == NULL)) |
||
435 | return -ENOMEM; |
||
436 | |||
437 | |||
438 | if (ret) { |
||
439 | drm_gem_object_unreference(&obj->base); |
||
2344 | Serge | 440 | return ret; |
2338 | Serge | 441 | } |
442 | |||
443 | |||
444 | * GTT space is continuous. I guarantee it. */ |
||
445 | |||
446 | |||
447 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
||
448 | |||
449 | |||
450 | { |
||
451 | i915_gem_object_unpin(obj); |
||
2344 | Serge | 452 | drm_gem_object_unreference(&obj->base); |
453 | return -ENOMEM; |
||
2338 | Serge | 454 | }; |
455 | cursor->cobj = obj; |
||
456 | }; |
||
457 | |||
458 | |||
459 | |||
460 | |||
461 | { |
||
462 | for(j = 0; j < 32; j++) |
||
463 | *bits++ = *src++; |
||
464 | for(j = 32; j < CURSOR_WIDTH; j++) |
||
465 | *bits++ = 0; |
||
466 | } |
||
467 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
||
468 | *bits++ = 0; |
||
469 | |||
470 | |||
471 | |||
472 | |||
2340 | Serge | 473 | |
2338 | Serge | 474 | |
475 | |||
476 | |||
477 | LEAVE(); |
||
478 | |||
479 | |||
480 | } |
||
481 | |||
482 | |||
483 | |||
484 | { |
||
485 | struct drm_device *dev = crtc->dev; |
||
486 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
487 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
||
488 | int pipe = intel_crtc->pipe; |
||
489 | bool visible = base != 0; |
||
490 | |||
491 | |||
492 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
||
493 | if (base) { |
||
494 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
||
495 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
||
496 | cntl |= pipe << 28; /* Connect to correct pipe */ |
||
497 | } else { |
||
498 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
||
499 | cntl |= CURSOR_MODE_DISABLE; |
||
500 | } |
||
501 | I915_WRITE(CURCNTR(pipe), cntl); |
||
502 | |||
503 | |||
504 | } |
||
505 | /* and commit changes on next vblank */ |
||
506 | I915_WRITE(CURBASE(pipe), base); |
||
507 | } |
||
508 | |||
509 | |||
510 | { |
||
511 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
512 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
513 | u32 base, pos; |
||
514 | bool visible; |
||
515 | |||
516 | |||
517 | |||
518 | |||
519 | intel_crtc->cursor_y = y; |
||
520 | |||
521 | |||
522 | y = y - cursor->hot_y; |
||
523 | |||
524 | |||
525 | |||
526 | |||
527 | |||
528 | if (x >= os_display->width) |
||
529 | base = 0; |
||
530 | |||
531 | |||
532 | base = 0; |
||
533 | |||
534 | |||
535 | { |
||
536 | if (x + intel_crtc->cursor_width < 0) |
||
537 | base = 0; |
||
538 | |||
539 | |||
540 | x = -x; |
||
541 | } |
||
542 | pos |= x << CURSOR_X_SHIFT; |
||
543 | |||
544 | |||
545 | { |
||
546 | if (y + intel_crtc->cursor_height < 0) |
||
547 | base = 0; |
||
548 | |||
549 | |||
550 | y = -y; |
||
551 | } |
||
552 | pos |= y << CURSOR_Y_SHIFT; |
||
553 | |||
554 | |||
555 | if (!visible && !intel_crtc->cursor_visible) |
||
556 | return; |
||
557 | |||
558 | |||
559 | // if (IS_845G(dev) || IS_I865G(dev)) |
||
560 | // i845_update_cursor(crtc, base); |
||
561 | // else |
||
562 | i9xx_update_cursor(os_display->crtc, base); |
||
563 | |||
564 | |||
565 | |||
566 | |||
567 | |||
568 | { |
||
569 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
570 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
571 | cursor_t *old; |
||
572 | |||
573 | |||
574 | os_display->cursor = cursor; |
||
575 | |||
576 | |||
577 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
||
578 | else |
||
579 | intel_crtc->cursor_addr = (addr_t)cursor->cobj; |
||
2352 | Serge | 580 | |
2338 | Serge | 581 | |
582 | intel_crtc->cursor_height = 32; |
||
583 | |||
584 | |||
585 | return old; |
||
586 | }; |
||
587 | |||
588 | |||
2340 | Serge | 589 | |
590 | |||
591 | |||
2342 | Serge | 592 | |
593 | { |
||
2338 | Serge | 594 | int left; |
2342 | Serge | 595 | int top; |
596 | int right; |
||
597 | int bottom; |
||
598 | }rect_t; |
||
599 | |||
2338 | Serge | 600 | |
2342 | Serge | 601 | |
602 | |||
603 | |||
604 | |||
605 | |||
606 | |||
607 | |||
608 | { |
||
609 | u32_t addr; |
||
610 | |||
611 | |||
612 | addr+= sizeof(display_t); /* shoot me */ |
||
613 | return *(u32_t*)addr; |
||
614 | } |
||
615 | |||
616 | |||
617 | #define ROP_COPY_SRC 0xCC |
||
618 | #define FORMAT8888 3 |
||
619 | |||
620 | |||
621 | |||
622 | |||
623 | |||
624 | int src_x, int src_y, u32 w, u32 h) |
||
625 | { |
||
626 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
2340 | Serge | 627 | struct intel_ring_buffer *ring; |
628 | |||
2338 | Serge | 629 | |
2342 | Serge | 630 | rect_t winrc; |
631 | clip_t dst_clip; |
||
632 | clip_t src_clip; |
||
633 | u32_t width; |
||
634 | u32_t height; |
||
635 | |||
2338 | Serge | 636 | |
2342 | Serge | 637 | u32_t offset; |
638 | u8 slot; |
||
639 | int n=0; |
||
2340 | Serge | 640 | |
2338 | Serge | 641 | |
2342 | Serge | 642 | return -1; |
643 | |||
2338 | Serge | 644 | |
2342 | Serge | 645 | |
2338 | Serge | 646 | |
2342 | Serge | 647 | return -1; |
648 | |||
2338 | Serge | 649 | |
650 | |||
2342 | Serge | 651 | |
2338 | Serge | 652 | |
2342 | Serge | 653 | dst_clip.ymin = 0; |
654 | dst_clip.xmax = winrc.right-winrc.left-1; |
||
655 | dst_clip.ymax = winrc.bottom -winrc.top -1; |
||
656 | |||
2338 | Serge | 657 | |
2342 | Serge | 658 | src_clip.ymin = 0; |
659 | src_clip.xmax = bitmap->width - 1; |
||
660 | src_clip.ymax = bitmap->height - 1; |
||
661 | |||
2338 | Serge | 662 | |
2342 | Serge | 663 | height = h; |
664 | |||
2338 | Serge | 665 | |
2342 | Serge | 666 | &src_clip, &src_x, &src_y, |
667 | &width, &height) ) |
||
668 | return 0; |
||
669 | |||
2340 | Serge | 670 | |
2342 | Serge | 671 | dst_y+= winrc.top; |
672 | |||
2340 | Serge | 673 | |
2342 | Serge | 674 | |
2340 | Serge | 675 | |
2342 | Serge | 676 | |
2340 | Serge | 677 | |
2342 | Serge | 678 | #if 0 |
679 | static v4si write_mask = {0xFF000000, 0xFF000000, |
||
680 | 0xFF000000, 0xFF000000}; |
||
681 | |||
2340 | Serge | 682 | |
2342 | Serge | 683 | u8* dst_offset; |
684 | |||
2340 | Serge | 685 | |
2342 | Serge | 686 | src_offset += (u32)bitmap->uaddr; |
687 | |||
2340 | Serge | 688 | |
2342 | Serge | 689 | dst_offset+= get_display_map(); |
690 | |||
2340 | Serge | 691 | |
2342 | Serge | 692 | |
2340 | Serge | 693 | |
2342 | Serge | 694 | "movdqa %[write_mask], %%xmm7 \n" |
695 | "movd %[slot_mask], %%xmm6 \n" |
||
696 | "punpckldq %%xmm6, %%xmm6 \n" |
||
697 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
698 | :: [write_mask] "m" (write_mask), |
||
699 | [slot_mask] "g" (slot_mask) |
||
700 | :"xmm7", "xmm6"); |
||
701 | |||
2340 | Serge | 702 | |
2342 | Serge | 703 | { |
704 | u32_t tmp_w = width; |
||
705 | |||
2340 | Serge | 706 | |
2342 | Serge | 707 | u8* tmp_dst = dst_offset; |
708 | |||
2340 | Serge | 709 | |
2342 | Serge | 710 | dst_offset+= os_display->width; |
711 | |||
2340 | Serge | 712 | |
2342 | Serge | 713 | { |
714 | __asm__ __volatile__ ( |
||
715 | "movq (%0), %%xmm0 \n" |
||
716 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
717 | "movdqa %%xmm0, %%xmm1 \n" |
||
718 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
719 | "punpckhwd %%xmm1, %%xmm1 \n" |
||
720 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
721 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
722 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
723 | "addl $16, %%edi \n" |
||
724 | "maskmovdqu %%xmm7, %%xmm1 \n" |
||
725 | :: "r" (tmp_dst), "D" (tmp_src) |
||
726 | :"xmm0", "xmm1"); |
||
727 | __asm__ __volatile__ ("":::"edi"); |
||
728 | tmp_w -= 8; |
||
729 | tmp_src += 32; |
||
730 | tmp_dst += 8; |
||
731 | }; |
||
732 | |||
2340 | Serge | 733 | |
2342 | Serge | 734 | { |
735 | __asm__ __volatile__ ( |
||
736 | "movd (%0), %%xmm0 \n" |
||
737 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
738 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
739 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
740 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
741 | :: "r" (tmp_dst), "D" (tmp_src) |
||
742 | :"xmm0"); |
||
743 | tmp_w -= 4; |
||
744 | tmp_src += 16; |
||
745 | tmp_dst += 4; |
||
746 | }; |
||
747 | |||
2340 | Serge | 748 | |
2342 | Serge | 749 | { |
750 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
751 | tmp_src+=4; |
||
752 | tmp_dst++; |
||
753 | }; |
||
754 | }; |
||
755 | #else |
||
756 | u8* src_offset; |
||
757 | u8* dst_offset; |
||
758 | u32 ifl; |
||
2351 | Serge | 759 | |
2340 | Serge | 760 | |
2342 | Serge | 761 | src_offset += (u32)bitmap->uaddr; |
762 | |||
2340 | Serge | 763 | |
2342 | Serge | 764 | dst_offset+= get_display_map(); |
765 | |||
766 | |||
767 | |||
768 | |||
2351 | Serge | 769 | while( tmp_h--) |
2342 | Serge | 770 | { |
771 | u32_t tmp_w = width; |
||
772 | |||
773 | |||
774 | u8* tmp_dst = dst_offset; |
||
775 | |||
776 | |||
777 | dst_offset+= os_display->width; |
||
778 | |||
779 | |||
780 | { |
||
781 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
782 | tmp_src+=4; |
||
783 | tmp_dst++; |
||
784 | }; |
||
785 | }; |
||
786 | safe_sti(ifl); |
||
2351 | Serge | 787 | } |
2342 | Serge | 788 | #endif |
789 | |||
790 | |||
791 | cmd_buffer&= 0xFFFFF000; |
||
792 | |||
793 | |||
794 | |||
795 | |||
796 | |||
797 | |||
798 | cmd |= 3 << 17; |
||
799 | |||
800 | |||
2340 | Serge | 801 | br13|= ROP_COPY_SRC << 16; |
2342 | Serge | 802 | br13|= FORMAT8888 << 24; |
803 | |||
2340 | Serge | 804 | |
805 | b[n++] = br13; |
||
806 | b[n++] = (dst_y << 16) | dst_x; // left, top |
||
2342 | Serge | 807 | b[n++] = ((dst_y+height-1)<< 16)|(dst_x+width-1); // bottom, right |
808 | b[n++] = 0; // destination |
||
809 | b[n++] = (src_y << 16) | src_x; // source left & top |
||
810 | b[n++] = bitmap->pitch; // source pitch |
||
811 | b[n++] = bitmap->gaddr; // source |
||
812 | |||
2340 | Serge | 813 | |
2342 | Serge | 814 | b[n++] = 0x00FFFFFF; // Transparency Color High |
815 | |||
2340 | Serge | 816 | |
817 | if( n & 1) |
||
818 | b[n++] = MI_NOOP; |
||
819 | |||
820 | |||
2344 | Serge | 821 | |
2340 | Serge | 822 | |
2342 | Serge | 823 | { |
2351 | Serge | 824 | int ret; |
825 | |||
826 | |||
2342 | Serge | 827 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 828 | |
829 | |||
830 | if (ret) |
||
831 | return ret; |
||
832 | |||
833 | |||
834 | intel_ring_emit(ring, 0); |
||
835 | intel_ring_emit(ring, 0); |
||
836 | intel_ring_emit(ring, MI_NOOP); |
||
837 | intel_ring_advance(ring); |
||
838 | } |
||
839 | else |
||
2342 | Serge | 840 | { |
2351 | Serge | 841 | ring = &dev_priv->ring[RCS]; |
2342 | Serge | 842 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 843 | ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER); |
844 | }; |
||
845 | |||
2342 | Serge | 846 | |
2351 | Serge | 847 | bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
848 | |||
2340 | Serge | 849 | |
2351 | Serge | 850 | fail: |
851 | return -1; |
||
852 | }; |
||
853 | |||
2340 | Serge | 854 | |
2344 | Serge | 855 | |
2351 | Serge | 856 | static void |
857 | ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) |
||
858 | { |
||
859 | if ((dev_priv->irq_mask & mask) != 0) { |
||
860 | dev_priv->irq_mask &= ~mask; |
||
861 | I915_WRITE(DEIMR, dev_priv->irq_mask); |
||
862 | POSTING_READ(DEIMR); |
||
863 | } |
||
864 | } |
||
865 | |||
2340 | Serge | 866 | |
2351 | Serge | 867 | { |
868 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
||
869 | unsigned long irqflags; |
||
870 | |||
871 | |||
872 | // return -EINVAL; |
||
873 | |||
874 | |||
875 | ironlake_enable_display_irq(dev_priv, (pipe == 0) ? |
||
876 | DE_PIPEA_VBLANK : DE_PIPEB_VBLANK); |
||
877 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
||
878 | |||
879 | |||
2340 | Serge | 880 | } |
2351 | Serge | 881 | |
882 | |||
883 | |||
884 | |||
885 | { |
||
886 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
887 | int ret, i, pipe; |
||
888 | |||
889 | |||
890 | dbgprintf("Interrupt enable: %08x\n", |
||
891 | I915_READ(IER)); |
||
892 | dbgprintf("Interrupt identity: %08x\n", |
||
893 | I915_READ(IIR)); |
||
894 | dbgprintf("Interrupt mask: %08x\n", |
||
895 | I915_READ(IMR)); |
||
896 | for_each_pipe(pipe) |
||
897 | dbgprintf("Pipe %c stat: %08x\n", |
||
898 | pipe_name(pipe), |
||
899 | I915_READ(PIPESTAT(pipe))); |
||
900 | } else { |
||
901 | dbgprintf("North Display Interrupt enable: %08x\n", |
||
902 | I915_READ(DEIER)); |
||
903 | dbgprintf("North Display Interrupt identity: %08x\n", |
||
904 | I915_READ(DEIIR)); |
||
905 | dbgprintf("North Display Interrupt mask: %08x\n", |
||
906 | I915_READ(DEIMR)); |
||
907 | dbgprintf("South Display Interrupt enable: %08x\n", |
||
908 | I915_READ(SDEIER)); |
||
909 | dbgprintf("South Display Interrupt identity: %08x\n", |
||
910 | I915_READ(SDEIIR)); |
||
911 | dbgprintf("South Display Interrupt mask: %08x\n", |
||
912 | I915_READ(SDEIMR)); |
||
913 | dbgprintf("Graphics Interrupt enable: %08x\n", |
||
914 | I915_READ(GTIER)); |
||
915 | dbgprintf("Graphics Interrupt identity: %08x\n", |
||
916 | I915_READ(GTIIR)); |
||
917 | dbgprintf("Graphics Interrupt mask: %08x\n", |
||
918 | I915_READ(GTIMR)); |
||
919 | } |
||
920 | dbgprintf("Interrupts received: %d\n", |
||
921 | atomic_read(&dev_priv->irq_received)); |
||
922 | for (i = 0; i < I915_NUM_RINGS; i++) { |
||
923 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
||
924 | printf("Graphics Interrupt mask (%s): %08x\n", |
||
925 | dev_priv->ring[i].name, |
||
926 | I915_READ_IMR(&dev_priv->ring[i])); |
||
927 | } |
||
928 | // i915_ring_seqno_info(m, &dev_priv->ring[i]); |
||
929 | } |
||
930 | |||
931 | |||
932 | } |
||
933 | |||
934 | |||
935 | int size) |
||
936 | { |
||
937 | struct intel_ring_buffer *ring; |
||
938 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
939 | u32 invalidate; |
||
940 | u32 seqno = 2; |
||
941 | |||
942 | |||
943 | // dbgprintf("execute %x size %d\n", offset, size); |
||
944 | |||
945 | |||
946 | // "mfence \n" |
||
947 | // "wbinvd \n" |
||
948 | // "mfence \n" |
||
949 | // :::"memory"); |
||
950 | |||
951 | |||
952 | ring->dispatch_execbuffer(ring, offset, size); |
||
953 | |||
954 | |||
955 | if (INTEL_INFO(main_device)->gen >= 4) |
||
956 | invalidate |= I915_GEM_DOMAIN_SAMPLER; |
||
957 | if (ring->flush(ring, invalidate, 0)) |
||
958 | i915_gem_next_request_seqno(ring); |
||
959 | |||
960 | |||
961 | |||
962 | |||
963 | |||
964 | |||
965 | |||
966 | |||
967 | }; |
||
2340 | Serge | 968 | |
2351 | Serge | 969 | |
970 | |||
971 | int src_x, int src_y, u32 w, u32 h) |
||
972 | { |
||
973 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
974 | |||
975 | |||
976 | bitmap_t screen; |
||
977 | |||
978 | |||
979 | |||
980 | |||
981 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
982 | |||
983 | |||
984 | return -1; |
||
985 | |||
986 | |||
987 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
988 | |||
989 | |||
990 | return -1; |
||
991 | |||
992 | |||
993 | |||
994 | |||
995 | screen.gaddr = 0; |
||
996 | screen.width = os_display->width; |
||
997 | screen.height = os_display->height; |
||
998 | screen.obj = (void*)-1; |
||
999 | |||
1000 | |||
1001 | |||
1002 | |||
1003 | dst_y+= winrc.top; |
||
1004 | |||
1005 | |||
1006 | |||
1007 | |||
1008 | |||
1009 |