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Rev | Author | Line No. | Line |
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2330 | Serge | 1 | /* |
2 | * Copyright © 2006-2007 Intel Corporation |
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3 | * Copyright (c) 2006 Dave Airlie |
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4 | * |
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5 | * Permission is hereby granted, free of charge, to any person obtaining a |
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6 | * copy of this software and associated documentation files (the "Software"), |
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7 | * to deal in the Software without restriction, including without limitation |
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8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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9 | * and/or sell copies of the Software, and to permit persons to whom the |
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10 | * Software is furnished to do so, subject to the following conditions: |
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11 | * |
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12 | * The above copyright notice and this permission notice (including the next |
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13 | * paragraph) shall be included in all copies or substantial portions of the |
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14 | * Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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22 | * DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: |
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25 | * Eric Anholt |
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26 | * Dave Airlie |
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27 | * Jesse Barnes |
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28 | */ |
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29 | |||
30 | //#include |
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31 | //#include |
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32 | #include |
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33 | #include |
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3031 | serge | 34 | #include |
35 | #include |
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36 | #include |
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2330 | Serge | 37 | #include "intel_drv.h" |
3031 | serge | 38 | #include |
2330 | Serge | 39 | #include "i915_drv.h" |
40 | //#include |
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41 | |||
42 | /* Private structure for the integrated LVDS support */ |
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3243 | Serge | 43 | struct intel_lvds_connector { |
44 | struct intel_connector base; |
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45 | |||
46 | // struct notifier_block lid_notifier; |
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47 | }; |
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48 | |||
49 | struct intel_lvds_encoder { |
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2330 | Serge | 50 | struct intel_encoder base; |
51 | |||
52 | u32 pfit_control; |
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53 | u32 pfit_pgm_ratios; |
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3480 | Serge | 54 | bool is_dual_link; |
55 | u32 reg; |
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2330 | Serge | 56 | |
3243 | Serge | 57 | struct intel_lvds_connector *attached_connector; |
2330 | Serge | 58 | }; |
59 | |||
3243 | Serge | 60 | static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) |
2330 | Serge | 61 | { |
3243 | Serge | 62 | return container_of(encoder, struct intel_lvds_encoder, base.base); |
2330 | Serge | 63 | } |
64 | |||
3243 | Serge | 65 | static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) |
2330 | Serge | 66 | { |
3243 | Serge | 67 | return container_of(connector, struct intel_lvds_connector, base.base); |
2330 | Serge | 68 | } |
69 | |||
3031 | serge | 70 | static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, |
71 | enum pipe *pipe) |
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72 | { |
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73 | struct drm_device *dev = encoder->base.dev; |
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74 | struct drm_i915_private *dev_priv = dev->dev_private; |
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3480 | Serge | 75 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
76 | u32 tmp; |
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3031 | serge | 77 | |
3480 | Serge | 78 | tmp = I915_READ(lvds_encoder->reg); |
3031 | serge | 79 | |
80 | if (!(tmp & LVDS_PORT_EN)) |
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81 | return false; |
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82 | |||
83 | if (HAS_PCH_CPT(dev)) |
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84 | *pipe = PORT_TO_PIPE_CPT(tmp); |
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85 | else |
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86 | *pipe = PORT_TO_PIPE(tmp); |
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87 | |||
88 | return true; |
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89 | } |
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90 | |||
3480 | Serge | 91 | /* The LVDS pin pair needs to be on before the DPLLs are enabled. |
92 | * This is an exception to the general rule that mode_set doesn't turn |
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93 | * things on. |
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94 | */ |
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95 | static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder) |
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96 | { |
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97 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
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98 | struct drm_device *dev = encoder->base.dev; |
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99 | struct drm_i915_private *dev_priv = dev->dev_private; |
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100 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
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101 | struct drm_display_mode *fixed_mode = |
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102 | lvds_encoder->attached_connector->base.panel.fixed_mode; |
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103 | int pipe = intel_crtc->pipe; |
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104 | u32 temp; |
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105 | |||
106 | temp = I915_READ(lvds_encoder->reg); |
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107 | temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; |
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108 | |||
109 | if (HAS_PCH_CPT(dev)) { |
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110 | temp &= ~PORT_TRANS_SEL_MASK; |
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111 | temp |= PORT_TRANS_SEL_CPT(pipe); |
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112 | } else { |
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113 | if (pipe == 1) { |
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114 | temp |= LVDS_PIPEB_SELECT; |
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115 | } else { |
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116 | temp &= ~LVDS_PIPEB_SELECT; |
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117 | } |
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118 | } |
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119 | |||
120 | /* set the corresponsding LVDS_BORDER bit */ |
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121 | temp |= dev_priv->lvds_border_bits; |
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122 | /* Set the B0-B3 data pairs corresponding to whether we're going to |
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123 | * set the DPLLs for dual-channel mode or not. |
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124 | */ |
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125 | if (lvds_encoder->is_dual_link) |
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126 | temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; |
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127 | else |
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128 | temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); |
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129 | |||
130 | /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) |
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131 | * appropriately here, but we need to look more thoroughly into how |
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132 | * panels behave in the two modes. |
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133 | */ |
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134 | |||
135 | /* Set the dithering flag on LVDS as needed, note that there is no |
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136 | * special lvds dither control bit on pch-split platforms, dithering is |
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137 | * only controlled through the PIPECONF reg. */ |
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138 | if (INTEL_INFO(dev)->gen == 4) { |
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139 | if (dev_priv->lvds_dither) |
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140 | temp |= LVDS_ENABLE_DITHER; |
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141 | else |
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142 | temp &= ~LVDS_ENABLE_DITHER; |
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143 | } |
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144 | temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); |
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145 | if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC) |
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146 | temp |= LVDS_HSYNC_POLARITY; |
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147 | if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC) |
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148 | temp |= LVDS_VSYNC_POLARITY; |
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149 | |||
150 | I915_WRITE(lvds_encoder->reg, temp); |
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151 | } |
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152 | |||
153 | static void intel_pre_enable_lvds(struct intel_encoder *encoder) |
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154 | { |
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155 | struct drm_device *dev = encoder->base.dev; |
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156 | struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base); |
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157 | struct drm_i915_private *dev_priv = dev->dev_private; |
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158 | |||
159 | if (HAS_PCH_SPLIT(dev) || !enc->pfit_control) |
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160 | return; |
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161 | |||
162 | /* |
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163 | * Enable automatic panel scaling so that non-native modes |
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164 | * fill the screen. The panel fitter should only be |
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165 | * adjusted whilst the pipe is disabled, according to |
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166 | * register description and PRM. |
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167 | */ |
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168 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", |
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169 | enc->pfit_control, |
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170 | enc->pfit_pgm_ratios); |
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171 | |||
172 | I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios); |
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173 | I915_WRITE(PFIT_CONTROL, enc->pfit_control); |
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174 | } |
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175 | |||
2330 | Serge | 176 | /** |
177 | * Sets the power state for the panel. |
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178 | */ |
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3031 | serge | 179 | static void intel_enable_lvds(struct intel_encoder *encoder) |
2330 | Serge | 180 | { |
3031 | serge | 181 | struct drm_device *dev = encoder->base.dev; |
3243 | Serge | 182 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
3031 | serge | 183 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
2330 | Serge | 184 | struct drm_i915_private *dev_priv = dev->dev_private; |
3480 | Serge | 185 | u32 ctl_reg, stat_reg; |
2330 | Serge | 186 | |
187 | if (HAS_PCH_SPLIT(dev)) { |
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188 | ctl_reg = PCH_PP_CONTROL; |
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189 | stat_reg = PCH_PP_STATUS; |
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190 | } else { |
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191 | ctl_reg = PP_CONTROL; |
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192 | stat_reg = PP_STATUS; |
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193 | } |
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194 | |||
3480 | Serge | 195 | I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN); |
2330 | Serge | 196 | |
197 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); |
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3480 | Serge | 198 | POSTING_READ(lvds_encoder->reg); |
2330 | Serge | 199 | if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) |
200 | DRM_ERROR("timed out waiting for panel to power on\n"); |
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201 | |||
3031 | serge | 202 | intel_panel_enable_backlight(dev, intel_crtc->pipe); |
2330 | Serge | 203 | } |
204 | |||
3031 | serge | 205 | static void intel_disable_lvds(struct intel_encoder *encoder) |
2330 | Serge | 206 | { |
3031 | serge | 207 | struct drm_device *dev = encoder->base.dev; |
3243 | Serge | 208 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
2330 | Serge | 209 | struct drm_i915_private *dev_priv = dev->dev_private; |
3480 | Serge | 210 | u32 ctl_reg, stat_reg; |
2330 | Serge | 211 | |
212 | if (HAS_PCH_SPLIT(dev)) { |
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213 | ctl_reg = PCH_PP_CONTROL; |
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214 | stat_reg = PCH_PP_STATUS; |
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215 | } else { |
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216 | ctl_reg = PP_CONTROL; |
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217 | stat_reg = PP_STATUS; |
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218 | } |
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219 | |||
220 | intel_panel_disable_backlight(dev); |
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221 | |||
222 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
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223 | if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) |
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224 | DRM_ERROR("timed out waiting for panel to power off\n"); |
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225 | |||
3480 | Serge | 226 | I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN); |
227 | POSTING_READ(lvds_encoder->reg); |
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2330 | Serge | 228 | } |
229 | |||
230 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
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231 | struct drm_display_mode *mode) |
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232 | { |
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3243 | Serge | 233 | struct intel_connector *intel_connector = to_intel_connector(connector); |
234 | struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; |
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2330 | Serge | 235 | |
236 | if (mode->hdisplay > fixed_mode->hdisplay) |
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237 | return MODE_PANEL; |
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238 | if (mode->vdisplay > fixed_mode->vdisplay) |
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239 | return MODE_PANEL; |
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240 | |||
241 | return MODE_OK; |
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242 | } |
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243 | |||
244 | static void |
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245 | centre_horizontally(struct drm_display_mode *mode, |
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246 | int width) |
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247 | { |
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248 | u32 border, sync_pos, blank_width, sync_width; |
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249 | |||
250 | /* keep the hsync and hblank widths constant */ |
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251 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; |
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252 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; |
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253 | sync_pos = (blank_width - sync_width + 1) / 2; |
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254 | |||
255 | border = (mode->hdisplay - width + 1) / 2; |
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256 | border += border & 1; /* make the border even */ |
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257 | |||
258 | mode->crtc_hdisplay = width; |
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259 | mode->crtc_hblank_start = width + border; |
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260 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; |
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261 | |||
262 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; |
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263 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; |
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3031 | serge | 264 | |
265 | mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; |
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2330 | Serge | 266 | } |
267 | |||
268 | static void |
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269 | centre_vertically(struct drm_display_mode *mode, |
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270 | int height) |
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271 | { |
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272 | u32 border, sync_pos, blank_width, sync_width; |
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273 | |||
274 | /* keep the vsync and vblank widths constant */ |
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275 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; |
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276 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; |
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277 | sync_pos = (blank_width - sync_width + 1) / 2; |
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278 | |||
279 | border = (mode->vdisplay - height + 1) / 2; |
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280 | |||
281 | mode->crtc_vdisplay = height; |
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282 | mode->crtc_vblank_start = height + border; |
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283 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; |
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284 | |||
285 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; |
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286 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; |
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3031 | serge | 287 | |
288 | mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; |
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2330 | Serge | 289 | } |
290 | |||
291 | static inline u32 panel_fitter_scaling(u32 source, u32 target) |
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292 | { |
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293 | /* |
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294 | * Floating point operation is not supported. So the FACTOR |
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295 | * is defined, which can avoid the floating point computation |
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296 | * when calculating the panel ratio. |
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297 | */ |
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298 | #define ACCURACY 12 |
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299 | #define FACTOR (1 << ACCURACY) |
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300 | u32 ratio = source * FACTOR / target; |
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301 | return (FACTOR * ratio + FACTOR/2) / FACTOR; |
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302 | } |
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303 | |||
304 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
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3031 | serge | 305 | const struct drm_display_mode *mode, |
2330 | Serge | 306 | struct drm_display_mode *adjusted_mode) |
307 | { |
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308 | struct drm_device *dev = encoder->dev; |
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309 | struct drm_i915_private *dev_priv = dev->dev_private; |
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3243 | Serge | 310 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); |
311 | struct intel_connector *intel_connector = |
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312 | &lvds_encoder->attached_connector->base; |
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313 | struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc; |
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2330 | Serge | 314 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
315 | int pipe; |
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316 | |||
317 | /* Should never happen!! */ |
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318 | if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { |
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319 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
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320 | return false; |
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321 | } |
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322 | |||
3243 | Serge | 323 | if (intel_encoder_check_is_cloned(&lvds_encoder->base)) |
2330 | Serge | 324 | return false; |
325 | |||
326 | /* |
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327 | * We have timings from the BIOS for the panel, put them in |
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328 | * to the adjusted mode. The CRTC will be set up for this mode, |
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329 | * with the panel scaling set up to source from the H/VDisplay |
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330 | * of the original mode. |
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331 | */ |
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3243 | Serge | 332 | intel_fixed_panel_mode(intel_connector->panel.fixed_mode, |
333 | adjusted_mode); |
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2330 | Serge | 334 | |
335 | if (HAS_PCH_SPLIT(dev)) { |
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3243 | Serge | 336 | intel_pch_panel_fitting(dev, |
337 | intel_connector->panel.fitting_mode, |
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2330 | Serge | 338 | mode, adjusted_mode); |
339 | return true; |
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340 | } |
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341 | |||
342 | /* Native modes don't need fitting */ |
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343 | if (adjusted_mode->hdisplay == mode->hdisplay && |
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344 | adjusted_mode->vdisplay == mode->vdisplay) |
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345 | goto out; |
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346 | |||
347 | /* 965+ wants fuzzy fitting */ |
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348 | if (INTEL_INFO(dev)->gen >= 4) |
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349 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
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350 | PFIT_FILTER_FUZZY); |
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351 | |||
352 | /* |
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353 | * Enable automatic panel scaling for non-native modes so that they fill |
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354 | * the screen. Should be enabled before the pipe is enabled, according |
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355 | * to register description and PRM. |
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356 | * Change the value here to see the borders for debugging |
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357 | */ |
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358 | for_each_pipe(pipe) |
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359 | I915_WRITE(BCLRPAT(pipe), 0); |
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360 | |||
3031 | serge | 361 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
362 | |||
3243 | Serge | 363 | switch (intel_connector->panel.fitting_mode) { |
2330 | Serge | 364 | case DRM_MODE_SCALE_CENTER: |
365 | /* |
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366 | * For centered modes, we have to calculate border widths & |
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367 | * heights and modify the values programmed into the CRTC. |
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368 | */ |
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369 | centre_horizontally(adjusted_mode, mode->hdisplay); |
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370 | centre_vertically(adjusted_mode, mode->vdisplay); |
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371 | border = LVDS_BORDER_ENABLE; |
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372 | break; |
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373 | |||
374 | case DRM_MODE_SCALE_ASPECT: |
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375 | /* Scale but preserve the aspect ratio */ |
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376 | if (INTEL_INFO(dev)->gen >= 4) { |
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377 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
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378 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
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379 | |||
380 | /* 965+ is easy, it does everything in hw */ |
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381 | if (scaled_width > scaled_height) |
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382 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; |
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383 | else if (scaled_width < scaled_height) |
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384 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; |
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385 | else if (adjusted_mode->hdisplay != mode->hdisplay) |
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386 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; |
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387 | } else { |
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388 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
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389 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
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390 | /* |
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391 | * For earlier chips we have to calculate the scaling |
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392 | * ratio by hand and program it into the |
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393 | * PFIT_PGM_RATIO register |
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394 | */ |
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395 | if (scaled_width > scaled_height) { /* pillar */ |
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396 | centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); |
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397 | |||
398 | border = LVDS_BORDER_ENABLE; |
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399 | if (mode->vdisplay != adjusted_mode->vdisplay) { |
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400 | u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); |
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401 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
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402 | bits << PFIT_VERT_SCALE_SHIFT); |
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403 | pfit_control |= (PFIT_ENABLE | |
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404 | VERT_INTERP_BILINEAR | |
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405 | HORIZ_INTERP_BILINEAR); |
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406 | } |
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407 | } else if (scaled_width < scaled_height) { /* letter */ |
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408 | centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); |
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409 | |||
410 | border = LVDS_BORDER_ENABLE; |
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411 | if (mode->hdisplay != adjusted_mode->hdisplay) { |
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412 | u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); |
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413 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
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414 | bits << PFIT_VERT_SCALE_SHIFT); |
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415 | pfit_control |= (PFIT_ENABLE | |
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416 | VERT_INTERP_BILINEAR | |
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417 | HORIZ_INTERP_BILINEAR); |
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418 | } |
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419 | } else |
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420 | /* Aspects match, Let hw scale both directions */ |
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421 | pfit_control |= (PFIT_ENABLE | |
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422 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
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423 | VERT_INTERP_BILINEAR | |
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424 | HORIZ_INTERP_BILINEAR); |
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425 | } |
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426 | break; |
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427 | |||
428 | case DRM_MODE_SCALE_FULLSCREEN: |
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429 | /* |
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430 | * Full scaling, even if it changes the aspect ratio. |
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431 | * Fortunately this is all done for us in hw. |
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432 | */ |
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433 | if (mode->vdisplay != adjusted_mode->vdisplay || |
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434 | mode->hdisplay != adjusted_mode->hdisplay) { |
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435 | pfit_control |= PFIT_ENABLE; |
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436 | if (INTEL_INFO(dev)->gen >= 4) |
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437 | pfit_control |= PFIT_SCALING_AUTO; |
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438 | else |
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439 | pfit_control |= (VERT_AUTO_SCALE | |
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440 | VERT_INTERP_BILINEAR | |
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441 | HORIZ_AUTO_SCALE | |
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442 | HORIZ_INTERP_BILINEAR); |
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443 | } |
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444 | break; |
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445 | |||
446 | default: |
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447 | break; |
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448 | } |
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449 | |||
450 | out: |
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451 | /* If not enabling scaling, be consistent and always use 0. */ |
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452 | if ((pfit_control & PFIT_ENABLE) == 0) { |
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453 | pfit_control = 0; |
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454 | pfit_pgm_ratios = 0; |
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455 | } |
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456 | |||
457 | /* Make sure pre-965 set dither correctly */ |
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458 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) |
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459 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
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460 | |||
3243 | Serge | 461 | if (pfit_control != lvds_encoder->pfit_control || |
462 | pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) { |
||
463 | lvds_encoder->pfit_control = pfit_control; |
||
464 | lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios; |
||
2330 | Serge | 465 | } |
466 | dev_priv->lvds_border_bits = border; |
||
467 | |||
468 | /* |
||
469 | * XXX: It would be nice to support lower refresh rates on the |
||
470 | * panels to reduce power consumption, and perhaps match the |
||
471 | * user's requested refresh rate. |
||
472 | */ |
||
473 | |||
474 | return true; |
||
475 | } |
||
476 | |||
477 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
||
478 | struct drm_display_mode *mode, |
||
479 | struct drm_display_mode *adjusted_mode) |
||
480 | { |
||
481 | /* |
||
482 | * The LVDS pin pair will already have been turned on in the |
||
483 | * intel_crtc_mode_set since it has a large impact on the DPLL |
||
484 | * settings. |
||
485 | */ |
||
486 | } |
||
487 | |||
488 | /** |
||
489 | * Detect the LVDS connection. |
||
490 | * |
||
491 | * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means |
||
492 | * connected and closed means disconnected. We also send hotplug events as |
||
493 | * needed, using lid status notification from the input layer. |
||
494 | */ |
||
495 | static enum drm_connector_status |
||
496 | intel_lvds_detect(struct drm_connector *connector, bool force) |
||
497 | { |
||
498 | struct drm_device *dev = connector->dev; |
||
499 | enum drm_connector_status status; |
||
500 | |||
501 | status = intel_panel_detect(dev); |
||
502 | if (status != connector_status_unknown) |
||
503 | return status; |
||
504 | |||
505 | return connector_status_connected; |
||
506 | } |
||
507 | |||
508 | /** |
||
509 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
||
510 | */ |
||
511 | static int intel_lvds_get_modes(struct drm_connector *connector) |
||
512 | { |
||
3243 | Serge | 513 | struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); |
2330 | Serge | 514 | struct drm_device *dev = connector->dev; |
515 | struct drm_display_mode *mode; |
||
516 | |||
3243 | Serge | 517 | /* use cached edid if we have one */ |
518 | if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) |
||
519 | return drm_add_edid_modes(connector, lvds_connector->base.edid); |
||
2330 | Serge | 520 | |
3243 | Serge | 521 | mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); |
2330 | Serge | 522 | if (mode == NULL) |
523 | return 0; |
||
524 | |||
525 | drm_mode_probed_add(connector, mode); |
||
526 | return 1; |
||
527 | } |
||
528 | |||
529 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
||
530 | { |
||
3031 | serge | 531 | DRM_INFO("Skipping forced modeset for %s\n", id->ident); |
2330 | Serge | 532 | return 1; |
533 | } |
||
534 | |||
535 | /* The GPU hangs up on these systems if modeset is performed on LID open */ |
||
536 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { |
||
537 | { |
||
538 | .callback = intel_no_modeset_on_lid_dmi_callback, |
||
539 | .ident = "Toshiba Tecra A11", |
||
540 | .matches = { |
||
541 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
||
542 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), |
||
543 | }, |
||
544 | }, |
||
545 | |||
546 | { } /* terminating entry */ |
||
547 | }; |
||
548 | |||
549 | #if 0 |
||
550 | /* |
||
3480 | Serge | 551 | * Lid events. Note the use of 'modeset': |
552 | * - we set it to MODESET_ON_LID_OPEN on lid close, |
||
553 | * and set it to MODESET_DONE on open |
||
2330 | Serge | 554 | * - we use it as a "only once" bit (ie we ignore |
3480 | Serge | 555 | * duplicate events where it was already properly set) |
556 | * - the suspend/resume paths will set it to |
||
557 | * MODESET_SUSPENDED and ignore the lid open event, |
||
558 | * because they restore the mode ("lid open"). |
||
2330 | Serge | 559 | */ |
560 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
||
561 | void *unused) |
||
562 | { |
||
3243 | Serge | 563 | struct intel_lvds_connector *lvds_connector = |
564 | container_of(nb, struct intel_lvds_connector, lid_notifier); |
||
565 | struct drm_connector *connector = &lvds_connector->base.base; |
||
566 | struct drm_device *dev = connector->dev; |
||
567 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
2330 | Serge | 568 | |
569 | if (dev->switch_power_state != DRM_SWITCH_POWER_ON) |
||
570 | return NOTIFY_OK; |
||
571 | |||
3480 | Serge | 572 | mutex_lock(&dev_priv->modeset_restore_lock); |
573 | if (dev_priv->modeset_restore == MODESET_SUSPENDED) |
||
574 | goto exit; |
||
2330 | Serge | 575 | /* |
576 | * check and update the status of LVDS connector after receiving |
||
577 | * the LID nofication event. |
||
578 | */ |
||
3243 | Serge | 579 | connector->status = connector->funcs->detect(connector, false); |
2330 | Serge | 580 | |
581 | /* Don't force modeset on machines where it causes a GPU lockup */ |
||
582 | if (dmi_check_system(intel_no_modeset_on_lid)) |
||
3480 | Serge | 583 | goto exit; |
2330 | Serge | 584 | if (!acpi_lid_open()) { |
3480 | Serge | 585 | /* do modeset on next lid open event */ |
586 | dev_priv->modeset_restore = MODESET_ON_LID_OPEN; |
||
587 | goto exit; |
||
2330 | Serge | 588 | } |
589 | |||
3480 | Serge | 590 | if (dev_priv->modeset_restore == MODESET_DONE) |
591 | goto exit; |
||
2330 | Serge | 592 | |
3480 | Serge | 593 | drm_modeset_lock_all(dev); |
3243 | Serge | 594 | intel_modeset_setup_hw_state(dev, true); |
3480 | Serge | 595 | drm_modeset_unlock_all(dev); |
2330 | Serge | 596 | |
3480 | Serge | 597 | dev_priv->modeset_restore = MODESET_DONE; |
598 | |||
599 | exit: |
||
600 | mutex_unlock(&dev_priv->modeset_restore_lock); |
||
2330 | Serge | 601 | return NOTIFY_OK; |
602 | } |
||
603 | #endif |
||
604 | |||
605 | /** |
||
606 | * intel_lvds_destroy - unregister and free LVDS structures |
||
607 | * @connector: connector to free |
||
608 | * |
||
609 | * Unregister the DDC bus for this connector then free the driver private |
||
610 | * structure. |
||
611 | */ |
||
612 | static void intel_lvds_destroy(struct drm_connector *connector) |
||
613 | { |
||
3243 | Serge | 614 | struct intel_lvds_connector *lvds_connector = |
615 | to_lvds_connector(connector); |
||
2330 | Serge | 616 | |
617 | |||
3243 | Serge | 618 | if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) |
619 | kfree(lvds_connector->base.edid); |
||
620 | |||
621 | intel_panel_destroy_backlight(connector->dev); |
||
622 | intel_panel_fini(&lvds_connector->base.panel); |
||
623 | |||
2330 | Serge | 624 | drm_sysfs_connector_remove(connector); |
625 | drm_connector_cleanup(connector); |
||
626 | kfree(connector); |
||
627 | } |
||
628 | |||
629 | static int intel_lvds_set_property(struct drm_connector *connector, |
||
630 | struct drm_property *property, |
||
631 | uint64_t value) |
||
632 | { |
||
3243 | Serge | 633 | struct intel_connector *intel_connector = to_intel_connector(connector); |
2330 | Serge | 634 | struct drm_device *dev = connector->dev; |
635 | |||
636 | if (property == dev->mode_config.scaling_mode_property) { |
||
3243 | Serge | 637 | struct drm_crtc *crtc; |
2330 | Serge | 638 | |
639 | if (value == DRM_MODE_SCALE_NONE) { |
||
640 | DRM_DEBUG_KMS("no scaling not supported\n"); |
||
641 | return -EINVAL; |
||
642 | } |
||
643 | |||
3243 | Serge | 644 | if (intel_connector->panel.fitting_mode == value) { |
2330 | Serge | 645 | /* the LVDS scaling property is not changed */ |
646 | return 0; |
||
647 | } |
||
3243 | Serge | 648 | intel_connector->panel.fitting_mode = value; |
649 | |||
650 | crtc = intel_attached_encoder(connector)->base.crtc; |
||
2330 | Serge | 651 | if (crtc && crtc->enabled) { |
652 | /* |
||
653 | * If the CRTC is enabled, the display will be changed |
||
654 | * according to the new panel fitting mode. |
||
655 | */ |
||
3480 | Serge | 656 | intel_crtc_restore_mode(crtc); |
2330 | Serge | 657 | } |
658 | } |
||
659 | |||
660 | return 0; |
||
661 | } |
||
662 | |||
663 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
||
664 | .mode_fixup = intel_lvds_mode_fixup, |
||
665 | .mode_set = intel_lvds_mode_set, |
||
666 | }; |
||
667 | |||
668 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
||
669 | .get_modes = intel_lvds_get_modes, |
||
670 | .mode_valid = intel_lvds_mode_valid, |
||
671 | .best_encoder = intel_best_encoder, |
||
672 | }; |
||
673 | |||
674 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
||
3031 | serge | 675 | .dpms = intel_connector_dpms, |
2330 | Serge | 676 | .detect = intel_lvds_detect, |
677 | .fill_modes = drm_helper_probe_single_connector_modes, |
||
678 | .set_property = intel_lvds_set_property, |
||
679 | .destroy = intel_lvds_destroy, |
||
680 | }; |
||
681 | |||
682 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
||
683 | .destroy = intel_encoder_destroy, |
||
684 | }; |
||
685 | |||
2351 | Serge | 686 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
2330 | Serge | 687 | { |
3031 | serge | 688 | DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); |
2330 | Serge | 689 | return 1; |
690 | } |
||
691 | |||
692 | /* These systems claim to have LVDS, but really don't */ |
||
693 | static const struct dmi_system_id intel_no_lvds[] = { |
||
694 | { |
||
695 | .callback = intel_no_lvds_dmi_callback, |
||
696 | .ident = "Apple Mac Mini (Core series)", |
||
697 | .matches = { |
||
698 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
||
699 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
||
700 | }, |
||
701 | }, |
||
702 | { |
||
703 | .callback = intel_no_lvds_dmi_callback, |
||
704 | .ident = "Apple Mac Mini (Core 2 series)", |
||
705 | .matches = { |
||
706 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
||
707 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
||
708 | }, |
||
709 | }, |
||
710 | { |
||
711 | .callback = intel_no_lvds_dmi_callback, |
||
712 | .ident = "MSI IM-945GSE-A", |
||
713 | .matches = { |
||
714 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
||
715 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
||
716 | }, |
||
717 | }, |
||
718 | { |
||
719 | .callback = intel_no_lvds_dmi_callback, |
||
720 | .ident = "Dell Studio Hybrid", |
||
721 | .matches = { |
||
722 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
||
723 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
||
724 | }, |
||
725 | }, |
||
726 | { |
||
727 | .callback = intel_no_lvds_dmi_callback, |
||
728 | .ident = "Dell OptiPlex FX170", |
||
729 | .matches = { |
||
730 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
||
731 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), |
||
732 | }, |
||
733 | }, |
||
734 | { |
||
735 | .callback = intel_no_lvds_dmi_callback, |
||
736 | .ident = "AOpen Mini PC", |
||
737 | .matches = { |
||
738 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
||
739 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
||
740 | }, |
||
741 | }, |
||
742 | { |
||
743 | .callback = intel_no_lvds_dmi_callback, |
||
744 | .ident = "AOpen Mini PC MP915", |
||
745 | .matches = { |
||
746 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
747 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
||
748 | }, |
||
749 | }, |
||
750 | { |
||
751 | .callback = intel_no_lvds_dmi_callback, |
||
752 | .ident = "AOpen i915GMm-HFS", |
||
753 | .matches = { |
||
754 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
755 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), |
||
756 | }, |
||
757 | }, |
||
758 | { |
||
759 | .callback = intel_no_lvds_dmi_callback, |
||
2351 | Serge | 760 | .ident = "AOpen i45GMx-I", |
761 | .matches = { |
||
762 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
763 | DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), |
||
764 | }, |
||
765 | }, |
||
766 | { |
||
767 | .callback = intel_no_lvds_dmi_callback, |
||
2330 | Serge | 768 | .ident = "Aopen i945GTt-VFA", |
769 | .matches = { |
||
770 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
||
771 | }, |
||
772 | }, |
||
773 | { |
||
774 | .callback = intel_no_lvds_dmi_callback, |
||
775 | .ident = "Clientron U800", |
||
776 | .matches = { |
||
777 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
||
778 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
||
779 | }, |
||
780 | }, |
||
781 | { |
||
782 | .callback = intel_no_lvds_dmi_callback, |
||
2342 | Serge | 783 | .ident = "Clientron E830", |
784 | .matches = { |
||
785 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
||
786 | DMI_MATCH(DMI_PRODUCT_NAME, "E830"), |
||
787 | }, |
||
788 | }, |
||
789 | { |
||
790 | .callback = intel_no_lvds_dmi_callback, |
||
2330 | Serge | 791 | .ident = "Asus EeeBox PC EB1007", |
792 | .matches = { |
||
793 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), |
||
794 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), |
||
795 | }, |
||
796 | }, |
||
2342 | Serge | 797 | { |
798 | .callback = intel_no_lvds_dmi_callback, |
||
799 | .ident = "Asus AT5NM10T-I", |
||
800 | .matches = { |
||
801 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
||
802 | DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), |
||
803 | }, |
||
804 | }, |
||
3031 | serge | 805 | { |
806 | .callback = intel_no_lvds_dmi_callback, |
||
807 | .ident = "Hewlett-Packard HP t5740e Thin Client", |
||
808 | .matches = { |
||
809 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
810 | DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"), |
||
811 | }, |
||
812 | }, |
||
813 | { |
||
814 | .callback = intel_no_lvds_dmi_callback, |
||
815 | .ident = "Hewlett-Packard t5745", |
||
816 | .matches = { |
||
817 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
818 | DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), |
||
819 | }, |
||
820 | }, |
||
821 | { |
||
822 | .callback = intel_no_lvds_dmi_callback, |
||
823 | .ident = "Hewlett-Packard st5747", |
||
824 | .matches = { |
||
825 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
826 | DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), |
||
827 | }, |
||
828 | }, |
||
829 | { |
||
830 | .callback = intel_no_lvds_dmi_callback, |
||
831 | .ident = "MSI Wind Box DC500", |
||
832 | .matches = { |
||
833 | DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), |
||
834 | DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), |
||
835 | }, |
||
836 | }, |
||
837 | { |
||
838 | .callback = intel_no_lvds_dmi_callback, |
||
839 | .ident = "Gigabyte GA-D525TUD", |
||
840 | .matches = { |
||
841 | DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), |
||
842 | DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), |
||
843 | }, |
||
844 | }, |
||
845 | { |
||
846 | .callback = intel_no_lvds_dmi_callback, |
||
847 | .ident = "Supermicro X7SPA-H", |
||
848 | .matches = { |
||
849 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), |
||
850 | DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), |
||
851 | }, |
||
852 | }, |
||
2330 | Serge | 853 | |
854 | { } /* terminating entry */ |
||
855 | }; |
||
856 | |||
857 | /** |
||
858 | * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID |
||
859 | * @dev: drm device |
||
860 | * @connector: LVDS connector |
||
861 | * |
||
862 | * Find the reduced downclock for LVDS in EDID. |
||
863 | */ |
||
864 | static void intel_find_lvds_downclock(struct drm_device *dev, |
||
865 | struct drm_display_mode *fixed_mode, |
||
866 | struct drm_connector *connector) |
||
867 | { |
||
868 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
869 | struct drm_display_mode *scan; |
||
870 | int temp_downclock; |
||
871 | |||
872 | temp_downclock = fixed_mode->clock; |
||
873 | list_for_each_entry(scan, &connector->probed_modes, head) { |
||
874 | /* |
||
875 | * If one mode has the same resolution with the fixed_panel |
||
876 | * mode while they have the different refresh rate, it means |
||
877 | * that the reduced downclock is found for the LVDS. In such |
||
878 | * case we can set the different FPx0/1 to dynamically select |
||
879 | * between low and high frequency. |
||
880 | */ |
||
881 | if (scan->hdisplay == fixed_mode->hdisplay && |
||
882 | scan->hsync_start == fixed_mode->hsync_start && |
||
883 | scan->hsync_end == fixed_mode->hsync_end && |
||
884 | scan->htotal == fixed_mode->htotal && |
||
885 | scan->vdisplay == fixed_mode->vdisplay && |
||
886 | scan->vsync_start == fixed_mode->vsync_start && |
||
887 | scan->vsync_end == fixed_mode->vsync_end && |
||
888 | scan->vtotal == fixed_mode->vtotal) { |
||
889 | if (scan->clock < temp_downclock) { |
||
890 | /* |
||
891 | * The downclock is already found. But we |
||
892 | * expect to find the lower downclock. |
||
893 | */ |
||
894 | temp_downclock = scan->clock; |
||
895 | } |
||
896 | } |
||
897 | } |
||
898 | if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { |
||
899 | /* We found the downclock for LVDS. */ |
||
900 | dev_priv->lvds_downclock_avail = 1; |
||
901 | dev_priv->lvds_downclock = temp_downclock; |
||
902 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " |
||
903 | "Normal clock %dKhz, downclock %dKhz\n", |
||
904 | fixed_mode->clock, temp_downclock); |
||
905 | } |
||
906 | } |
||
907 | |||
908 | /* |
||
909 | * Enumerate the child dev array parsed from VBT to check whether |
||
910 | * the LVDS is present. |
||
911 | * If it is present, return 1. |
||
912 | * If it is not present, return false. |
||
913 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. |
||
914 | */ |
||
915 | static bool lvds_is_present_in_vbt(struct drm_device *dev, |
||
916 | u8 *i2c_pin) |
||
917 | { |
||
918 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
919 | int i; |
||
920 | |||
921 | if (!dev_priv->child_dev_num) |
||
922 | return true; |
||
923 | |||
924 | for (i = 0; i < dev_priv->child_dev_num; i++) { |
||
925 | struct child_device_config *child = dev_priv->child_dev + i; |
||
926 | |||
927 | /* If the device type is not LFP, continue. |
||
928 | * We have to check both the new identifiers as well as the |
||
929 | * old for compatibility with some BIOSes. |
||
930 | */ |
||
931 | if (child->device_type != DEVICE_TYPE_INT_LFP && |
||
932 | child->device_type != DEVICE_TYPE_LFP) |
||
933 | continue; |
||
934 | |||
3031 | serge | 935 | if (intel_gmbus_is_port_valid(child->i2c_pin)) |
2330 | Serge | 936 | *i2c_pin = child->i2c_pin; |
937 | |||
938 | /* However, we cannot trust the BIOS writers to populate |
||
939 | * the VBT correctly. Since LVDS requires additional |
||
940 | * information from AIM blocks, a non-zero addin offset is |
||
941 | * a good indicator that the LVDS is actually present. |
||
942 | */ |
||
943 | if (child->addin_offset) |
||
944 | return true; |
||
945 | |||
946 | /* But even then some BIOS writers perform some black magic |
||
947 | * and instantiate the device without reference to any |
||
948 | * additional data. Trust that if the VBT was written into |
||
949 | * the OpRegion then they have validated the LVDS's existence. |
||
950 | */ |
||
951 | if (dev_priv->opregion.vbt) |
||
952 | return true; |
||
953 | } |
||
954 | |||
955 | return false; |
||
956 | } |
||
957 | |||
3480 | Serge | 958 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) |
959 | { |
||
960 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); |
||
961 | return 1; |
||
962 | } |
||
963 | bool intel_is_dual_link_lvds(struct drm_device *dev) |
||
964 | { |
||
965 | struct intel_encoder *encoder; |
||
966 | struct intel_lvds_encoder *lvds_encoder; |
||
967 | |||
968 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, |
||
969 | base.head) { |
||
970 | if (encoder->type == INTEL_OUTPUT_LVDS) { |
||
971 | lvds_encoder = to_lvds_encoder(&encoder->base); |
||
972 | |||
973 | return lvds_encoder->is_dual_link; |
||
974 | } |
||
975 | } |
||
976 | |||
977 | return false; |
||
978 | } |
||
979 | |||
980 | static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder) |
||
981 | { |
||
982 | struct drm_device *dev = lvds_encoder->base.base.dev; |
||
983 | unsigned int val; |
||
984 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
985 | |||
986 | /* use the module option value if specified */ |
||
987 | if (i915_lvds_channel_mode > 0) |
||
988 | return i915_lvds_channel_mode == 2; |
||
989 | |||
990 | // if (dmi_check_system(intel_dual_link_lvds)) |
||
991 | // return true; |
||
992 | |||
993 | /* BIOS should set the proper LVDS register value at boot, but |
||
994 | * in reality, it doesn't set the value when the lid is closed; |
||
995 | * we need to check "the value to be set" in VBT when LVDS |
||
996 | * register is uninitialized. |
||
997 | */ |
||
998 | val = I915_READ(lvds_encoder->reg); |
||
999 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) |
||
1000 | val = dev_priv->bios_lvds_val; |
||
1001 | |||
1002 | return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; |
||
1003 | } |
||
1004 | |||
3031 | serge | 1005 | static bool intel_lvds_supported(struct drm_device *dev) |
1006 | { |
||
1007 | /* With the introduction of the PCH we gained a dedicated |
||
1008 | * LVDS presence pin, use it. */ |
||
1009 | if (HAS_PCH_SPLIT(dev)) |
||
1010 | return true; |
||
1011 | |||
1012 | /* Otherwise LVDS was only attached to mobile products, |
||
1013 | * except for the inglorious 830gm */ |
||
1014 | return IS_MOBILE(dev) && !IS_I830(dev); |
||
1015 | } |
||
1016 | |||
2330 | Serge | 1017 | /** |
1018 | * intel_lvds_init - setup LVDS connectors on this device |
||
1019 | * @dev: drm device |
||
1020 | * |
||
1021 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
||
1022 | * modes we can display on the LVDS panel (if present). |
||
1023 | */ |
||
1024 | bool intel_lvds_init(struct drm_device *dev) |
||
1025 | { |
||
1026 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
3243 | Serge | 1027 | struct intel_lvds_encoder *lvds_encoder; |
2330 | Serge | 1028 | struct intel_encoder *intel_encoder; |
3243 | Serge | 1029 | struct intel_lvds_connector *lvds_connector; |
2330 | Serge | 1030 | struct intel_connector *intel_connector; |
1031 | struct drm_connector *connector; |
||
1032 | struct drm_encoder *encoder; |
||
1033 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
||
3243 | Serge | 1034 | struct drm_display_mode *fixed_mode = NULL; |
1035 | struct edid *edid; |
||
2330 | Serge | 1036 | struct drm_crtc *crtc; |
1037 | u32 lvds; |
||
1038 | int pipe; |
||
1039 | u8 pin; |
||
1040 | |||
3031 | serge | 1041 | if (!intel_lvds_supported(dev)) |
1042 | return false; |
||
1043 | |||
2330 | Serge | 1044 | /* Skip init on machines we know falsely report LVDS */ |
1045 | // if (dmi_check_system(intel_no_lvds)) |
||
1046 | // return false; |
||
1047 | |||
1048 | pin = GMBUS_PORT_PANEL; |
||
1049 | if (!lvds_is_present_in_vbt(dev, &pin)) { |
||
1050 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
||
1051 | return false; |
||
1052 | } |
||
1053 | |||
1054 | if (HAS_PCH_SPLIT(dev)) { |
||
1055 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
||
1056 | return false; |
||
1057 | if (dev_priv->edp.support) { |
||
1058 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
||
1059 | return false; |
||
1060 | } |
||
1061 | } |
||
1062 | |||
3243 | Serge | 1063 | lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL); |
1064 | if (!lvds_encoder) |
||
2330 | Serge | 1065 | return false; |
1066 | |||
3243 | Serge | 1067 | lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL); |
1068 | if (!lvds_connector) { |
||
1069 | kfree(lvds_encoder); |
||
2330 | Serge | 1070 | return false; |
1071 | } |
||
1072 | |||
3243 | Serge | 1073 | lvds_encoder->attached_connector = lvds_connector; |
1074 | |||
2330 | Serge | 1075 | if (!HAS_PCH_SPLIT(dev)) { |
3243 | Serge | 1076 | lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL); |
2330 | Serge | 1077 | } |
1078 | |||
3243 | Serge | 1079 | intel_encoder = &lvds_encoder->base; |
2330 | Serge | 1080 | encoder = &intel_encoder->base; |
3243 | Serge | 1081 | intel_connector = &lvds_connector->base; |
2330 | Serge | 1082 | connector = &intel_connector->base; |
1083 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
||
1084 | DRM_MODE_CONNECTOR_LVDS); |
||
1085 | |||
1086 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
||
1087 | DRM_MODE_ENCODER_LVDS); |
||
1088 | |||
3031 | serge | 1089 | intel_encoder->enable = intel_enable_lvds; |
3480 | Serge | 1090 | intel_encoder->pre_enable = intel_pre_enable_lvds; |
1091 | intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds; |
||
3031 | serge | 1092 | intel_encoder->disable = intel_disable_lvds; |
1093 | intel_encoder->get_hw_state = intel_lvds_get_hw_state; |
||
1094 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
||
1095 | |||
2330 | Serge | 1096 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
1097 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
||
1098 | |||
3031 | serge | 1099 | intel_encoder->cloneable = false; |
2342 | Serge | 1100 | if (HAS_PCH_SPLIT(dev)) |
1101 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
||
3031 | serge | 1102 | else if (IS_GEN4(dev)) |
1103 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
||
2342 | Serge | 1104 | else |
2330 | Serge | 1105 | intel_encoder->crtc_mask = (1 << 1); |
2342 | Serge | 1106 | |
2330 | Serge | 1107 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
1108 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
||
1109 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
||
1110 | connector->interlace_allowed = false; |
||
1111 | connector->doublescan_allowed = false; |
||
1112 | |||
3480 | Serge | 1113 | if (HAS_PCH_SPLIT(dev)) { |
1114 | lvds_encoder->reg = PCH_LVDS; |
||
1115 | } else { |
||
1116 | lvds_encoder->reg = LVDS; |
||
1117 | } |
||
1118 | |||
2330 | Serge | 1119 | /* create the scaling mode property */ |
1120 | drm_mode_create_scaling_mode_property(dev); |
||
3243 | Serge | 1121 | drm_object_attach_property(&connector->base, |
2330 | Serge | 1122 | dev->mode_config.scaling_mode_property, |
1123 | DRM_MODE_SCALE_ASPECT); |
||
3243 | Serge | 1124 | intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT; |
2330 | Serge | 1125 | /* |
1126 | * LVDS discovery: |
||
1127 | * 1) check for EDID on DDC |
||
1128 | * 2) check for VBT data |
||
1129 | * 3) check to see if LVDS is already on |
||
1130 | * if none of the above, no panel |
||
1131 | * 4) make sure lid is open |
||
1132 | * if closed, act like it's not there for now |
||
1133 | */ |
||
1134 | |||
1135 | /* |
||
1136 | * Attempt to get the fixed panel mode from DDC. Assume that the |
||
1137 | * preferred mode is the right one. |
||
1138 | */ |
||
3243 | Serge | 1139 | edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin)); |
1140 | if (edid) { |
||
1141 | if (drm_add_edid_modes(connector, edid)) { |
||
2330 | Serge | 1142 | drm_mode_connector_update_edid_property(connector, |
3243 | Serge | 1143 | edid); |
2330 | Serge | 1144 | } else { |
3243 | Serge | 1145 | kfree(edid); |
1146 | edid = ERR_PTR(-EINVAL); |
||
2330 | Serge | 1147 | } |
3243 | Serge | 1148 | } else { |
1149 | edid = ERR_PTR(-ENOENT); |
||
2330 | Serge | 1150 | } |
3243 | Serge | 1151 | lvds_connector->base.edid = edid; |
1152 | |||
1153 | if (IS_ERR_OR_NULL(edid)) { |
||
2330 | Serge | 1154 | /* Didn't get an EDID, so |
1155 | * Set wide sync ranges so we get all modes |
||
1156 | * handed to valid_mode for checking |
||
1157 | */ |
||
1158 | connector->display_info.min_vfreq = 0; |
||
1159 | connector->display_info.max_vfreq = 200; |
||
1160 | connector->display_info.min_hfreq = 0; |
||
1161 | connector->display_info.max_hfreq = 200; |
||
1162 | } |
||
1163 | |||
1164 | list_for_each_entry(scan, &connector->probed_modes, head) { |
||
1165 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
||
3243 | Serge | 1166 | DRM_DEBUG_KMS("using preferred mode from EDID: "); |
1167 | drm_mode_debug_printmodeline(scan); |
||
1168 | |||
1169 | fixed_mode = drm_mode_duplicate(dev, scan); |
||
1170 | if (fixed_mode) { |
||
1171 | intel_find_lvds_downclock(dev, fixed_mode, |
||
2330 | Serge | 1172 | connector); |
1173 | goto out; |
||
1174 | } |
||
1175 | } |
||
3243 | Serge | 1176 | } |
2330 | Serge | 1177 | |
1178 | /* Failed to get EDID, what about VBT? */ |
||
1179 | if (dev_priv->lfp_lvds_vbt_mode) { |
||
3243 | Serge | 1180 | DRM_DEBUG_KMS("using mode from VBT: "); |
1181 | drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode); |
||
1182 | |||
1183 | fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
||
1184 | if (fixed_mode) { |
||
1185 | fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; |
||
2330 | Serge | 1186 | goto out; |
1187 | } |
||
1188 | } |
||
1189 | |||
1190 | /* |
||
1191 | * If we didn't get EDID, try checking if the panel is already turned |
||
1192 | * on. If so, assume that whatever is currently programmed is the |
||
1193 | * correct mode. |
||
1194 | */ |
||
1195 | |||
1196 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
||
1197 | if (HAS_PCH_SPLIT(dev)) |
||
1198 | goto failed; |
||
1199 | |||
1200 | lvds = I915_READ(LVDS); |
||
1201 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
||
1202 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
||
1203 | |||
1204 | if (crtc && (lvds & LVDS_PORT_EN)) { |
||
3243 | Serge | 1205 | fixed_mode = intel_crtc_mode_get(dev, crtc); |
1206 | if (fixed_mode) { |
||
1207 | DRM_DEBUG_KMS("using current (BIOS) mode: "); |
||
1208 | drm_mode_debug_printmodeline(fixed_mode); |
||
1209 | fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; |
||
2330 | Serge | 1210 | goto out; |
1211 | } |
||
1212 | } |
||
1213 | |||
1214 | /* If we still don't have a mode after all that, give up. */ |
||
3243 | Serge | 1215 | if (!fixed_mode) |
2330 | Serge | 1216 | goto failed; |
1217 | |||
1218 | out: |
||
3480 | Serge | 1219 | lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); |
1220 | DRM_DEBUG_KMS("detected %s-link lvds configuration\n", |
||
1221 | lvds_encoder->is_dual_link ? "dual" : "single"); |
||
1222 | |||
2330 | Serge | 1223 | /* |
1224 | * Unlock registers and just |
||
1225 | * leave them unlocked |
||
1226 | */ |
||
3031 | serge | 1227 | if (HAS_PCH_SPLIT(dev)) { |
2330 | Serge | 1228 | I915_WRITE(PCH_PP_CONTROL, |
1229 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); |
||
1230 | } else { |
||
1231 | I915_WRITE(PP_CONTROL, |
||
1232 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); |
||
1233 | } |
||
1234 | // dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
||
1235 | // if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |
||
1236 | // DRM_DEBUG_KMS("lid notifier registration failed\n"); |
||
1237 | // dev_priv->lid_notifier.notifier_call = NULL; |
||
1238 | // } |
||
1239 | drm_sysfs_connector_add(connector); |
||
1240 | |||
3243 | Serge | 1241 | intel_panel_init(&intel_connector->panel, fixed_mode); |
1242 | intel_panel_setup_backlight(connector); |
||
2330 | Serge | 1243 | |
1244 | return true; |
||
1245 | |||
1246 | failed: |
||
1247 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
||
1248 | drm_connector_cleanup(connector); |
||
1249 | drm_encoder_cleanup(encoder); |
||
3243 | Serge | 1250 | if (fixed_mode) |
1251 | drm_mode_destroy(dev, fixed_mode); |
||
1252 | kfree(lvds_encoder); |
||
1253 | kfree(lvds_connector); |
||
2330 | Serge | 1254 | return false; |
1255 | }><>><>><>><>><>><>>>>>><>><>>><>><>>><>>><> |