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Rev | Author | Line No. | Line |
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4126 | Serge | 1 | /* |
2 | * Copyright (c) 2008 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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21 | * IN THE SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Eric Anholt |
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25 | * Keith Packard |
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26 | * Mika Kuoppala |
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27 | * |
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28 | */ |
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29 | |||
30 | #include "i915_drv.h" |
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31 | |||
32 | #if 0 |
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33 | static const char *yesno(int v) |
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34 | { |
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35 | return v ? "yes" : "no"; |
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36 | } |
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37 | |||
38 | static const char *ring_str(int ring) |
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39 | { |
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40 | switch (ring) { |
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41 | case RCS: return "render"; |
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42 | case VCS: return "bsd"; |
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43 | case BCS: return "blt"; |
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44 | case VECS: return "vebox"; |
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5060 | serge | 45 | case VCS2: return "bsd2"; |
4126 | Serge | 46 | default: return ""; |
47 | } |
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48 | } |
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49 | |||
50 | static const char *pin_flag(int pinned) |
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51 | { |
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52 | if (pinned > 0) |
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53 | return " P"; |
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54 | else if (pinned < 0) |
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55 | return " p"; |
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56 | else |
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57 | return ""; |
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58 | } |
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59 | |||
60 | static const char *tiling_flag(int tiling) |
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61 | { |
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62 | switch (tiling) { |
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63 | default: |
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64 | case I915_TILING_NONE: return ""; |
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65 | case I915_TILING_X: return " X"; |
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66 | case I915_TILING_Y: return " Y"; |
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67 | } |
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68 | } |
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69 | |||
70 | static const char *dirty_flag(int dirty) |
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71 | { |
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72 | return dirty ? " dirty" : ""; |
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73 | } |
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74 | |||
75 | static const char *purgeable_flag(int purgeable) |
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76 | { |
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77 | return purgeable ? " purgeable" : ""; |
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78 | } |
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79 | |||
80 | static bool __i915_error_ok(struct drm_i915_error_state_buf *e) |
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81 | { |
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82 | |||
83 | if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) { |
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84 | e->err = -ENOSPC; |
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85 | return false; |
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86 | } |
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87 | |||
88 | if (e->bytes == e->size - 1 || e->err) |
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89 | return false; |
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90 | |||
91 | return true; |
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92 | } |
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93 | |||
94 | static bool __i915_error_seek(struct drm_i915_error_state_buf *e, |
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95 | unsigned len) |
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96 | { |
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97 | if (e->pos + len <= e->start) { |
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98 | e->pos += len; |
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99 | return false; |
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100 | } |
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101 | |||
102 | /* First vsnprintf needs to fit in its entirety for memmove */ |
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103 | if (len >= e->size) { |
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104 | e->err = -EIO; |
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105 | return false; |
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106 | } |
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107 | |||
108 | return true; |
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109 | } |
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110 | |||
111 | static void __i915_error_advance(struct drm_i915_error_state_buf *e, |
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112 | unsigned len) |
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113 | { |
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114 | /* If this is first printf in this window, adjust it so that |
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115 | * start position matches start of the buffer |
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116 | */ |
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117 | |||
118 | if (e->pos < e->start) { |
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119 | const size_t off = e->start - e->pos; |
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120 | |||
121 | /* Should not happen but be paranoid */ |
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122 | if (off > len || e->bytes) { |
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123 | e->err = -EIO; |
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124 | return; |
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125 | } |
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126 | |||
127 | memmove(e->buf, e->buf + off, len - off); |
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128 | e->bytes = len - off; |
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129 | e->pos = e->start; |
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130 | return; |
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131 | } |
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132 | |||
133 | e->bytes += len; |
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134 | e->pos += len; |
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135 | } |
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136 | |||
137 | static void i915_error_vprintf(struct drm_i915_error_state_buf *e, |
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138 | const char *f, va_list args) |
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139 | { |
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140 | unsigned len; |
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141 | |||
142 | if (!__i915_error_ok(e)) |
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143 | return; |
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144 | |||
145 | /* Seek the first printf which is hits start position */ |
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146 | if (e->pos < e->start) { |
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147 | va_list tmp; |
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148 | |||
149 | va_copy(tmp, args); |
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5060 | serge | 150 | len = vsnprintf(NULL, 0, f, tmp); |
151 | va_end(tmp); |
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152 | |||
153 | if (!__i915_error_seek(e, len)) |
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4126 | Serge | 154 | return; |
155 | } |
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156 | |||
157 | len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args); |
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158 | if (len >= e->size - e->bytes) |
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159 | len = e->size - e->bytes - 1; |
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160 | |||
161 | __i915_error_advance(e, len); |
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162 | } |
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163 | |||
164 | static void i915_error_puts(struct drm_i915_error_state_buf *e, |
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165 | const char *str) |
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166 | { |
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167 | unsigned len; |
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168 | |||
169 | if (!__i915_error_ok(e)) |
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170 | return; |
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171 | |||
172 | len = strlen(str); |
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173 | |||
174 | /* Seek the first printf which is hits start position */ |
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175 | if (e->pos < e->start) { |
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176 | if (!__i915_error_seek(e, len)) |
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177 | return; |
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178 | } |
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179 | |||
180 | if (len >= e->size - e->bytes) |
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181 | len = e->size - e->bytes - 1; |
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182 | memcpy(e->buf + e->bytes, str, len); |
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183 | |||
184 | __i915_error_advance(e, len); |
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185 | } |
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186 | |||
187 | #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__) |
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188 | #define err_puts(e, s) i915_error_puts(e, s) |
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189 | |||
190 | static void print_error_buffers(struct drm_i915_error_state_buf *m, |
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191 | const char *name, |
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192 | struct drm_i915_error_buffer *err, |
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193 | int count) |
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194 | { |
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5354 | serge | 195 | err_printf(m, " %s [%d]:\n", name, count); |
4126 | Serge | 196 | |
197 | while (count--) { |
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198 | err_printf(m, " %08x %8u %02x %02x %x %x", |
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199 | err->gtt_offset, |
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200 | err->size, |
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201 | err->read_domains, |
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202 | err->write_domain, |
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203 | err->rseqno, err->wseqno); |
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204 | err_puts(m, pin_flag(err->pinned)); |
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205 | err_puts(m, tiling_flag(err->tiling)); |
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206 | err_puts(m, dirty_flag(err->dirty)); |
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207 | err_puts(m, purgeable_flag(err->purgeable)); |
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5060 | serge | 208 | err_puts(m, err->userptr ? " userptr" : ""); |
4126 | Serge | 209 | err_puts(m, err->ring != -1 ? " " : ""); |
210 | err_puts(m, ring_str(err->ring)); |
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5354 | serge | 211 | err_puts(m, i915_cache_level_str(m->i915, err->cache_level)); |
4126 | Serge | 212 | |
213 | if (err->name) |
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214 | err_printf(m, " (name: %d)", err->name); |
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215 | if (err->fence_reg != I915_FENCE_REG_NONE) |
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216 | err_printf(m, " (fence: %d)", err->fence_reg); |
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217 | |||
218 | err_puts(m, "\n"); |
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219 | err++; |
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220 | } |
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221 | } |
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222 | |||
4560 | Serge | 223 | static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a) |
224 | { |
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225 | switch (a) { |
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226 | case HANGCHECK_IDLE: |
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227 | return "idle"; |
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228 | case HANGCHECK_WAIT: |
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229 | return "wait"; |
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230 | case HANGCHECK_ACTIVE: |
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231 | return "active"; |
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5354 | serge | 232 | case HANGCHECK_ACTIVE_LOOP: |
233 | return "active (loop)"; |
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4560 | Serge | 234 | case HANGCHECK_KICK: |
235 | return "kick"; |
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236 | case HANGCHECK_HUNG: |
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237 | return "hung"; |
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238 | } |
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239 | |||
240 | return "unknown"; |
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241 | } |
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242 | |||
4126 | Serge | 243 | static void i915_ring_error_state(struct drm_i915_error_state_buf *m, |
244 | struct drm_device *dev, |
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5060 | serge | 245 | struct drm_i915_error_ring *ring) |
4126 | Serge | 246 | { |
5060 | serge | 247 | if (!ring->valid) |
4560 | Serge | 248 | return; |
249 | |||
5060 | serge | 250 | err_printf(m, " HEAD: 0x%08x\n", ring->head); |
251 | err_printf(m, " TAIL: 0x%08x\n", ring->tail); |
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252 | err_printf(m, " CTL: 0x%08x\n", ring->ctl); |
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253 | err_printf(m, " HWS: 0x%08x\n", ring->hws); |
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254 | err_printf(m, " ACTHD: 0x%08x %08x\n", (u32)(ring->acthd>>32), (u32)ring->acthd); |
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255 | err_printf(m, " IPEIR: 0x%08x\n", ring->ipeir); |
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256 | err_printf(m, " IPEHR: 0x%08x\n", ring->ipehr); |
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257 | err_printf(m, " INSTDONE: 0x%08x\n", ring->instdone); |
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4560 | Serge | 258 | if (INTEL_INFO(dev)->gen >= 4) { |
5060 | serge | 259 | err_printf(m, " BBADDR: 0x%08x %08x\n", (u32)(ring->bbaddr>>32), (u32)ring->bbaddr); |
260 | err_printf(m, " BB_STATE: 0x%08x\n", ring->bbstate); |
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261 | err_printf(m, " INSTPS: 0x%08x\n", ring->instps); |
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4560 | Serge | 262 | } |
5060 | serge | 263 | err_printf(m, " INSTPM: 0x%08x\n", ring->instpm); |
264 | err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ring->faddr), |
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265 | lower_32_bits(ring->faddr)); |
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4126 | Serge | 266 | if (INTEL_INFO(dev)->gen >= 6) { |
5060 | serge | 267 | err_printf(m, " RC PSMI: 0x%08x\n", ring->rc_psmi); |
268 | err_printf(m, " FAULT_REG: 0x%08x\n", ring->fault_reg); |
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4126 | Serge | 269 | err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n", |
5060 | serge | 270 | ring->semaphore_mboxes[0], |
271 | ring->semaphore_seqno[0]); |
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4126 | Serge | 272 | err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n", |
5060 | serge | 273 | ring->semaphore_mboxes[1], |
274 | ring->semaphore_seqno[1]); |
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4126 | Serge | 275 | if (HAS_VEBOX(dev)) { |
276 | err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n", |
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5060 | serge | 277 | ring->semaphore_mboxes[2], |
278 | ring->semaphore_seqno[2]); |
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4126 | Serge | 279 | } |
280 | } |
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5060 | serge | 281 | if (USES_PPGTT(dev)) { |
282 | err_printf(m, " GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode); |
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283 | |||
284 | if (INTEL_INFO(dev)->gen >= 8) { |
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285 | int i; |
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286 | for (i = 0; i < 4; i++) |
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287 | err_printf(m, " PDP%d: 0x%016llx\n", |
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288 | i, ring->vm_info.pdp[i]); |
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289 | } else { |
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290 | err_printf(m, " PP_DIR_BASE: 0x%08x\n", |
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291 | ring->vm_info.pp_dir_base); |
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292 | } |
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293 | } |
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294 | err_printf(m, " seqno: 0x%08x\n", ring->seqno); |
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295 | err_printf(m, " waiting: %s\n", yesno(ring->waiting)); |
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296 | err_printf(m, " ring->head: 0x%08x\n", ring->cpu_ring_head); |
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297 | err_printf(m, " ring->tail: 0x%08x\n", ring->cpu_ring_tail); |
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4560 | Serge | 298 | err_printf(m, " hangcheck: %s [%d]\n", |
5060 | serge | 299 | hangcheck_action_to_str(ring->hangcheck_action), |
300 | ring->hangcheck_score); |
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4126 | Serge | 301 | } |
302 | |||
303 | void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) |
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304 | { |
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305 | va_list args; |
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306 | |||
307 | va_start(args, f); |
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308 | i915_error_vprintf(e, f, args); |
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309 | va_end(args); |
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310 | } |
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311 | |||
5060 | serge | 312 | static void print_error_obj(struct drm_i915_error_state_buf *m, |
313 | struct drm_i915_error_object *obj) |
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314 | { |
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315 | int page, offset, elt; |
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316 | |||
317 | for (page = offset = 0; page < obj->page_count; page++) { |
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318 | for (elt = 0; elt < PAGE_SIZE/4; elt++) { |
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319 | err_printf(m, "%08x : %08x\n", offset, |
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320 | obj->pages[page][elt]); |
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321 | offset += 4; |
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322 | } |
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323 | } |
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324 | } |
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325 | |||
4126 | Serge | 326 | int i915_error_state_to_str(struct drm_i915_error_state_buf *m, |
327 | const struct i915_error_state_file_priv *error_priv) |
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328 | { |
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329 | struct drm_device *dev = error_priv->dev; |
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5060 | serge | 330 | struct drm_i915_private *dev_priv = dev->dev_private; |
4126 | Serge | 331 | struct drm_i915_error_state *error = error_priv->error; |
5060 | serge | 332 | int i, j, offset, elt; |
333 | int max_hangcheck_score; |
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4126 | Serge | 334 | |
335 | if (!error) { |
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336 | err_printf(m, "no error state collected\n"); |
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337 | goto out; |
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338 | } |
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339 | |||
5060 | serge | 340 | err_printf(m, "%s\n", error->error_msg); |
4126 | Serge | 341 | err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
342 | error->time.tv_usec); |
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343 | err_printf(m, "Kernel: " UTS_RELEASE "\n"); |
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5060 | serge | 344 | max_hangcheck_score = 0; |
345 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
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346 | if (error->ring[i].hangcheck_score > max_hangcheck_score) |
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347 | max_hangcheck_score = error->ring[i].hangcheck_score; |
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348 | } |
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349 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
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350 | if (error->ring[i].hangcheck_score == max_hangcheck_score && |
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351 | error->ring[i].pid != -1) { |
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352 | err_printf(m, "Active process (on ring %s): %s [%d]\n", |
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353 | ring_str(i), |
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354 | error->ring[i].comm, |
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355 | error->ring[i].pid); |
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356 | } |
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357 | } |
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358 | err_printf(m, "Reset count: %u\n", error->reset_count); |
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359 | err_printf(m, "Suspend count: %u\n", error->suspend_count); |
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4560 | Serge | 360 | err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device); |
4126 | Serge | 361 | err_printf(m, "EIR: 0x%08x\n", error->eir); |
362 | err_printf(m, "IER: 0x%08x\n", error->ier); |
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363 | err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
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364 | err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); |
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365 | err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); |
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366 | err_printf(m, "CCID: 0x%08x\n", error->ccid); |
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4560 | Serge | 367 | err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); |
4126 | Serge | 368 | |
369 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
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370 | err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
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371 | |||
372 | for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) |
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373 | err_printf(m, " INSTDONE_%d: 0x%08x\n", i, |
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374 | error->extra_instdone[i]); |
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375 | |||
376 | if (INTEL_INFO(dev)->gen >= 6) { |
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377 | err_printf(m, "ERROR: 0x%08x\n", error->error); |
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378 | err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); |
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379 | } |
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380 | |||
381 | if (INTEL_INFO(dev)->gen == 7) |
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382 | err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); |
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383 | |||
5060 | serge | 384 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
385 | err_printf(m, "%s command stream:\n", ring_str(i)); |
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386 | i915_ring_error_state(m, dev, &error->ring[i]); |
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387 | } |
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4126 | Serge | 388 | |
389 | if (error->active_bo) |
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390 | print_error_buffers(m, "Active", |
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391 | error->active_bo[0], |
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392 | error->active_bo_count[0]); |
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393 | |||
394 | if (error->pinned_bo) |
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395 | print_error_buffers(m, "Pinned", |
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396 | error->pinned_bo[0], |
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397 | error->pinned_bo_count[0]); |
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398 | |||
399 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
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400 | struct drm_i915_error_object *obj; |
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401 | |||
5060 | serge | 402 | obj = error->ring[i].batchbuffer; |
403 | if (obj) { |
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404 | err_puts(m, dev_priv->ring[i].name); |
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405 | if (error->ring[i].pid != -1) |
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406 | err_printf(m, " (submitted by %s [%d])", |
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407 | error->ring[i].comm, |
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408 | error->ring[i].pid); |
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409 | err_printf(m, " --- gtt_offset = 0x%08x\n", |
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4126 | Serge | 410 | obj->gtt_offset); |
5060 | serge | 411 | print_error_obj(m, obj); |
4126 | Serge | 412 | } |
5060 | serge | 413 | |
414 | obj = error->ring[i].wa_batchbuffer; |
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415 | if (obj) { |
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416 | err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n", |
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417 | dev_priv->ring[i].name, obj->gtt_offset); |
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418 | print_error_obj(m, obj); |
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4126 | Serge | 419 | } |
420 | |||
421 | if (error->ring[i].num_requests) { |
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422 | err_printf(m, "%s --- %d requests\n", |
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423 | dev_priv->ring[i].name, |
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424 | error->ring[i].num_requests); |
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425 | for (j = 0; j < error->ring[i].num_requests; j++) { |
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426 | err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", |
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427 | error->ring[i].requests[j].seqno, |
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428 | error->ring[i].requests[j].jiffies, |
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429 | error->ring[i].requests[j].tail); |
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430 | } |
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431 | } |
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432 | |||
433 | if ((obj = error->ring[i].ringbuffer)) { |
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434 | err_printf(m, "%s --- ringbuffer = 0x%08x\n", |
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435 | dev_priv->ring[i].name, |
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436 | obj->gtt_offset); |
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5060 | serge | 437 | print_error_obj(m, obj); |
4126 | Serge | 438 | } |
439 | |||
5060 | serge | 440 | if ((obj = error->ring[i].hws_page)) { |
441 | err_printf(m, "%s --- HW Status = 0x%08x\n", |
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4126 | Serge | 442 | dev_priv->ring[i].name, |
443 | obj->gtt_offset); |
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444 | offset = 0; |
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445 | for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { |
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446 | err_printf(m, "[%04x] %08x %08x %08x %08x\n", |
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5060 | serge | 447 | offset, |
4126 | Serge | 448 | obj->pages[0][elt], |
449 | obj->pages[0][elt+1], |
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450 | obj->pages[0][elt+2], |
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451 | obj->pages[0][elt+3]); |
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452 | offset += 16; |
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453 | } |
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454 | } |
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455 | |||
5060 | serge | 456 | if ((obj = error->ring[i].ctx)) { |
457 | err_printf(m, "%s --- HW Context = 0x%08x\n", |
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458 | dev_priv->ring[i].name, |
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459 | obj->gtt_offset); |
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460 | print_error_obj(m, obj); |
||
461 | } |
||
462 | } |
||
463 | |||
4126 | Serge | 464 | if (error->overlay) |
465 | intel_overlay_print_error_state(m, error->overlay); |
||
466 | |||
467 | if (error->display) |
||
468 | intel_display_print_error_state(m, dev, error->display); |
||
469 | |||
470 | out: |
||
471 | if (m->bytes == 0 && m->err) |
||
472 | return m->err; |
||
473 | |||
474 | return 0; |
||
475 | } |
||
476 | |||
477 | int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, |
||
478 | size_t count, loff_t pos) |
||
479 | { |
||
480 | memset(ebuf, 0, sizeof(*ebuf)); |
||
481 | |||
482 | /* We need to have enough room to store any i915_error_state printf |
||
483 | * so that we can move it to start position. |
||
484 | */ |
||
485 | ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE; |
||
486 | ebuf->buf = kmalloc(ebuf->size, |
||
487 | GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN); |
||
488 | |||
489 | if (ebuf->buf == NULL) { |
||
490 | ebuf->size = PAGE_SIZE; |
||
491 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
||
492 | } |
||
493 | |||
494 | if (ebuf->buf == NULL) { |
||
495 | ebuf->size = 128; |
||
496 | ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); |
||
497 | } |
||
498 | |||
499 | if (ebuf->buf == NULL) |
||
500 | return -ENOMEM; |
||
501 | |||
502 | ebuf->start = pos; |
||
503 | |||
504 | return 0; |
||
505 | } |
||
506 | |||
507 | static void i915_error_object_free(struct drm_i915_error_object *obj) |
||
508 | { |
||
509 | int page; |
||
510 | |||
511 | if (obj == NULL) |
||
512 | return; |
||
513 | |||
514 | for (page = 0; page < obj->page_count; page++) |
||
515 | kfree(obj->pages[page]); |
||
516 | |||
517 | kfree(obj); |
||
518 | } |
||
519 | |||
520 | static void i915_error_state_free(struct kref *error_ref) |
||
521 | { |
||
522 | struct drm_i915_error_state *error = container_of(error_ref, |
||
523 | typeof(*error), ref); |
||
524 | int i; |
||
525 | |||
526 | for (i = 0; i < ARRAY_SIZE(error->ring); i++) { |
||
527 | i915_error_object_free(error->ring[i].batchbuffer); |
||
528 | i915_error_object_free(error->ring[i].ringbuffer); |
||
5060 | serge | 529 | i915_error_object_free(error->ring[i].hws_page); |
4126 | Serge | 530 | i915_error_object_free(error->ring[i].ctx); |
531 | kfree(error->ring[i].requests); |
||
532 | } |
||
533 | |||
534 | kfree(error->active_bo); |
||
535 | kfree(error->overlay); |
||
536 | kfree(error->display); |
||
537 | kfree(error); |
||
538 | } |
||
539 | |||
540 | static struct drm_i915_error_object * |
||
541 | i915_error_object_create_sized(struct drm_i915_private *dev_priv, |
||
542 | struct drm_i915_gem_object *src, |
||
5060 | serge | 543 | struct i915_address_space *vm, |
4126 | Serge | 544 | const int num_pages) |
545 | { |
||
546 | struct drm_i915_error_object *dst; |
||
547 | int i; |
||
548 | u32 reloc_offset; |
||
549 | |||
550 | if (src == NULL || src->pages == NULL) |
||
551 | return NULL; |
||
552 | |||
553 | dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); |
||
554 | if (dst == NULL) |
||
555 | return NULL; |
||
556 | |||
5060 | serge | 557 | reloc_offset = dst->gtt_offset = i915_gem_obj_offset(src, vm); |
4126 | Serge | 558 | for (i = 0; i < num_pages; i++) { |
559 | unsigned long flags; |
||
560 | void *d; |
||
561 | |||
562 | d = kmalloc(PAGE_SIZE, GFP_ATOMIC); |
||
563 | if (d == NULL) |
||
564 | goto unwind; |
||
565 | |||
566 | local_irq_save(flags); |
||
5060 | serge | 567 | if (src->cache_level == I915_CACHE_NONE && |
568 | reloc_offset < dev_priv->gtt.mappable_end && |
||
569 | src->has_global_gtt_mapping && |
||
570 | i915_is_ggtt(vm)) { |
||
4126 | Serge | 571 | void __iomem *s; |
572 | |||
573 | /* Simply ignore tiling or any overlapping fence. |
||
574 | * It's part of the error state, and this hopefully |
||
575 | * captures what the GPU read. |
||
576 | */ |
||
577 | |||
578 | s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, |
||
579 | reloc_offset); |
||
580 | memcpy_fromio(d, s, PAGE_SIZE); |
||
581 | io_mapping_unmap_atomic(s); |
||
582 | } else if (src->stolen) { |
||
583 | unsigned long offset; |
||
584 | |||
585 | offset = dev_priv->mm.stolen_base; |
||
586 | offset += src->stolen->start; |
||
587 | offset += i << PAGE_SHIFT; |
||
588 | |||
589 | memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE); |
||
590 | } else { |
||
591 | struct page *page; |
||
592 | void *s; |
||
593 | |||
594 | page = i915_gem_object_get_page(src, i); |
||
595 | |||
596 | drm_clflush_pages(&page, 1); |
||
597 | |||
598 | s = kmap_atomic(page); |
||
599 | memcpy(d, s, PAGE_SIZE); |
||
600 | kunmap_atomic(s); |
||
601 | |||
602 | drm_clflush_pages(&page, 1); |
||
603 | } |
||
604 | local_irq_restore(flags); |
||
605 | |||
606 | dst->pages[i] = d; |
||
607 | |||
608 | reloc_offset += PAGE_SIZE; |
||
609 | } |
||
610 | dst->page_count = num_pages; |
||
611 | |||
612 | return dst; |
||
613 | |||
614 | unwind: |
||
615 | while (i--) |
||
616 | kfree(dst->pages[i]); |
||
617 | kfree(dst); |
||
618 | return NULL; |
||
619 | } |
||
5060 | serge | 620 | #define i915_error_object_create(dev_priv, src, vm) \ |
621 | i915_error_object_create_sized((dev_priv), (src), (vm), \ |
||
4126 | Serge | 622 | (src)->base.size>>PAGE_SHIFT) |
623 | |||
5060 | serge | 624 | #define i915_error_ggtt_object_create(dev_priv, src) \ |
625 | i915_error_object_create_sized((dev_priv), (src), &(dev_priv)->gtt.base, \ |
||
626 | (src)->base.size>>PAGE_SHIFT) |
||
627 | |||
4126 | Serge | 628 | static void capture_bo(struct drm_i915_error_buffer *err, |
629 | struct drm_i915_gem_object *obj) |
||
630 | { |
||
631 | err->size = obj->base.size; |
||
632 | err->name = obj->base.name; |
||
633 | err->rseqno = obj->last_read_seqno; |
||
634 | err->wseqno = obj->last_write_seqno; |
||
635 | err->gtt_offset = i915_gem_obj_ggtt_offset(obj); |
||
636 | err->read_domains = obj->base.read_domains; |
||
637 | err->write_domain = obj->base.write_domain; |
||
638 | err->fence_reg = obj->fence_reg; |
||
639 | err->pinned = 0; |
||
5060 | serge | 640 | if (i915_gem_obj_is_pinned(obj)) |
4126 | Serge | 641 | err->pinned = 1; |
642 | if (obj->user_pin_count > 0) |
||
643 | err->pinned = -1; |
||
644 | err->tiling = obj->tiling_mode; |
||
645 | err->dirty = obj->dirty; |
||
646 | err->purgeable = obj->madv != I915_MADV_WILLNEED; |
||
5060 | serge | 647 | err->userptr = obj->userptr.mm != NULL; |
4126 | Serge | 648 | err->ring = obj->ring ? obj->ring->id : -1; |
649 | err->cache_level = obj->cache_level; |
||
650 | } |
||
651 | |||
652 | static u32 capture_active_bo(struct drm_i915_error_buffer *err, |
||
653 | int count, struct list_head *head) |
||
654 | { |
||
655 | struct i915_vma *vma; |
||
656 | int i = 0; |
||
657 | |||
658 | list_for_each_entry(vma, head, mm_list) { |
||
659 | capture_bo(err++, vma->obj); |
||
660 | if (++i == count) |
||
661 | break; |
||
662 | } |
||
663 | |||
664 | return i; |
||
665 | } |
||
666 | |||
667 | static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, |
||
668 | int count, struct list_head *head) |
||
669 | { |
||
670 | struct drm_i915_gem_object *obj; |
||
671 | int i = 0; |
||
672 | |||
673 | list_for_each_entry(obj, head, global_list) { |
||
5060 | serge | 674 | if (!i915_gem_obj_is_pinned(obj)) |
4126 | Serge | 675 | continue; |
676 | |||
677 | capture_bo(err++, obj); |
||
678 | if (++i == count) |
||
679 | break; |
||
680 | } |
||
681 | |||
682 | return i; |
||
683 | } |
||
684 | |||
5060 | serge | 685 | /* Generate a semi-unique error code. The code is not meant to have meaning, The |
686 | * code's only purpose is to try to prevent false duplicated bug reports by |
||
687 | * grossly estimating a GPU error state. |
||
688 | * |
||
689 | * TODO Ideally, hashing the batchbuffer would be a very nice way to determine |
||
690 | * the hang if we could strip the GTT offset information from it. |
||
691 | * |
||
692 | * It's only a small step better than a random number in its current form. |
||
693 | */ |
||
694 | static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv, |
||
695 | struct drm_i915_error_state *error, |
||
696 | int *ring_id) |
||
697 | { |
||
698 | uint32_t error_code = 0; |
||
699 | int i; |
||
700 | |||
701 | /* IPEHR would be an ideal way to detect errors, as it's the gross |
||
702 | * measure of "the command that hung." However, has some very common |
||
703 | * synchronization commands which almost always appear in the case |
||
704 | * strictly a client bug. Use instdone to differentiate those some. |
||
705 | */ |
||
706 | for (i = 0; i < I915_NUM_RINGS; i++) { |
||
707 | if (error->ring[i].hangcheck_action == HANGCHECK_HUNG) { |
||
708 | if (ring_id) |
||
709 | *ring_id = i; |
||
710 | |||
711 | return error->ring[i].ipehr ^ error->ring[i].instdone; |
||
712 | } |
||
713 | } |
||
714 | |||
715 | return error_code; |
||
716 | } |
||
717 | |||
4126 | Serge | 718 | static void i915_gem_record_fences(struct drm_device *dev, |
719 | struct drm_i915_error_state *error) |
||
720 | { |
||
721 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
722 | int i; |
||
723 | |||
724 | /* Fences */ |
||
725 | switch (INTEL_INFO(dev)->gen) { |
||
4560 | Serge | 726 | case 8: |
4126 | Serge | 727 | case 7: |
728 | case 6: |
||
729 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
||
730 | error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); |
||
731 | break; |
||
732 | case 5: |
||
733 | case 4: |
||
734 | for (i = 0; i < 16; i++) |
||
735 | error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); |
||
736 | break; |
||
737 | case 3: |
||
738 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) |
||
739 | for (i = 0; i < 8; i++) |
||
740 | error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); |
||
741 | case 2: |
||
742 | for (i = 0; i < 8; i++) |
||
743 | error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); |
||
744 | break; |
||
745 | |||
746 | default: |
||
747 | BUG(); |
||
748 | } |
||
749 | } |
||
750 | |||
751 | static void i915_record_ring_state(struct drm_device *dev, |
||
5060 | serge | 752 | struct intel_engine_cs *ring, |
753 | struct drm_i915_error_ring *ering) |
||
4126 | Serge | 754 | { |
755 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
756 | |||
757 | if (INTEL_INFO(dev)->gen >= 6) { |
||
5060 | serge | 758 | ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); |
759 | ering->fault_reg = I915_READ(RING_FAULT_REG(ring)); |
||
760 | ering->semaphore_mboxes[0] |
||
4126 | Serge | 761 | = I915_READ(RING_SYNC_0(ring->mmio_base)); |
5060 | serge | 762 | ering->semaphore_mboxes[1] |
4126 | Serge | 763 | = I915_READ(RING_SYNC_1(ring->mmio_base)); |
5060 | serge | 764 | ering->semaphore_seqno[0] = ring->semaphore.sync_seqno[0]; |
765 | ering->semaphore_seqno[1] = ring->semaphore.sync_seqno[1]; |
||
4126 | Serge | 766 | } |
767 | |||
768 | if (HAS_VEBOX(dev)) { |
||
5060 | serge | 769 | ering->semaphore_mboxes[2] = |
4126 | Serge | 770 | I915_READ(RING_SYNC_2(ring->mmio_base)); |
5060 | serge | 771 | ering->semaphore_seqno[2] = ring->semaphore.sync_seqno[2]; |
4126 | Serge | 772 | } |
773 | |||
774 | if (INTEL_INFO(dev)->gen >= 4) { |
||
5060 | serge | 775 | ering->faddr = I915_READ(RING_DMA_FADD(ring->mmio_base)); |
776 | ering->ipeir = I915_READ(RING_IPEIR(ring->mmio_base)); |
||
777 | ering->ipehr = I915_READ(RING_IPEHR(ring->mmio_base)); |
||
778 | ering->instdone = I915_READ(RING_INSTDONE(ring->mmio_base)); |
||
779 | ering->instps = I915_READ(RING_INSTPS(ring->mmio_base)); |
||
780 | ering->bbaddr = I915_READ(RING_BBADDR(ring->mmio_base)); |
||
781 | if (INTEL_INFO(dev)->gen >= 8) { |
||
782 | ering->faddr |= (u64) I915_READ(RING_DMA_FADD_UDW(ring->mmio_base)) << 32; |
||
783 | ering->bbaddr |= (u64) I915_READ(RING_BBADDR_UDW(ring->mmio_base)) << 32; |
||
784 | } |
||
785 | ering->bbstate = I915_READ(RING_BBSTATE(ring->mmio_base)); |
||
4126 | Serge | 786 | } else { |
5060 | serge | 787 | ering->faddr = I915_READ(DMA_FADD_I8XX); |
788 | ering->ipeir = I915_READ(IPEIR); |
||
789 | ering->ipehr = I915_READ(IPEHR); |
||
790 | ering->instdone = I915_READ(INSTDONE); |
||
4126 | Serge | 791 | } |
792 | |||
5060 | serge | 793 | ering->waiting = waitqueue_active(&ring->irq_queue); |
794 | ering->instpm = I915_READ(RING_INSTPM(ring->mmio_base)); |
||
795 | ering->seqno = ring->get_seqno(ring, false); |
||
796 | ering->acthd = intel_ring_get_active_head(ring); |
||
797 | ering->head = I915_READ_HEAD(ring); |
||
798 | ering->tail = I915_READ_TAIL(ring); |
||
799 | ering->ctl = I915_READ_CTL(ring); |
||
4126 | Serge | 800 | |
5060 | serge | 801 | if (I915_NEED_GFX_HWS(dev)) { |
802 | int mmio; |
||
4560 | Serge | 803 | |
5060 | serge | 804 | if (IS_GEN7(dev)) { |
805 | switch (ring->id) { |
||
806 | default: |
||
807 | case RCS: |
||
808 | mmio = RENDER_HWS_PGA_GEN7; |
||
809 | break; |
||
810 | case BCS: |
||
811 | mmio = BLT_HWS_PGA_GEN7; |
||
812 | break; |
||
813 | case VCS: |
||
814 | mmio = BSD_HWS_PGA_GEN7; |
||
815 | break; |
||
816 | case VECS: |
||
817 | mmio = VEBOX_HWS_PGA_GEN7; |
||
818 | break; |
||
819 | } |
||
820 | } else if (IS_GEN6(ring->dev)) { |
||
821 | mmio = RING_HWS_PGA_GEN6(ring->mmio_base); |
||
822 | } else { |
||
823 | /* XXX: gen8 returns to sanity */ |
||
824 | mmio = RING_HWS_PGA(ring->mmio_base); |
||
825 | } |
||
826 | |||
827 | ering->hws = I915_READ(mmio); |
||
828 | } |
||
829 | |||
830 | ering->cpu_ring_head = ring->buffer->head; |
||
831 | ering->cpu_ring_tail = ring->buffer->tail; |
||
832 | |||
833 | ering->hangcheck_score = ring->hangcheck.score; |
||
834 | ering->hangcheck_action = ring->hangcheck.action; |
||
835 | |||
836 | if (USES_PPGTT(dev)) { |
||
837 | int i; |
||
838 | |||
839 | ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring)); |
||
840 | |||
841 | switch (INTEL_INFO(dev)->gen) { |
||
842 | case 8: |
||
843 | for (i = 0; i < 4; i++) { |
||
844 | ering->vm_info.pdp[i] = |
||
845 | I915_READ(GEN8_RING_PDP_UDW(ring, i)); |
||
846 | ering->vm_info.pdp[i] <<= 32; |
||
847 | ering->vm_info.pdp[i] |= |
||
848 | I915_READ(GEN8_RING_PDP_LDW(ring, i)); |
||
849 | } |
||
850 | break; |
||
851 | case 7: |
||
852 | ering->vm_info.pp_dir_base = |
||
853 | I915_READ(RING_PP_DIR_BASE(ring)); |
||
854 | break; |
||
855 | case 6: |
||
856 | ering->vm_info.pp_dir_base = |
||
857 | I915_READ(RING_PP_DIR_BASE_READ(ring)); |
||
858 | break; |
||
859 | } |
||
860 | } |
||
4126 | Serge | 861 | } |
862 | |||
863 | |||
5060 | serge | 864 | static void i915_gem_record_active_context(struct intel_engine_cs *ring, |
4126 | Serge | 865 | struct drm_i915_error_state *error, |
866 | struct drm_i915_error_ring *ering) |
||
867 | { |
||
868 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
||
869 | struct drm_i915_gem_object *obj; |
||
870 | |||
871 | /* Currently render ring is the only HW context user */ |
||
872 | if (ring->id != RCS || !error->ccid) |
||
873 | return; |
||
874 | |||
875 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { |
||
876 | if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { |
||
5060 | serge | 877 | ering->ctx = i915_error_ggtt_object_create(dev_priv, obj); |
4126 | Serge | 878 | break; |
879 | } |
||
880 | } |
||
881 | } |
||
882 | |||
883 | static void i915_gem_record_rings(struct drm_device *dev, |
||
884 | struct drm_i915_error_state *error) |
||
885 | { |
||
886 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
887 | struct drm_i915_gem_request *request; |
||
888 | int i, count; |
||
889 | |||
4560 | Serge | 890 | for (i = 0; i < I915_NUM_RINGS; i++) { |
5060 | serge | 891 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
4560 | Serge | 892 | |
5060 | serge | 893 | error->ring[i].pid = -1; |
894 | |||
4560 | Serge | 895 | if (ring->dev == NULL) |
896 | continue; |
||
897 | |||
898 | error->ring[i].valid = true; |
||
899 | |||
5060 | serge | 900 | i915_record_ring_state(dev, ring, &error->ring[i]); |
4126 | Serge | 901 | |
5060 | serge | 902 | request = i915_gem_find_active_request(ring); |
903 | if (request) { |
||
904 | /* We need to copy these to an anonymous buffer |
||
905 | * as the simplest method to avoid being overwritten |
||
906 | * by userspace. |
||
907 | */ |
||
4126 | Serge | 908 | error->ring[i].batchbuffer = |
5060 | serge | 909 | i915_error_object_create(dev_priv, |
910 | request->batch_obj, |
||
911 | request->ctx ? |
||
912 | request->ctx->vm : |
||
913 | &dev_priv->gtt.base); |
||
4126 | Serge | 914 | |
5060 | serge | 915 | if (HAS_BROKEN_CS_TLB(dev_priv->dev) && |
916 | ring->scratch.obj) |
||
917 | error->ring[i].wa_batchbuffer = |
||
918 | i915_error_ggtt_object_create(dev_priv, |
||
919 | ring->scratch.obj); |
||
920 | |||
921 | if (request->file_priv) { |
||
922 | struct task_struct *task; |
||
923 | |||
924 | rcu_read_lock(); |
||
925 | task = pid_task(request->file_priv->file->pid, |
||
926 | PIDTYPE_PID); |
||
927 | if (task) { |
||
928 | strcpy(error->ring[i].comm, task->comm); |
||
929 | error->ring[i].pid = task->pid; |
||
930 | } |
||
931 | rcu_read_unlock(); |
||
932 | } |
||
933 | } |
||
934 | |||
4126 | Serge | 935 | error->ring[i].ringbuffer = |
5060 | serge | 936 | i915_error_ggtt_object_create(dev_priv, ring->buffer->obj); |
4126 | Serge | 937 | |
5060 | serge | 938 | if (ring->status_page.obj) |
939 | error->ring[i].hws_page = |
||
940 | i915_error_ggtt_object_create(dev_priv, ring->status_page.obj); |
||
4126 | Serge | 941 | |
942 | i915_gem_record_active_context(ring, error, &error->ring[i]); |
||
943 | |||
944 | count = 0; |
||
945 | list_for_each_entry(request, &ring->request_list, list) |
||
946 | count++; |
||
947 | |||
948 | error->ring[i].num_requests = count; |
||
949 | error->ring[i].requests = |
||
4560 | Serge | 950 | kcalloc(count, sizeof(*error->ring[i].requests), |
4126 | Serge | 951 | GFP_ATOMIC); |
952 | if (error->ring[i].requests == NULL) { |
||
953 | error->ring[i].num_requests = 0; |
||
954 | continue; |
||
955 | } |
||
956 | |||
957 | count = 0; |
||
958 | list_for_each_entry(request, &ring->request_list, list) { |
||
959 | struct drm_i915_error_request *erq; |
||
960 | |||
961 | erq = &error->ring[i].requests[count++]; |
||
962 | erq->seqno = request->seqno; |
||
963 | erq->jiffies = request->emitted_jiffies; |
||
964 | erq->tail = request->tail; |
||
965 | } |
||
966 | } |
||
967 | } |
||
968 | |||
969 | /* FIXME: Since pin count/bound list is global, we duplicate what we capture per |
||
970 | * VM. |
||
971 | */ |
||
972 | static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, |
||
973 | struct drm_i915_error_state *error, |
||
974 | struct i915_address_space *vm, |
||
975 | const int ndx) |
||
976 | { |
||
977 | struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL; |
||
978 | struct drm_i915_gem_object *obj; |
||
979 | struct i915_vma *vma; |
||
980 | int i; |
||
981 | |||
982 | i = 0; |
||
983 | list_for_each_entry(vma, &vm->active_list, mm_list) |
||
984 | i++; |
||
985 | error->active_bo_count[ndx] = i; |
||
986 | list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) |
||
5060 | serge | 987 | if (i915_gem_obj_is_pinned(obj)) |
4126 | Serge | 988 | i++; |
989 | error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; |
||
990 | |||
991 | if (i) { |
||
4560 | Serge | 992 | active_bo = kcalloc(i, sizeof(*active_bo), GFP_ATOMIC); |
4126 | Serge | 993 | if (active_bo) |
994 | pinned_bo = active_bo + error->active_bo_count[ndx]; |
||
995 | } |
||
996 | |||
997 | if (active_bo) |
||
998 | error->active_bo_count[ndx] = |
||
999 | capture_active_bo(active_bo, |
||
1000 | error->active_bo_count[ndx], |
||
1001 | &vm->active_list); |
||
1002 | |||
1003 | if (pinned_bo) |
||
1004 | error->pinned_bo_count[ndx] = |
||
1005 | capture_pinned_bo(pinned_bo, |
||
1006 | error->pinned_bo_count[ndx], |
||
1007 | &dev_priv->mm.bound_list); |
||
1008 | error->active_bo[ndx] = active_bo; |
||
1009 | error->pinned_bo[ndx] = pinned_bo; |
||
1010 | } |
||
1011 | |||
1012 | static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv, |
||
1013 | struct drm_i915_error_state *error) |
||
1014 | { |
||
1015 | struct i915_address_space *vm; |
||
1016 | int cnt = 0, i = 0; |
||
1017 | |||
1018 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
||
1019 | cnt++; |
||
1020 | |||
1021 | error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC); |
||
1022 | error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC); |
||
1023 | error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), |
||
1024 | GFP_ATOMIC); |
||
1025 | error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), |
||
1026 | GFP_ATOMIC); |
||
1027 | |||
1028 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) |
||
1029 | i915_gem_capture_vm(dev_priv, error, vm, i++); |
||
1030 | } |
||
1031 | |||
5060 | serge | 1032 | /* Capture all registers which don't fit into another category. */ |
1033 | static void i915_capture_reg_state(struct drm_i915_private *dev_priv, |
||
1034 | struct drm_i915_error_state *error) |
||
1035 | { |
||
1036 | struct drm_device *dev = dev_priv->dev; |
||
1037 | |||
1038 | /* General organization |
||
1039 | * 1. Registers specific to a single generation |
||
1040 | * 2. Registers which belong to multiple generations |
||
1041 | * 3. Feature specific registers. |
||
1042 | * 4. Everything else |
||
1043 | * Please try to follow the order. |
||
1044 | */ |
||
1045 | |||
1046 | /* 1: Registers specific to a single generation */ |
||
1047 | if (IS_VALLEYVIEW(dev)) { |
||
1048 | error->ier = I915_READ(GTIER) | I915_READ(VLV_IER); |
||
1049 | error->forcewake = I915_READ(FORCEWAKE_VLV); |
||
1050 | } |
||
1051 | |||
1052 | if (IS_GEN7(dev)) |
||
1053 | error->err_int = I915_READ(GEN7_ERR_INT); |
||
1054 | |||
1055 | if (IS_GEN6(dev)) { |
||
1056 | error->forcewake = I915_READ(FORCEWAKE); |
||
1057 | error->gab_ctl = I915_READ(GAB_CTL); |
||
1058 | error->gfx_mode = I915_READ(GFX_MODE); |
||
1059 | } |
||
1060 | |||
1061 | /* 2: Registers which belong to multiple generations */ |
||
1062 | if (INTEL_INFO(dev)->gen >= 7) |
||
1063 | error->forcewake = I915_READ(FORCEWAKE_MT); |
||
1064 | |||
1065 | if (INTEL_INFO(dev)->gen >= 6) { |
||
1066 | error->derrmr = I915_READ(DERRMR); |
||
1067 | error->error = I915_READ(ERROR_GEN6); |
||
1068 | error->done_reg = I915_READ(DONE_REG); |
||
1069 | } |
||
1070 | |||
1071 | /* 3: Feature specific registers */ |
||
1072 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
||
1073 | error->gam_ecochk = I915_READ(GAM_ECOCHK); |
||
1074 | error->gac_eco = I915_READ(GAC_ECO_BITS); |
||
1075 | } |
||
1076 | |||
1077 | /* 4: Everything else */ |
||
1078 | if (HAS_HW_CONTEXTS(dev)) |
||
1079 | error->ccid = I915_READ(CCID); |
||
1080 | |||
1081 | if (HAS_PCH_SPLIT(dev)) |
||
1082 | error->ier = I915_READ(DEIER) | I915_READ(GTIER); |
||
1083 | else { |
||
1084 | if (IS_GEN2(dev)) |
||
1085 | error->ier = I915_READ16(IER); |
||
1086 | else |
||
1087 | error->ier = I915_READ(IER); |
||
1088 | } |
||
1089 | |||
1090 | /* 4: Everything else */ |
||
1091 | error->eir = I915_READ(EIR); |
||
1092 | error->pgtbl_er = I915_READ(PGTBL_ER); |
||
1093 | |||
1094 | i915_get_extra_instdone(dev, error->extra_instdone); |
||
1095 | } |
||
1096 | |||
1097 | static void i915_error_capture_msg(struct drm_device *dev, |
||
1098 | struct drm_i915_error_state *error, |
||
1099 | bool wedged, |
||
1100 | const char *error_msg) |
||
1101 | { |
||
1102 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
1103 | u32 ecode; |
||
1104 | int ring_id = -1, len; |
||
1105 | |||
1106 | ecode = i915_error_generate_code(dev_priv, error, &ring_id); |
||
1107 | |||
1108 | len = scnprintf(error->error_msg, sizeof(error->error_msg), |
||
1109 | "GPU HANG: ecode %d:0x%08x", ring_id, ecode); |
||
1110 | |||
1111 | if (ring_id != -1 && error->ring[ring_id].pid != -1) |
||
1112 | len += scnprintf(error->error_msg + len, |
||
1113 | sizeof(error->error_msg) - len, |
||
1114 | ", in %s [%d]", |
||
1115 | error->ring[ring_id].comm, |
||
1116 | error->ring[ring_id].pid); |
||
1117 | |||
1118 | scnprintf(error->error_msg + len, sizeof(error->error_msg) - len, |
||
1119 | ", reason: %s, action: %s", |
||
1120 | error_msg, |
||
1121 | wedged ? "reset" : "continue"); |
||
1122 | } |
||
1123 | |||
1124 | static void i915_capture_gen_state(struct drm_i915_private *dev_priv, |
||
1125 | struct drm_i915_error_state *error) |
||
1126 | { |
||
1127 | error->reset_count = i915_reset_count(&dev_priv->gpu_error); |
||
1128 | error->suspend_count = dev_priv->suspend_count; |
||
1129 | } |
||
1130 | |||
4126 | Serge | 1131 | /** |
1132 | * i915_capture_error_state - capture an error record for later analysis |
||
1133 | * @dev: drm device |
||
1134 | * |
||
1135 | * Should be called when an error is detected (either a hang or an error |
||
1136 | * interrupt) to capture error state from the time of the error. Fills |
||
1137 | * out a structure which becomes available in debugfs for user level tools |
||
1138 | * to pick up. |
||
1139 | */ |
||
5060 | serge | 1140 | void i915_capture_error_state(struct drm_device *dev, bool wedged, |
1141 | const char *error_msg) |
||
4126 | Serge | 1142 | { |
5060 | serge | 1143 | static bool warned; |
4126 | Serge | 1144 | struct drm_i915_private *dev_priv = dev->dev_private; |
1145 | struct drm_i915_error_state *error; |
||
1146 | unsigned long flags; |
||
1147 | |||
1148 | /* Account for pipe specific data like PIPE*STAT */ |
||
1149 | error = kzalloc(sizeof(*error), GFP_ATOMIC); |
||
1150 | if (!error) { |
||
1151 | DRM_DEBUG_DRIVER("out of memory, not capturing error state\n"); |
||
1152 | return; |
||
1153 | } |
||
1154 | |||
1155 | kref_init(&error->ref); |
||
1156 | |||
5060 | serge | 1157 | i915_capture_gen_state(dev_priv, error); |
1158 | i915_capture_reg_state(dev_priv, error); |
||
4126 | Serge | 1159 | i915_gem_capture_buffers(dev_priv, error); |
1160 | i915_gem_record_fences(dev, error); |
||
1161 | i915_gem_record_rings(dev, error); |
||
1162 | |||
1163 | do_gettimeofday(&error->time); |
||
1164 | |||
1165 | error->overlay = intel_overlay_capture_error_state(dev); |
||
1166 | error->display = intel_display_capture_error_state(dev); |
||
1167 | |||
5060 | serge | 1168 | i915_error_capture_msg(dev, error, wedged, error_msg); |
1169 | DRM_INFO("%s\n", error->error_msg); |
||
1170 | |||
4126 | Serge | 1171 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
1172 | if (dev_priv->gpu_error.first_error == NULL) { |
||
1173 | dev_priv->gpu_error.first_error = error; |
||
1174 | error = NULL; |
||
1175 | } |
||
1176 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
1177 | |||
5060 | serge | 1178 | if (error) { |
4126 | Serge | 1179 | i915_error_state_free(&error->ref); |
5060 | serge | 1180 | return; |
1181 | } |
||
1182 | |||
1183 | if (!warned) { |
||
1184 | DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n"); |
||
1185 | DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n"); |
||
1186 | DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n"); |
||
1187 | DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n"); |
||
1188 | DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n", dev->primary->index); |
||
1189 | warned = true; |
||
1190 | } |
||
4126 | Serge | 1191 | } |
1192 | |||
1193 | void i915_error_state_get(struct drm_device *dev, |
||
1194 | struct i915_error_state_file_priv *error_priv) |
||
1195 | { |
||
1196 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
1197 | unsigned long flags; |
||
1198 | |||
1199 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
1200 | error_priv->error = dev_priv->gpu_error.first_error; |
||
1201 | if (error_priv->error) |
||
1202 | kref_get(&error_priv->error->ref); |
||
1203 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
1204 | |||
1205 | } |
||
1206 | |||
1207 | void i915_error_state_put(struct i915_error_state_file_priv *error_priv) |
||
1208 | { |
||
1209 | if (error_priv->error) |
||
1210 | kref_put(&error_priv->error->ref, i915_error_state_free); |
||
1211 | } |
||
1212 | |||
1213 | void i915_destroy_error_state(struct drm_device *dev) |
||
1214 | { |
||
1215 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
1216 | struct drm_i915_error_state *error; |
||
1217 | unsigned long flags; |
||
1218 | |||
1219 | spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); |
||
1220 | error = dev_priv->gpu_error.first_error; |
||
1221 | dev_priv->gpu_error.first_error = NULL; |
||
1222 | spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); |
||
1223 | |||
1224 | if (error) |
||
1225 | kref_put(&error->ref, i915_error_state_free); |
||
1226 | } |
||
1227 | |||
1228 | const char *i915_cache_level_str(int type) |
||
1229 | { |
||
1230 | switch (type) { |
||
1231 | case I915_CACHE_NONE: return " uncached"; |
||
1232 | case I915_CACHE_LLC: return " snooped or LLC"; |
||
1233 | case I915_CACHE_L3_LLC: return " L3+LLC"; |
||
4560 | Serge | 1234 | case I915_CACHE_WT: return " WT"; |
4126 | Serge | 1235 | default: return ""; |
1236 | } |
||
1237 | } |
||
1238 | #endif |
||
1239 | |||
1240 | /* NB: please notice the memset */ |
||
1241 | void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) |
||
1242 | { |
||
1243 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
1244 | memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); |
||
1245 | |||
1246 | switch (INTEL_INFO(dev)->gen) { |
||
1247 | case 2: |
||
1248 | case 3: |
||
1249 | instdone[0] = I915_READ(INSTDONE); |
||
1250 | break; |
||
1251 | case 4: |
||
1252 | case 5: |
||
1253 | case 6: |
||
1254 | instdone[0] = I915_READ(INSTDONE_I965); |
||
1255 | instdone[1] = I915_READ(INSTDONE1); |
||
1256 | break; |
||
1257 | default: |
||
1258 | WARN_ONCE(1, "Unsupported platform\n"); |
||
1259 | case 7: |
||
4560 | Serge | 1260 | case 8: |
5367 | serge | 1261 | case 9: |
4126 | Serge | 1262 | instdone[0] = I915_READ(GEN7_INSTDONE_1); |
1263 | instdone[1] = I915_READ(GEN7_SC_INSTDONE); |
||
1264 | instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); |
||
1265 | instdone[3] = I915_READ(GEN7_ROW_INSTDONE); |
||
1266 | break; |
||
1267 | } |
||
1268 | }>=><=>>><>><>>>>>>><>>>>>>>>>>>>>>>>>>>=>> |