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2325 | Serge | 1 | |
2 | */ |
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3 | /* |
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4 | * |
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5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
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6 | * All Rights Reserved. |
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7 | * |
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8 | * Permission is hereby granted, free of charge, to any person obtaining a |
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9 | * copy of this software and associated documentation files (the |
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10 | * "Software"), to deal in the Software without restriction, including |
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11 | * without limitation the rights to use, copy, modify, merge, publish, |
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12 | * distribute, sub license, and/or sell copies of the Software, and to |
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13 | * permit persons to whom the Software is furnished to do so, subject to |
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14 | * the following conditions: |
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15 | * |
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16 | * The above copyright notice and this permission notice (including the |
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17 | * next paragraph) shall be included in all copies or substantial portions |
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18 | * of the Software. |
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19 | * |
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20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | * |
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28 | */ |
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29 | |||
30 | |||
2330 | Serge | 31 | #include "drmP.h" |
32 | #include "drm.h" |
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33 | #include "i915_drm.h" |
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34 | #include "i915_drv.h" |
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35 | #include "intel_drv.h" |
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36 | |||
2325 | Serge | 37 | |
2330 | Serge | 38 | |
2325 | Serge | 39 | #include |
40 | #include |
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41 | #include |
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42 | #include |
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43 | |||
44 | |||
45 | |||
46 | |||
2330 | Serge | 47 | |
2327 | Serge | 48 | |
2330 | Serge | 49 | |
50 | |||
51 | |||
52 | |||
53 | |||
54 | |||
55 | |||
56 | |||
57 | |||
58 | |||
59 | |||
60 | |||
61 | |||
62 | |||
63 | |||
2326 | Serge | 64 | |
65 | |||
2325 | Serge | 66 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
67 | .class_mask = 0xff0000, \ |
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68 | .vendor = 0x8086, \ |
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69 | .device = id, \ |
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70 | .subvendor = PCI_ANY_ID, \ |
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71 | .subdevice = PCI_ANY_ID, \ |
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72 | .driver_data = (unsigned long) info } |
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73 | |||
74 | |||
75 | .gen = 6, |
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76 | .need_gfx_hws = 1, .has_hotplug = 1, |
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2330 | Serge | 77 | .has_bsd_ring = 1, |
2325 | Serge | 78 | .has_blt_ring = 1, |
79 | }; |
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80 | |||
81 | |||
82 | .gen = 6, .is_mobile = 1, |
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2330 | Serge | 83 | .need_gfx_hws = 1, .has_hotplug = 1, |
84 | .has_fbc = 1, |
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2325 | Serge | 85 | .has_bsd_ring = 1, |
86 | .has_blt_ring = 1, |
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87 | }; |
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88 | |||
89 | |||
90 | |||
91 | INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), |
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92 | INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), |
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93 | INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), |
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94 | INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), |
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95 | INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), |
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96 | INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), |
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97 | INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), |
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98 | {0, 0, 0} |
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99 | }; |
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100 | |||
101 | |||
2326 | Serge | 102 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 |
103 | #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 |
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104 | #define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00 |
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105 | |||
2325 | Serge | 106 | |
2326 | Serge | 107 | { |
108 | struct drm_i915_private *dev_priv = dev->dev_private; |
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109 | struct pci_dev *pch; |
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110 | |||
111 | |||
112 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
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113 | * make graphics device passthrough work easy for VMM, that only |
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114 | * need to expose ISA bridge to let driver know the real hardware |
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115 | * underneath. This is a requirement from virtualization team. |
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116 | */ |
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117 | pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); |
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118 | if (pch) { |
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119 | if (pch->vendor == PCI_VENDOR_ID_INTEL) { |
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120 | int id; |
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121 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
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122 | |||
123 | |||
124 | dev_priv->pch_type = PCH_IBX; |
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125 | DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); |
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126 | } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { |
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127 | dev_priv->pch_type = PCH_CPT; |
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128 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
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129 | } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) { |
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130 | /* PantherPoint is CPT compatible */ |
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131 | dev_priv->pch_type = PCH_CPT; |
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132 | DRM_DEBUG_KMS("Found PatherPoint PCH\n"); |
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133 | } |
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134 | } |
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135 | } |
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136 | } |
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137 | |||
138 | |||
139 | { |
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140 | int count; |
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141 | |||
142 | |||
143 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1)) |
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144 | udelay(10); |
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145 | |||
146 | |||
147 | POSTING_READ(FORCEWAKE); |
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148 | |||
149 | |||
150 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0) |
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151 | udelay(10); |
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152 | } |
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153 | |||
154 | |||
155 | * Generally this is called implicitly by the register read function. However, |
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156 | * if some sequence requires the GT to not power down then this function should |
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157 | * be called at the beginning of the sequence followed by a call to |
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158 | * gen6_gt_force_wake_put() at the end of the sequence. |
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159 | */ |
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160 | void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
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161 | { |
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162 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
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163 | |||
164 | |||
165 | if (atomic_add_return(1, &dev_priv->forcewake_count) == 1) |
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166 | __gen6_gt_force_wake_get(dev_priv); |
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167 | } |
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168 | |||
169 | |||
170 | { |
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171 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
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172 | POSTING_READ(FORCEWAKE); |
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173 | } |
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174 | |||
175 | |||
176 | * see gen6_gt_force_wake_get() |
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177 | */ |
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178 | void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
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179 | { |
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180 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
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181 | |||
182 | |||
183 | __gen6_gt_force_wake_put(dev_priv); |
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184 | } |
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185 | |||
186 | |||
187 | { |
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188 | if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) { |
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189 | int loop = 500; |
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190 | u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
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191 | while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) { |
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192 | udelay(10); |
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193 | fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
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194 | } |
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195 | // WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES); |
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196 | dev_priv->gt_fifo_count = fifo; |
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197 | } |
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198 | dev_priv->gt_fifo_count--; |
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199 | } |
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200 | |||
201 | |||
202 | |||
203 | |||
204 | |||
205 | |||
2325 | Serge | 206 | |
207 | |||
208 | { |
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209 | static pci_dev_t device; |
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210 | const struct pci_device_id *ent; |
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211 | int err; |
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212 | |||
213 | |||
214 | { |
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215 | DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); |
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216 | return 0; |
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217 | }; |
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218 | |||
219 | |||
220 | |||
221 | |||
222 | { |
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223 | dbgprintf("device not found\n"); |
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224 | return 0; |
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225 | }; |
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226 | |||
227 | |||
228 | device.pci_dev.device); |
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229 | |||
230 | |||
231 | |||
232 | |||
233 | } |
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234 | |||
235 | |||
236 | { |
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237 | static struct drm_device *dev; |
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238 | int ret; |
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239 | |||
240 | |||
241 | |||
242 | |||
243 | if (!dev) |
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244 | return -ENOMEM; |
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245 | |||
246 | |||
247 | // if (ret) |
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248 | // goto err_g1; |
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249 | |||
250 | |||
251 | |||
252 | |||
253 | // printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); |
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254 | // goto err_g2; |
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255 | // } |
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256 | |||
257 | |||
258 | dev->pci_device = pdev->device; |
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259 | dev->pci_vendor = pdev->vendor; |
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260 | |||
261 | |||
262 | INIT_LIST_HEAD(&dev->ctxlist); |
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263 | INIT_LIST_HEAD(&dev->vmalist); |
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264 | INIT_LIST_HEAD(&dev->maplist); |
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265 | |||
266 | |||
267 | mutex_init(&dev->struct_mutex); |
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268 | mutex_init(&dev->ctxlist_mutex); |
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269 | |||
270 | |||
271 | |||
2330 | Serge | 272 | |
2326 | Serge | 273 | // if (ret) |
2325 | Serge | 274 | // goto err_g4; |
275 | |||
276 | |||
277 | // init_display_kms(dev->dev_private, &usermode); |
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278 | // else |
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279 | // init_display(dev->dev_private, &usermode); |
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280 | |||
281 | |||
282 | |||
283 | |||
284 | |||
285 | |||
286 | // drm_put_minor(&dev->primary); |
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287 | //err_g3: |
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288 | // if (drm_core_check_feature(dev, DRIVER_MODESET)) |
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289 | // drm_put_minor(&dev->control); |
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290 | //err_g2: |
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291 | // pci_disable_device(pdev); |
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292 | //err_g1: |
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293 | free(dev); |
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294 | |||
295 | |||
296 | |||
297 | |||
298 | }=>>=>>>>><>><> |
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299 |