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2325 | Serge | 1 | |
2 | */ |
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3 | /* |
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4 | * |
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5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
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6 | * All Rights Reserved. |
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7 | * |
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8 | * Permission is hereby granted, free of charge, to any person obtaining a |
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9 | * copy of this software and associated documentation files (the |
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10 | * "Software"), to deal in the Software without restriction, including |
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11 | * without limitation the rights to use, copy, modify, merge, publish, |
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12 | * distribute, sub license, and/or sell copies of the Software, and to |
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13 | * permit persons to whom the Software is furnished to do so, subject to |
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14 | * the following conditions: |
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15 | * |
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16 | * The above copyright notice and this permission notice (including the |
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17 | * next paragraph) shall be included in all copies or substantial portions |
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18 | * of the Software. |
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19 | * |
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20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | * |
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28 | */ |
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29 | |||
30 | |||
31 | #include |
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32 | |||
33 | |||
34 | #include |
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35 | #include |
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36 | #include |
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37 | #include |
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38 | |||
39 | |||
40 | #include |
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41 | |||
42 | |||
2326 | Serge | 43 | |
44 | |||
2325 | Serge | 45 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ |
46 | .class_mask = 0xff0000, \ |
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47 | .vendor = 0x8086, \ |
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48 | .device = id, \ |
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49 | .subvendor = PCI_ANY_ID, \ |
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50 | .subdevice = PCI_ANY_ID, \ |
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51 | .driver_data = (unsigned long) info } |
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52 | |||
53 | |||
54 | .gen = 6, |
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55 | .need_gfx_hws = 1, |
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56 | .has_hotplug = 1, |
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57 | .has_bsd_ring = 1, |
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58 | .has_blt_ring = 1, |
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59 | }; |
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60 | |||
61 | |||
62 | .gen = 6, |
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63 | .is_mobile = 1, |
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64 | .need_gfx_hws = 1, |
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65 | .has_hotplug = 1, |
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66 | .has_fbc = 1, |
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67 | .has_bsd_ring = 1, |
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68 | .has_blt_ring = 1, |
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69 | }; |
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70 | |||
71 | |||
72 | |||
73 | INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info), |
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74 | INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info), |
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75 | INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info), |
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76 | INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info), |
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77 | INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info), |
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78 | INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info), |
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79 | INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info), |
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80 | {0, 0, 0} |
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81 | }; |
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82 | |||
83 | |||
2326 | Serge | 84 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 |
85 | #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 |
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86 | #define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00 |
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87 | |||
2325 | Serge | 88 | |
2326 | Serge | 89 | { |
90 | struct drm_i915_private *dev_priv = dev->dev_private; |
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91 | struct pci_dev *pch; |
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92 | |||
93 | |||
94 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
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95 | * make graphics device passthrough work easy for VMM, that only |
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96 | * need to expose ISA bridge to let driver know the real hardware |
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97 | * underneath. This is a requirement from virtualization team. |
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98 | */ |
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99 | pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); |
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100 | if (pch) { |
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101 | if (pch->vendor == PCI_VENDOR_ID_INTEL) { |
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102 | int id; |
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103 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
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104 | |||
105 | |||
106 | dev_priv->pch_type = PCH_IBX; |
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107 | DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); |
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108 | } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) { |
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109 | dev_priv->pch_type = PCH_CPT; |
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110 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
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111 | } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) { |
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112 | /* PantherPoint is CPT compatible */ |
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113 | dev_priv->pch_type = PCH_CPT; |
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114 | DRM_DEBUG_KMS("Found PatherPoint PCH\n"); |
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115 | } |
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116 | } |
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117 | } |
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118 | } |
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119 | |||
120 | |||
121 | { |
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122 | int count; |
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123 | |||
124 | |||
125 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1)) |
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126 | udelay(10); |
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127 | |||
128 | |||
129 | POSTING_READ(FORCEWAKE); |
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130 | |||
131 | |||
132 | while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0) |
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133 | udelay(10); |
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134 | } |
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135 | |||
136 | |||
137 | * Generally this is called implicitly by the register read function. However, |
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138 | * if some sequence requires the GT to not power down then this function should |
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139 | * be called at the beginning of the sequence followed by a call to |
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140 | * gen6_gt_force_wake_put() at the end of the sequence. |
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141 | */ |
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142 | void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) |
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143 | { |
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144 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
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145 | |||
146 | |||
147 | if (atomic_add_return(1, &dev_priv->forcewake_count) == 1) |
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148 | __gen6_gt_force_wake_get(dev_priv); |
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149 | } |
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150 | |||
151 | |||
152 | { |
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153 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
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154 | POSTING_READ(FORCEWAKE); |
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155 | } |
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156 | |||
157 | |||
158 | * see gen6_gt_force_wake_get() |
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159 | */ |
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160 | void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
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161 | { |
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162 | // WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
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163 | |||
164 | |||
165 | __gen6_gt_force_wake_put(dev_priv); |
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166 | } |
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167 | |||
168 | |||
169 | { |
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170 | if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) { |
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171 | int loop = 500; |
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172 | u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
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173 | while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) { |
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174 | udelay(10); |
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175 | fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); |
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176 | } |
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177 | // WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES); |
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178 | dev_priv->gt_fifo_count = fifo; |
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179 | } |
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180 | dev_priv->gt_fifo_count--; |
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181 | } |
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182 | |||
183 | |||
184 | |||
185 | |||
186 | |||
187 | |||
2325 | Serge | 188 | |
189 | |||
190 | { |
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191 | static pci_dev_t device; |
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192 | const struct pci_device_id *ent; |
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193 | int err; |
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194 | |||
195 | |||
196 | { |
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197 | DRM_ERROR("drm/i915 can't work without intel_agp module!\n"); |
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198 | return 0; |
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199 | }; |
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200 | |||
201 | |||
202 | |||
203 | |||
204 | { |
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205 | dbgprintf("device not found\n"); |
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206 | return 0; |
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207 | }; |
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208 | |||
209 | |||
210 | device.pci_dev.device); |
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211 | |||
212 | |||
213 | |||
214 | |||
215 | } |
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216 | |||
217 | |||
218 | { |
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219 | static struct drm_device *dev; |
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220 | int ret; |
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221 | |||
222 | |||
223 | |||
224 | |||
225 | if (!dev) |
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226 | return -ENOMEM; |
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227 | |||
228 | |||
229 | // if (ret) |
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230 | // goto err_g1; |
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231 | |||
232 | |||
233 | |||
234 | |||
235 | // printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); |
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236 | // goto err_g2; |
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237 | // } |
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238 | |||
239 | |||
240 | dev->pci_device = pdev->device; |
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241 | dev->pci_vendor = pdev->vendor; |
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242 | |||
243 | |||
244 | INIT_LIST_HEAD(&dev->ctxlist); |
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245 | INIT_LIST_HEAD(&dev->vmalist); |
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246 | INIT_LIST_HEAD(&dev->maplist); |
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247 | |||
248 | |||
249 | mutex_init(&dev->struct_mutex); |
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250 | mutex_init(&dev->ctxlist_mutex); |
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251 | |||
252 | |||
253 | |||
254 | |||
2326 | Serge | 255 | // if (ret) |
2325 | Serge | 256 | // goto err_g4; |
257 | |||
258 | |||
259 | // init_display_kms(dev->dev_private, &usermode); |
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260 | // else |
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261 | // init_display(dev->dev_private, &usermode); |
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262 | |||
263 | |||
264 | |||
265 | |||
266 | |||
267 | |||
268 | // drm_put_minor(&dev->primary); |
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269 | //err_g3: |
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270 | // if (drm_core_check_feature(dev, DRIVER_MODESET)) |
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271 | // drm_put_minor(&dev->control); |
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272 | //err_g2: |
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273 | // pci_disable_device(pdev); |
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274 | //err_g1: |
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275 | free(dev); |
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276 | |||
277 | |||
278 | |||
279 | |||
280 | }=>>=>>>>><>><> |
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281 |