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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4349 | Serge | 1 | /* |
| 2 | * MMX optimized motion estimation |
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| 3 | * Copyright (c) 2001 Fabrice Bellard |
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| 4 | * Copyright (c) 2002-2004 Michael Niedermayer |
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| 5 | * |
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| 6 | * mostly by Michael Niedermayer |
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| 7 | * |
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| 8 | * This file is part of FFmpeg. |
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| 9 | * |
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| 10 | * FFmpeg is free software; you can redistribute it and/or |
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| 11 | * modify it under the terms of the GNU Lesser General Public |
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| 12 | * License as published by the Free Software Foundation; either |
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| 13 | * version 2.1 of the License, or (at your option) any later version. |
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| 14 | * |
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| 15 | * FFmpeg is distributed in the hope that it will be useful, |
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| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 18 | * Lesser General Public License for more details. |
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| 19 | * |
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| 20 | * You should have received a copy of the GNU Lesser General Public |
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| 21 | * License along with FFmpeg; if not, write to the Free Software |
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| 22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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| 23 | */ |
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| 24 | |||
| 25 | #include "libavutil/attributes.h" |
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| 26 | #include "libavutil/avassert.h" |
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| 27 | #include "libavutil/mem.h" |
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| 28 | #include "libavutil/x86/asm.h" |
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| 29 | #include "libavutil/x86/cpu.h" |
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| 30 | #include "dsputil_x86.h" |
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| 31 | |||
| 32 | #if HAVE_INLINE_ASM |
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| 33 | |||
| 34 | DECLARE_ASM_CONST(8, uint64_t, round_tab)[3]={ |
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| 35 | 0x0000000000000000ULL, |
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| 36 | 0x0001000100010001ULL, |
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| 37 | 0x0002000200020002ULL, |
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| 38 | }; |
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| 39 | |||
| 40 | DECLARE_ASM_CONST(8, uint64_t, bone)= 0x0101010101010101LL; |
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| 41 | |||
| 42 | static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) |
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| 43 | { |
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| 44 | x86_reg len= -(x86_reg)stride*h; |
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| 45 | __asm__ volatile( |
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| 46 | ".p2align 4 \n\t" |
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| 47 | "1: \n\t" |
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| 48 | "movq (%1, %%"REG_a"), %%mm0 \n\t" |
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| 49 | "movq (%2, %%"REG_a"), %%mm2 \n\t" |
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| 50 | "movq (%2, %%"REG_a"), %%mm4 \n\t" |
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| 51 | "add %3, %%"REG_a" \n\t" |
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| 52 | "psubusb %%mm0, %%mm2 \n\t" |
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| 53 | "psubusb %%mm4, %%mm0 \n\t" |
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| 54 | "movq (%1, %%"REG_a"), %%mm1 \n\t" |
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| 55 | "movq (%2, %%"REG_a"), %%mm3 \n\t" |
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| 56 | "movq (%2, %%"REG_a"), %%mm5 \n\t" |
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| 57 | "psubusb %%mm1, %%mm3 \n\t" |
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| 58 | "psubusb %%mm5, %%mm1 \n\t" |
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| 59 | "por %%mm2, %%mm0 \n\t" |
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| 60 | "por %%mm1, %%mm3 \n\t" |
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| 61 | "movq %%mm0, %%mm1 \n\t" |
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| 62 | "movq %%mm3, %%mm2 \n\t" |
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| 63 | "punpcklbw %%mm7, %%mm0 \n\t" |
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| 64 | "punpckhbw %%mm7, %%mm1 \n\t" |
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| 65 | "punpcklbw %%mm7, %%mm3 \n\t" |
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| 66 | "punpckhbw %%mm7, %%mm2 \n\t" |
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| 67 | "paddw %%mm1, %%mm0 \n\t" |
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| 68 | "paddw %%mm3, %%mm2 \n\t" |
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| 69 | "paddw %%mm2, %%mm0 \n\t" |
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| 70 | "paddw %%mm0, %%mm6 \n\t" |
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| 71 | "add %3, %%"REG_a" \n\t" |
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| 72 | " js 1b \n\t" |
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| 73 | : "+a" (len) |
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| 74 | : "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg)stride) |
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| 75 | ); |
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| 76 | } |
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| 77 | |||
| 78 | static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2, |
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| 79 | int stride, int h) |
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| 80 | { |
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| 81 | __asm__ volatile( |
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| 82 | ".p2align 4 \n\t" |
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| 83 | "1: \n\t" |
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| 84 | "movq (%1), %%mm0 \n\t" |
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| 85 | "movq (%1, %3), %%mm1 \n\t" |
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| 86 | "psadbw (%2), %%mm0 \n\t" |
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| 87 | "psadbw (%2, %3), %%mm1 \n\t" |
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| 88 | "paddw %%mm0, %%mm6 \n\t" |
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| 89 | "paddw %%mm1, %%mm6 \n\t" |
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| 90 | "lea (%1,%3,2), %1 \n\t" |
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| 91 | "lea (%2,%3,2), %2 \n\t" |
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| 92 | "sub $2, %0 \n\t" |
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| 93 | " jg 1b \n\t" |
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| 94 | : "+r" (h), "+r" (blk1), "+r" (blk2) |
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| 95 | : "r" ((x86_reg)stride) |
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| 96 | ); |
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| 97 | } |
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| 98 | |||
| 99 | static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h) |
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| 100 | { |
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| 101 | int ret; |
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| 102 | __asm__ volatile( |
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| 103 | "pxor %%xmm2, %%xmm2 \n\t" |
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| 104 | ".p2align 4 \n\t" |
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| 105 | "1: \n\t" |
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| 106 | "movdqu (%1), %%xmm0 \n\t" |
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| 107 | "movdqu (%1, %4), %%xmm1 \n\t" |
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| 108 | "psadbw (%2), %%xmm0 \n\t" |
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| 109 | "psadbw (%2, %4), %%xmm1 \n\t" |
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| 110 | "paddw %%xmm0, %%xmm2 \n\t" |
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| 111 | "paddw %%xmm1, %%xmm2 \n\t" |
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| 112 | "lea (%1,%4,2), %1 \n\t" |
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| 113 | "lea (%2,%4,2), %2 \n\t" |
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| 114 | "sub $2, %0 \n\t" |
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| 115 | " jg 1b \n\t" |
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| 116 | "movhlps %%xmm2, %%xmm0 \n\t" |
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| 117 | "paddw %%xmm0, %%xmm2 \n\t" |
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| 118 | "movd %%xmm2, %3 \n\t" |
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| 119 | : "+r" (h), "+r" (blk1), "+r" (blk2), "=r"(ret) |
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| 120 | : "r" ((x86_reg)stride) |
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| 121 | ); |
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| 122 | return ret; |
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| 123 | } |
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| 124 | |||
| 125 | static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2, |
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| 126 | int stride, int h) |
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| 127 | { |
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| 128 | __asm__ volatile( |
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| 129 | ".p2align 4 \n\t" |
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| 130 | "1: \n\t" |
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| 131 | "movq (%1), %%mm0 \n\t" |
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| 132 | "movq (%1, %3), %%mm1 \n\t" |
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| 133 | "pavgb 1(%1), %%mm0 \n\t" |
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| 134 | "pavgb 1(%1, %3), %%mm1 \n\t" |
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| 135 | "psadbw (%2), %%mm0 \n\t" |
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| 136 | "psadbw (%2, %3), %%mm1 \n\t" |
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| 137 | "paddw %%mm0, %%mm6 \n\t" |
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| 138 | "paddw %%mm1, %%mm6 \n\t" |
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| 139 | "lea (%1,%3,2), %1 \n\t" |
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| 140 | "lea (%2,%3,2), %2 \n\t" |
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| 141 | "sub $2, %0 \n\t" |
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| 142 | " jg 1b \n\t" |
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| 143 | : "+r" (h), "+r" (blk1), "+r" (blk2) |
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| 144 | : "r" ((x86_reg)stride) |
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| 145 | ); |
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| 146 | } |
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| 147 | |||
| 148 | static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2, |
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| 149 | int stride, int h) |
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| 150 | { |
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| 151 | __asm__ volatile( |
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| 152 | "movq (%1), %%mm0 \n\t" |
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| 153 | "add %3, %1 \n\t" |
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| 154 | ".p2align 4 \n\t" |
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| 155 | "1: \n\t" |
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| 156 | "movq (%1), %%mm1 \n\t" |
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| 157 | "movq (%1, %3), %%mm2 \n\t" |
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| 158 | "pavgb %%mm1, %%mm0 \n\t" |
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| 159 | "pavgb %%mm2, %%mm1 \n\t" |
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| 160 | "psadbw (%2), %%mm0 \n\t" |
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| 161 | "psadbw (%2, %3), %%mm1 \n\t" |
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| 162 | "paddw %%mm0, %%mm6 \n\t" |
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| 163 | "paddw %%mm1, %%mm6 \n\t" |
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| 164 | "movq %%mm2, %%mm0 \n\t" |
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| 165 | "lea (%1,%3,2), %1 \n\t" |
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| 166 | "lea (%2,%3,2), %2 \n\t" |
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| 167 | "sub $2, %0 \n\t" |
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| 168 | " jg 1b \n\t" |
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| 169 | : "+r" (h), "+r" (blk1), "+r" (blk2) |
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| 170 | : "r" ((x86_reg)stride) |
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| 171 | ); |
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| 172 | } |
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| 173 | |||
| 174 | static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2, |
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| 175 | int stride, int h) |
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| 176 | { |
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| 177 | __asm__ volatile( |
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| 178 | "movq "MANGLE(bone)", %%mm5 \n\t" |
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| 179 | "movq (%1), %%mm0 \n\t" |
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| 180 | "pavgb 1(%1), %%mm0 \n\t" |
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| 181 | "add %3, %1 \n\t" |
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| 182 | ".p2align 4 \n\t" |
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| 183 | "1: \n\t" |
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| 184 | "movq (%1), %%mm1 \n\t" |
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| 185 | "movq (%1,%3), %%mm2 \n\t" |
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| 186 | "pavgb 1(%1), %%mm1 \n\t" |
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| 187 | "pavgb 1(%1,%3), %%mm2 \n\t" |
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| 188 | "psubusb %%mm5, %%mm1 \n\t" |
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| 189 | "pavgb %%mm1, %%mm0 \n\t" |
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| 190 | "pavgb %%mm2, %%mm1 \n\t" |
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| 191 | "psadbw (%2), %%mm0 \n\t" |
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| 192 | "psadbw (%2,%3), %%mm1 \n\t" |
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| 193 | "paddw %%mm0, %%mm6 \n\t" |
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| 194 | "paddw %%mm1, %%mm6 \n\t" |
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| 195 | "movq %%mm2, %%mm0 \n\t" |
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| 196 | "lea (%1,%3,2), %1 \n\t" |
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| 197 | "lea (%2,%3,2), %2 \n\t" |
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| 198 | "sub $2, %0 \n\t" |
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| 199 | " jg 1b \n\t" |
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| 200 | : "+r" (h), "+r" (blk1), "+r" (blk2) |
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| 201 | : "r" ((x86_reg)stride) |
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| 202 | ); |
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| 203 | } |
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| 204 | |||
| 205 | static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2, int stride, int h) |
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| 206 | { |
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| 207 | x86_reg len= -(x86_reg)stride*h; |
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| 208 | __asm__ volatile( |
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| 209 | ".p2align 4 \n\t" |
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| 210 | "1: \n\t" |
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| 211 | "movq (%1, %%"REG_a"), %%mm0 \n\t" |
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| 212 | "movq (%2, %%"REG_a"), %%mm1 \n\t" |
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| 213 | "movq (%1, %%"REG_a"), %%mm2 \n\t" |
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| 214 | "movq (%2, %%"REG_a"), %%mm3 \n\t" |
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| 215 | "punpcklbw %%mm7, %%mm0 \n\t" |
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| 216 | "punpcklbw %%mm7, %%mm1 \n\t" |
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| 217 | "punpckhbw %%mm7, %%mm2 \n\t" |
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| 218 | "punpckhbw %%mm7, %%mm3 \n\t" |
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| 219 | "paddw %%mm0, %%mm1 \n\t" |
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| 220 | "paddw %%mm2, %%mm3 \n\t" |
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| 221 | "movq (%3, %%"REG_a"), %%mm4 \n\t" |
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| 222 | "movq (%3, %%"REG_a"), %%mm2 \n\t" |
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| 223 | "paddw %%mm5, %%mm1 \n\t" |
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| 224 | "paddw %%mm5, %%mm3 \n\t" |
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| 225 | "psrlw $1, %%mm1 \n\t" |
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| 226 | "psrlw $1, %%mm3 \n\t" |
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| 227 | "packuswb %%mm3, %%mm1 \n\t" |
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| 228 | "psubusb %%mm1, %%mm4 \n\t" |
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| 229 | "psubusb %%mm2, %%mm1 \n\t" |
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| 230 | "por %%mm4, %%mm1 \n\t" |
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| 231 | "movq %%mm1, %%mm0 \n\t" |
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| 232 | "punpcklbw %%mm7, %%mm0 \n\t" |
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| 233 | "punpckhbw %%mm7, %%mm1 \n\t" |
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| 234 | "paddw %%mm1, %%mm0 \n\t" |
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| 235 | "paddw %%mm0, %%mm6 \n\t" |
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| 236 | "add %4, %%"REG_a" \n\t" |
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| 237 | " js 1b \n\t" |
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| 238 | : "+a" (len) |
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| 239 | : "r" (blk1a - len), "r" (blk1b -len), "r" (blk2 - len), "r" ((x86_reg)stride) |
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| 240 | ); |
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| 241 | } |
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| 242 | |||
| 243 | static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) |
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| 244 | { |
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| 245 | x86_reg len= -(x86_reg)stride*h; |
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| 246 | __asm__ volatile( |
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| 247 | "movq (%1, %%"REG_a"), %%mm0 \n\t" |
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| 248 | "movq 1(%1, %%"REG_a"), %%mm2 \n\t" |
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| 249 | "movq %%mm0, %%mm1 \n\t" |
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| 250 | "movq %%mm2, %%mm3 \n\t" |
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| 251 | "punpcklbw %%mm7, %%mm0 \n\t" |
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| 252 | "punpckhbw %%mm7, %%mm1 \n\t" |
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| 253 | "punpcklbw %%mm7, %%mm2 \n\t" |
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| 254 | "punpckhbw %%mm7, %%mm3 \n\t" |
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| 255 | "paddw %%mm2, %%mm0 \n\t" |
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| 256 | "paddw %%mm3, %%mm1 \n\t" |
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| 257 | ".p2align 4 \n\t" |
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| 258 | "1: \n\t" |
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| 259 | "movq (%2, %%"REG_a"), %%mm2 \n\t" |
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| 260 | "movq 1(%2, %%"REG_a"), %%mm4 \n\t" |
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| 261 | "movq %%mm2, %%mm3 \n\t" |
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| 262 | "movq %%mm4, %%mm5 \n\t" |
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| 263 | "punpcklbw %%mm7, %%mm2 \n\t" |
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| 264 | "punpckhbw %%mm7, %%mm3 \n\t" |
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| 265 | "punpcklbw %%mm7, %%mm4 \n\t" |
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| 266 | "punpckhbw %%mm7, %%mm5 \n\t" |
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| 267 | "paddw %%mm4, %%mm2 \n\t" |
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| 268 | "paddw %%mm5, %%mm3 \n\t" |
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| 269 | "movq 16+"MANGLE(round_tab)", %%mm5 \n\t" |
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| 270 | "paddw %%mm2, %%mm0 \n\t" |
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| 271 | "paddw %%mm3, %%mm1 \n\t" |
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| 272 | "paddw %%mm5, %%mm0 \n\t" |
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| 273 | "paddw %%mm5, %%mm1 \n\t" |
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| 274 | "movq (%3, %%"REG_a"), %%mm4 \n\t" |
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| 275 | "movq (%3, %%"REG_a"), %%mm5 \n\t" |
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| 276 | "psrlw $2, %%mm0 \n\t" |
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| 277 | "psrlw $2, %%mm1 \n\t" |
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| 278 | "packuswb %%mm1, %%mm0 \n\t" |
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| 279 | "psubusb %%mm0, %%mm4 \n\t" |
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| 280 | "psubusb %%mm5, %%mm0 \n\t" |
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| 281 | "por %%mm4, %%mm0 \n\t" |
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| 282 | "movq %%mm0, %%mm4 \n\t" |
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| 283 | "punpcklbw %%mm7, %%mm0 \n\t" |
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| 284 | "punpckhbw %%mm7, %%mm4 \n\t" |
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| 285 | "paddw %%mm0, %%mm6 \n\t" |
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| 286 | "paddw %%mm4, %%mm6 \n\t" |
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| 287 | "movq %%mm2, %%mm0 \n\t" |
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| 288 | "movq %%mm3, %%mm1 \n\t" |
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| 289 | "add %4, %%"REG_a" \n\t" |
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| 290 | " js 1b \n\t" |
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| 291 | : "+a" (len) |
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| 292 | : "r" (blk1 - len), "r" (blk1 -len + stride), "r" (blk2 - len), "r" ((x86_reg)stride) |
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| 293 | ); |
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| 294 | } |
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| 295 | |||
| 296 | static inline int sum_mmx(void) |
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| 297 | { |
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| 298 | int ret; |
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| 299 | __asm__ volatile( |
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| 300 | "movq %%mm6, %%mm0 \n\t" |
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| 301 | "psrlq $32, %%mm6 \n\t" |
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| 302 | "paddw %%mm0, %%mm6 \n\t" |
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| 303 | "movq %%mm6, %%mm0 \n\t" |
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| 304 | "psrlq $16, %%mm6 \n\t" |
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| 305 | "paddw %%mm0, %%mm6 \n\t" |
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| 306 | "movd %%mm6, %0 \n\t" |
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| 307 | : "=r" (ret) |
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| 308 | ); |
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| 309 | return ret&0xFFFF; |
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| 310 | } |
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| 311 | |||
| 312 | static inline int sum_mmxext(void) |
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| 313 | { |
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| 314 | int ret; |
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| 315 | __asm__ volatile( |
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| 316 | "movd %%mm6, %0 \n\t" |
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| 317 | : "=r" (ret) |
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| 318 | ); |
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| 319 | return ret; |
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| 320 | } |
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| 321 | |||
| 322 | static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) |
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| 323 | { |
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| 324 | sad8_2_mmx(blk1, blk1+1, blk2, stride, h); |
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| 325 | } |
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| 326 | static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) |
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| 327 | { |
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| 328 | sad8_2_mmx(blk1, blk1+stride, blk2, stride, h); |
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| 329 | } |
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| 330 | |||
| 331 | |||
| 332 | #define PIX_SAD(suf)\ |
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| 333 | static int sad8_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 334 | {\ |
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| 335 | av_assert2(h==8);\ |
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| 336 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 337 | "pxor %%mm6, %%mm6 \n\t":);\ |
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| 338 | \ |
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| 339 | sad8_1_ ## suf(blk1, blk2, stride, 8);\ |
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| 340 | \ |
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| 341 | return sum_ ## suf();\ |
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| 342 | }\ |
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| 343 | static int sad8_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 344 | {\ |
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| 345 | av_assert2(h==8);\ |
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| 346 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 347 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 348 | "movq %0, %%mm5 \n\t"\ |
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| 349 | :: "m"(round_tab[1]) \ |
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| 350 | );\ |
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| 351 | \ |
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| 352 | sad8_x2a_ ## suf(blk1, blk2, stride, 8);\ |
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| 353 | \ |
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| 354 | return sum_ ## suf();\ |
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| 355 | }\ |
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| 356 | \ |
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| 357 | static int sad8_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 358 | {\ |
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| 359 | av_assert2(h==8);\ |
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| 360 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 361 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 362 | "movq %0, %%mm5 \n\t"\ |
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| 363 | :: "m"(round_tab[1]) \ |
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| 364 | );\ |
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| 365 | \ |
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| 366 | sad8_y2a_ ## suf(blk1, blk2, stride, 8);\ |
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| 367 | \ |
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| 368 | return sum_ ## suf();\ |
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| 369 | }\ |
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| 370 | \ |
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| 371 | static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 372 | {\ |
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| 373 | av_assert2(h==8);\ |
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| 374 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 375 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 376 | ::);\ |
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| 377 | \ |
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| 378 | sad8_4_ ## suf(blk1, blk2, stride, 8);\ |
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| 379 | \ |
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| 380 | return sum_ ## suf();\ |
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| 381 | }\ |
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| 382 | \ |
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| 383 | static int sad16_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 384 | {\ |
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| 385 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 386 | "pxor %%mm6, %%mm6 \n\t":);\ |
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| 387 | \ |
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| 388 | sad8_1_ ## suf(blk1 , blk2 , stride, h);\ |
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| 389 | sad8_1_ ## suf(blk1+8, blk2+8, stride, h);\ |
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| 390 | \ |
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| 391 | return sum_ ## suf();\ |
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| 392 | }\ |
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| 393 | static int sad16_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 394 | {\ |
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| 395 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 396 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 397 | "movq %0, %%mm5 \n\t"\ |
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| 398 | :: "m"(round_tab[1]) \ |
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| 399 | );\ |
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| 400 | \ |
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| 401 | sad8_x2a_ ## suf(blk1 , blk2 , stride, h);\ |
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| 402 | sad8_x2a_ ## suf(blk1+8, blk2+8, stride, h);\ |
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| 403 | \ |
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| 404 | return sum_ ## suf();\ |
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| 405 | }\ |
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| 406 | static int sad16_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 407 | {\ |
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| 408 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 409 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 410 | "movq %0, %%mm5 \n\t"\ |
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| 411 | :: "m"(round_tab[1]) \ |
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| 412 | );\ |
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| 413 | \ |
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| 414 | sad8_y2a_ ## suf(blk1 , blk2 , stride, h);\ |
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| 415 | sad8_y2a_ ## suf(blk1+8, blk2+8, stride, h);\ |
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| 416 | \ |
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| 417 | return sum_ ## suf();\ |
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| 418 | }\ |
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| 419 | static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ |
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| 420 | {\ |
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| 421 | __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ |
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| 422 | "pxor %%mm6, %%mm6 \n\t"\ |
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| 423 | ::);\ |
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| 424 | \ |
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| 425 | sad8_4_ ## suf(blk1 , blk2 , stride, h);\ |
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| 426 | sad8_4_ ## suf(blk1+8, blk2+8, stride, h);\ |
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| 427 | \ |
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| 428 | return sum_ ## suf();\ |
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| 429 | }\ |
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| 430 | |||
| 431 | PIX_SAD(mmx) |
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| 432 | PIX_SAD(mmxext) |
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| 433 | |||
| 434 | #endif /* HAVE_INLINE_ASM */ |
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| 435 | |||
| 436 | av_cold void ff_dsputil_init_pix_mmx(DSPContext *c, AVCodecContext *avctx) |
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| 437 | { |
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| 438 | #if HAVE_INLINE_ASM |
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| 439 | int cpu_flags = av_get_cpu_flags(); |
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| 440 | |||
| 441 | if (INLINE_MMX(cpu_flags)) { |
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| 442 | c->pix_abs[0][0] = sad16_mmx; |
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| 443 | c->pix_abs[0][1] = sad16_x2_mmx; |
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| 444 | c->pix_abs[0][2] = sad16_y2_mmx; |
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| 445 | c->pix_abs[0][3] = sad16_xy2_mmx; |
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| 446 | c->pix_abs[1][0] = sad8_mmx; |
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| 447 | c->pix_abs[1][1] = sad8_x2_mmx; |
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| 448 | c->pix_abs[1][2] = sad8_y2_mmx; |
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| 449 | c->pix_abs[1][3] = sad8_xy2_mmx; |
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| 450 | |||
| 451 | c->sad[0]= sad16_mmx; |
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| 452 | c->sad[1]= sad8_mmx; |
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| 453 | } |
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| 454 | if (INLINE_MMXEXT(cpu_flags)) { |
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| 455 | c->pix_abs[0][0] = sad16_mmxext; |
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| 456 | c->pix_abs[1][0] = sad8_mmxext; |
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| 457 | |||
| 458 | c->sad[0] = sad16_mmxext; |
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| 459 | c->sad[1] = sad8_mmxext; |
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| 460 | |||
| 461 | if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ |
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| 462 | c->pix_abs[0][1] = sad16_x2_mmxext; |
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| 463 | c->pix_abs[0][2] = sad16_y2_mmxext; |
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| 464 | c->pix_abs[0][3] = sad16_xy2_mmxext; |
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| 465 | c->pix_abs[1][1] = sad8_x2_mmxext; |
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| 466 | c->pix_abs[1][2] = sad8_y2_mmxext; |
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| 467 | c->pix_abs[1][3] = sad8_xy2_mmxext; |
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| 468 | } |
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| 469 | } |
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| 470 | if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_3DNOW) && avctx->codec_id != AV_CODEC_ID_SNOW) { |
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| 471 | c->sad[0]= sad16_sse2; |
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| 472 | } |
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| 473 | #endif /* HAVE_INLINE_ASM */ |
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| 474 | } |