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4358 | Serge | 1 | /* |
2 | Copyright (C) Intel Corp. 2006. All Rights Reserved. |
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3 | Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to |
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4 | develop this 3D driver. |
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5 | |||
6 | Permission is hereby granted, free of charge, to any person obtaining |
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7 | a copy of this software and associated documentation files (the |
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8 | "Software"), to deal in the Software without restriction, including |
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9 | without limitation the rights to use, copy, modify, merge, publish, |
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10 | distribute, sublicense, and/or sell copies of the Software, and to |
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11 | permit persons to whom the Software is furnished to do so, subject to |
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12 | the following conditions: |
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13 | |||
14 | The above copyright notice and this permission notice (including the |
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15 | next paragraph) shall be included in all copies or substantial |
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16 | portions of the Software. |
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17 | |||
18 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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19 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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21 | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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22 | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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23 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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24 | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | |||
26 | **********************************************************************/ |
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27 | /* |
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28 | * Authors: |
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29 | * Keith Whitwell |
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30 | */ |
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31 | |||
32 | |||
33 | #include "main/glheader.h" |
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34 | #include "main/macros.h" |
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35 | #include "main/enums.h" |
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36 | #include "program/program.h" |
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37 | |||
38 | #include "intel_batchbuffer.h" |
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39 | |||
40 | #include "brw_defines.h" |
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41 | #include "brw_context.h" |
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42 | #include "brw_eu.h" |
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43 | #include "brw_clip.h" |
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44 | |||
45 | |||
46 | |||
47 | |||
48 | struct brw_reg get_tmp( struct brw_clip_compile *c ) |
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49 | { |
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50 | struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0); |
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51 | |||
52 | if (++c->last_tmp > c->prog_data.total_grf) |
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53 | c->prog_data.total_grf = c->last_tmp; |
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54 | |||
55 | return tmp; |
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56 | } |
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57 | |||
58 | static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp ) |
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59 | { |
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60 | if (tmp.nr == c->last_tmp-1) |
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61 | c->last_tmp--; |
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62 | } |
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63 | |||
64 | |||
65 | static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w) |
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66 | { |
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67 | return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x); |
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68 | } |
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69 | |||
70 | |||
71 | void brw_clip_init_planes( struct brw_clip_compile *c ) |
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72 | { |
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73 | struct brw_compile *p = &c->func; |
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74 | |||
75 | if (!c->key.nr_userclip) { |
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76 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0, 0, 0xff, 1)); |
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77 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0, 0, 1, 1)); |
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78 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff, 0, 1)); |
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79 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0, 1, 0, 1)); |
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80 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff, 0, 0, 1)); |
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81 | brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1, 0, 0, 1)); |
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82 | } |
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83 | } |
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84 | |||
85 | |||
86 | |||
87 | #define W 3 |
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88 | |||
89 | /* Project 'pos' to screen space (or back again), overwrite with results: |
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90 | */ |
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91 | void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos ) |
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92 | { |
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93 | struct brw_compile *p = &c->func; |
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94 | |||
95 | /* calc rhw |
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96 | */ |
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97 | brw_math_invert(p, get_element(pos, W), get_element(pos, W)); |
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98 | |||
99 | /* value.xyz *= value.rhw |
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100 | */ |
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101 | brw_set_access_mode(p, BRW_ALIGN_16); |
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102 | brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W)); |
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103 | brw_set_access_mode(p, BRW_ALIGN_1); |
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104 | } |
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105 | |||
106 | |||
107 | static void brw_clip_project_vertex( struct brw_clip_compile *c, |
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108 | struct brw_indirect vert_addr ) |
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109 | { |
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110 | struct brw_compile *p = &c->func; |
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111 | struct brw_reg tmp = get_tmp(c); |
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112 | GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS); |
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113 | GLuint ndc_offset = brw_varying_to_offset(&c->vue_map, |
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114 | BRW_VARYING_SLOT_NDC); |
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115 | |||
116 | /* Fixup position. Extract from the original vertex and re-project |
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117 | * to screen space: |
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118 | */ |
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119 | brw_MOV(p, tmp, deref_4f(vert_addr, hpos_offset)); |
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120 | brw_clip_project_position(c, tmp); |
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121 | brw_MOV(p, deref_4f(vert_addr, ndc_offset), tmp); |
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122 | |||
123 | release_tmp(c, tmp); |
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124 | } |
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125 | |||
126 | |||
127 | |||
128 | |||
129 | /* Interpolate between two vertices and put the result into a0.0. |
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130 | * Increment a0.0 accordingly. |
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131 | */ |
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132 | void brw_clip_interp_vertex( struct brw_clip_compile *c, |
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133 | struct brw_indirect dest_ptr, |
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134 | struct brw_indirect v0_ptr, /* from */ |
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135 | struct brw_indirect v1_ptr, /* to */ |
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136 | struct brw_reg t0, |
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137 | bool force_edgeflag) |
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138 | { |
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139 | struct brw_compile *p = &c->func; |
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140 | struct brw_reg tmp = get_tmp(c); |
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141 | GLuint slot; |
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142 | |||
143 | /* Just copy the vertex header: |
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144 | */ |
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145 | /* |
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146 | * After CLIP stage, only first 256 bits of the VUE are read |
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147 | * back on Ironlake, so needn't change it |
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148 | */ |
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149 | brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1); |
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150 | |||
151 | /* Iterate over each attribute (could be done in pairs?) |
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152 | */ |
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153 | for (slot = 0; slot < c->vue_map.num_slots; slot++) { |
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154 | int varying = c->vue_map.slot_to_varying[slot]; |
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155 | GLuint delta = brw_vue_slot_to_offset(slot); |
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156 | |||
157 | if (varying == VARYING_SLOT_EDGE) { |
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158 | if (force_edgeflag) |
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159 | brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1)); |
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160 | else |
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161 | brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta)); |
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162 | } else if (varying == VARYING_SLOT_PSIZ || |
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163 | varying == VARYING_SLOT_CLIP_DIST0 || |
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164 | varying == VARYING_SLOT_CLIP_DIST1) { |
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165 | /* PSIZ doesn't need interpolation because it isn't used by the |
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166 | * fragment shader. CLIP_DIST0 and CLIP_DIST1 don't need |
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167 | * intepolation because on pre-GEN6, these are just placeholder VUE |
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168 | * slots that don't perform any action. |
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169 | */ |
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170 | } else if (varying < VARYING_SLOT_MAX) { |
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171 | /* This is a true vertex result (and not a special value for the VUE |
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172 | * header), so interpolate: |
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173 | * |
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174 | * New = attr0 + t*attr1 - t*attr0 |
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175 | */ |
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176 | brw_MUL(p, |
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177 | vec4(brw_null_reg()), |
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178 | deref_4f(v1_ptr, delta), |
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179 | t0); |
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180 | |||
181 | brw_MAC(p, |
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182 | tmp, |
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183 | negate(deref_4f(v0_ptr, delta)), |
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184 | t0); |
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185 | |||
186 | brw_ADD(p, |
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187 | deref_4f(dest_ptr, delta), |
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188 | deref_4f(v0_ptr, delta), |
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189 | tmp); |
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190 | } |
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191 | } |
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192 | |||
193 | if (c->vue_map.num_slots % 2) { |
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194 | GLuint delta = brw_vue_slot_to_offset(c->vue_map.num_slots); |
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195 | |||
196 | brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0)); |
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197 | } |
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198 | |||
199 | release_tmp(c, tmp); |
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200 | |||
201 | /* Recreate the projected (NDC) coordinate in the new vertex |
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202 | * header: |
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203 | */ |
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204 | brw_clip_project_vertex(c, dest_ptr ); |
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205 | } |
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206 | |||
207 | void brw_clip_emit_vue(struct brw_clip_compile *c, |
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208 | struct brw_indirect vert, |
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209 | bool allocate, |
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210 | bool eot, |
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211 | GLuint header) |
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212 | { |
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213 | struct brw_compile *p = &c->func; |
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214 | |||
215 | brw_clip_ff_sync(c); |
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216 | |||
217 | assert(!(allocate && eot)); |
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218 | |||
219 | /* Copy the vertex from vertn into m1..mN+1: |
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220 | */ |
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221 | brw_copy_from_indirect(p, brw_message_reg(1), vert, c->nr_regs); |
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222 | |||
223 | /* Overwrite PrimType and PrimStart in the message header, for |
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224 | * each vertex in turn: |
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225 | */ |
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226 | brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header)); |
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227 | |||
228 | |||
229 | /* Send each vertex as a seperate write to the urb. This |
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230 | * is different to the concept in brw_sf_emit.c, where |
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231 | * subsequent writes are used to build up a single urb |
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232 | * entry. Each of these writes instantiates a seperate |
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233 | * urb entry - (I think... what about 'allocate'?) |
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234 | */ |
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235 | brw_urb_WRITE(p, |
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236 | allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), |
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237 | 0, |
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238 | c->reg.R0, |
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239 | allocate, |
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240 | 1, /* used */ |
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241 | c->nr_regs + 1, /* msg length */ |
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242 | allocate ? 1 : 0, /* response_length */ |
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243 | eot, /* eot */ |
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244 | 1, /* writes_complete */ |
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245 | 0, /* urb offset */ |
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246 | BRW_URB_SWIZZLE_NONE); |
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247 | } |
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248 | |||
249 | |||
250 | |||
251 | void brw_clip_kill_thread(struct brw_clip_compile *c) |
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252 | { |
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253 | struct brw_compile *p = &c->func; |
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254 | |||
255 | brw_clip_ff_sync(c); |
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256 | /* Send an empty message to kill the thread and release any |
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257 | * allocated urb entry: |
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258 | */ |
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259 | brw_urb_WRITE(p, |
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260 | retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), |
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261 | 0, |
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262 | c->reg.R0, |
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263 | 0, /* allocate */ |
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264 | 0, /* used */ |
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265 | 1, /* msg len */ |
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266 | 0, /* response len */ |
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267 | 1, /* eot */ |
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268 | 1, /* writes complete */ |
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269 | 0, |
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270 | BRW_URB_SWIZZLE_NONE); |
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271 | } |
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272 | |||
273 | |||
274 | |||
275 | |||
276 | struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c ) |
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277 | { |
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278 | return brw_address(c->reg.fixed_planes); |
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279 | } |
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280 | |||
281 | |||
282 | struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c ) |
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283 | { |
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284 | if (c->key.nr_userclip) { |
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285 | return brw_imm_uw(16); |
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286 | } |
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287 | else { |
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288 | return brw_imm_uw(4); |
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289 | } |
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290 | } |
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291 | |||
292 | |||
293 | /* If flatshading, distribute color from provoking vertex prior to |
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294 | * clipping. |
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295 | */ |
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296 | void brw_clip_copy_colors( struct brw_clip_compile *c, |
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297 | GLuint to, GLuint from ) |
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298 | { |
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299 | struct brw_compile *p = &c->func; |
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300 | |||
301 | if (brw_clip_have_varying(c, VARYING_SLOT_COL0)) |
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302 | brw_MOV(p, |
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303 | byte_offset(c->reg.vertex[to], |
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304 | brw_varying_to_offset(&c->vue_map, |
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305 | VARYING_SLOT_COL0)), |
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306 | byte_offset(c->reg.vertex[from], |
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307 | brw_varying_to_offset(&c->vue_map, |
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308 | VARYING_SLOT_COL0))); |
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309 | |||
310 | if (brw_clip_have_varying(c, VARYING_SLOT_COL1)) |
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311 | brw_MOV(p, |
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312 | byte_offset(c->reg.vertex[to], |
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313 | brw_varying_to_offset(&c->vue_map, |
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314 | VARYING_SLOT_COL1)), |
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315 | byte_offset(c->reg.vertex[from], |
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316 | brw_varying_to_offset(&c->vue_map, |
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317 | VARYING_SLOT_COL1))); |
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318 | |||
319 | if (brw_clip_have_varying(c, VARYING_SLOT_BFC0)) |
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320 | brw_MOV(p, |
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321 | byte_offset(c->reg.vertex[to], |
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322 | brw_varying_to_offset(&c->vue_map, |
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323 | VARYING_SLOT_BFC0)), |
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324 | byte_offset(c->reg.vertex[from], |
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325 | brw_varying_to_offset(&c->vue_map, |
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326 | VARYING_SLOT_BFC0))); |
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327 | |||
328 | if (brw_clip_have_varying(c, VARYING_SLOT_BFC1)) |
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329 | brw_MOV(p, |
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330 | byte_offset(c->reg.vertex[to], |
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331 | brw_varying_to_offset(&c->vue_map, |
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332 | VARYING_SLOT_BFC1)), |
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333 | byte_offset(c->reg.vertex[from], |
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334 | brw_varying_to_offset(&c->vue_map, |
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335 | VARYING_SLOT_BFC1))); |
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336 | } |
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337 | |||
338 | |||
339 | |||
340 | void brw_clip_init_clipmask( struct brw_clip_compile *c ) |
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341 | { |
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342 | struct brw_compile *p = &c->func; |
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343 | struct brw_reg incoming = get_element_ud(c->reg.R0, 2); |
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344 | |||
345 | /* Shift so that lowest outcode bit is rightmost: |
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346 | */ |
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347 | brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26)); |
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348 | |||
349 | if (c->key.nr_userclip) { |
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350 | struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD); |
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351 | |||
352 | /* Rearrange userclip outcodes so that they come directly after |
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353 | * the fixed plane bits. |
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354 | */ |
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355 | brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14)); |
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356 | brw_SHR(p, tmp, tmp, brw_imm_ud(8)); |
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357 | brw_OR(p, c->reg.planemask, c->reg.planemask, tmp); |
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358 | |||
359 | release_tmp(c, tmp); |
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360 | } |
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361 | } |
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362 | |||
363 | void brw_clip_ff_sync(struct brw_clip_compile *c) |
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364 | { |
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365 | struct brw_compile *p = &c->func; |
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366 | struct brw_context *brw = p->brw; |
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367 | |||
368 | if (brw->gen == 5) { |
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369 | brw_set_conditionalmod(p, BRW_CONDITIONAL_Z); |
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370 | brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1)); |
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371 | brw_IF(p, BRW_EXECUTE_1); |
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372 | { |
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373 | brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1)); |
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374 | brw_ff_sync(p, |
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375 | c->reg.R0, |
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376 | 0, |
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377 | c->reg.R0, |
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378 | 1, /* allocate */ |
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379 | 1, /* response length */ |
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380 | |||
381 | } |
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382 | brw_ENDIF(p); |
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383 | brw_set_predicate_control(p, BRW_PREDICATE_NONE); |
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384 | } |
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385 | } |
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386 | |||
387 | void brw_clip_init_ff_sync(struct brw_clip_compile *c) |
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388 | { |
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389 | struct brw_context *brw = c->func.brw; |
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390 | |||
391 | if (brw->gen == 5) { |
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392 | struct brw_compile *p = &c->func; |
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393 | |||
394 | brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0)); |
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395 | } |
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396 | }14)); |