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4358 | Serge | 1 | /************************************************************************** |
2 | * |
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3 | * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. |
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4 | * All Rights Reserved. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the |
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8 | * "Software"), to deal in the Software without restriction, including |
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9 | * without limitation the rights to use, copy, modify, merge, publish, |
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10 | * distribute, sub license, and/or sell copies of the Software, and to |
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11 | * permit persons to whom the Software is furnished to do so, subject to |
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12 | * the following conditions: |
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13 | * |
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14 | * The above copyright notice and this permission notice (including the |
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15 | * next paragraph) shall be included in all copies or substantial portions |
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16 | * of the Software. |
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17 | * |
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18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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21 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
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22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | * |
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26 | **************************************************************************/ |
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27 | |||
28 | #include "intel_context.h" |
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29 | #include "intel_batchbuffer.h" |
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30 | #include "intel_buffer_objects.h" |
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31 | #include "intel_reg.h" |
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32 | #include "intel_bufmgr.h" |
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33 | #include "intel_buffers.h" |
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34 | |||
35 | static void |
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36 | intel_batchbuffer_reset(struct intel_context *intel); |
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37 | |||
38 | void |
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39 | intel_batchbuffer_init(struct intel_context *intel) |
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40 | { |
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41 | intel_batchbuffer_reset(intel); |
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42 | |||
43 | intel->batch.cpu_map = malloc(intel->maxBatchSize); |
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44 | intel->batch.map = intel->batch.cpu_map; |
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45 | } |
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46 | |||
47 | static void |
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48 | intel_batchbuffer_reset(struct intel_context *intel) |
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49 | { |
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50 | if (intel->batch.last_bo != NULL) { |
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51 | drm_intel_bo_unreference(intel->batch.last_bo); |
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52 | intel->batch.last_bo = NULL; |
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53 | } |
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54 | intel->batch.last_bo = intel->batch.bo; |
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55 | |||
56 | intel->batch.bo = drm_intel_bo_alloc(intel->bufmgr, "batchbuffer", |
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57 | intel->maxBatchSize, 4096); |
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58 | |||
59 | intel->batch.reserved_space = BATCH_RESERVED; |
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60 | intel->batch.used = 0; |
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61 | } |
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62 | |||
63 | void |
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64 | intel_batchbuffer_free(struct intel_context *intel) |
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65 | { |
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66 | free(intel->batch.cpu_map); |
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67 | drm_intel_bo_unreference(intel->batch.last_bo); |
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68 | drm_intel_bo_unreference(intel->batch.bo); |
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69 | } |
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70 | |||
4548 | Serge | 71 | #if 0 |
4358 | Serge | 72 | static void |
73 | do_batch_dump(struct intel_context *intel) |
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74 | { |
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75 | struct drm_intel_decode *decode; |
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76 | struct intel_batchbuffer *batch = &intel->batch; |
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77 | int ret; |
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78 | |||
79 | decode = drm_intel_decode_context_alloc(intel->intelScreen->deviceID); |
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80 | if (!decode) |
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81 | return; |
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82 | |||
83 | ret = drm_intel_bo_map(batch->bo, false); |
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84 | if (ret == 0) { |
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85 | drm_intel_decode_set_batch_pointer(decode, |
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86 | batch->bo->virtual, |
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87 | batch->bo->offset, |
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88 | batch->used); |
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89 | } else { |
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90 | fprintf(stderr, |
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91 | "WARNING: failed to map batchbuffer (%s), " |
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92 | "dumping uploaded data instead.\n", strerror(ret)); |
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93 | |||
94 | drm_intel_decode_set_batch_pointer(decode, |
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95 | batch->map, |
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96 | batch->bo->offset, |
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97 | batch->used); |
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98 | } |
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99 | |||
100 | drm_intel_decode(decode); |
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101 | |||
102 | drm_intel_decode_context_free(decode); |
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103 | |||
104 | if (ret == 0) { |
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105 | drm_intel_bo_unmap(batch->bo); |
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106 | |||
107 | if (intel->vtbl.debug_batch != NULL) |
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108 | intel->vtbl.debug_batch(intel); |
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109 | } |
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110 | } |
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4548 | Serge | 111 | #endif |
4358 | Serge | 112 | |
113 | /* TODO: Push this whole function into bufmgr. |
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114 | */ |
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115 | static int |
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116 | do_flush_locked(struct intel_context *intel) |
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117 | { |
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118 | struct intel_batchbuffer *batch = &intel->batch; |
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119 | int ret = 0; |
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120 | |||
121 | ret = drm_intel_bo_subdata(batch->bo, 0, 4*batch->used, batch->map); |
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122 | |||
123 | if (!intel->intelScreen->no_hw) { |
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124 | if (ret == 0) { |
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125 | if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub) |
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126 | intel->vtbl.annotate_aub(intel); |
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127 | ret = drm_intel_bo_mrb_exec(batch->bo, 4 * batch->used, NULL, 0, 0, |
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128 | I915_EXEC_RENDER); |
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129 | } |
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130 | } |
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131 | |||
4548 | Serge | 132 | // if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) |
133 | // do_batch_dump(intel); |
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4358 | Serge | 134 | |
135 | if (ret != 0) { |
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136 | fprintf(stderr, "intel_do_flush_locked failed: %s\n", strerror(-ret)); |
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137 | exit(1); |
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138 | } |
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139 | intel->vtbl.new_batch(intel); |
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140 | |||
141 | return ret; |
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142 | } |
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143 | |||
144 | int |
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145 | _intel_batchbuffer_flush(struct intel_context *intel, |
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146 | const char *file, int line) |
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147 | { |
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148 | int ret; |
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149 | |||
150 | if (intel->batch.used == 0) |
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151 | return 0; |
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152 | |||
153 | if (intel->first_post_swapbuffers_batch == NULL) { |
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154 | intel->first_post_swapbuffers_batch = intel->batch.bo; |
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155 | drm_intel_bo_reference(intel->first_post_swapbuffers_batch); |
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156 | } |
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157 | |||
158 | if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) |
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159 | fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line, |
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160 | 4*intel->batch.used); |
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161 | |||
162 | intel->batch.reserved_space = 0; |
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163 | |||
164 | if (intel->vtbl.finish_batch) |
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165 | intel->vtbl.finish_batch(intel); |
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166 | |||
167 | /* Mark the end of the buffer. */ |
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168 | intel_batchbuffer_emit_dword(intel, MI_BATCH_BUFFER_END); |
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169 | if (intel->batch.used & 1) { |
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170 | /* Round batchbuffer usage to 2 DWORDs. */ |
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171 | intel_batchbuffer_emit_dword(intel, MI_NOOP); |
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172 | } |
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173 | |||
174 | intel_upload_finish(intel); |
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175 | |||
176 | /* Check that we didn't just wrap our batchbuffer at a bad time. */ |
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177 | assert(!intel->no_batch_wrap); |
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178 | |||
179 | ret = do_flush_locked(intel); |
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180 | |||
181 | if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) { |
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182 | fprintf(stderr, "waiting for idle\n"); |
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183 | drm_intel_bo_wait_rendering(intel->batch.bo); |
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184 | } |
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185 | |||
186 | /* Reset the buffer: |
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187 | */ |
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188 | intel_batchbuffer_reset(intel); |
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189 | |||
190 | return ret; |
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191 | } |
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192 | |||
193 | |||
194 | /* This is the only way buffers get added to the validate list. |
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195 | */ |
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196 | bool |
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197 | intel_batchbuffer_emit_reloc(struct intel_context *intel, |
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198 | drm_intel_bo *buffer, |
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199 | uint32_t read_domains, uint32_t write_domain, |
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200 | uint32_t delta) |
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201 | { |
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202 | int ret; |
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203 | |||
204 | ret = drm_intel_bo_emit_reloc(intel->batch.bo, 4*intel->batch.used, |
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205 | buffer, delta, |
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206 | read_domains, write_domain); |
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207 | assert(ret == 0); |
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208 | (void)ret; |
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209 | |||
210 | /* |
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211 | * Using the old buffer offset, write in what the right data would be, in case |
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212 | * the buffer doesn't move and we can short-circuit the relocation processing |
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213 | * in the kernel |
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214 | */ |
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215 | intel_batchbuffer_emit_dword(intel, buffer->offset + delta); |
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216 | |||
217 | return true; |
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218 | } |
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219 | |||
220 | bool |
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221 | intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel, |
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222 | drm_intel_bo *buffer, |
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223 | uint32_t read_domains, |
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224 | uint32_t write_domain, |
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225 | uint32_t delta) |
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226 | { |
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227 | int ret; |
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228 | |||
229 | ret = drm_intel_bo_emit_reloc_fence(intel->batch.bo, 4*intel->batch.used, |
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230 | buffer, delta, |
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231 | read_domains, write_domain); |
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232 | assert(ret == 0); |
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233 | (void)ret; |
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234 | |||
235 | /* |
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236 | * Using the old buffer offset, write in what the right data would |
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237 | * be, in case the buffer doesn't move and we can short-circuit the |
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238 | * relocation processing in the kernel |
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239 | */ |
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240 | intel_batchbuffer_emit_dword(intel, buffer->offset + delta); |
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241 | |||
242 | return true; |
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243 | } |
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244 | |||
245 | void |
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246 | intel_batchbuffer_data(struct intel_context *intel, |
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247 | const void *data, GLuint bytes) |
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248 | { |
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249 | assert((bytes & 3) == 0); |
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250 | intel_batchbuffer_require_space(intel, bytes); |
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251 | __memcpy(intel->batch.map + intel->batch.used, data, bytes); |
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252 | intel->batch.used += bytes >> 2; |
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253 | } |
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254 | |||
255 | /* Emit a pipelined flush to either flush render and texture cache for |
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256 | * reading from a FBO-drawn texture, or flush so that frontbuffer |
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257 | * render appears on the screen in DRI1. |
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258 | * |
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259 | * This is also used for the always_flush_cache driconf debug option. |
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260 | */ |
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261 | void |
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262 | intel_batchbuffer_emit_mi_flush(struct intel_context *intel) |
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263 | { |
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264 | BEGIN_BATCH(1); |
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265 | OUT_BATCH(MI_FLUSH); |
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266 | ADVANCE_BATCH(); |
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267 | } |