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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5563 | serge | 1 | /* |
| 2 | * Copyright 2008 Corbin Simpson |
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| 3 | * |
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| 4 | * All Rights Reserved. |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining |
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| 7 | * a copy of this software and associated documentation files (the |
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| 8 | * "Software"), to deal in the Software without restriction, including |
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| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
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| 10 | * distribute, sublicense, and/or sell copies of the Software, and to |
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| 11 | * permit persons to whom the Software is furnished to do so, subject to |
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| 12 | * the following conditions: |
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| 13 | * |
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| 14 | * The above copyright notice and this permission notice (including the |
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| 15 | * next paragraph) shall be included in all copies or substantial |
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| 16 | * portions of the Software. |
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| 17 | * |
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| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 19 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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| 21 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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| 22 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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| 23 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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| 24 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 25 | * |
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| 26 | */ |
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| 27 | |||
| 28 | #include "r500_fragprog.h" |
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| 29 | |||
| 30 | #include |
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| 31 | |||
| 32 | #include "radeon_compiler_util.h" |
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| 33 | #include "radeon_list.h" |
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| 34 | #include "radeon_variable.h" |
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| 35 | #include "../r300_reg.h" |
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| 36 | |||
| 37 | /** |
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| 38 | * Rewrite IF instructions to use the ALU result special register. |
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| 39 | */ |
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| 40 | int r500_transform_IF( |
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| 41 | struct radeon_compiler * c, |
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| 42 | struct rc_instruction * inst_if, |
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| 43 | void *data) |
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| 44 | { |
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| 45 | struct rc_variable * writer; |
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| 46 | struct rc_list * writer_list, * list_ptr; |
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| 47 | struct rc_list * var_list = rc_get_variables(c); |
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| 48 | unsigned int generic_if = 0; |
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| 49 | unsigned int alu_chan; |
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| 50 | |||
| 51 | if (inst_if->U.I.Opcode != RC_OPCODE_IF) { |
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| 52 | return 0; |
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| 53 | } |
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| 54 | |||
| 55 | writer_list = rc_variable_list_get_writers( |
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| 56 | var_list, inst_if->Type, &inst_if->U.I.SrcReg[0]); |
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| 57 | if (!writer_list) { |
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| 58 | generic_if = 1; |
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| 59 | } else { |
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| 60 | |||
| 61 | /* Make sure it is safe for the writers to write to |
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| 62 | * ALU Result */ |
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| 63 | for (list_ptr = writer_list; list_ptr; |
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| 64 | list_ptr = list_ptr->Next) { |
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| 65 | struct rc_instruction * inst; |
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| 66 | writer = list_ptr->Item; |
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| 67 | /* We are going to modify the destination register |
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| 68 | * of writer, so if it has a reader other than |
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| 69 | * inst_if (aka ReaderCount > 1) we must fall back to |
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| 70 | * our generic IF. |
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| 71 | * If the writer has a lower IP than inst_if, this |
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| 72 | * means that inst_if is above the writer in a loop. |
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| 73 | * I'm not sure why this would ever happen, but |
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| 74 | * if it does we want to make sure we fall back |
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| 75 | * to our generic IF. */ |
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| 76 | if (writer->ReaderCount > 1 || writer->Inst->IP < inst_if->IP) { |
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| 77 | generic_if = 1; |
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| 78 | break; |
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| 79 | } |
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| 80 | |||
| 81 | /* The ALU Result is not preserved across IF |
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| 82 | * instructions, so if there is another IF |
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| 83 | * instruction between writer and inst_if, then |
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| 84 | * we need to fall back to generic IF. */ |
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| 85 | for (inst = writer->Inst; inst != inst_if; inst = inst->Next) { |
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| 86 | const struct rc_opcode_info * info = |
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| 87 | rc_get_opcode_info(inst->U.I.Opcode); |
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| 88 | if (info->IsFlowControl) { |
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| 89 | generic_if = 1; |
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| 90 | break; |
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| 91 | } |
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| 92 | } |
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| 93 | if (generic_if) { |
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| 94 | break; |
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| 95 | } |
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| 96 | } |
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| 97 | } |
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| 98 | |||
| 99 | if (GET_SWZ(inst_if->U.I.SrcReg[0].Swizzle, 0) == RC_SWIZZLE_X) { |
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| 100 | alu_chan = RC_ALURESULT_X; |
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| 101 | } else { |
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| 102 | alu_chan = RC_ALURESULT_W; |
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| 103 | } |
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| 104 | if (generic_if) { |
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| 105 | struct rc_instruction * inst_mov = |
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| 106 | rc_insert_new_instruction(c, inst_if->Prev); |
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| 107 | |||
| 108 | inst_mov->U.I.Opcode = RC_OPCODE_MOV; |
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| 109 | inst_mov->U.I.DstReg.WriteMask = 0; |
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| 110 | inst_mov->U.I.DstReg.File = RC_FILE_NONE; |
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| 111 | inst_mov->U.I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL; |
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| 112 | inst_mov->U.I.WriteALUResult = alu_chan; |
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| 113 | inst_mov->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0]; |
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| 114 | if (alu_chan == RC_ALURESULT_X) { |
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| 115 | inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4( |
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| 116 | inst_mov->U.I.SrcReg[0].Swizzle, |
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| 117 | RC_SWIZZLE_X, RC_SWIZZLE_UNUSED, |
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| 118 | RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED); |
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| 119 | } else { |
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| 120 | inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4( |
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| 121 | inst_mov->U.I.SrcReg[0].Swizzle, |
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| 122 | RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, |
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| 123 | RC_SWIZZLE_UNUSED, RC_SWIZZLE_Z); |
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| 124 | } |
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| 125 | } else { |
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| 126 | rc_compare_func compare_func = RC_COMPARE_FUNC_NEVER; |
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| 127 | unsigned int reverse_srcs = 0; |
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| 128 | unsigned int preserve_opcode = 0; |
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| 129 | for (list_ptr = writer_list; list_ptr; |
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| 130 | list_ptr = list_ptr->Next) { |
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| 131 | writer = list_ptr->Item; |
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| 132 | switch(writer->Inst->U.I.Opcode) { |
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| 133 | case RC_OPCODE_SEQ: |
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| 134 | compare_func = RC_COMPARE_FUNC_EQUAL; |
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| 135 | break; |
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| 136 | case RC_OPCODE_SNE: |
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| 137 | compare_func = RC_COMPARE_FUNC_NOTEQUAL; |
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| 138 | break; |
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| 139 | case RC_OPCODE_SLE: |
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| 140 | reverse_srcs = 1; |
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| 141 | /* Fall through */ |
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| 142 | case RC_OPCODE_SGE: |
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| 143 | compare_func = RC_COMPARE_FUNC_GEQUAL; |
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| 144 | break; |
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| 145 | case RC_OPCODE_SGT: |
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| 146 | reverse_srcs = 1; |
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| 147 | /* Fall through */ |
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| 148 | case RC_OPCODE_SLT: |
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| 149 | compare_func = RC_COMPARE_FUNC_LESS; |
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| 150 | break; |
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| 151 | default: |
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| 152 | compare_func = RC_COMPARE_FUNC_NOTEQUAL; |
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| 153 | preserve_opcode = 1; |
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| 154 | break; |
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| 155 | } |
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| 156 | if (!preserve_opcode) { |
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| 157 | writer->Inst->U.I.Opcode = RC_OPCODE_SUB; |
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| 158 | } |
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| 159 | writer->Inst->U.I.DstReg.WriteMask = 0; |
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| 160 | writer->Inst->U.I.DstReg.File = RC_FILE_NONE; |
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| 161 | writer->Inst->U.I.WriteALUResult = alu_chan; |
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| 162 | writer->Inst->U.I.ALUResultCompare = compare_func; |
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| 163 | if (reverse_srcs) { |
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| 164 | struct rc_src_register temp_src; |
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| 165 | temp_src = writer->Inst->U.I.SrcReg[0]; |
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| 166 | writer->Inst->U.I.SrcReg[0] = |
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| 167 | writer->Inst->U.I.SrcReg[1]; |
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| 168 | writer->Inst->U.I.SrcReg[1] = temp_src; |
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| 169 | } |
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| 170 | } |
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| 171 | } |
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| 172 | |||
| 173 | inst_if->U.I.SrcReg[0].File = RC_FILE_SPECIAL; |
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| 174 | inst_if->U.I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT; |
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| 175 | inst_if->U.I.SrcReg[0].Swizzle = RC_MAKE_SWIZZLE( |
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| 176 | RC_SWIZZLE_X, RC_SWIZZLE_UNUSED, |
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| 177 | RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED); |
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| 178 | inst_if->U.I.SrcReg[0].Negate = 0; |
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| 179 | |||
| 180 | return 1; |
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| 181 | } |
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| 182 | |||
| 183 | static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg) |
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| 184 | { |
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| 185 | unsigned int relevant; |
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| 186 | int i; |
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| 187 | |||
| 188 | if (opcode == RC_OPCODE_TEX || |
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| 189 | opcode == RC_OPCODE_TXB || |
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| 190 | opcode == RC_OPCODE_TXP || |
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| 191 | opcode == RC_OPCODE_TXD || |
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| 192 | opcode == RC_OPCODE_TXL || |
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| 193 | opcode == RC_OPCODE_KIL) { |
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| 194 | if (reg.Abs) |
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| 195 | return 0; |
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| 196 | |||
| 197 | if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE)) |
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| 198 | return 0; |
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| 199 | |||
| 200 | for(i = 0; i < 4; ++i) { |
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| 201 | unsigned int swz = GET_SWZ(reg.Swizzle, i); |
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| 202 | if (swz == RC_SWIZZLE_UNUSED) { |
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| 203 | reg.Negate &= ~(1 << i); |
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| 204 | continue; |
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| 205 | } |
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| 206 | if (swz >= 4) |
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| 207 | return 0; |
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| 208 | } |
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| 209 | |||
| 210 | if (reg.Negate) |
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| 211 | return 0; |
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| 212 | |||
| 213 | return 1; |
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| 214 | } else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) { |
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| 215 | /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles; |
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| 216 | * if it doesn't fit perfectly into a .xyzw case... */ |
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| 217 | if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate) |
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| 218 | return 1; |
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| 219 | |||
| 220 | return 0; |
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| 221 | } else if (reg.File == RC_FILE_INLINE) { |
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| 222 | return 1; |
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| 223 | } else { |
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| 224 | /* ALU instructions support almost everything */ |
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| 225 | relevant = 0; |
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| 226 | for(i = 0; i < 3; ++i) { |
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| 227 | unsigned int swz = GET_SWZ(reg.Swizzle, i); |
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| 228 | if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO) |
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| 229 | relevant |= 1 << i; |
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| 230 | } |
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| 231 | if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant)) |
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| 232 | return 0; |
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| 233 | |||
| 234 | return 1; |
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| 235 | } |
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| 236 | } |
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| 237 | |||
| 238 | /** |
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| 239 | * Split source register access. |
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| 240 | * |
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| 241 | * The only thing we *cannot* do in an ALU instruction is per-component |
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| 242 | * negation. |
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| 243 | */ |
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| 244 | static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask, |
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| 245 | struct rc_swizzle_split * split) |
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| 246 | { |
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| 247 | unsigned int negatebase[2] = { 0, 0 }; |
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| 248 | int i; |
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| 249 | |||
| 250 | for(i = 0; i < 4; ++i) { |
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| 251 | unsigned int swz = GET_SWZ(src.Swizzle, i); |
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| 252 | if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i)) |
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| 253 | continue; |
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| 254 | negatebase[GET_BIT(src.Negate, i)] |= 1 << i; |
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| 255 | } |
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| 256 | |||
| 257 | split->NumPhases = 0; |
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| 258 | |||
| 259 | for(i = 0; i <= 1; ++i) { |
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| 260 | if (!negatebase[i]) |
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| 261 | continue; |
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| 262 | |||
| 263 | split->Phase[split->NumPhases++] = negatebase[i]; |
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| 264 | } |
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| 265 | } |
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| 266 | |||
| 267 | struct rc_swizzle_caps r500_swizzle_caps = { |
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| 268 | .IsNative = r500_swizzle_is_native, |
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| 269 | .Split = r500_swizzle_split |
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| 270 | }; |
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| 271 | |||
| 272 | static char *toswiz(int swiz_val) { |
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| 273 | switch(swiz_val) { |
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| 274 | case 0: return "R"; |
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| 275 | case 1: return "G"; |
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| 276 | case 2: return "B"; |
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| 277 | case 3: return "A"; |
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| 278 | case 4: return "0"; |
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| 279 | case 5: return "H"; |
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| 280 | case 6: return "1"; |
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| 281 | case 7: return "U"; |
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| 282 | } |
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| 283 | return NULL; |
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| 284 | } |
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| 285 | |||
| 286 | static char *toop(int op_val) |
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| 287 | { |
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| 288 | char *str = NULL; |
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| 289 | switch (op_val) { |
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| 290 | case 0: str = "MAD"; break; |
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| 291 | case 1: str = "DP3"; break; |
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| 292 | case 2: str = "DP4"; break; |
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| 293 | case 3: str = "D2A"; break; |
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| 294 | case 4: str = "MIN"; break; |
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| 295 | case 5: str = "MAX"; break; |
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| 296 | case 6: str = "Reserved"; break; |
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| 297 | case 7: str = "CND"; break; |
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| 298 | case 8: str = "CMP"; break; |
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| 299 | case 9: str = "FRC"; break; |
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| 300 | case 10: str = "SOP"; break; |
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| 301 | case 11: str = "MDH"; break; |
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| 302 | case 12: str = "MDV"; break; |
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| 303 | } |
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| 304 | return str; |
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| 305 | } |
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| 306 | |||
| 307 | static char *to_alpha_op(int op_val) |
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| 308 | { |
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| 309 | char *str = NULL; |
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| 310 | switch (op_val) { |
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| 311 | case 0: str = "MAD"; break; |
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| 312 | case 1: str = "DP"; break; |
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| 313 | case 2: str = "MIN"; break; |
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| 314 | case 3: str = "MAX"; break; |
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| 315 | case 4: str = "Reserved"; break; |
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| 316 | case 5: str = "CND"; break; |
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| 317 | case 6: str = "CMP"; break; |
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| 318 | case 7: str = "FRC"; break; |
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| 319 | case 8: str = "EX2"; break; |
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| 320 | case 9: str = "LN2"; break; |
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| 321 | case 10: str = "RCP"; break; |
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| 322 | case 11: str = "RSQ"; break; |
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| 323 | case 12: str = "SIN"; break; |
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| 324 | case 13: str = "COS"; break; |
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| 325 | case 14: str = "MDH"; break; |
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| 326 | case 15: str = "MDV"; break; |
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| 327 | } |
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| 328 | return str; |
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| 329 | } |
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| 330 | |||
| 331 | static char *to_mask(int val) |
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| 332 | { |
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| 333 | char *str = NULL; |
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| 334 | switch(val) { |
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| 335 | case 0: str = "NONE"; break; |
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| 336 | case 1: str = "R"; break; |
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| 337 | case 2: str = "G"; break; |
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| 338 | case 3: str = "RG"; break; |
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| 339 | case 4: str = "B"; break; |
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| 340 | case 5: str = "RB"; break; |
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| 341 | case 6: str = "GB"; break; |
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| 342 | case 7: str = "RGB"; break; |
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| 343 | case 8: str = "A"; break; |
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| 344 | case 9: str = "AR"; break; |
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| 345 | case 10: str = "AG"; break; |
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| 346 | case 11: str = "ARG"; break; |
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| 347 | case 12: str = "AB"; break; |
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| 348 | case 13: str = "ARB"; break; |
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| 349 | case 14: str = "AGB"; break; |
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| 350 | case 15: str = "ARGB"; break; |
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| 351 | } |
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| 352 | return str; |
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| 353 | } |
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| 354 | |||
| 355 | static char *to_texop(int val) |
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| 356 | { |
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| 357 | switch(val) { |
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| 358 | case 0: return "NOP"; |
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| 359 | case 1: return "LD"; |
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| 360 | case 2: return "TEXKILL"; |
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| 361 | case 3: return "PROJ"; |
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| 362 | case 4: return "LODBIAS"; |
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| 363 | case 5: return "LOD"; |
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| 364 | case 6: return "DXDY"; |
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| 365 | } |
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| 366 | return NULL; |
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| 367 | } |
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| 368 | |||
| 369 | void r500FragmentProgramDump(struct radeon_compiler *c, void *user) |
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| 370 | { |
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| 371 | struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler*)c; |
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| 372 | struct r500_fragment_program_code *code = &compiler->code->code.r500; |
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| 373 | int n, i; |
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| 374 | uint32_t inst; |
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| 375 | uint32_t inst0; |
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| 376 | char *str = NULL; |
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| 377 | fprintf(stderr, "R500 Fragment Program:\n--------\n"); |
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| 378 | |||
| 379 | for (n = 0; n < code->inst_end+1; n++) { |
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| 380 | inst0 = inst = code->inst[n].inst0; |
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| 381 | fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst); |
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| 382 | switch(inst & 0x3) { |
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| 383 | case R500_INST_TYPE_ALU: str = "ALU"; break; |
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| 384 | case R500_INST_TYPE_OUT: str = "OUT"; break; |
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| 385 | case R500_INST_TYPE_FC: str = "FC"; break; |
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| 386 | case R500_INST_TYPE_TEX: str = "TEX"; break; |
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| 387 | }; |
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| 388 | fprintf(stderr,"%s %s %s %s %s ", str, |
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| 389 | inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "", |
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| 390 | inst & R500_INST_LAST ? "LAST" : "", |
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| 391 | inst & R500_INST_NOP ? "NOP" : "", |
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| 392 | inst & R500_INST_ALU_WAIT ? "ALU WAIT" : ""); |
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| 393 | fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf), |
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| 394 | to_mask((inst >> 15) & 0xf)); |
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| 395 | |||
| 396 | switch(inst0 & 0x3) { |
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| 397 | case R500_INST_TYPE_ALU: |
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| 398 | case R500_INST_TYPE_OUT: |
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| 399 | fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1); |
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| 400 | inst = code->inst[n].inst1; |
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| 401 | |||
| 402 | fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n", |
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| 403 | inst & 0xff, (inst & (1<<8)) ? 'c' : 't', |
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| 404 | (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't', |
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| 405 | (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't', |
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| 406 | (inst >> 30)); |
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| 407 | |||
| 408 | fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2); |
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| 409 | inst = code->inst[n].inst2; |
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| 410 | fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n", |
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| 411 | inst & 0xff, (inst & (1<<8)) ? 'c' : 't', |
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| 412 | (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't', |
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| 413 | (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't', |
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| 414 | (inst >> 30)); |
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| 415 | fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3); |
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| 416 | inst = code->inst[n].inst3; |
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| 417 | fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n", |
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| 418 | (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7), |
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| 419 | (inst >> 11) & 0x3, |
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| 420 | (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7), |
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| 421 | (inst >> 24) & 0x3, (inst >> 29) & 0x3); |
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| 422 | |||
| 423 | |||
| 424 | fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4); |
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| 425 | inst = code->inst[n].inst4; |
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| 426 | fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst & 0xf), |
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| 427 | (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"", |
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| 428 | (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3, |
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| 429 | (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3, |
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| 430 | (inst >> 29) & 0x3, |
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| 431 | (inst >> 31) & 0x1); |
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| 432 | |||
| 433 | fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5); |
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| 434 | inst = code->inst[n].inst5; |
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| 435 | fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf), |
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| 436 | (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"", |
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| 437 | (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7), |
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| 438 | (inst >> 23) & 0x3, |
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| 439 | (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3); |
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| 440 | break; |
||
| 441 | case R500_INST_TYPE_FC: |
||
| 442 | fprintf(stderr, "\t2:FC_INST 0x%08x:", code->inst[n].inst2); |
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| 443 | inst = code->inst[n].inst2; |
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| 444 | /* JUMP_FUNC JUMP_ANY*/ |
||
| 445 | fprintf(stderr, "0x%02x %1x ", inst >> 8 & 0xff, |
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| 446 | (inst & R500_FC_JUMP_ANY) >> 5); |
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| 447 | |||
| 448 | /* OP */ |
||
| 449 | switch(inst & 0x7){ |
||
| 450 | case R500_FC_OP_JUMP: |
||
| 451 | fprintf(stderr, "JUMP"); |
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| 452 | break; |
||
| 453 | case R500_FC_OP_LOOP: |
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| 454 | fprintf(stderr, "LOOP"); |
||
| 455 | break; |
||
| 456 | case R500_FC_OP_ENDLOOP: |
||
| 457 | fprintf(stderr, "ENDLOOP"); |
||
| 458 | break; |
||
| 459 | case R500_FC_OP_REP: |
||
| 460 | fprintf(stderr, "REP"); |
||
| 461 | break; |
||
| 462 | case R500_FC_OP_ENDREP: |
||
| 463 | fprintf(stderr, "ENDREP"); |
||
| 464 | break; |
||
| 465 | case R500_FC_OP_BREAKLOOP: |
||
| 466 | fprintf(stderr, "BREAKLOOP"); |
||
| 467 | break; |
||
| 468 | case R500_FC_OP_BREAKREP: |
||
| 469 | fprintf(stderr, "BREAKREP"); |
||
| 470 | break; |
||
| 471 | case R500_FC_OP_CONTINUE: |
||
| 472 | fprintf(stderr, "CONTINUE"); |
||
| 473 | break; |
||
| 474 | } |
||
| 475 | fprintf(stderr," "); |
||
| 476 | /* A_OP */ |
||
| 477 | switch(inst & (0x3 << 6)){ |
||
| 478 | case R500_FC_A_OP_NONE: |
||
| 479 | fprintf(stderr, "NONE"); |
||
| 480 | break; |
||
| 481 | case R500_FC_A_OP_POP: |
||
| 482 | fprintf(stderr, "POP"); |
||
| 483 | break; |
||
| 484 | case R500_FC_A_OP_PUSH: |
||
| 485 | fprintf(stderr, "PUSH"); |
||
| 486 | break; |
||
| 487 | } |
||
| 488 | /* B_OP0 B_OP1 */ |
||
| 489 | for(i=0; i<2; i++){ |
||
| 490 | fprintf(stderr, " "); |
||
| 491 | switch(inst & (0x3 << (24 + (i * 2)))){ |
||
| 492 | /* R500_FC_B_OP0_NONE |
||
| 493 | * R500_FC_B_OP1_NONE */ |
||
| 494 | case 0: |
||
| 495 | fprintf(stderr, "NONE"); |
||
| 496 | break; |
||
| 497 | case R500_FC_B_OP0_DECR: |
||
| 498 | case R500_FC_B_OP1_DECR: |
||
| 499 | fprintf(stderr, "DECR"); |
||
| 500 | break; |
||
| 501 | case R500_FC_B_OP0_INCR: |
||
| 502 | case R500_FC_B_OP1_INCR: |
||
| 503 | fprintf(stderr, "INCR"); |
||
| 504 | break; |
||
| 505 | } |
||
| 506 | } |
||
| 507 | /*POP_CNT B_ELSE */ |
||
| 508 | fprintf(stderr, " %d %1x", (inst >> 16) & 0x1f, (inst & R500_FC_B_ELSE) >> 4); |
||
| 509 | inst = code->inst[n].inst3; |
||
| 510 | /* JUMP_ADDR */ |
||
| 511 | fprintf(stderr, " %d", inst >> 16); |
||
| 512 | |||
| 513 | if(code->inst[n].inst2 & R500_FC_IGNORE_UNCOVERED){ |
||
| 514 | fprintf(stderr, " IGN_UNC"); |
||
| 515 | } |
||
| 516 | inst = code->inst[n].inst3; |
||
| 517 | fprintf(stderr, "\n\t3:FC_ADDR 0x%08x:", inst); |
||
| 518 | fprintf(stderr, "BOOL: 0x%02x, INT: 0x%02x, JUMP_ADDR: %d, JMP_GLBL: %1x\n", |
||
| 519 | inst & 0x1f, (inst >> 8) & 0x1f, (inst >> 16) & 0x1ff, inst >> 31); |
||
| 520 | break; |
||
| 521 | case R500_INST_TYPE_TEX: |
||
| 522 | inst = code->inst[n].inst1; |
||
| 523 | fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf, |
||
| 524 | to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "", |
||
| 525 | (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED"); |
||
| 526 | inst = code->inst[n].inst2; |
||
| 527 | fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst, |
||
| 528 | inst & 127, inst & (1<<7) ? "(rel)" : "", |
||
| 529 | toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3), |
||
| 530 | toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3), |
||
| 531 | (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "", |
||
| 532 | toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3), |
||
| 533 | toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3)); |
||
| 534 | |||
| 535 | fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3); |
||
| 536 | break; |
||
| 537 | } |
||
| 538 | fprintf(stderr,"\n"); |
||
| 539 | } |
||
| 540 | |||
| 541 | } |