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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5563 | serge | 1 | /* |
| 2 | * Copyright (C) 2005 Ben Skeggs. |
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| 3 | * |
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| 4 | * All Rights Reserved. |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining |
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| 7 | * a copy of this software and associated documentation files (the |
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| 8 | * "Software"), to deal in the Software without restriction, including |
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| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
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| 10 | * distribute, sublicense, and/or sell copies of the Software, and to |
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| 11 | * permit persons to whom the Software is furnished to do so, subject to |
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| 12 | * the following conditions: |
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| 13 | * |
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| 14 | * The above copyright notice and this permission notice (including the |
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| 15 | * next paragraph) shall be included in all copies or substantial |
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| 16 | * portions of the Software. |
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| 17 | * |
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| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 19 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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| 21 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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| 22 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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| 23 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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| 24 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 25 | * |
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| 26 | */ |
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| 27 | |||
| 28 | #include "r300_fragprog.h" |
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| 29 | |||
| 30 | #include |
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| 31 | |||
| 32 | #include "../r300_reg.h" |
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| 33 | |||
| 34 | static void presub_string(char out[10], unsigned int inst) |
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| 35 | { |
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| 36 | switch(inst & 0x600000){ |
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| 37 | case R300_ALU_SRCP_1_MINUS_2_SRC0: |
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| 38 | sprintf(out, "bias"); |
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| 39 | break; |
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| 40 | case R300_ALU_SRCP_SRC1_MINUS_SRC0: |
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| 41 | sprintf(out, "sub"); |
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| 42 | break; |
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| 43 | case R300_ALU_SRCP_SRC1_PLUS_SRC0: |
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| 44 | sprintf(out, "add"); |
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| 45 | break; |
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| 46 | case R300_ALU_SRCP_1_MINUS_SRC0: |
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| 47 | sprintf(out, "inv "); |
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| 48 | break; |
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| 49 | } |
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| 50 | } |
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| 51 | |||
| 52 | static int get_msb(unsigned int bit, unsigned int r400_ext_addr) |
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| 53 | { |
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| 54 | return (r400_ext_addr & bit) ? 1 << 5 : 0; |
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| 55 | } |
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| 56 | |||
| 57 | /* just some random things... */ |
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| 58 | void r300FragmentProgramDump(struct radeon_compiler *c, void *user) |
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| 59 | { |
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| 60 | struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler*)c; |
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| 61 | struct r300_fragment_program_code *code = &compiler->code->code.r300; |
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| 62 | int n, i, j; |
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| 63 | static int pc = 0; |
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| 64 | |||
| 65 | fprintf(stderr, "pc=%d*************************************\n", pc++); |
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| 66 | |||
| 67 | fprintf(stderr, "Hardware program\n"); |
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| 68 | fprintf(stderr, "----------------\n"); |
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| 69 | if (c->is_r400) { |
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| 70 | fprintf(stderr, "code_offset_ext: %08x\n", code->r400_code_offset_ext); |
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| 71 | } |
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| 72 | |||
| 73 | for (n = 0; n <= (code->config & 3); n++) { |
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| 74 | uint32_t code_addr = code->code_addr[3 - (code->config & 3) + n]; |
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| 75 | unsigned int alu_offset = ((code_addr & R300_ALU_START_MASK) >> R300_ALU_START_SHIFT) + |
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| 76 | (((code->r400_code_offset_ext >> (24 - (n * 6))) & 0x7) << 6); |
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| 77 | unsigned int alu_end = ((code_addr & R300_ALU_SIZE_MASK) >> R300_ALU_SIZE_SHIFT) + |
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| 78 | (((code->r400_code_offset_ext >> (27 - (n * 6))) & 0x7) << 6); |
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| 79 | int tex_offset = (code_addr & R300_TEX_START_MASK) >> R300_TEX_START_SHIFT; |
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| 80 | int tex_end = (code_addr & R300_TEX_SIZE_MASK) >> R300_TEX_SIZE_SHIFT; |
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| 81 | |||
| 82 | fprintf(stderr, "NODE %d: alu_offset: %u, tex_offset: %d, " |
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| 83 | "alu_end: %u, tex_end: %d (code_addr: %08x)\n", n, |
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| 84 | alu_offset, tex_offset, alu_end, tex_end, code_addr); |
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| 85 | |||
| 86 | if (n > 0 || (code->config & R300_PFS_CNTL_FIRST_NODE_HAS_TEX)) { |
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| 87 | fprintf(stderr, " TEX:\n"); |
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| 88 | for (i = tex_offset; |
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| 89 | i <= tex_offset + tex_end; |
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| 90 | ++i) { |
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| 91 | const char *instr; |
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| 92 | |||
| 93 | switch ((code->tex. |
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| 94 | inst[i] >> R300_TEX_INST_SHIFT) & |
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| 95 | 15) { |
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| 96 | case R300_TEX_OP_LD: |
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| 97 | instr = "TEX"; |
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| 98 | break; |
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| 99 | case R300_TEX_OP_KIL: |
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| 100 | instr = "KIL"; |
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| 101 | break; |
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| 102 | case R300_TEX_OP_TXP: |
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| 103 | instr = "TXP"; |
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| 104 | break; |
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| 105 | case R300_TEX_OP_TXB: |
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| 106 | instr = "TXB"; |
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| 107 | break; |
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| 108 | default: |
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| 109 | instr = "UNKNOWN"; |
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| 110 | } |
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| 111 | |||
| 112 | fprintf(stderr, |
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| 113 | " %s t%i, %c%i, texture[%i] (%08x)\n", |
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| 114 | instr, |
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| 115 | (code->tex. |
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| 116 | inst[i] >> R300_DST_ADDR_SHIFT) & 31, |
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| 117 | 't', |
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| 118 | (code->tex. |
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| 119 | inst[i] >> R300_SRC_ADDR_SHIFT) & 31, |
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| 120 | (code->tex. |
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| 121 | inst[i] & R300_TEX_ID_MASK) >> |
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| 122 | R300_TEX_ID_SHIFT, |
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| 123 | code->tex.inst[i]); |
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| 124 | } |
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| 125 | } |
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| 126 | |||
| 127 | for (i = alu_offset; |
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| 128 | i <= alu_offset + alu_end; ++i) { |
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| 129 | char srcc[4][10], dstc[20]; |
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| 130 | char srca[4][10], dsta[20]; |
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| 131 | char argc[3][20]; |
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| 132 | char arga[3][20]; |
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| 133 | char flags[5], tmp[10]; |
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| 134 | |||
| 135 | for (j = 0; j < 3; ++j) { |
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| 136 | int regc = code->alu.inst[i].rgb_addr >> (j * 6); |
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| 137 | int rega = code->alu.inst[i].alpha_addr >> (j * 6); |
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| 138 | int msbc = get_msb(R400_ADDR_EXT_RGB_MSB_BIT(j), |
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| 139 | code->alu.inst[i].r400_ext_addr); |
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| 140 | int msba = get_msb(R400_ADDR_EXT_A_MSB_BIT(j), |
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| 141 | code->alu.inst[i].r400_ext_addr); |
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| 142 | |||
| 143 | sprintf(srcc[j], "%c%i", |
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| 144 | (regc & 32) ? 'c' : 't', (regc & 31) | msbc); |
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| 145 | sprintf(srca[j], "%c%i", |
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| 146 | (rega & 32) ? 'c' : 't', (rega & 31) | msba); |
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| 147 | } |
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| 148 | |||
| 149 | dstc[0] = 0; |
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| 150 | sprintf(flags, "%s%s%s", |
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| 151 | (code->alu.inst[i]. |
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| 152 | rgb_addr & R300_ALU_DSTC_REG_X) ? "x" : "", |
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| 153 | (code->alu.inst[i]. |
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| 154 | rgb_addr & R300_ALU_DSTC_REG_Y) ? "y" : "", |
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| 155 | (code->alu.inst[i]. |
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| 156 | rgb_addr & R300_ALU_DSTC_REG_Z) ? "z" : ""); |
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| 157 | if (flags[0] != 0) { |
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| 158 | unsigned int msb = get_msb( |
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| 159 | R400_ADDRD_EXT_RGB_MSB_BIT, |
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| 160 | code->alu.inst[i].r400_ext_addr); |
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| 161 | |||
| 162 | sprintf(dstc, "t%i.%s ", |
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| 163 | ((code->alu.inst[i]. |
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| 164 | rgb_addr >> R300_ALU_DSTC_SHIFT) |
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| 165 | & 31) | msb, |
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| 166 | flags); |
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| 167 | } |
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| 168 | sprintf(flags, "%s%s%s", |
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| 169 | (code->alu.inst[i]. |
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| 170 | rgb_addr & R300_ALU_DSTC_OUTPUT_X) ? "x" : "", |
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| 171 | (code->alu.inst[i]. |
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| 172 | rgb_addr & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "", |
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| 173 | (code->alu.inst[i]. |
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| 174 | rgb_addr & R300_ALU_DSTC_OUTPUT_Z) ? "z" : ""); |
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| 175 | if (flags[0] != 0) { |
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| 176 | sprintf(tmp, "o%i.%s", |
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| 177 | (code->alu.inst[i]. |
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| 178 | rgb_addr >> 29) & 3, |
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| 179 | flags); |
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| 180 | strcat(dstc, tmp); |
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| 181 | } |
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| 182 | /* Presub */ |
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| 183 | presub_string(srcc[3], code->alu.inst[i].rgb_inst); |
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| 184 | presub_string(srca[3], code->alu.inst[i].alpha_inst); |
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| 185 | |||
| 186 | dsta[0] = 0; |
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| 187 | if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_REG) { |
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| 188 | unsigned int msb = get_msb( |
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| 189 | R400_ADDRD_EXT_A_MSB_BIT, |
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| 190 | code->alu.inst[i].r400_ext_addr); |
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| 191 | sprintf(dsta, "t%i.w ", |
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| 192 | ((code->alu.inst[i]. |
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| 193 | alpha_addr >> R300_ALU_DSTA_SHIFT) & 31) |
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| 194 | | msb); |
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| 195 | } |
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| 196 | if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_OUTPUT) { |
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| 197 | sprintf(tmp, "o%i.w ", |
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| 198 | (code->alu.inst[i]. |
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| 199 | alpha_addr >> 25) & 3); |
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| 200 | strcat(dsta, tmp); |
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| 201 | } |
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| 202 | if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_DEPTH) { |
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| 203 | strcat(dsta, "Z"); |
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| 204 | } |
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| 205 | |||
| 206 | fprintf(stderr, |
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| 207 | "%3i: xyz: %3s %3s %3s %5s-> %-20s (%08x)\n" |
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| 208 | " w: %3s %3s %3s %5s-> %-20s (%08x)\n", i, |
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| 209 | srcc[0], srcc[1], srcc[2], srcc[3], dstc, |
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| 210 | code->alu.inst[i].rgb_addr, srca[0], srca[1], |
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| 211 | srca[2], srca[3], dsta, |
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| 212 | code->alu.inst[i].alpha_addr); |
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| 213 | |||
| 214 | for (j = 0; j < 3; ++j) { |
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| 215 | int regc = code->alu.inst[i].rgb_inst >> (j * 7); |
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| 216 | int rega = code->alu.inst[i].alpha_inst >> (j * 7); |
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| 217 | int d; |
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| 218 | char buf[20]; |
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| 219 | |||
| 220 | d = regc & 31; |
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| 221 | if (d < 12) { |
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| 222 | switch (d % 4) { |
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| 223 | case R300_ALU_ARGC_SRC0C_XYZ: |
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| 224 | sprintf(buf, "%s.xyz", |
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| 225 | srcc[d / 4]); |
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| 226 | break; |
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| 227 | case R300_ALU_ARGC_SRC0C_XXX: |
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| 228 | sprintf(buf, "%s.xxx", |
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| 229 | srcc[d / 4]); |
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| 230 | break; |
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| 231 | case R300_ALU_ARGC_SRC0C_YYY: |
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| 232 | sprintf(buf, "%s.yyy", |
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| 233 | srcc[d / 4]); |
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| 234 | break; |
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| 235 | case R300_ALU_ARGC_SRC0C_ZZZ: |
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| 236 | sprintf(buf, "%s.zzz", |
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| 237 | srcc[d / 4]); |
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| 238 | break; |
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| 239 | } |
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| 240 | } else if (d < 15) { |
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| 241 | sprintf(buf, "%s.www", srca[d - 12]); |
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| 242 | } else if (d < 20 ) { |
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| 243 | switch(d) { |
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| 244 | case R300_ALU_ARGC_SRCP_XYZ: |
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| 245 | sprintf(buf, "srcp.xyz"); |
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| 246 | break; |
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| 247 | case R300_ALU_ARGC_SRCP_XXX: |
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| 248 | sprintf(buf, "srcp.xxx"); |
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| 249 | break; |
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| 250 | case R300_ALU_ARGC_SRCP_YYY: |
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| 251 | sprintf(buf, "srcp.yyy"); |
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| 252 | break; |
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| 253 | case R300_ALU_ARGC_SRCP_ZZZ: |
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| 254 | sprintf(buf, "srcp.zzz"); |
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| 255 | break; |
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| 256 | case R300_ALU_ARGC_SRCP_WWW: |
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| 257 | sprintf(buf, "srcp.www"); |
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| 258 | break; |
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| 259 | } |
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| 260 | } else if (d == 20) { |
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| 261 | sprintf(buf, "0.0"); |
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| 262 | } else if (d == 21) { |
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| 263 | sprintf(buf, "1.0"); |
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| 264 | } else if (d == 22) { |
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| 265 | sprintf(buf, "0.5"); |
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| 266 | } else if (d >= 23 && d < 32) { |
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| 267 | d -= 23; |
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| 268 | switch (d / 3) { |
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| 269 | case 0: |
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| 270 | sprintf(buf, "%s.yzx", |
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| 271 | srcc[d % 3]); |
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| 272 | break; |
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| 273 | case 1: |
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| 274 | sprintf(buf, "%s.zxy", |
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| 275 | srcc[d % 3]); |
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| 276 | break; |
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| 277 | case 2: |
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| 278 | sprintf(buf, "%s.Wzy", |
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| 279 | srcc[d % 3]); |
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| 280 | break; |
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| 281 | } |
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| 282 | } else { |
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| 283 | sprintf(buf, "%i", d); |
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| 284 | } |
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| 285 | |||
| 286 | sprintf(argc[j], "%s%s%s%s", |
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| 287 | (regc & 32) ? "-" : "", |
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| 288 | (regc & 64) ? "|" : "", |
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| 289 | buf, (regc & 64) ? "|" : ""); |
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| 290 | |||
| 291 | d = rega & 31; |
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| 292 | if (d < 9) { |
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| 293 | sprintf(buf, "%s.%c", srcc[d / 3], |
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| 294 | 'x' + (char)(d % 3)); |
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| 295 | } else if (d < 12) { |
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| 296 | sprintf(buf, "%s.w", srca[d - 9]); |
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| 297 | } else if (d < 16) { |
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| 298 | switch(d) { |
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| 299 | case R300_ALU_ARGA_SRCP_X: |
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| 300 | sprintf(buf, "srcp.x"); |
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| 301 | break; |
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| 302 | case R300_ALU_ARGA_SRCP_Y: |
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| 303 | sprintf(buf, "srcp.y"); |
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| 304 | break; |
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| 305 | case R300_ALU_ARGA_SRCP_Z: |
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| 306 | sprintf(buf, "srcp.z"); |
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| 307 | break; |
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| 308 | case R300_ALU_ARGA_SRCP_W: |
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| 309 | sprintf(buf, "srcp.w"); |
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| 310 | break; |
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| 311 | } |
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| 312 | } else if (d == 16) { |
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| 313 | sprintf(buf, "0.0"); |
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| 314 | } else if (d == 17) { |
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| 315 | sprintf(buf, "1.0"); |
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| 316 | } else if (d == 18) { |
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| 317 | sprintf(buf, "0.5"); |
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| 318 | } else { |
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| 319 | sprintf(buf, "%i", d); |
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| 320 | } |
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| 321 | |||
| 322 | sprintf(arga[j], "%s%s%s%s", |
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| 323 | (rega & 32) ? "-" : "", |
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| 324 | (rega & 64) ? "|" : "", |
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| 325 | buf, (rega & 64) ? "|" : ""); |
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| 326 | } |
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| 327 | |||
| 328 | fprintf(stderr, " xyz: %8s %8s %8s op: %08x %s\n" |
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| 329 | " w: %8s %8s %8s op: %08x\n", |
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| 330 | argc[0], argc[1], argc[2], |
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| 331 | code->alu.inst[i].rgb_inst, |
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| 332 | code->alu.inst[i].rgb_inst & R300_ALU_INSERT_NOP ? |
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| 333 | "NOP" : "", |
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| 334 | arga[0], arga[1],arga[2], |
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| 335 | code->alu.inst[i].alpha_inst); |
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| 336 | } |
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| 337 | } |
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| 338 | } |