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5564 | serge | 1 | /* |
2 | * Copyright 2012 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * on the rights to use, copy, modify, merge, publish, distribute, sub |
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8 | * license, and/or sell copies of the Software, and to permit persons to whom |
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9 | * the Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
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19 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
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20 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
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21 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Tom Stellard |
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25 | * Michel Dänzer |
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26 | * Christian König |
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27 | */ |
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28 | |||
29 | #ifndef SI_SHADER_H |
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30 | #define SI_SHADER_H |
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31 | |||
32 | #include |
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33 | #include "tgsi/tgsi_scan.h" |
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34 | #include "si_state.h" |
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35 | |||
36 | struct radeon_shader_binary; |
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37 | struct radeon_shader_reloc; |
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38 | |||
39 | #define SI_SGPR_RW_BUFFERS 0 /* rings (& stream-out, VS only) */ |
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40 | #define SI_SGPR_CONST 2 |
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41 | #define SI_SGPR_SAMPLER 4 |
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42 | #define SI_SGPR_RESOURCE 6 |
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43 | #define SI_SGPR_VERTEX_BUFFER 8 /* VS only */ |
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44 | #define SI_SGPR_BASE_VERTEX 10 /* VS only */ |
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45 | #define SI_SGPR_START_INSTANCE 11 /* VS only */ |
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46 | #define SI_SGPR_ALPHA_REF 8 /* PS only */ |
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47 | |||
48 | #define SI_VS_NUM_USER_SGPR 12 |
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49 | #define SI_GS_NUM_USER_SGPR 8 |
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50 | #define SI_GSCOPY_NUM_USER_SGPR 4 |
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51 | #define SI_PS_NUM_USER_SGPR 9 |
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52 | |||
53 | /* LLVM function parameter indices */ |
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54 | #define SI_PARAM_RW_BUFFERS 0 |
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55 | #define SI_PARAM_CONST 1 |
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56 | #define SI_PARAM_SAMPLER 2 |
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57 | #define SI_PARAM_RESOURCE 3 |
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58 | |||
59 | /* VS only parameters */ |
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60 | #define SI_PARAM_VERTEX_BUFFER 4 |
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61 | #define SI_PARAM_BASE_VERTEX 5 |
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62 | #define SI_PARAM_START_INSTANCE 6 |
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63 | /* the other VS parameters are assigned dynamically */ |
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64 | |||
65 | /* ES only parameters */ |
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66 | #define SI_PARAM_ES2GS_OFFSET 7 |
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67 | |||
68 | /* GS only parameters */ |
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69 | #define SI_PARAM_GS2VS_OFFSET 4 |
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70 | #define SI_PARAM_GS_WAVE_ID 5 |
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71 | #define SI_PARAM_VTX0_OFFSET 6 |
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72 | #define SI_PARAM_VTX1_OFFSET 7 |
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73 | #define SI_PARAM_PRIMITIVE_ID 8 |
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74 | #define SI_PARAM_VTX2_OFFSET 9 |
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75 | #define SI_PARAM_VTX3_OFFSET 10 |
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76 | #define SI_PARAM_VTX4_OFFSET 11 |
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77 | #define SI_PARAM_VTX5_OFFSET 12 |
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78 | #define SI_PARAM_GS_INSTANCE_ID 13 |
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79 | |||
80 | /* PS only parameters */ |
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81 | #define SI_PARAM_ALPHA_REF 4 |
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82 | #define SI_PARAM_PRIM_MASK 5 |
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83 | #define SI_PARAM_PERSP_SAMPLE 6 |
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84 | #define SI_PARAM_PERSP_CENTER 7 |
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85 | #define SI_PARAM_PERSP_CENTROID 8 |
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86 | #define SI_PARAM_PERSP_PULL_MODEL 9 |
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87 | #define SI_PARAM_LINEAR_SAMPLE 10 |
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88 | #define SI_PARAM_LINEAR_CENTER 11 |
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89 | #define SI_PARAM_LINEAR_CENTROID 12 |
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90 | #define SI_PARAM_LINE_STIPPLE_TEX 13 |
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91 | #define SI_PARAM_POS_X_FLOAT 14 |
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92 | #define SI_PARAM_POS_Y_FLOAT 15 |
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93 | #define SI_PARAM_POS_Z_FLOAT 16 |
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94 | #define SI_PARAM_POS_W_FLOAT 17 |
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95 | #define SI_PARAM_FRONT_FACE 18 |
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96 | #define SI_PARAM_ANCILLARY 19 |
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97 | #define SI_PARAM_SAMPLE_COVERAGE 20 |
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98 | #define SI_PARAM_POS_FIXED_PT 21 |
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99 | |||
100 | #define SI_NUM_PARAMS (SI_PARAM_POS_FIXED_PT + 1) |
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101 | |||
102 | struct si_shader; |
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103 | |||
104 | struct si_shader_selector { |
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105 | struct si_shader *current; |
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106 | |||
107 | struct tgsi_token *tokens; |
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108 | struct pipe_stream_output_info so; |
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109 | struct tgsi_shader_info info; |
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110 | |||
111 | unsigned num_shaders; |
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112 | |||
113 | /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */ |
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114 | unsigned type; |
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115 | |||
116 | unsigned gs_output_prim; |
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117 | unsigned gs_max_out_vertices; |
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118 | uint64_t gs_used_inputs; /* mask of "get_unique_index" bits */ |
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119 | }; |
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120 | |||
121 | union si_shader_key { |
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122 | struct { |
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123 | unsigned export_16bpc:8; |
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124 | unsigned last_cbuf:3; |
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125 | unsigned color_two_side:1; |
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126 | unsigned alpha_func:3; |
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127 | unsigned alpha_to_one:1; |
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128 | unsigned poly_stipple:1; |
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129 | unsigned poly_line_smoothing:1; |
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130 | } ps; |
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131 | struct { |
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132 | unsigned instance_divisors[SI_NUM_VERTEX_BUFFERS]; |
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133 | /* The mask of "get_unique_index" bits, needed for ES, |
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134 | * it describes how the ES->GS ring buffer is laid out. */ |
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135 | uint64_t gs_used_inputs; |
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136 | unsigned as_es:1; |
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137 | } vs; |
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138 | }; |
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139 | |||
140 | struct si_shader { |
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141 | struct si_shader_selector *selector; |
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142 | struct si_shader *next_variant; |
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143 | |||
144 | struct si_shader *gs_copy_shader; |
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145 | struct si_pm4_state *pm4; |
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146 | struct r600_resource *bo; |
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147 | struct r600_resource *scratch_bo; |
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148 | struct radeon_shader_binary binary; |
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149 | unsigned num_sgprs; |
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150 | unsigned num_vgprs; |
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151 | unsigned lds_size; |
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152 | unsigned spi_ps_input_ena; |
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153 | unsigned float_mode; |
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154 | unsigned scratch_bytes_per_wave; |
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155 | unsigned spi_shader_col_format; |
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156 | unsigned spi_shader_z_format; |
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157 | unsigned db_shader_control; |
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158 | unsigned cb_shader_mask; |
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159 | union si_shader_key key; |
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160 | |||
161 | unsigned nparam; |
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162 | unsigned vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS]; |
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163 | unsigned ps_input_param_offset[PIPE_MAX_SHADER_INPUTS]; |
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164 | |||
165 | bool uses_instanceid; |
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166 | unsigned nr_pos_exports; |
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167 | bool is_gs_copy_shader; |
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168 | bool dx10_clamp_mode; /* convert NaNs to 0 */ |
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169 | }; |
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170 | |||
171 | static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx) |
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172 | { |
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173 | return sctx->gs_shader ? &sctx->gs_shader->info |
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174 | : &sctx->vs_shader->info; |
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175 | } |
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176 | |||
177 | static inline struct si_shader* si_get_vs_state(struct si_context *sctx) |
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178 | { |
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179 | if (sctx->gs_shader) |
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180 | return sctx->gs_shader->current->gs_copy_shader; |
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181 | else |
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182 | return sctx->vs_shader->current; |
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183 | } |
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184 | |||
185 | /* radeonsi_shader.c */ |
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186 | int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm, |
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187 | struct si_shader *shader); |
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188 | int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader, |
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189 | LLVMTargetMachineRef tm, LLVMModuleRef mod); |
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190 | void si_shader_destroy(struct pipe_context *ctx, struct si_shader *shader); |
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191 | unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index); |
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192 | int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader, |
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193 | const struct radeon_shader_binary *binary); |
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194 | void si_shader_apply_scratch_relocs(struct si_context *sctx, |
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195 | struct si_shader *shader, |
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196 | uint64_t scratch_va); |
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197 | void si_shader_binary_read_config(const struct si_screen *sscreen, |
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198 | struct si_shader *shader, |
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199 | unsigned symbol_offset); |
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200 | |||
201 | #endif |