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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5564 | serge | 1 | /* |
| 2 | * Mesa 3-D graphics library |
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| 3 | * |
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| 4 | * Copyright (C) 2012-2013 LunarG, Inc. |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 7 | * copy of this software and associated documentation files (the "Software"), |
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| 8 | * to deal in the Software without restriction, including without limitation |
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| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 11 | * Software is furnished to do so, subject to the following conditions: |
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| 12 | * |
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| 13 | * The above copyright notice and this permission notice shall be included |
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| 14 | * in all copies or substantial portions of the Software. |
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| 15 | * |
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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| 22 | * DEALINGS IN THE SOFTWARE. |
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| 23 | * |
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| 24 | * Authors: |
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| 25 | * Chia-I Wu |
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| 26 | */ |
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| 27 | |||
| 28 | #include "pipe/p_shader_tokens.h" |
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| 29 | #include "toy_compiler.h" |
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| 30 | #include "toy_tgsi.h" |
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| 31 | #include "toy_helpers.h" |
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| 32 | #include "toy_legalize.h" |
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| 33 | |||
| 34 | /** |
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| 35 | * Lower an instruction to GEN6_OPCODE_SEND(C). |
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| 36 | */ |
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| 37 | void |
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| 38 | toy_compiler_lower_to_send(struct toy_compiler *tc, struct toy_inst *inst, |
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| 39 | bool sendc, unsigned sfid) |
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| 40 | { |
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| 41 | assert(inst->opcode >= 128); |
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| 42 | |||
| 43 | inst->opcode = (sendc) ? GEN6_OPCODE_SENDC : GEN6_OPCODE_SEND; |
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| 44 | |||
| 45 | /* thread control is reserved */ |
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| 46 | assert(inst->thread_ctrl == 0); |
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| 47 | |||
| 48 | assert(inst->cond_modifier == GEN6_COND_NONE); |
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| 49 | inst->cond_modifier = sfid; |
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| 50 | } |
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| 51 | |||
| 52 | static int |
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| 53 | math_op_to_func(unsigned opcode) |
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| 54 | { |
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| 55 | switch (opcode) { |
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| 56 | case TOY_OPCODE_INV: return GEN6_MATH_INV; |
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| 57 | case TOY_OPCODE_LOG: return GEN6_MATH_LOG; |
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| 58 | case TOY_OPCODE_EXP: return GEN6_MATH_EXP; |
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| 59 | case TOY_OPCODE_SQRT: return GEN6_MATH_SQRT; |
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| 60 | case TOY_OPCODE_RSQ: return GEN6_MATH_RSQ; |
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| 61 | case TOY_OPCODE_SIN: return GEN6_MATH_SIN; |
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| 62 | case TOY_OPCODE_COS: return GEN6_MATH_COS; |
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| 63 | case TOY_OPCODE_FDIV: return GEN6_MATH_FDIV; |
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| 64 | case TOY_OPCODE_POW: return GEN6_MATH_POW; |
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| 65 | case TOY_OPCODE_INT_DIV_QUOTIENT: return GEN6_MATH_INT_DIV_QUOTIENT; |
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| 66 | case TOY_OPCODE_INT_DIV_REMAINDER: return GEN6_MATH_INT_DIV_REMAINDER; |
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| 67 | default: |
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| 68 | assert(!"unknown math opcode"); |
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| 69 | return -1; |
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| 70 | } |
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| 71 | } |
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| 72 | |||
| 73 | /** |
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| 74 | * Lower virtual math opcodes to GEN6_OPCODE_MATH. |
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| 75 | */ |
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| 76 | void |
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| 77 | toy_compiler_lower_math(struct toy_compiler *tc, struct toy_inst *inst) |
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| 78 | { |
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| 79 | struct toy_dst tmp; |
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| 80 | int i; |
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| 81 | |||
| 82 | /* see commit 250770b74d33bb8625c780a74a89477af033d13a */ |
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| 83 | for (i = 0; i < Elements(inst->src); i++) { |
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| 84 | if (tsrc_is_null(inst->src[i])) |
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| 85 | break; |
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| 86 | |||
| 87 | /* no swizzling in align1 */ |
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| 88 | /* XXX how about source modifiers? */ |
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| 89 | if (toy_file_is_virtual(inst->src[i].file) && |
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| 90 | !tsrc_is_swizzled(inst->src[i]) && |
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| 91 | !inst->src[i].absolute && |
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| 92 | !inst->src[i].negate) |
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| 93 | continue; |
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| 94 | |||
| 95 | tmp = tdst_type(tc_alloc_tmp(tc), inst->src[i].type); |
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| 96 | tc_MOV(tc, tmp, inst->src[i]); |
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| 97 | inst->src[i] = tsrc_from(tmp); |
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| 98 | } |
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| 99 | |||
| 100 | /* FC[0:3] */ |
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| 101 | assert(inst->cond_modifier == GEN6_COND_NONE); |
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| 102 | inst->cond_modifier = math_op_to_func(inst->opcode); |
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| 103 | /* FC[4:5] */ |
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| 104 | assert(inst->thread_ctrl == 0); |
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| 105 | inst->thread_ctrl = 0; |
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| 106 | |||
| 107 | inst->opcode = GEN6_OPCODE_MATH; |
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| 108 | tc_move_inst(tc, inst); |
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| 109 | |||
| 110 | /* no writemask in align1 */ |
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| 111 | if (inst->dst.writemask != TOY_WRITEMASK_XYZW) { |
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| 112 | struct toy_dst dst = inst->dst; |
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| 113 | struct toy_inst *inst2; |
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| 114 | |||
| 115 | tmp = tc_alloc_tmp(tc); |
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| 116 | tmp.type = inst->dst.type; |
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| 117 | inst->dst = tmp; |
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| 118 | |||
| 119 | inst2 = tc_MOV(tc, dst, tsrc_from(tmp)); |
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| 120 | inst2->pred_ctrl = inst->pred_ctrl; |
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| 121 | } |
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| 122 | } |
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| 123 | |||
| 124 | static uint32_t |
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| 125 | absolute_imm(uint32_t imm32, enum toy_type type) |
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| 126 | { |
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| 127 | union fi val = { .ui = imm32 }; |
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| 128 | |||
| 129 | switch (type) { |
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| 130 | case TOY_TYPE_F: |
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| 131 | val.f = fabs(val.f); |
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| 132 | break; |
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| 133 | case TOY_TYPE_D: |
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| 134 | if (val.i < 0) |
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| 135 | val.i = -val.i; |
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| 136 | break; |
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| 137 | case TOY_TYPE_W: |
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| 138 | if ((int16_t) (val.ui & 0xffff) < 0) |
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| 139 | val.i = -((int16_t) (val.ui & 0xffff)); |
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| 140 | break; |
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| 141 | case TOY_TYPE_V: |
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| 142 | assert(!"cannot take absoulte of immediates of type V"); |
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| 143 | break; |
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| 144 | default: |
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| 145 | break; |
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| 146 | } |
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| 147 | |||
| 148 | return val.ui; |
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| 149 | } |
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| 150 | |||
| 151 | static uint32_t |
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| 152 | negate_imm(uint32_t imm32, enum toy_type type) |
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| 153 | { |
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| 154 | union fi val = { .ui = imm32 }; |
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| 155 | |||
| 156 | switch (type) { |
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| 157 | case TOY_TYPE_F: |
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| 158 | val.f = -val.f; |
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| 159 | break; |
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| 160 | case TOY_TYPE_D: |
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| 161 | case TOY_TYPE_UD: |
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| 162 | val.i = -val.i; |
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| 163 | break; |
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| 164 | case TOY_TYPE_W: |
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| 165 | case TOY_TYPE_UW: |
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| 166 | val.i = -((int16_t) (val.ui & 0xffff)); |
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| 167 | break; |
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| 168 | default: |
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| 169 | assert(!"negate immediate of unknown type"); |
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| 170 | break; |
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| 171 | } |
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| 172 | |||
| 173 | return val.ui; |
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| 174 | } |
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| 175 | |||
| 176 | static void |
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| 177 | validate_imm(struct toy_compiler *tc, struct toy_inst *inst) |
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| 178 | { |
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| 179 | bool move_inst = false; |
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| 180 | int i; |
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| 181 | |||
| 182 | for (i = 0; i < Elements(inst->src); i++) { |
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| 183 | struct toy_dst tmp; |
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| 184 | |||
| 185 | if (tsrc_is_null(inst->src[i])) |
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| 186 | break; |
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| 187 | |||
| 188 | if (inst->src[i].file != TOY_FILE_IMM) |
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| 189 | continue; |
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| 190 | |||
| 191 | if (inst->src[i].absolute) { |
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| 192 | inst->src[i].val32 = |
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| 193 | absolute_imm(inst->src[i].val32, inst->src[i].type); |
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| 194 | inst->src[i].absolute = false; |
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| 195 | } |
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| 196 | |||
| 197 | if (inst->src[i].negate) { |
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| 198 | inst->src[i].val32 = |
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| 199 | negate_imm(inst->src[i].val32, inst->src[i].type); |
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| 200 | inst->src[i].negate = false; |
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| 201 | } |
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| 202 | |||
| 203 | /* this is the last operand */ |
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| 204 | if (i + 1 == Elements(inst->src) || tsrc_is_null(inst->src[i + 1])) |
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| 205 | break; |
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| 206 | |||
| 207 | /* need to use a temp if this imm is not the last operand */ |
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| 208 | /* TODO we should simply swap the operands if the op is commutative */ |
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| 209 | tmp = tc_alloc_tmp(tc); |
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| 210 | tmp = tdst_type(tmp, inst->src[i].type); |
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| 211 | tc_MOV(tc, tmp, inst->src[i]); |
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| 212 | inst->src[i] = tsrc_from(tmp); |
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| 213 | |||
| 214 | move_inst = true; |
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| 215 | } |
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| 216 | |||
| 217 | if (move_inst) |
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| 218 | tc_move_inst(tc, inst); |
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| 219 | } |
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| 220 | |||
| 221 | static void |
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| 222 | lower_opcode_mul(struct toy_compiler *tc, struct toy_inst *inst) |
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| 223 | { |
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| 224 | const enum toy_type inst_type = inst->dst.type; |
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| 225 | const struct toy_dst acc0 = |
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| 226 | tdst_type(tdst(TOY_FILE_ARF, GEN6_ARF_ACC0, 0), inst_type); |
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| 227 | struct toy_inst *inst2; |
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| 228 | |||
| 229 | /* only need to take care of integer multiplications */ |
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| 230 | if (inst_type != TOY_TYPE_UD && inst_type != TOY_TYPE_D) |
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| 231 | return; |
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| 232 | |||
| 233 | /* acc0 = (src0 & 0x0000ffff) * src1 */ |
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| 234 | tc_MUL(tc, acc0, inst->src[0], inst->src[1]); |
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| 235 | |||
| 236 | /* acc0 = (src0 & 0xffff0000) * src1 + acc0 */ |
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| 237 | inst2 = tc_add2(tc, GEN6_OPCODE_MACH, tdst_type(tdst_null(), inst_type), |
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| 238 | inst->src[0], inst->src[1]); |
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| 239 | inst2->acc_wr_ctrl = true; |
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| 240 | |||
| 241 | /* dst = acc0 & 0xffffffff */ |
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| 242 | tc_MOV(tc, inst->dst, tsrc_from(acc0)); |
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| 243 | |||
| 244 | tc_discard_inst(tc, inst); |
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| 245 | } |
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| 246 | |||
| 247 | static void |
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| 248 | lower_opcode_mac(struct toy_compiler *tc, struct toy_inst *inst) |
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| 249 | { |
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| 250 | const enum toy_type inst_type = inst->dst.type; |
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| 251 | |||
| 252 | if (inst_type != TOY_TYPE_UD && inst_type != TOY_TYPE_D) { |
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| 253 | const struct toy_dst acc0 = tdst(TOY_FILE_ARF, GEN6_ARF_ACC0, 0); |
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| 254 | |||
| 255 | tc_MOV(tc, acc0, inst->src[2]); |
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| 256 | inst->src[2] = tsrc_null(); |
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| 257 | tc_move_inst(tc, inst); |
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| 258 | } |
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| 259 | else { |
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| 260 | struct toy_dst tmp = tdst_type(tc_alloc_tmp(tc), inst_type); |
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| 261 | struct toy_inst *inst2; |
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| 262 | |||
| 263 | inst2 = tc_MUL(tc, tmp, inst->src[0], inst->src[1]); |
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| 264 | lower_opcode_mul(tc, inst2); |
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| 265 | |||
| 266 | tc_ADD(tc, inst->dst, tsrc_from(tmp), inst->src[2]); |
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| 267 | |||
| 268 | tc_discard_inst(tc, inst); |
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| 269 | } |
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| 270 | } |
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| 271 | |||
| 272 | /** |
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| 273 | * Legalize the instructions for register allocation. |
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| 274 | */ |
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| 275 | void |
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| 276 | toy_compiler_legalize_for_ra(struct toy_compiler *tc) |
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| 277 | { |
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| 278 | struct toy_inst *inst; |
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| 279 | |||
| 280 | tc_head(tc); |
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| 281 | while ((inst = tc_next(tc)) != NULL) { |
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| 282 | switch (inst->opcode) { |
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| 283 | case GEN6_OPCODE_MAC: |
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| 284 | lower_opcode_mac(tc, inst); |
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| 285 | break; |
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| 286 | case GEN6_OPCODE_MAD: |
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| 287 | /* TODO operands must be floats */ |
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| 288 | break; |
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| 289 | case GEN6_OPCODE_MUL: |
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| 290 | lower_opcode_mul(tc, inst); |
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| 291 | break; |
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| 292 | default: |
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| 293 | if (inst->opcode > TOY_OPCODE_LAST_HW) |
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| 294 | tc_fail(tc, "internal opcodes not lowered"); |
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| 295 | } |
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| 296 | } |
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| 297 | |||
| 298 | /* loop again as the previous pass may add new instructions */ |
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| 299 | tc_head(tc); |
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| 300 | while ((inst = tc_next(tc)) != NULL) { |
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| 301 | validate_imm(tc, inst); |
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| 302 | } |
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| 303 | } |
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| 304 | |||
| 305 | static void |
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| 306 | patch_while_jip(struct toy_compiler *tc, struct toy_inst *inst) |
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| 307 | { |
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| 308 | struct toy_inst *inst2; |
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| 309 | int nest_level, dist; |
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| 310 | |||
| 311 | nest_level = 0; |
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| 312 | dist = -1; |
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| 313 | |||
| 314 | /* search backward */ |
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| 315 | LIST_FOR_EACH_ENTRY_FROM_REV(inst2, inst->list.prev, |
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| 316 | &tc->instructions, list) { |
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| 317 | if (inst2->marker) { |
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| 318 | if (inst2->opcode == TOY_OPCODE_DO) { |
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| 319 | if (nest_level) { |
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| 320 | nest_level--; |
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| 321 | } |
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| 322 | else { |
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| 323 | /* the following instruction */ |
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| 324 | dist++; |
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| 325 | break; |
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| 326 | } |
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| 327 | } |
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| 328 | |||
| 329 | continue; |
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| 330 | } |
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| 331 | |||
| 332 | if (inst2->opcode == GEN6_OPCODE_WHILE) |
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| 333 | nest_level++; |
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| 334 | |||
| 335 | dist--; |
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| 336 | } |
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| 337 | |||
| 338 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(8)) |
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| 339 | inst->src[1] = tsrc_imm_d(dist * 16); |
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| 340 | else if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) |
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| 341 | inst->src[1] = tsrc_imm_w(dist * 2); |
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| 342 | else |
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| 343 | inst->dst = tdst_imm_w(dist * 2); |
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| 344 | } |
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| 345 | |||
| 346 | static void |
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| 347 | patch_if_else_jip(struct toy_compiler *tc, struct toy_inst *inst) |
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| 348 | { |
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| 349 | struct toy_inst *inst2; |
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| 350 | int nest_level, dist; |
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| 351 | int jip, uip; |
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| 352 | |||
| 353 | nest_level = 0; |
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| 354 | dist = 1; |
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| 355 | jip = 0; |
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| 356 | uip = 0; |
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| 357 | |||
| 358 | /* search forward */ |
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| 359 | LIST_FOR_EACH_ENTRY_FROM(inst2, inst->list.next, &tc->instructions, list) { |
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| 360 | if (inst2->marker) |
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| 361 | continue; |
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| 362 | |||
| 363 | if (inst2->opcode == GEN6_OPCODE_ENDIF) { |
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| 364 | if (nest_level) { |
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| 365 | nest_level--; |
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| 366 | } |
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| 367 | else { |
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| 368 | uip = dist * 2; |
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| 369 | if (!jip) |
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| 370 | jip = uip; |
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| 371 | break; |
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| 372 | } |
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| 373 | } |
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| 374 | else if (inst2->opcode == GEN6_OPCODE_ELSE && |
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| 375 | inst->opcode == GEN6_OPCODE_IF) { |
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| 376 | if (!nest_level) { |
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| 377 | /* the following instruction */ |
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| 378 | jip = (dist + 1) * 2; |
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| 379 | |||
| 380 | if (ilo_dev_gen(tc->dev) == ILO_GEN(6)) { |
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| 381 | uip = jip; |
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| 382 | break; |
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| 383 | } |
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| 384 | } |
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| 385 | } |
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| 386 | else if (inst2->opcode == GEN6_OPCODE_IF) { |
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| 387 | nest_level++; |
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| 388 | } |
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| 389 | |||
| 390 | dist++; |
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| 391 | } |
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| 392 | |||
| 393 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(8)) { |
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| 394 | inst->dst.type = TOY_TYPE_D; |
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| 395 | inst->src[0] = tsrc_imm_d(uip * 8); |
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| 396 | inst->src[1] = tsrc_imm_d(jip * 8); |
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| 397 | } else if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) { |
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| 398 | /* what should the type be? */ |
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| 399 | inst->dst.type = TOY_TYPE_D; |
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| 400 | inst->src[0].type = TOY_TYPE_D; |
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| 401 | inst->src[1] = tsrc_imm_d(uip << 16 | jip); |
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| 402 | } else { |
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| 403 | inst->dst = tdst_imm_w(jip); |
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| 404 | } |
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| 405 | } |
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| 406 | |||
| 407 | static void |
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| 408 | patch_endif_jip(struct toy_compiler *tc, struct toy_inst *inst) |
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| 409 | { |
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| 410 | struct toy_inst *inst2; |
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| 411 | bool found = false; |
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| 412 | int dist = 1; |
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| 413 | |||
| 414 | /* search forward for instructions that may enable channels */ |
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| 415 | LIST_FOR_EACH_ENTRY_FROM(inst2, inst->list.next, &tc->instructions, list) { |
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| 416 | if (inst2->marker) |
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| 417 | continue; |
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| 418 | |||
| 419 | switch (inst2->opcode) { |
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| 420 | case GEN6_OPCODE_ENDIF: |
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| 421 | case GEN6_OPCODE_ELSE: |
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| 422 | case GEN6_OPCODE_WHILE: |
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| 423 | found = true; |
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| 424 | break; |
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| 425 | default: |
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| 426 | break; |
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| 427 | } |
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| 428 | |||
| 429 | if (found) |
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| 430 | break; |
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| 431 | |||
| 432 | dist++; |
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| 433 | } |
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| 434 | |||
| 435 | /* should we set dist to (dist - 1) or 1? */ |
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| 436 | if (!found) |
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| 437 | dist = 1; |
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| 438 | |||
| 439 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(8)) |
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| 440 | inst->src[1] = tsrc_imm_d(dist * 16); |
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| 441 | else if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) |
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| 442 | inst->src[1] = tsrc_imm_w(dist * 2); |
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| 443 | else |
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| 444 | inst->dst = tdst_imm_w(dist * 2); |
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| 445 | } |
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| 446 | |||
| 447 | static void |
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| 448 | patch_break_continue_jip(struct toy_compiler *tc, struct toy_inst *inst) |
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| 449 | { |
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| 450 | struct toy_inst *inst2, *inst3; |
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| 451 | int nest_level, dist, jip, uip; |
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| 452 | |||
| 453 | nest_level = 0; |
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| 454 | dist = 1; |
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| 455 | jip = 1 * 2; |
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| 456 | uip = 1 * 2; |
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| 457 | |||
| 458 | /* search forward */ |
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| 459 | LIST_FOR_EACH_ENTRY_FROM(inst2, inst->list.next, &tc->instructions, list) { |
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| 460 | if (inst2->marker) { |
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| 461 | if (inst2->opcode == TOY_OPCODE_DO) |
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| 462 | nest_level++; |
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| 463 | continue; |
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| 464 | } |
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| 465 | |||
| 466 | if (inst2->opcode == GEN6_OPCODE_ELSE || |
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| 467 | inst2->opcode == GEN6_OPCODE_ENDIF || |
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| 468 | inst2->opcode == GEN6_OPCODE_WHILE) { |
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| 469 | jip = dist * 2; |
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| 470 | break; |
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| 471 | } |
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| 472 | |||
| 473 | dist++; |
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| 474 | } |
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| 475 | |||
| 476 | /* go on to determine uip */ |
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| 477 | inst3 = inst2; |
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| 478 | LIST_FOR_EACH_ENTRY_FROM(inst2, &inst3->list, &tc->instructions, list) { |
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| 479 | if (inst2->marker) { |
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| 480 | if (inst2->opcode == TOY_OPCODE_DO) |
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| 481 | nest_level++; |
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| 482 | continue; |
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| 483 | } |
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| 484 | |||
| 485 | if (inst2->opcode == GEN6_OPCODE_WHILE) { |
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| 486 | if (nest_level) { |
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| 487 | nest_level--; |
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| 488 | } |
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| 489 | else { |
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| 490 | /* the following instruction */ |
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| 491 | if (ilo_dev_gen(tc->dev) == ILO_GEN(6) && |
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| 492 | inst->opcode == GEN6_OPCODE_BREAK) |
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| 493 | dist++; |
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| 494 | |||
| 495 | uip = dist * 2; |
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| 496 | break; |
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| 497 | } |
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| 498 | } |
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| 499 | |||
| 500 | dist++; |
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| 501 | } |
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| 502 | |||
| 503 | /* should the type be D or W? */ |
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| 504 | inst->dst.type = TOY_TYPE_D; |
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| 505 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(8)) { |
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| 506 | inst->src[0] = tsrc_imm_d(uip * 8); |
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| 507 | inst->src[1] = tsrc_imm_d(jip * 8); |
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| 508 | } else { |
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| 509 | inst->src[0].type = TOY_TYPE_D; |
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| 510 | inst->src[1] = tsrc_imm_d(uip << 16 | jip); |
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| 511 | } |
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| 512 | } |
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| 513 | |||
| 514 | /** |
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| 515 | * Legalize the instructions for assembling. |
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| 516 | */ |
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| 517 | void |
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| 518 | toy_compiler_legalize_for_asm(struct toy_compiler *tc) |
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| 519 | { |
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| 520 | struct toy_inst *inst; |
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| 521 | int pc = 0; |
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| 522 | |||
| 523 | tc_head(tc); |
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| 524 | while ((inst = tc_next(tc)) != NULL) { |
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| 525 | int i; |
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| 526 | |||
| 527 | pc++; |
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| 528 | |||
| 529 | /* |
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| 530 | * From the Sandy Bridge PRM, volume 4 part 2, page 112: |
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| 531 | * |
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| 532 | * "Specifically, for instructions with a single source, it only |
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| 533 | * uses the first source operand |
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| 534 | * source operand |
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| 535 | * type as the first source operand |
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| 536 | * when |
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| 537 | * the instruction word, which is normally used by |
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| 538 | * case, |
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| 539 | * same data type as |
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| 540 | * |
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| 541 | * Since we already fill unused operands with null, we only need to take |
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| 542 | * care of the type. |
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| 543 | */ |
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| 544 | if (tsrc_is_null(inst->src[1])) |
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| 545 | inst->src[1].type = inst->src[0].type; |
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| 546 | |||
| 547 | switch (inst->opcode) { |
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| 548 | case GEN6_OPCODE_MATH: |
||
| 549 | /* math does not support align16 nor exec_size > 8 */ |
||
| 550 | inst->access_mode = GEN6_ALIGN_1; |
||
| 551 | |||
| 552 | if (inst->exec_size == GEN6_EXECSIZE_16) { |
||
| 553 | /* |
||
| 554 | * From the Ivy Bridge PRM, volume 4 part 3, page 192: |
||
| 555 | * |
||
| 556 | * "INT DIV function does not support SIMD16." |
||
| 557 | */ |
||
| 558 | if (ilo_dev_gen(tc->dev) < ILO_GEN(7) || |
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| 559 | inst->cond_modifier == GEN6_MATH_INT_DIV_QUOTIENT || |
||
| 560 | inst->cond_modifier == GEN6_MATH_INT_DIV_REMAINDER) { |
||
| 561 | struct toy_inst *inst2; |
||
| 562 | |||
| 563 | inst->exec_size = GEN6_EXECSIZE_8; |
||
| 564 | inst->qtr_ctrl = GEN6_QTRCTRL_1Q; |
||
| 565 | |||
| 566 | inst2 = tc_duplicate_inst(tc, inst); |
||
| 567 | inst2->qtr_ctrl = GEN6_QTRCTRL_2Q; |
||
| 568 | inst2->dst = tdst_offset(inst2->dst, 1, 0); |
||
| 569 | inst2->src[0] = tsrc_offset(inst2->src[0], 1, 0); |
||
| 570 | if (!tsrc_is_null(inst2->src[1])) |
||
| 571 | inst2->src[1] = tsrc_offset(inst2->src[1], 1, 0); |
||
| 572 | |||
| 573 | pc++; |
||
| 574 | } |
||
| 575 | } |
||
| 576 | break; |
||
| 577 | case GEN6_OPCODE_IF: |
||
| 578 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(7) && |
||
| 579 | inst->cond_modifier != GEN6_COND_NONE) { |
||
| 580 | struct toy_inst *inst2; |
||
| 581 | |||
| 582 | inst2 = tc_duplicate_inst(tc, inst); |
||
| 583 | |||
| 584 | /* replace the original IF by CMP */ |
||
| 585 | inst->opcode = GEN6_OPCODE_CMP; |
||
| 586 | |||
| 587 | /* predicate control instead of condition modifier */ |
||
| 588 | inst2->dst = tdst_null(); |
||
| 589 | inst2->src[0] = tsrc_null(); |
||
| 590 | inst2->src[1] = tsrc_null(); |
||
| 591 | inst2->cond_modifier = GEN6_COND_NONE; |
||
| 592 | inst2->pred_ctrl = GEN6_PREDCTRL_NORMAL; |
||
| 593 | |||
| 594 | pc++; |
||
| 595 | } |
||
| 596 | break; |
||
| 597 | default: |
||
| 598 | break; |
||
| 599 | } |
||
| 600 | |||
| 601 | /* MRF to GRF */ |
||
| 602 | if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) { |
||
| 603 | for (i = 0; i < Elements(inst->src); i++) { |
||
| 604 | if (inst->src[i].file != TOY_FILE_MRF) |
||
| 605 | continue; |
||
| 606 | else if (tsrc_is_null(inst->src[i])) |
||
| 607 | break; |
||
| 608 | |||
| 609 | inst->src[i].file = TOY_FILE_GRF; |
||
| 610 | } |
||
| 611 | |||
| 612 | if (inst->dst.file == TOY_FILE_MRF) |
||
| 613 | inst->dst.file = TOY_FILE_GRF; |
||
| 614 | } |
||
| 615 | } |
||
| 616 | |||
| 617 | tc->num_instructions = pc; |
||
| 618 | |||
| 619 | /* set JIP/UIP */ |
||
| 620 | tc_head(tc); |
||
| 621 | while ((inst = tc_next(tc)) != NULL) { |
||
| 622 | switch (inst->opcode) { |
||
| 623 | case GEN6_OPCODE_IF: |
||
| 624 | case GEN6_OPCODE_ELSE: |
||
| 625 | patch_if_else_jip(tc, inst); |
||
| 626 | break; |
||
| 627 | case GEN6_OPCODE_ENDIF: |
||
| 628 | patch_endif_jip(tc, inst); |
||
| 629 | break; |
||
| 630 | case GEN6_OPCODE_WHILE: |
||
| 631 | patch_while_jip(tc, inst); |
||
| 632 | break; |
||
| 633 | case GEN6_OPCODE_BREAK: |
||
| 634 | case GEN6_OPCODE_CONT: |
||
| 635 | patch_break_continue_jip(tc, inst); |
||
| 636 | break; |
||
| 637 | default: |
||
| 638 | break; |
||
| 639 | } |
||
| 640 | } |
||
| 641 | } |