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4304 | Serge | 1 | /************************************************************************** |
2 | |||
3 | Copyright 2001 VA Linux Systems Inc., Fremont, California. |
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4 | Copyright © 2002 by David Dawes |
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5 | |||
6 | All Rights Reserved. |
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7 | |||
8 | Permission is hereby granted, free of charge, to any person obtaining a |
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9 | copy of this software and associated documentation files (the "Software"), |
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10 | to deal in the Software without restriction, including without limitation |
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11 | on the rights to use, copy, modify, merge, publish, distribute, sub |
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12 | license, and/or sell copies of the Software, and to permit persons to whom |
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13 | the Software is furnished to do so, subject to the following conditions: |
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14 | |||
15 | The above copyright notice and this permission notice (including the next |
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16 | paragraph) shall be included in all copies or substantial portions of the |
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17 | Software. |
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18 | |||
19 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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20 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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21 | FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
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22 | THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
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23 | DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
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24 | OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
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25 | USE OR OTHER DEALINGS IN THE SOFTWARE. |
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26 | |||
27 | **************************************************************************/ |
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28 | |||
29 | /* |
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30 | * Authors: Jeff Hartmann |
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31 | * Abraham van der Merwe |
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32 | * David Dawes |
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33 | * Alan Hourihane |
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34 | */ |
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35 | |||
36 | #ifdef HAVE_CONFIG_H |
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37 | #include "config.h" |
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38 | #endif |
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39 | |||
40 | #include |
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41 | #include |
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42 | #include |
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43 | #include |
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44 | #include "i915_pciids.h" |
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45 | |||
46 | #include "compiler.h" |
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47 | #include "sna.h" |
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48 | #include "intel_driver.h" |
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49 | |||
50 | #define to_surface(x) (surface_t*)((x)->handle) |
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51 | |||
52 | static struct sna_fb sna_fb; |
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53 | static int tls_mask; |
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54 | |||
55 | int tls_alloc(void); |
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56 | |||
57 | static inline void *tls_get(int key) |
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58 | { |
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59 | void *val; |
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60 | __asm__ __volatile__( |
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61 | "movl %%fs:(%1), %0" |
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62 | :"=r"(val) |
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63 | :"r"(key)); |
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64 | |||
65 | return val; |
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66 | }; |
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67 | |||
68 | static inline int |
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69 | tls_set(int key, const void *ptr) |
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70 | { |
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71 | if(!(key & 3)) |
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72 | { |
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73 | __asm__ __volatile__( |
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74 | "movl %0, %%fs:(%1)" |
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75 | ::"r"(ptr),"r"(key)); |
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76 | return 0; |
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77 | } |
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78 | else return -1; |
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79 | } |
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80 | |||
81 | |||
82 | |||
83 | |||
84 | int kgem_init_fb(struct kgem *kgem, struct sna_fb *fb); |
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85 | int kgem_update_fb(struct kgem *kgem, struct sna_fb *fb); |
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86 | uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing, |
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87 | unsigned flags, uint32_t width, uint32_t height, |
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88 | uint32_t bpp, uint32_t tiling, uint32_t *pitch); |
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89 | struct kgem_bo *kgem_bo_from_handle(struct kgem *kgem, int handle, |
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90 | int pitch, int height); |
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91 | |||
92 | void kgem_close_batches(struct kgem *kgem); |
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93 | void sna_bo_destroy(struct kgem *kgem, struct kgem_bo *bo); |
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94 | |||
95 | const struct intel_device_info * |
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96 | intel_detect_chipset(struct pci_device *pci); |
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97 | |||
98 | static bool sna_solid_cache_init(struct sna *sna); |
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99 | |||
100 | struct sna *sna_device; |
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101 | |||
102 | __LOCK_INIT_RECURSIVE(, __sna_lock); |
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103 | |||
104 | static void no_render_reset(struct sna *sna) |
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105 | { |
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106 | (void)sna; |
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107 | } |
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108 | |||
109 | static void no_render_flush(struct sna *sna) |
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110 | { |
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111 | (void)sna; |
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112 | } |
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113 | |||
114 | static void |
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115 | no_render_context_switch(struct kgem *kgem, |
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116 | int new_mode) |
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117 | { |
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118 | if (!kgem->nbatch) |
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119 | return; |
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120 | |||
121 | if (kgem_ring_is_idle(kgem, kgem->ring)) { |
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122 | DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); |
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123 | _kgem_submit(kgem); |
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124 | } |
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125 | |||
126 | (void)new_mode; |
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127 | } |
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128 | |||
129 | static void |
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130 | no_render_retire(struct kgem *kgem) |
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131 | { |
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132 | (void)kgem; |
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133 | } |
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134 | |||
135 | static void |
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136 | no_render_expire(struct kgem *kgem) |
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137 | { |
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138 | (void)kgem; |
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139 | } |
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140 | |||
141 | static void |
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142 | no_render_fini(struct sna *sna) |
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143 | { |
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144 | (void)sna; |
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145 | } |
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146 | |||
147 | const char *no_render_init(struct sna *sna) |
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148 | { |
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149 | struct sna_render *render = &sna->render; |
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150 | |||
151 | memset (render,0, sizeof (*render)); |
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152 | |||
153 | render->prefer_gpu = PREFER_GPU_BLT; |
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154 | |||
155 | render->vertices = render->vertex_data; |
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156 | render->vertex_size = ARRAY_SIZE(render->vertex_data); |
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157 | |||
158 | render->reset = no_render_reset; |
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159 | render->flush = no_render_flush; |
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160 | render->fini = no_render_fini; |
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161 | |||
162 | sna->kgem.context_switch = no_render_context_switch; |
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163 | sna->kgem.retire = no_render_retire; |
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164 | sna->kgem.expire = no_render_expire; |
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165 | |||
166 | sna->kgem.mode = KGEM_RENDER; |
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167 | sna->kgem.ring = KGEM_RENDER; |
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168 | |||
169 | sna_vertex_init(sna); |
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170 | return "generic"; |
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171 | } |
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172 | |||
173 | void sna_vertex_init(struct sna *sna) |
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174 | { |
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175 | // pthread_mutex_init(&sna->render.lock, NULL); |
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176 | // pthread_cond_init(&sna->render.wait, NULL); |
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177 | sna->render.active = 0; |
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178 | } |
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179 | |||
180 | int sna_accel_init(struct sna *sna) |
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181 | { |
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182 | const char *backend; |
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183 | |||
184 | backend = no_render_init(sna); |
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185 | if (sna->info->gen >= 0100) |
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186 | (void)backend; |
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187 | else if (sna->info->gen >= 070) |
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188 | backend = gen7_render_init(sna, backend); |
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189 | else if (sna->info->gen >= 060) |
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190 | backend = gen6_render_init(sna, backend); |
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191 | else if (sna->info->gen >= 050) |
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192 | backend = gen5_render_init(sna, backend); |
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193 | else if (sna->info->gen >= 040) |
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194 | backend = gen4_render_init(sna, backend); |
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195 | else if (sna->info->gen >= 030) |
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196 | backend = gen3_render_init(sna, backend); |
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197 | |||
198 | DBG(("%s(backend=%s, prefer_gpu=%x)\n", |
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199 | __FUNCTION__, backend, sna->render.prefer_gpu)); |
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200 | |||
201 | kgem_reset(&sna->kgem); |
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202 | |||
203 | sna_device = sna; |
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204 | |||
205 | return kgem_init_fb(&sna->kgem, &sna_fb); |
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206 | } |
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207 | |||
208 | int sna_init(uint32_t service) |
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209 | { |
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210 | ioctl_t io; |
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211 | int caps = 0; |
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212 | |||
213 | static struct pci_device device; |
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214 | struct sna *sna; |
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215 | |||
216 | DBG(("%s\n", __FUNCTION__)); |
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217 | |||
218 | __lock_acquire_recursive(__sna_lock); |
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219 | |||
220 | if(sna_device) |
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221 | goto done; |
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222 | |||
223 | io.handle = service; |
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224 | io.io_code = SRV_GET_PCI_INFO; |
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225 | io.input = &device; |
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226 | io.inp_size = sizeof(device); |
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227 | io.output = NULL; |
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228 | io.out_size = 0; |
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229 | |||
230 | if (call_service(&io)!=0) |
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231 | goto err1; |
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232 | |||
233 | sna = malloc(sizeof(*sna)); |
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234 | if (sna == NULL) |
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235 | goto err1; |
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236 | |||
237 | memset(sna, 0, sizeof(*sna)); |
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238 | |||
239 | sna->cpu_features = sna_cpu_detect(); |
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240 | |||
241 | sna->PciInfo = &device; |
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242 | sna->info = intel_detect_chipset(sna->PciInfo); |
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243 | sna->scrn = service; |
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244 | |||
245 | kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen); |
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246 | |||
247 | |||
248 | /* Disable tiling by default */ |
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249 | sna->tiling = 0; |
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250 | |||
251 | /* Default fail-safe value of 75 Hz */ |
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252 | // sna->vblank_interval = 1000 * 1000 * 1000 / 75; |
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253 | |||
254 | sna->flags = 0; |
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255 | |||
256 | sna_accel_init(sna); |
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257 | |||
258 | tls_mask = tls_alloc(); |
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259 | |||
260 | // printf("tls mask %x\n", tls_mask); |
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261 | |||
262 | done: |
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263 | caps = sna_device->render.caps; |
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264 | |||
265 | err1: |
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266 | __lock_release_recursive(__sna_lock); |
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267 | |||
268 | return caps; |
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269 | } |
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270 | |||
271 | void sna_fini() |
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272 | { |
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273 | if( sna_device ) |
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274 | { |
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275 | struct kgem_bo *mask; |
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276 | |||
277 | __lock_acquire_recursive(__sna_lock); |
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278 | |||
279 | mask = tls_get(tls_mask); |
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280 | |||
281 | sna_device->render.fini(sna_device); |
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282 | if(mask) |
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283 | kgem_bo_destroy(&sna_device->kgem, mask); |
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284 | kgem_close_batches(&sna_device->kgem); |
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285 | kgem_cleanup_cache(&sna_device->kgem); |
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286 | |||
287 | sna_device = NULL; |
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288 | __lock_release_recursive(__sna_lock); |
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289 | }; |
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290 | } |
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291 | |||
292 | #if 0 |
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293 | |||
294 | static bool sna_solid_cache_init(struct sna *sna) |
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295 | { |
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296 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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297 | |||
298 | DBG(("%s\n", __FUNCTION__)); |
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299 | |||
300 | cache->cache_bo = |
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301 | kgem_create_linear(&sna->kgem, sizeof(cache->color)); |
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302 | if (!cache->cache_bo) |
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303 | return FALSE; |
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304 | |||
305 | /* |
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306 | * Initialise [0] with white since it is very common and filling the |
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307 | * zeroth slot simplifies some of the checks. |
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308 | */ |
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309 | cache->color[0] = 0xffffffff; |
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310 | cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t)); |
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311 | cache->bo[0]->pitch = 4; |
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312 | cache->dirty = 1; |
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313 | cache->size = 1; |
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314 | cache->last = 0; |
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315 | |||
316 | return TRUE; |
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317 | } |
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318 | |||
319 | void |
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320 | sna_render_flush_solid(struct sna *sna) |
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321 | { |
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322 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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323 | |||
324 | DBG(("sna_render_flush_solid(size=%d)\n", cache->size)); |
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325 | assert(cache->dirty); |
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326 | assert(cache->size); |
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327 | |||
328 | kgem_bo_write(&sna->kgem, cache->cache_bo, |
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329 | cache->color, cache->size*sizeof(uint32_t)); |
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330 | cache->dirty = 0; |
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331 | cache->last = 0; |
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332 | } |
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333 | |||
334 | static void |
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335 | sna_render_finish_solid(struct sna *sna, bool force) |
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336 | { |
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337 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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338 | int i; |
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339 | |||
340 | DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n", |
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341 | force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty)); |
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342 | |||
343 | if (!force && cache->cache_bo->domain != DOMAIN_GPU) |
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344 | return; |
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345 | |||
346 | if (cache->dirty) |
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347 | sna_render_flush_solid(sna); |
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348 | |||
349 | for (i = 0; i < cache->size; i++) { |
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350 | if (cache->bo[i] == NULL) |
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351 | continue; |
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352 | |||
353 | kgem_bo_destroy(&sna->kgem, cache->bo[i]); |
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354 | cache->bo[i] = NULL; |
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355 | } |
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356 | kgem_bo_destroy(&sna->kgem, cache->cache_bo); |
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357 | |||
358 | DBG(("sna_render_finish_solid reset\n")); |
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359 | |||
360 | cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color)); |
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361 | cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t)); |
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362 | cache->bo[0]->pitch = 4; |
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363 | if (force) |
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364 | cache->size = 1; |
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365 | } |
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366 | |||
367 | |||
368 | struct kgem_bo * |
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369 | sna_render_get_solid(struct sna *sna, uint32_t color) |
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370 | { |
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371 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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372 | int i; |
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373 | |||
374 | DBG(("%s: %08x\n", __FUNCTION__, color)); |
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375 | |||
376 | // if ((color & 0xffffff) == 0) /* alpha only */ |
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377 | // return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]); |
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378 | |||
379 | if (color == 0xffffffff) { |
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380 | DBG(("%s(white)\n", __FUNCTION__)); |
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381 | return kgem_bo_reference(cache->bo[0]); |
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382 | } |
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383 | |||
384 | if (cache->color[cache->last] == color) { |
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385 | DBG(("sna_render_get_solid(%d) = %x (last)\n", |
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386 | cache->last, color)); |
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387 | return kgem_bo_reference(cache->bo[cache->last]); |
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388 | } |
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389 | |||
390 | for (i = 1; i < cache->size; i++) { |
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391 | if (cache->color[i] == color) { |
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392 | if (cache->bo[i] == NULL) { |
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393 | DBG(("sna_render_get_solid(%d) = %x (recreate)\n", |
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394 | i, color)); |
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395 | goto create; |
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396 | } else { |
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397 | DBG(("sna_render_get_solid(%d) = %x (old)\n", |
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398 | i, color)); |
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399 | goto done; |
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400 | } |
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401 | } |
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402 | } |
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403 | |||
404 | sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color)); |
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405 | |||
406 | i = cache->size++; |
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407 | cache->color[i] = color; |
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408 | cache->dirty = 1; |
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409 | DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color)); |
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410 | |||
411 | create: |
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412 | cache->bo[i] = kgem_create_proxy(cache->cache_bo, |
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413 | i*sizeof(uint32_t), sizeof(uint32_t)); |
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414 | cache->bo[i]->pitch = 4; |
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415 | |||
416 | done: |
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417 | cache->last = i; |
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418 | return kgem_bo_reference(cache->bo[i]); |
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419 | } |
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420 | |||
421 | #endif |
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422 | |||
423 | |||
424 | int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y, |
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425 | int w, int h, int src_x, int src_y) |
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426 | |||
427 | { |
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428 | struct sna_copy_op copy; |
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429 | struct _Pixmap src, dst; |
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430 | struct kgem_bo *src_bo; |
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431 | |||
432 | char proc_info[1024]; |
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433 | int winx, winy; |
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434 | |||
435 | get_proc_info(proc_info); |
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436 | |||
437 | winx = *(uint32_t*)(proc_info+34); |
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438 | winy = *(uint32_t*)(proc_info+38); |
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439 | |||
440 | memset(&src, 0, sizeof(src)); |
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441 | memset(&dst, 0, sizeof(dst)); |
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442 | |||
443 | src.drawable.bitsPerPixel = 32; |
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444 | src.drawable.width = src_bitmap->width; |
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445 | src.drawable.height = src_bitmap->height; |
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446 | |||
447 | dst.drawable.bitsPerPixel = 32; |
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448 | dst.drawable.width = sna_fb.width; |
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449 | dst.drawable.height = sna_fb.height; |
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450 | |||
451 | memset(©, 0, sizeof(copy)); |
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452 | |||
453 | src_bo = (struct kgem_bo*)src_bitmap->handle; |
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454 | |||
455 | if( sna_device->render.copy(sna_device, GXcopy, |
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456 | &src, src_bo, |
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457 | &dst, sna_fb.fb_bo, ©) ) |
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458 | { |
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459 | copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y); |
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460 | copy.done(sna_device, ©); |
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461 | } |
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462 | |||
463 | kgem_submit(&sna_device->kgem); |
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464 | |||
465 | return 0; |
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466 | |||
467 | // __asm__ __volatile__("int3"); |
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468 | |||
469 | }; |
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470 | |||
471 | typedef struct |
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472 | { |
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473 | uint32_t width; |
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474 | uint32_t height; |
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475 | void *data; |
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476 | uint32_t pitch; |
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477 | struct kgem_bo *bo; |
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478 | uint32_t bo_size; |
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479 | uint32_t flags; |
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480 | }surface_t; |
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481 | |||
482 | |||
483 | |||
484 | int sna_create_bitmap(bitmap_t *bitmap) |
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485 | { |
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486 | surface_t *sf; |
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487 | struct kgem_bo *bo; |
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488 | |||
489 | sf = malloc(sizeof(*sf)); |
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490 | if(sf == NULL) |
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491 | goto err_1; |
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492 | |||
493 | __lock_acquire_recursive(__sna_lock); |
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494 | |||
495 | bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height, |
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496 | 32,I915_TILING_NONE, CREATE_CPU_MAP); |
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497 | |||
498 | if(bo == NULL) |
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499 | goto err_2; |
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500 | |||
501 | void *map = kgem_bo_map(&sna_device->kgem, bo); |
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502 | if(map == NULL) |
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503 | goto err_3; |
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504 | |||
505 | sf->width = bitmap->width; |
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506 | sf->height = bitmap->height; |
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507 | sf->data = map; |
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508 | sf->pitch = bo->pitch; |
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509 | sf->bo = bo; |
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510 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
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511 | sf->flags = bitmap->flags; |
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512 | |||
513 | bitmap->handle = (uint32_t)sf; |
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514 | __lock_release_recursive(__sna_lock); |
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515 | |||
516 | return 0; |
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517 | |||
518 | err_3: |
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519 | kgem_bo_destroy(&sna_device->kgem, bo); |
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520 | err_2: |
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521 | __lock_release_recursive(__sna_lock); |
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522 | free(sf); |
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523 | err_1: |
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524 | return -1; |
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525 | }; |
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526 | |||
527 | int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle) |
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528 | { |
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529 | surface_t *sf; |
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530 | struct kgem_bo *bo; |
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531 | |||
532 | sf = malloc(sizeof(*sf)); |
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533 | if(sf == NULL) |
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534 | goto err_1; |
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535 | |||
536 | __lock_acquire_recursive(__sna_lock); |
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537 | |||
538 | bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height); |
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539 | |||
540 | __lock_release_recursive(__sna_lock); |
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541 | |||
542 | sf->width = bitmap->width; |
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543 | sf->height = bitmap->height; |
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544 | sf->data = NULL; |
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545 | sf->pitch = bo->pitch; |
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546 | sf->bo = bo; |
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547 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
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548 | sf->flags = bitmap->flags; |
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549 | |||
550 | bitmap->handle = (uint32_t)sf; |
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551 | |||
552 | return 0; |
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553 | |||
554 | err_2: |
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555 | __lock_release_recursive(__sna_lock); |
||
556 | free(sf); |
||
557 | err_1: |
||
558 | return -1; |
||
559 | }; |
||
560 | |||
561 | void sna_set_bo_handle(bitmap_t *bitmap, int handle) |
||
562 | { |
||
563 | surface_t *sf = to_surface(bitmap); |
||
564 | struct kgem_bo *bo = sf->bo; |
||
565 | bo->handle = handle; |
||
566 | } |
||
567 | |||
568 | int sna_destroy_bitmap(bitmap_t *bitmap) |
||
569 | { |
||
570 | surface_t *sf = to_surface(bitmap); |
||
571 | |||
572 | __lock_acquire_recursive(__sna_lock); |
||
573 | |||
574 | kgem_bo_destroy(&sna_device->kgem, sf->bo); |
||
575 | |||
576 | __lock_release_recursive(__sna_lock); |
||
577 | |||
578 | free(sf); |
||
579 | |||
580 | bitmap->handle = -1; |
||
581 | bitmap->data = (void*)-1; |
||
582 | bitmap->pitch = -1; |
||
583 | |||
584 | return 0; |
||
585 | }; |
||
586 | |||
587 | int sna_lock_bitmap(bitmap_t *bitmap) |
||
588 | { |
||
589 | surface_t *sf = to_surface(bitmap); |
||
590 | |||
591 | // printf("%s\n", __FUNCTION__); |
||
592 | __lock_acquire_recursive(__sna_lock); |
||
593 | |||
594 | kgem_bo_sync__cpu(&sna_device->kgem, sf->bo); |
||
595 | |||
596 | __lock_release_recursive(__sna_lock); |
||
597 | |||
598 | bitmap->data = sf->data; |
||
599 | bitmap->pitch = sf->pitch; |
||
600 | |||
601 | return 0; |
||
602 | }; |
||
603 | |||
604 | int sna_resize_bitmap(bitmap_t *bitmap) |
||
605 | { |
||
606 | surface_t *sf = to_surface(bitmap); |
||
607 | struct kgem *kgem = &sna_device->kgem; |
||
608 | struct kgem_bo *bo = sf->bo; |
||
609 | |||
610 | uint32_t size; |
||
611 | uint32_t pitch; |
||
612 | |||
613 | bitmap->pitch = -1; |
||
614 | bitmap->data = (void *) -1; |
||
615 | |||
616 | size = kgem_surface_size(kgem,kgem->has_relaxed_fencing, CREATE_CPU_MAP, |
||
617 | bitmap->width, bitmap->height, 32, I915_TILING_NONE, &pitch); |
||
618 | assert(size && size <= kgem->max_object_size); |
||
619 | |||
620 | if(sf->bo_size >= size) |
||
621 | { |
||
622 | sf->width = bitmap->width; |
||
623 | sf->height = bitmap->height; |
||
624 | sf->pitch = pitch; |
||
625 | bo->pitch = pitch; |
||
626 | |||
627 | return 0; |
||
628 | } |
||
629 | else |
||
630 | { |
||
631 | __lock_acquire_recursive(__sna_lock); |
||
632 | |||
633 | sna_bo_destroy(kgem, bo); |
||
634 | |||
635 | sf->bo = NULL; |
||
636 | |||
637 | bo = kgem_create_2d(kgem, bitmap->width, bitmap->height, |
||
638 | 32, I915_TILING_NONE, CREATE_CPU_MAP); |
||
639 | |||
640 | if(bo == NULL) |
||
641 | { |
||
642 | __lock_release_recursive(__sna_lock); |
||
643 | return -1; |
||
644 | }; |
||
645 | |||
646 | void *map = kgem_bo_map(kgem, bo); |
||
647 | if(map == NULL) |
||
648 | { |
||
649 | sna_bo_destroy(kgem, bo); |
||
650 | __lock_release_recursive(__sna_lock); |
||
651 | return -1; |
||
652 | }; |
||
653 | |||
654 | __lock_release_recursive(__sna_lock); |
||
655 | |||
656 | sf->width = bitmap->width; |
||
657 | sf->height = bitmap->height; |
||
658 | sf->data = map; |
||
659 | sf->pitch = bo->pitch; |
||
660 | sf->bo = bo; |
||
661 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
||
662 | } |
||
663 | |||
664 | return 0; |
||
665 | }; |
||
666 | |||
667 | |||
668 | |||
669 | int sna_create_mask() |
||
670 | { |
||
671 | struct kgem_bo *bo; |
||
672 | |||
673 | // printf("%s width %d height %d\n", __FUNCTION__, sna_fb.width, sna_fb.height); |
||
674 | |||
675 | __lock_acquire_recursive(__sna_lock); |
||
676 | |||
677 | bo = kgem_create_2d(&sna_device->kgem, sna_fb.width, sna_fb.height, |
||
678 | 8,I915_TILING_NONE, CREATE_CPU_MAP); |
||
679 | |||
680 | if(unlikely(bo == NULL)) |
||
681 | goto err_1; |
||
682 | |||
683 | int *map = kgem_bo_map(&sna_device->kgem, bo); |
||
684 | if(map == NULL) |
||
685 | goto err_2; |
||
686 | |||
687 | __lock_release_recursive(__sna_lock); |
||
688 | |||
689 | memset(map, 0, bo->pitch * sna_fb.height); |
||
690 | |||
691 | tls_set(tls_mask, bo); |
||
692 | |||
693 | return 0; |
||
694 | |||
695 | err_2: |
||
696 | kgem_bo_destroy(&sna_device->kgem, bo); |
||
697 | err_1: |
||
698 | __lock_release_recursive(__sna_lock); |
||
699 | return -1; |
||
700 | }; |
||
701 | |||
702 | |||
703 | bool |
||
704 | gen6_composite(struct sna *sna, |
||
705 | uint8_t op, |
||
706 | PixmapPtr src, struct kgem_bo *src_bo, |
||
707 | PixmapPtr mask,struct kgem_bo *mask_bo, |
||
708 | PixmapPtr dst, struct kgem_bo *dst_bo, |
||
709 | int32_t src_x, int32_t src_y, |
||
710 | int32_t msk_x, int32_t msk_y, |
||
711 | int32_t dst_x, int32_t dst_y, |
||
712 | int32_t width, int32_t height, |
||
713 | struct sna_composite_op *tmp); |
||
714 | |||
715 | |||
716 | #define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3)) |
||
717 | |||
718 | int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y, |
||
719 | int w, int h, int src_x, int src_y) |
||
720 | |||
721 | { |
||
722 | surface_t *sf = to_surface(bitmap); |
||
723 | |||
724 | struct drm_i915_mask_update update; |
||
725 | |||
726 | struct sna_composite_op composite; |
||
727 | struct _Pixmap src, dst, mask; |
||
728 | struct kgem_bo *src_bo, *mask_bo; |
||
729 | int winx, winy; |
||
730 | |||
731 | char proc_info[1024]; |
||
732 | |||
733 | get_proc_info(proc_info); |
||
734 | |||
735 | winx = *(uint32_t*)(proc_info+34); |
||
736 | winy = *(uint32_t*)(proc_info+38); |
||
737 | // winw = *(uint32_t*)(proc_info+42)+1; |
||
738 | // winh = *(uint32_t*)(proc_info+46)+1; |
||
739 | |||
740 | mask_bo = tls_get(tls_mask); |
||
741 | |||
742 | if(unlikely(mask_bo == NULL)) |
||
743 | { |
||
744 | sna_create_mask(); |
||
745 | mask_bo = tls_get(tls_mask); |
||
746 | if( mask_bo == NULL) |
||
747 | return -1; |
||
748 | }; |
||
749 | |||
750 | if(kgem_update_fb(&sna_device->kgem, &sna_fb)) |
||
751 | { |
||
752 | __lock_acquire_recursive(__sna_lock); |
||
753 | kgem_bo_destroy(&sna_device->kgem, mask_bo); |
||
754 | __lock_release_recursive(__sna_lock); |
||
755 | |||
756 | sna_create_mask(); |
||
757 | mask_bo = tls_get(tls_mask); |
||
758 | if( mask_bo == NULL) |
||
759 | return -1; |
||
760 | } |
||
761 | |||
762 | VG_CLEAR(update); |
||
763 | update.handle = mask_bo->handle; |
||
764 | update.bo_map = (int)kgem_bo_map__cpu(&sna_device->kgem, mask_bo); |
||
765 | drmIoctl(sna_device->kgem.fd, SRV_MASK_UPDATE, &update); |
||
766 | mask_bo->pitch = update.bo_pitch; |
||
767 | |||
768 | memset(&src, 0, sizeof(src)); |
||
769 | memset(&dst, 0, sizeof(dst)); |
||
770 | memset(&mask, 0, sizeof(dst)); |
||
771 | |||
772 | src.drawable.bitsPerPixel = 32; |
||
773 | |||
774 | src.drawable.width = sf->width; |
||
775 | src.drawable.height = sf->height; |
||
776 | |||
777 | dst.drawable.bitsPerPixel = 32; |
||
778 | dst.drawable.width = sna_fb.width; |
||
779 | dst.drawable.height = sna_fb.height; |
||
780 | |||
781 | mask.drawable.bitsPerPixel = 8; |
||
782 | mask.drawable.width = update.width; |
||
783 | mask.drawable.height = update.height; |
||
784 | |||
785 | memset(&composite, 0, sizeof(composite)); |
||
786 | |||
787 | src_bo = sf->bo; |
||
788 | |||
789 | __lock_acquire_recursive(__sna_lock); |
||
790 | |||
791 | |||
792 | if( sna_device->render.blit_tex(sna_device, PictOpSrc,scale, |
||
793 | &src, src_bo, |
||
794 | &mask, mask_bo, |
||
795 | &dst, sna_fb.fb_bo, |
||
796 | src_x, src_y, |
||
797 | dst_x, dst_y, |
||
798 | winx+dst_x, winy+dst_y, |
||
799 | w, h, |
||
800 | &composite) ) |
||
801 | { |
||
802 | struct sna_composite_rectangles r; |
||
803 | |||
804 | r.src.x = src_x; |
||
805 | r.src.y = src_y; |
||
806 | r.mask.x = dst_x; |
||
807 | r.mask.y = dst_y; |
||
808 | r.dst.x = winx+dst_x; |
||
809 | r.dst.y = winy+dst_y; |
||
810 | r.width = w; |
||
811 | r.height = h; |
||
812 | |||
813 | composite.blt(sna_device, &composite, &r); |
||
814 | composite.done(sna_device, &composite); |
||
815 | |||
816 | }; |
||
817 | |||
818 | kgem_submit(&sna_device->kgem); |
||
819 | |||
820 | __lock_release_recursive(__sna_lock); |
||
821 | |||
822 | bitmap->data = (void*)-1; |
||
823 | bitmap->pitch = -1; |
||
824 | |||
825 | return 0; |
||
826 | } |
||
827 | |||
828 | |||
829 | |||
830 | |||
831 | |||
832 | |||
833 | |||
834 | static const struct intel_device_info intel_generic_info = { |
||
835 | .gen = -1, |
||
836 | }; |
||
837 | |||
838 | static const struct intel_device_info intel_i915_info = { |
||
839 | .gen = 030, |
||
840 | }; |
||
841 | static const struct intel_device_info intel_i945_info = { |
||
842 | .gen = 031, |
||
843 | }; |
||
844 | |||
845 | static const struct intel_device_info intel_g33_info = { |
||
846 | .gen = 033, |
||
847 | }; |
||
848 | |||
849 | static const struct intel_device_info intel_i965_info = { |
||
850 | .gen = 040, |
||
851 | }; |
||
852 | |||
853 | static const struct intel_device_info intel_g4x_info = { |
||
854 | .gen = 045, |
||
855 | }; |
||
856 | |||
857 | static const struct intel_device_info intel_ironlake_info = { |
||
858 | .gen = 050, |
||
859 | }; |
||
860 | |||
861 | static const struct intel_device_info intel_sandybridge_info = { |
||
862 | .gen = 060, |
||
863 | }; |
||
864 | |||
865 | static const struct intel_device_info intel_ivybridge_info = { |
||
866 | .gen = 070, |
||
867 | }; |
||
868 | |||
869 | static const struct intel_device_info intel_valleyview_info = { |
||
870 | .gen = 071, |
||
871 | }; |
||
872 | |||
873 | static const struct intel_device_info intel_haswell_info = { |
||
874 | .gen = 075, |
||
875 | }; |
||
876 | |||
877 | #define INTEL_DEVICE_MATCH(d,i) \ |
||
878 | { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) } |
||
879 | |||
880 | |||
881 | static const struct pci_id_match intel_device_match[] = { |
||
882 | |||
883 | INTEL_I915G_IDS(&intel_i915_info), |
||
884 | INTEL_I915GM_IDS(&intel_i915_info), |
||
885 | INTEL_I945G_IDS(&intel_i945_info), |
||
886 | INTEL_I945GM_IDS(&intel_i945_info), |
||
887 | |||
888 | INTEL_G33_IDS(&intel_g33_info), |
||
889 | INTEL_PINEVIEW_IDS(&intel_g33_info), |
||
890 | |||
891 | INTEL_I965G_IDS(&intel_i965_info), |
||
892 | INTEL_I965GM_IDS(&intel_i965_info), |
||
893 | |||
894 | INTEL_G45_IDS(&intel_g4x_info), |
||
895 | INTEL_GM45_IDS(&intel_g4x_info), |
||
896 | |||
897 | INTEL_IRONLAKE_D_IDS(&intel_ironlake_info), |
||
898 | INTEL_IRONLAKE_M_IDS(&intel_ironlake_info), |
||
899 | |||
900 | INTEL_SNB_D_IDS(&intel_sandybridge_info), |
||
901 | INTEL_SNB_M_IDS(&intel_sandybridge_info), |
||
902 | |||
903 | INTEL_IVB_D_IDS(&intel_ivybridge_info), |
||
904 | INTEL_IVB_M_IDS(&intel_ivybridge_info), |
||
905 | |||
906 | INTEL_HSW_D_IDS(&intel_haswell_info), |
||
907 | INTEL_HSW_M_IDS(&intel_haswell_info), |
||
908 | |||
909 | INTEL_VLV_D_IDS(&intel_valleyview_info), |
||
910 | INTEL_VLV_M_IDS(&intel_valleyview_info), |
||
911 | |||
912 | INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info), |
||
913 | |||
914 | { 0, 0, 0 }, |
||
915 | }; |
||
916 | |||
917 | const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list) |
||
918 | { |
||
919 | while(list->device_id) |
||
920 | { |
||
921 | if(dev==list->device_id) |
||
922 | return list; |
||
923 | list++; |
||
924 | } |
||
925 | return NULL; |
||
926 | } |
||
927 | |||
928 | const struct intel_device_info * |
||
929 | intel_detect_chipset(struct pci_device *pci) |
||
930 | { |
||
931 | const struct pci_id_match *ent = NULL; |
||
932 | |||
933 | ent = PciDevMatch(pci->device_id, intel_device_match); |
||
934 | |||
935 | if(ent != NULL) |
||
936 | return (const struct intel_device_info*)ent->match_data; |
||
937 | else |
||
938 | return &intel_generic_info; |
||
939 | |||
940 | #if 0 |
||
941 | for (i = 0; intel_chipsets[i].name != NULL; i++) { |
||
942 | if (DEVICE_ID(pci) == intel_chipsets[i].token) { |
||
943 | name = intel_chipsets[i].name; |
||
944 | break; |
||
945 | } |
||
946 | } |
||
947 | if (name == NULL) { |
||
948 | xf86DrvMsg(scrn->scrnIndex, X_WARNING, "unknown chipset\n"); |
||
949 | name = "unknown"; |
||
950 | } else { |
||
951 | xf86DrvMsg(scrn->scrnIndex, from, |
||
952 | "Integrated Graphics Chipset: Intel(R) %s\n", |
||
953 | name); |
||
954 | } |
||
955 | |||
956 | scrn->chipset = name; |
||
957 | #endif |
||
958 | |||
959 | } |
||
960 | |||
961 | int intel_get_device_id(int fd) |
||
962 | { |
||
963 | struct drm_i915_getparam gp; |
||
964 | int devid = 0; |
||
965 | |||
966 | memset(&gp, 0, sizeof(gp)); |
||
967 | gp.param = I915_PARAM_CHIPSET_ID; |
||
968 | gp.value = &devid; |
||
969 | |||
970 | if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) |
||
971 | return 0; |
||
972 | |||
973 | return devid; |
||
974 | } |
||
975 | |||
976 | int drmIoctl(int fd, unsigned long request, void *arg) |
||
977 | { |
||
978 | ioctl_t io; |
||
979 | |||
980 | io.handle = fd; |
||
981 | io.io_code = request; |
||
982 | io.input = arg; |
||
983 | io.inp_size = 64; |
||
984 | io.output = NULL; |
||
985 | io.out_size = 0; |
||
986 | |||
987 | return call_service(&io); |
||
988 | }><>><>=>>> |
||
989 |