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  1.  
  2.  
  3. static Bool
  4. rhdMapMMIO(RHDPtr rhdPtr)
  5. {
  6.   rhdPtr->MMIOMapSize = 1 << rhdPtr->memsize[RHD_MMIO_BAR];
  7.   rhdPtr->MMIOBase = MapIoMem((void*)rhdPtr->memBase[RHD_MMIO_BAR],
  8.                           rhdPtr->MMIOMapSize,PG_SW+PG_NOCACHE);
  9.   if( rhdPtr->MMIOBase==0)
  10.     return 0;
  11.  
  12.   DBG(dbgprintf("Mapped IO at %x (size %x)\n", rhdPtr->MMIOBase, rhdPtr->MMIOMapSize));
  13.   return 1;
  14. }
  15.  
  16. #define RADEON_NB_TOM             0x15c
  17.  
  18. static size_t rhdGetVideoRamSize(RHDPtr rhdPtr)
  19. {
  20.   size_t RamSize, BARSize;
  21.  
  22.   if (rhdPtr->ChipSet == RHD_RS690)
  23.     RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE))>>10;
  24.   else
  25.     if (rhdPtr->IsIGP)
  26.     {
  27.       u32_t tom = _RHDRegRead(rhdPtr, RADEON_NB_TOM);
  28.       RamSize = (((tom >> 16) - (tom & 0xffff) + 1) << 6);
  29.       _RHDRegWrite(rhdPtr,R5XX_CONFIG_MEMSIZE, RamSize<<10);
  30.     }
  31.     else
  32.     {
  33.       if (rhdPtr->ChipSet < RHD_R600)
  34.       {
  35.         RamSize = (_RHDRegRead(rhdPtr, R5XX_CONFIG_MEMSIZE)) >> 10;
  36.         if(RamSize==0) RamSize=8192;
  37.       }
  38.       else
  39.         RamSize = (_RHDRegRead(rhdPtr, R6XX_CONFIG_MEMSIZE)) >> 10;
  40.     };
  41.  
  42.   BARSize = 1 << (rhdPtr->memsize[RHD_FB_BAR] - 10);
  43.   if(BARSize==0)
  44.     BARSize = 0x20000;
  45.  
  46.   if (RamSize > BARSize) {
  47.     DBG(dbgprintf("The detected amount of videoram"
  48.            " exceeds the PCI BAR aperture.\n"));
  49.     DBG(dbgprintf("Using only %dkB of the total "
  50.            "%dkB.\n", (int) BARSize, (int) RamSize));
  51.     return BARSize;
  52.   }
  53.   else return RamSize;
  54. }
  55.  
  56. static Bool
  57. rhdMapFB(RHDPtr rhdPtr)
  58. {
  59.   rhdPtr->FbMapSize = 1 << rhdPtr->memsize[RHD_FB_BAR];
  60.   rhdPtr->PhisBase = rhdPtr->memBase[RHD_FB_BAR];
  61.  
  62.  // rhdPtr->FbBase = MapIoMem(rhdPtr->PhisBase, rhdPtr->FbMapSize,PG_SW+PG_NOCACHE);
  63.  
  64.  //  if (!rhdPtr->FbBase)
  65.  //   return FALSE;
  66.  
  67.     /* These devices have an internal address reference, which some other
  68.      * address registers in there also use. This can be different from the
  69.      * address in the BAR */
  70.   if (rhdPtr->ChipSet < RHD_R600)
  71.     rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, HDP_FB_LOCATION)<< 16;
  72.   else
  73.     rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, R6XX_CONFIG_FB_BASE);
  74.  
  75. //    rhdPtr->FbIntAddress = _RHDRegRead(rhdPtr, 0x6110);
  76. //    dbgprintf("rhdPtr->FbIntAddress %x\n",rhdPtr->FbIntAddress);
  77.  
  78.   if (rhdPtr->FbIntAddress != rhdPtr->PhisBase)
  79.     dbgprintf("PCI FB Address (BAR) is at "
  80.               "0x%08X while card Internal Address is 0x%08X\n",
  81.               (unsigned int) rhdPtr->PhisBase,rhdPtr->FbIntAddress);
  82.  // dbgprintf("Mapped FB at %p (size 0x%08X)\n",rhdPtr->FbBase, rhdPtr->FbMapSize);
  83.   return TRUE;
  84. }
  85.  
  86. Bool RHDPreInit()
  87. {
  88.     /* We need access to IO space already */
  89.   if (!rhdMapMMIO(&rhd)) {
  90.     dbgprintf("Failed to map MMIO.\n");
  91.     return FALSE;
  92.   };
  93.  
  94.   rhd.videoRam = rhdGetVideoRamSize(&rhd);
  95.   if (!rhd.videoRam)
  96.   {
  97.     dbgprintf("No Video RAM detected.\n");
  98.     goto error1;
  99.         }
  100.   dbgprintf("VideoRAM: %d kByte\n",rhd.videoRam);
  101.  
  102.   rhd.FbFreeStart = 0;
  103.   rhd.FbFreeSize = rhd.videoRam << 10;
  104.  
  105.   if( !rhdMapFB(&rhd))
  106.     return FALSE;
  107.  
  108.   rhd.FbScanoutStart = 0;
  109.   rhd.FbScanoutSize  = 8*1024*1024;
  110.   rhd.FbFreeStart    = 10*1024*1024;
  111.   rhd.FbFreeSize     = rhd.FbMapSize - 10*1024*1024;
  112.  
  113.   rhdInitHeap(&rhd);
  114.   return TRUE;
  115.  
  116. error1:
  117.   return FALSE;
  118. };
  119.  
  120. //int KernelFree(void *p)
  121. //{
  122. //
  123. //  return 0;
  124. //}
  125.  
  126.