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  1. ;*****************************************************************************
  2. ;*
  3. ;*                            Open Watcom Project
  4. ;*
  5. ;*    Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
  6. ;*
  7. ;*  ========================================================================
  8. ;*
  9. ;*    This file contains Original Code and/or Modifications of Original
  10. ;*    Code as defined in and that are subject to the Sybase Open Watcom
  11. ;*    Public License version 1.0 (the 'License'). You may not use this file
  12. ;*    except in compliance with the License. BY USING THIS FILE YOU AGREE TO
  13. ;*    ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
  14. ;*    provided with the Original Code and Modifications, and is also
  15. ;*    available at www.sybase.com/developer/opensource.
  16. ;*
  17. ;*    The Original Code and all software distributed under the License are
  18. ;*    distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  19. ;*    EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
  20. ;*    ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
  21. ;*    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
  22. ;*    NON-INFRINGEMENT. Please see the License for the specific language
  23. ;*    governing rights and limitations under the License.
  24. ;*
  25. ;*  ========================================================================
  26. ;*
  27. ;* Description:  WHEN YOU FIGURE OUT WHAT THIS FILE DOES, PLEASE
  28. ;*               DESCRIBE IT HERE!
  29. ;*
  30. ;*****************************************************************************
  31.  
  32.  
  33. ; static char sccs_id[] = "@(#)wrap32.asm       1.1  12/15/94  15:56:32";
  34. ;
  35. ; This code is being published by Intel to users of the Pentium(tm)
  36. ; processor.  Recipients are authorized to copy, modify, compile, use and
  37. ; distribute the code.
  38. ;
  39. ; Intel makes no warranty of any kind with regard to this code, including
  40. ; but not limited to, implied warranties or merchantability and fitness for
  41. ; a particular purpose. Intel assumes no responsibility for any errors that
  42. ; may appear in this code.
  43. ;
  44. ; No patent licenses are granted, express or implied.
  45. ;
  46. ;
  47. ;  The following code is a PRELIMINARY IMPLEMENTATION of a
  48. ;  software patch for the FPATAN instruction replacement.
  49. ;
  50. ;
  51. include mdef.inc
  52.  
  53. .386
  54. .387
  55.  
  56. DATA32  SEGMENT DWORD USE32 PUBLIC 'DATA'
  57.  
  58.  
  59. FPU_STATE       STRUC
  60.         CONTROL_WORD    DW      ?
  61.         reserved_1      DW      ?
  62.         STATUS_WORD     DW      ?
  63.         reserved_2      DW      ?
  64.         TAG_WORD        DW      ?
  65.         reserved_3      DW      ?
  66.         IP_OFFSET       DD      ?
  67.         CS_SLCT         DW      ?
  68.         OPCODE          DW      ?
  69.         DATA_OFFSET     DD      ?
  70.         OPERAND_SLCT    DW      ?
  71.         reserved_4      DW      ?
  72.         REGISTER_0      DT      ?
  73.         REGISTER_1      DT      ?
  74.         REGISTER_2      DT      ?
  75.         REGISTER_3      DT      ?
  76.         REGISTER_4      DT      ?
  77.         REGISTER_5      DT      ?
  78.         REGISTER_6      DT      ?
  79.         REGISTER_7      DT      ?
  80.         SAVE_REG_0      DT      ?
  81. FPU_STATE       ENDS
  82.  
  83. ENV_SIZE        EQU     118
  84.  
  85. DATA32  ENDS
  86.  
  87. DGROUP GROUP DATA32
  88.  
  89.  
  90. _TEXT  SEGMENT   DWORD USE32 PUBLIC 'CODE'
  91.  
  92.  
  93.         assume cs:_TEXT, ds:DGROUP, es:DGROUP, ss:nothing
  94.         public  __fpatan_wrap
  95.  
  96. ;
  97. ;  PRELIMINARY VERSION for FPATAN instruction replacement
  98. ;
  99.  
  100.         EXTRN   __fpatan_chk:NEAR
  101.  
  102.         defpe   __fpatan_wrap
  103.         push    eax
  104.         sub     esp, ENV_SIZE
  105.         fstp    tbyte ptr [esp].SAVE_REG_0
  106.         fnsave  [esp]
  107.         fld     tbyte ptr [esp].REGISTER_0
  108.         fld     tbyte ptr [esp].SAVE_REG_0
  109.         call    __fpatan_chk
  110.         fstsw   ax
  111.         fstp    tbyte ptr [esp].REGISTER_0
  112.         and     ax, 0ffh
  113.         or      ax, [esp].STATUS_WORD
  114.         mov     [esp].STATUS_WORD, ax
  115.         frstor  [esp]
  116.         add     esp, ENV_SIZE
  117.         pop     eax
  118.         ret
  119. __fpatan_wrap     ENDP
  120.  
  121. _TEXT  ENDS
  122.         end
  123.