Subversion Repositories Kolibri OS

Rev

Rev 1125 | Rev 1179 | Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /*
  2.  * Copyright 2008 Advanced Micro Devices, Inc.
  3.  * Copyright 2008 Red Hat Inc.
  4.  * Copyright 2009 Jerome Glisse.
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice shall be included in
  14.  * all copies or substantial portions of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20.  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21.  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22.  * OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors: Dave Airlie
  25.  *          Alex Deucher
  26.  *          Jerome Glisse
  27.  */
  28. #include "drmP.h"
  29. #include "radeon_drm.h"
  30. #include "radeon.h"
  31. #include "radeon_reg.h"
  32.  
  33. /*
  34.  * Common GART table functions.
  35.  */
  36. int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
  37. {
  38.         void *ptr;
  39.  
  40. //   ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
  41. //                  &rdev->gart.table_addr);
  42.         if (ptr == NULL) {
  43.                 return -ENOMEM;
  44.         }
  45. #ifdef CONFIG_X86
  46.         if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
  47.             rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
  48.                 set_memory_uc((unsigned long)ptr,
  49.                               rdev->gart.table_size >> PAGE_SHIFT);
  50.         }
  51. #endif
  52.         rdev->gart.table.ram.ptr = ptr;
  53.         memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size);
  54.         return 0;
  55. }
  56.  
  57. void radeon_gart_table_ram_free(struct radeon_device *rdev)
  58. {
  59.         if (rdev->gart.table.ram.ptr == NULL) {
  60.                 return;
  61.         }
  62. #ifdef CONFIG_X86
  63.         if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
  64.             rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
  65.                 set_memory_wb((unsigned long)rdev->gart.table.ram.ptr,
  66.                               rdev->gart.table_size >> PAGE_SHIFT);
  67.         }
  68. #endif
  69. //   pci_free_consistent(rdev->pdev, rdev->gart.table_size,
  70. //               (void *)rdev->gart.table.ram.ptr,
  71. //               rdev->gart.table_addr);
  72.         rdev->gart.table.ram.ptr = NULL;
  73.         rdev->gart.table_addr = 0;
  74. }
  75.  
  76. int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
  77. {
  78.     uint32_t gpu_addr;
  79.     int r;
  80.  
  81.     dbgprintf("%s\n",__FUNCTION__);
  82.  
  83.     if (rdev->gart.table.vram.robj == NULL) {
  84.         r = radeon_object_create(rdev, NULL,
  85.                      rdev->gart.table_size,
  86.                      true,
  87.                      RADEON_GEM_DOMAIN_VRAM,
  88.                      false, &rdev->gart.table.vram.robj);
  89.         if (r) {
  90.             return r;
  91.         }
  92.     }
  93.     r = radeon_object_pin(rdev->gart.table.vram.robj,
  94.                   RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
  95.     if (r) {
  96. //        radeon_object_unref(&rdev->gart.table.vram.robj);
  97.         return r;
  98.     }
  99.     r = radeon_object_kmap(rdev->gart.table.vram.robj,
  100.                    (void **)&rdev->gart.table.vram.ptr);
  101.     if (r) {
  102. //        radeon_object_unpin(rdev->gart.table.vram.robj);
  103. //        radeon_object_unref(&rdev->gart.table.vram.robj);
  104.         DRM_ERROR("radeon: failed to map gart vram table.\n");
  105.         return r;
  106.     }
  107.  
  108.     rdev->gart.table_addr = gpu_addr;
  109.  
  110.     dbgprintf("alloc gart vram:  gpu_base %x lin_addr %x\n",
  111.                rdev->gart.table_addr, rdev->gart.table.vram.ptr);
  112.  
  113. //    gpu_addr = 0x800000;
  114.  
  115. //    u32_t pci_addr = rdev->mc.aper_base + gpu_addr;
  116.  
  117. //    rdev->gart.table.vram.ptr = (void*)MapIoMem(pci_addr, rdev->gart.table_size, PG_SW);
  118.  
  119.  
  120. //    dbgprintf("alloc gart vram:\n  gpu_base %x pci_base %x lin_addr %x",
  121. //               gpu_addr, pci_addr, rdev->gart.table.vram.ptr);
  122.  
  123.     return 0;
  124. }
  125.  
  126. void radeon_gart_table_vram_free(struct radeon_device *rdev)
  127. {
  128.         if (rdev->gart.table.vram.robj == NULL) {
  129.                 return;
  130.         }
  131. //   radeon_object_kunmap(rdev->gart.table.vram.robj);
  132. //   radeon_object_unpin(rdev->gart.table.vram.robj);
  133. //   radeon_object_unref(&rdev->gart.table.vram.robj);
  134. }
  135.  
  136.  
  137.  
  138.  
  139. /*
  140.  * Common gart functions.
  141.  */
  142. void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
  143.                         int pages)
  144. {
  145.         unsigned t;
  146.         unsigned p;
  147.         int i, j;
  148.  
  149.         if (!rdev->gart.ready) {
  150. //       WARN(1, "trying to unbind memory to unitialized GART !\n");
  151.                 return;
  152.         }
  153.         t = offset / 4096;
  154.         p = t / (PAGE_SIZE / 4096);
  155.         for (i = 0; i < pages; i++, p++) {
  156.                 if (rdev->gart.pages[p]) {
  157. //           pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
  158. //                      PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
  159.                         rdev->gart.pages[p] = NULL;
  160.                         rdev->gart.pages_addr[p] = 0;
  161.                         for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) {
  162.                                 radeon_gart_set_page(rdev, t, 0);
  163.                         }
  164.                 }
  165.         }
  166.         mb();
  167.         radeon_gart_tlb_flush(rdev);
  168. }
  169.  
  170. int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
  171.              int pages, u32_t *pagelist)
  172. {
  173.     unsigned t;
  174.     unsigned p;
  175.     uint64_t page_base;
  176.     int i, j;
  177.  
  178.     dbgprintf("%s  ",__FUNCTION__);
  179.     dbgprintf("offset %x pages %x list %x\n",
  180.                offset, pages, pagelist);
  181.  
  182.     if (!rdev->gart.ready) {
  183.         DRM_ERROR("trying to bind memory to unitialized GART !\n");
  184.         return -EINVAL;
  185.     }
  186.     t = offset / 4096;
  187.     p = t / (PAGE_SIZE / 4096);
  188.  
  189.     for (i = 0; i < pages; i++, p++) {
  190.         /* we need to support large memory configurations */
  191.         /* assume that unbind have already been call on the range */
  192.  
  193.         rdev->gart.pages_addr[p] = pagelist[i] & ~4095;
  194.  
  195.         //if (pci_dma_mapping_error(rdev->pdev, rdev->gart.pages_addr[p])) {
  196.         //    /* FIXME: failed to map page (return -ENOMEM?) */
  197.         //    radeon_gart_unbind(rdev, offset, pages);
  198.         //    return -ENOMEM;
  199.         //}
  200.         rdev->gart.pages[p] = pagelist[i];
  201.         page_base = (uint32_t)rdev->gart.pages_addr[p];
  202.         for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) {
  203.             radeon_gart_set_page(rdev, t, page_base);
  204.             page_base += 4096;
  205.         }
  206.     }
  207.     mb();
  208.     radeon_gart_tlb_flush(rdev);
  209.  
  210.     dbgprintf("done %s\n",__FUNCTION__);
  211.  
  212.     return 0;
  213. }
  214.  
  215. int radeon_gart_init(struct radeon_device *rdev)
  216. {
  217.  
  218.     dbgprintf("%s\n",__FUNCTION__);
  219.  
  220.     if (rdev->gart.pages) {
  221.         return 0;
  222.     }
  223.     /* We need PAGE_SIZE >= 4096 */
  224.     if (PAGE_SIZE < 4096) {
  225.         DRM_ERROR("Page size is smaller than GPU page size!\n");
  226.         return -EINVAL;
  227.     }
  228.     /* Compute table size */
  229.     rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
  230.     rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096;
  231.     DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
  232.          rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
  233.     /* Allocate pages table */
  234.     rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
  235.                    GFP_KERNEL);
  236.     if (rdev->gart.pages == NULL) {
  237. //        radeon_gart_fini(rdev);
  238.         return -ENOMEM;
  239.     }
  240.     rdev->gart.pages_addr = kzalloc(sizeof(u32_t) *
  241.                     rdev->gart.num_cpu_pages, GFP_KERNEL);
  242.     if (rdev->gart.pages_addr == NULL) {
  243. //        radeon_gart_fini(rdev);
  244.         return -ENOMEM;
  245.     }
  246.     return 0;
  247. }
  248.  
  249. void radeon_gart_fini(struct radeon_device *rdev)
  250. {
  251.         if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
  252.                 /* unbind pages */
  253.                 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
  254.         }
  255.         rdev->gart.ready = false;
  256.         kfree(rdev->gart.pages);
  257.         kfree(rdev->gart.pages_addr);
  258.         rdev->gart.pages = NULL;
  259.         rdev->gart.pages_addr = NULL;
  260. }
  261.