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  1. /*
  2.  * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3.  * Copyright © 2006-2007 Intel Corporation
  4.  *   Jesse Barnes <jesse.barnes@intel.com>
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the next
  14.  * paragraph) shall be included in all copies or substantial portions of the
  15.  * Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23.  * DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * Authors:
  26.  *  Eric Anholt <eric@anholt.net>
  27.  */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include "intel_drv.h"
  36. #include <drm/i915_drm.h>
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39.  
  40. unsigned int hweight16(unsigned int w)
  41. {
  42.     unsigned int res = w - ((w >> 1) & 0x5555);
  43.     res = (res & 0x3333) + ((res >> 2) & 0x3333);
  44.     res = (res + (res >> 4)) & 0x0F0F;
  45.     return (res + (res >> 8)) & 0x00FF;
  46. }
  47.  
  48.  
  49. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  50. #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  51. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  52. #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  53.  
  54. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  55.                          SDVO_TV_MASK)
  56.  
  57. #define IS_TV(c)    (c->output_flag & SDVO_TV_MASK)
  58. #define IS_TMDS(c)  (c->output_flag & SDVO_TMDS_MASK)
  59. #define IS_LVDS(c)  (c->output_flag & SDVO_LVDS_MASK)
  60. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  61. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  62.  
  63.  
  64. static const char *tv_format_names[] = {
  65.     "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  66.     "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  67.     "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  68.     "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  69.     "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  70.     "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  71.     "SECAM_60"
  72. };
  73.  
  74. #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  75.  
  76. struct intel_sdvo {
  77.     struct intel_encoder base;
  78.  
  79.     struct i2c_adapter *i2c;
  80.     u8 slave_addr;
  81.  
  82.     struct i2c_adapter ddc;
  83.  
  84.     /* Register for the SDVO device: SDVOB or SDVOC */
  85.         uint32_t sdvo_reg;
  86.  
  87.     /* Active outputs controlled by this SDVO output */
  88.     uint16_t controlled_output;
  89.  
  90.     /*
  91.      * Capabilities of the SDVO device returned by
  92.      * i830_sdvo_get_capabilities()
  93.      */
  94.     struct intel_sdvo_caps caps;
  95.  
  96.     /* Pixel clock limitations reported by the SDVO device, in kHz */
  97.     int pixel_clock_min, pixel_clock_max;
  98.  
  99.     /*
  100.     * For multiple function SDVO device,
  101.     * this is for current attached outputs.
  102.     */
  103.     uint16_t attached_output;
  104.  
  105.         /*
  106.          * Hotplug activation bits for this device
  107.          */
  108.         uint16_t hotplug_active;
  109.  
  110.     /**
  111.      * This is used to select the color range of RBG outputs in HDMI mode.
  112.      * It is only valid when using TMDS encoding and 8 bit per color mode.
  113.      */
  114.     uint32_t color_range;
  115.         bool color_range_auto;
  116.  
  117.     /**
  118.      * This is set if we're going to treat the device as TV-out.
  119.      *
  120.      * While we have these nice friendly flags for output types that ought
  121.      * to decide this for us, the S-Video output on our HDMI+S-Video card
  122.      * shows up as RGB1 (VGA).
  123.      */
  124.     bool is_tv;
  125.  
  126.         /* On different gens SDVOB is at different places. */
  127.         bool is_sdvob;
  128.  
  129.     /* This is for current tv format name */
  130.     int tv_format_index;
  131.  
  132.     /**
  133.      * This is set if we treat the device as HDMI, instead of DVI.
  134.      */
  135.     bool is_hdmi;
  136.     bool has_hdmi_monitor;
  137.     bool has_hdmi_audio;
  138.         bool rgb_quant_range_selectable;
  139.  
  140.     /**
  141.      * This is set if we detect output of sdvo device as LVDS and
  142.      * have a valid fixed mode to use with the panel.
  143.      */
  144.     bool is_lvds;
  145.  
  146.     /**
  147.      * This is sdvo fixed pannel mode pointer
  148.      */
  149.     struct drm_display_mode *sdvo_lvds_fixed_mode;
  150.  
  151.     /* DDC bus used by this SDVO encoder */
  152.     uint8_t ddc_bus;
  153.  
  154.         /*
  155.          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
  156.          */
  157.         uint8_t dtd_sdvo_flags;
  158. };
  159.  
  160. struct intel_sdvo_connector {
  161.     struct intel_connector base;
  162.  
  163.     /* Mark the type of connector */
  164.     uint16_t output_flag;
  165.  
  166.         enum hdmi_force_audio force_audio;
  167.  
  168.     /* This contains all current supported TV format */
  169.     u8 tv_format_supported[TV_FORMAT_NUM];
  170.     int   format_supported_num;
  171.     struct drm_property *tv_format;
  172.  
  173.     /* add the property for the SDVO-TV */
  174.     struct drm_property *left;
  175.     struct drm_property *right;
  176.     struct drm_property *top;
  177.     struct drm_property *bottom;
  178.     struct drm_property *hpos;
  179.     struct drm_property *vpos;
  180.     struct drm_property *contrast;
  181.     struct drm_property *saturation;
  182.     struct drm_property *hue;
  183.     struct drm_property *sharpness;
  184.     struct drm_property *flicker_filter;
  185.     struct drm_property *flicker_filter_adaptive;
  186.     struct drm_property *flicker_filter_2d;
  187.     struct drm_property *tv_chroma_filter;
  188.     struct drm_property *tv_luma_filter;
  189.     struct drm_property *dot_crawl;
  190.  
  191.     /* add the property for the SDVO-TV/LVDS */
  192.     struct drm_property *brightness;
  193.  
  194.     /* Add variable to record current setting for the above property */
  195.     u32 left_margin, right_margin, top_margin, bottom_margin;
  196.  
  197.     /* this is to get the range of margin.*/
  198.     u32 max_hscan,  max_vscan;
  199.     u32 max_hpos, cur_hpos;
  200.     u32 max_vpos, cur_vpos;
  201.     u32 cur_brightness, max_brightness;
  202.     u32 cur_contrast,   max_contrast;
  203.     u32 cur_saturation, max_saturation;
  204.     u32 cur_hue,    max_hue;
  205.     u32 cur_sharpness,  max_sharpness;
  206.     u32 cur_flicker_filter,     max_flicker_filter;
  207.     u32 cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
  208.     u32 cur_flicker_filter_2d,      max_flicker_filter_2d;
  209.     u32 cur_tv_chroma_filter,   max_tv_chroma_filter;
  210.     u32 cur_tv_luma_filter, max_tv_luma_filter;
  211.     u32 cur_dot_crawl,  max_dot_crawl;
  212. };
  213.  
  214. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  215. {
  216.     return container_of(encoder, struct intel_sdvo, base.base);
  217. }
  218.  
  219. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  220. {
  221.         return container_of(intel_attached_encoder(connector),
  222.                             struct intel_sdvo, base);
  223. }
  224.  
  225. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  226. {
  227.         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  228. }
  229.  
  230. static bool
  231. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  232. static bool
  233. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  234.                               struct intel_sdvo_connector *intel_sdvo_connector,
  235.                               int type);
  236. static bool
  237. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  238.                                    struct intel_sdvo_connector *intel_sdvo_connector);
  239.  
  240. /**
  241.  * Writes the SDVOB or SDVOC with the given value, but always writes both
  242.  * SDVOB and SDVOC to work around apparent hardware issues (according to
  243.  * comments in the BIOS).
  244.  */
  245. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  246. {
  247.         struct drm_device *dev = intel_sdvo->base.base.dev;
  248.         struct drm_i915_private *dev_priv = dev->dev_private;
  249.         u32 bval = val, cval = val;
  250.         int i;
  251.  
  252.         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  253.                 I915_WRITE(intel_sdvo->sdvo_reg, val);
  254.                 I915_READ(intel_sdvo->sdvo_reg);
  255.                 return;
  256.         }
  257.  
  258.         if (intel_sdvo->sdvo_reg == SDVOB) {
  259.                 cval = I915_READ(SDVOC);
  260.         } else {
  261.                 bval = I915_READ(SDVOB);
  262.         }
  263.         /*
  264.          * Write the registers twice for luck. Sometimes,
  265.          * writing them only once doesn't appear to 'stick'.
  266.          * The BIOS does this too. Yay, magic
  267.          */
  268.         for (i = 0; i < 2; i++)
  269.         {
  270.                 I915_WRITE(SDVOB, bval);
  271.                 I915_READ(SDVOB);
  272.                 I915_WRITE(SDVOC, cval);
  273.                 I915_READ(SDVOC);
  274.         }
  275. }
  276.  
  277. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  278. {
  279.         struct i2c_msg msgs[] = {
  280.                 {
  281.                         .addr = intel_sdvo->slave_addr,
  282.                         .flags = 0,
  283.                         .len = 1,
  284.                         .buf = &addr,
  285.                 },
  286.                 {
  287.                         .addr = intel_sdvo->slave_addr,
  288.                         .flags = I2C_M_RD,
  289.                         .len = 1,
  290.                         .buf = ch,
  291.                 }
  292.         };
  293.         int ret;
  294.  
  295.         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  296.                 return true;
  297.  
  298.         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  299.         return false;
  300. }
  301.  
  302. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  303. /** Mapping of command numbers to names, for debug output */
  304. static const struct _sdvo_cmd_name {
  305.         u8 cmd;
  306.         const char *name;
  307. } sdvo_cmd_names[] = {
  308.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  309.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  310.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  311.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  312.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  313.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  314.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  315.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  316.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  317.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  318.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  319.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  320.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  321.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  322.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  323.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  324.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  325.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  326.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  327.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  328.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  329.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  330.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  331.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  332.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  333.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  334.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  335.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  336.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  337.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  338.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  339.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  340.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  341.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  342.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  343.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  344.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  345.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  346.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  347.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  348.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  349.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  350.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  351.  
  352.     /* Add the op code for SDVO enhancements */
  353.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  354.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  355.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  356.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  357.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  358.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  359.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  360.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  361.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  362.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  363.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  364.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  365.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  366.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  367.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  368.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  369.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  370.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  371.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  372.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  373.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  374.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  375.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  376.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  377.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  378.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  379.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  380.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  381.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  382.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  383.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  384.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  385.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  386.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  387.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  388.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  389.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  390.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  391.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  392.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  393.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  394.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  395.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  396.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  397.  
  398.     /* HDMI op code */
  399.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  400.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  401.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  402.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  403.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  404.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  405.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  406.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  407.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  408.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  409.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  410.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  411.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  412.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  413.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  414.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  415.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  416.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  417.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  418.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  419. };
  420.  
  421. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  422.  
  423. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  424.                                    const void *args, int args_len)
  425. {
  426.         int i;
  427.  
  428.         DRM_DEBUG_KMS("%s: W: %02X ",
  429.                                 SDVO_NAME(intel_sdvo), cmd);
  430.         for (i = 0; i < args_len; i++)
  431.                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  432.         for (; i < 8; i++)
  433.                 DRM_LOG_KMS("   ");
  434.         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  435.                 if (cmd == sdvo_cmd_names[i].cmd) {
  436.                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  437.                         break;
  438.                 }
  439.         }
  440.         if (i == ARRAY_SIZE(sdvo_cmd_names))
  441.                 DRM_LOG_KMS("(%02X)", cmd);
  442.         DRM_LOG_KMS("\n");
  443. }
  444.  
  445. static const char *cmd_status_names[] = {
  446.         "Power on",
  447.         "Success",
  448.         "Not supported",
  449.         "Invalid arg",
  450.         "Pending",
  451.         "Target not specified",
  452.         "Scaling not supported"
  453. };
  454.  
  455. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  456.                                  const void *args, int args_len)
  457. {
  458.         u8 *buf, status;
  459.         struct i2c_msg *msgs;
  460.         int i, ret = true;
  461.  
  462.         /* Would be simpler to allocate both in one go ? */        
  463.         buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  464.         if (!buf)
  465.                 return false;
  466.  
  467.         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  468.         if (!msgs) {
  469.                 kfree(buf);
  470.                 return false;
  471.         }
  472.  
  473.         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  474.  
  475.         for (i = 0; i < args_len; i++) {
  476.                 msgs[i].addr = intel_sdvo->slave_addr;
  477.                 msgs[i].flags = 0;
  478.                 msgs[i].len = 2;
  479.                 msgs[i].buf = buf + 2 *i;
  480.                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  481.                 buf[2*i + 1] = ((u8*)args)[i];
  482.         }
  483.         msgs[i].addr = intel_sdvo->slave_addr;
  484.         msgs[i].flags = 0;
  485.         msgs[i].len = 2;
  486.         msgs[i].buf = buf + 2*i;
  487.         buf[2*i + 0] = SDVO_I2C_OPCODE;
  488.         buf[2*i + 1] = cmd;
  489.  
  490.         /* the following two are to read the response */
  491.         status = SDVO_I2C_CMD_STATUS;
  492.         msgs[i+1].addr = intel_sdvo->slave_addr;
  493.         msgs[i+1].flags = 0;
  494.         msgs[i+1].len = 1;
  495.         msgs[i+1].buf = &status;
  496.  
  497.         msgs[i+2].addr = intel_sdvo->slave_addr;
  498.         msgs[i+2].flags = I2C_M_RD;
  499.         msgs[i+2].len = 1;
  500.         msgs[i+2].buf = &status;
  501.  
  502.         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  503.         if (ret < 0) {
  504.                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  505.                 ret = false;
  506.                 goto out;
  507.         }
  508.         if (ret != i+3) {
  509.                 /* failure in I2C transfer */
  510.                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  511.                 ret = false;
  512.         }
  513.  
  514. out:
  515.         kfree(msgs);
  516.         kfree(buf);
  517.         return ret;
  518. }
  519.  
  520. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  521.                                      void *response, int response_len)
  522. {
  523.         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
  524.         u8 status;
  525.         int i;
  526.  
  527.         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  528.  
  529.         /*
  530.          * The documentation states that all commands will be
  531.          * processed within 15µs, and that we need only poll
  532.          * the status byte a maximum of 3 times in order for the
  533.          * command to be complete.
  534.          *
  535.          * Check 5 times in case the hardware failed to read the docs.
  536.          *
  537.          * Also beware that the first response by many devices is to
  538.          * reply PENDING and stall for time. TVs are notorious for
  539.          * requiring longer than specified to complete their replies.
  540.          * Originally (in the DDX long ago), the delay was only ever 15ms
  541.          * with an additional delay of 30ms applied for TVs added later after
  542.          * many experiments. To accommodate both sets of delays, we do a
  543.          * sequence of slow checks if the device is falling behind and fails
  544.          * to reply within 5*15µs.
  545.          */
  546.         if (!intel_sdvo_read_byte(intel_sdvo,
  547.                                   SDVO_I2C_CMD_STATUS,
  548.                                   &status))
  549.                 goto log_fail;
  550.  
  551.         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
  552.                 if (retry < 10)
  553.                         msleep(15);
  554.                 else
  555.                         udelay(15);
  556.  
  557.                 if (!intel_sdvo_read_byte(intel_sdvo,
  558.                                           SDVO_I2C_CMD_STATUS,
  559.                                           &status))
  560.                         goto log_fail;
  561.         }
  562.  
  563.         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  564.                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  565.         else
  566.                 DRM_LOG_KMS("(??? %d)", status);
  567.  
  568.         if (status != SDVO_CMD_STATUS_SUCCESS)
  569.                 goto log_fail;
  570.  
  571.         /* Read the command response */
  572.         for (i = 0; i < response_len; i++) {
  573.                 if (!intel_sdvo_read_byte(intel_sdvo,
  574.                                           SDVO_I2C_RETURN_0 + i,
  575.                                           &((u8 *)response)[i]))
  576.                         goto log_fail;
  577.                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  578.         }
  579.         DRM_LOG_KMS("\n");
  580.         return true;
  581.  
  582. log_fail:
  583.         DRM_LOG_KMS("... failed\n");
  584.         return false;
  585. }
  586.  
  587. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  588. {
  589.         if (mode->clock >= 100000)
  590.                 return 1;
  591.         else if (mode->clock >= 50000)
  592.                 return 2;
  593.         else
  594.                 return 4;
  595. }
  596.  
  597. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  598.                                               u8 ddc_bus)
  599. {
  600.         /* This must be the immediately preceding write before the i2c xfer */
  601.         return intel_sdvo_write_cmd(intel_sdvo,
  602.                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  603.                                     &ddc_bus, 1);
  604. }
  605.  
  606. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  607. {
  608.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  609.                 return false;
  610.  
  611.         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  612. }
  613.  
  614. static bool
  615. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  616. {
  617.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  618.                 return false;
  619.  
  620.         return intel_sdvo_read_response(intel_sdvo, value, len);
  621. }
  622.  
  623. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  624. {
  625.         struct intel_sdvo_set_target_input_args targets = {0};
  626.         return intel_sdvo_set_value(intel_sdvo,
  627.                                     SDVO_CMD_SET_TARGET_INPUT,
  628.                                     &targets, sizeof(targets));
  629. }
  630.  
  631. /**
  632.  * Return whether each input is trained.
  633.  *
  634.  * This function is making an assumption about the layout of the response,
  635.  * which should be checked against the docs.
  636.  */
  637. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  638. {
  639.         struct intel_sdvo_get_trained_inputs_response response;
  640.  
  641.         BUILD_BUG_ON(sizeof(response) != 1);
  642.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  643.                                   &response, sizeof(response)))
  644.                 return false;
  645.  
  646.         *input_1 = response.input0_trained;
  647.         *input_2 = response.input1_trained;
  648.         return true;
  649. }
  650.  
  651. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  652.                                           u16 outputs)
  653. {
  654.         return intel_sdvo_set_value(intel_sdvo,
  655.                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
  656.                                     &outputs, sizeof(outputs));
  657. }
  658.  
  659. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  660.                                           u16 *outputs)
  661. {
  662.         return intel_sdvo_get_value(intel_sdvo,
  663.                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
  664.                                     outputs, sizeof(*outputs));
  665. }
  666.  
  667. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  668.                                                int mode)
  669. {
  670.         u8 state = SDVO_ENCODER_STATE_ON;
  671.  
  672.         switch (mode) {
  673.         case DRM_MODE_DPMS_ON:
  674.                 state = SDVO_ENCODER_STATE_ON;
  675.                 break;
  676.         case DRM_MODE_DPMS_STANDBY:
  677.                 state = SDVO_ENCODER_STATE_STANDBY;
  678.                 break;
  679.         case DRM_MODE_DPMS_SUSPEND:
  680.                 state = SDVO_ENCODER_STATE_SUSPEND;
  681.                 break;
  682.         case DRM_MODE_DPMS_OFF:
  683.                 state = SDVO_ENCODER_STATE_OFF;
  684.                 break;
  685.         }
  686.  
  687.         return intel_sdvo_set_value(intel_sdvo,
  688.                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  689. }
  690.  
  691. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  692.                                                    int *clock_min,
  693.                                                    int *clock_max)
  694. {
  695.         struct intel_sdvo_pixel_clock_range clocks;
  696.  
  697.         BUILD_BUG_ON(sizeof(clocks) != 4);
  698.         if (!intel_sdvo_get_value(intel_sdvo,
  699.                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  700.                                   &clocks, sizeof(clocks)))
  701.                 return false;
  702.  
  703.         /* Convert the values from units of 10 kHz to kHz. */
  704.         *clock_min = clocks.min * 10;
  705.         *clock_max = clocks.max * 10;
  706.         return true;
  707. }
  708.  
  709. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  710.                                          u16 outputs)
  711. {
  712.         return intel_sdvo_set_value(intel_sdvo,
  713.                                     SDVO_CMD_SET_TARGET_OUTPUT,
  714.                                     &outputs, sizeof(outputs));
  715. }
  716.  
  717. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  718.                                   struct intel_sdvo_dtd *dtd)
  719. {
  720.         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  721.                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  722. }
  723.  
  724. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  725.                                          struct intel_sdvo_dtd *dtd)
  726. {
  727.         return intel_sdvo_set_timing(intel_sdvo,
  728.                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  729. }
  730.  
  731. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  732.                                          struct intel_sdvo_dtd *dtd)
  733. {
  734.         return intel_sdvo_set_timing(intel_sdvo,
  735.                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  736. }
  737.  
  738. static bool
  739. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  740.                                          uint16_t clock,
  741.                                          uint16_t width,
  742.                                          uint16_t height)
  743. {
  744.         struct intel_sdvo_preferred_input_timing_args args;
  745.  
  746.         memset(&args, 0, sizeof(args));
  747.         args.clock = clock;
  748.         args.width = width;
  749.         args.height = height;
  750.         args.interlace = 0;
  751.  
  752.         if (intel_sdvo->is_lvds &&
  753.            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  754.             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  755.                 args.scaled = 1;
  756.  
  757.         return intel_sdvo_set_value(intel_sdvo,
  758.                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  759.                                     &args, sizeof(args));
  760. }
  761.  
  762. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  763.                                                   struct intel_sdvo_dtd *dtd)
  764. {
  765.         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  766.         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  767.         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  768.                                     &dtd->part1, sizeof(dtd->part1)) &&
  769.                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  770.                                      &dtd->part2, sizeof(dtd->part2));
  771. }
  772.  
  773. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  774. {
  775.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  776. }
  777.  
  778. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  779.                                          const struct drm_display_mode *mode)
  780. {
  781.         uint16_t width, height;
  782.         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  783.         uint16_t h_sync_offset, v_sync_offset;
  784.         int mode_clock;
  785.  
  786.         width = mode->hdisplay;
  787.         height = mode->vdisplay;
  788.  
  789.         /* do some mode translations */
  790.         h_blank_len = mode->htotal - mode->hdisplay;
  791.         h_sync_len = mode->hsync_end - mode->hsync_start;
  792.  
  793.         v_blank_len = mode->vtotal - mode->vdisplay;
  794.         v_sync_len = mode->vsync_end - mode->vsync_start;
  795.  
  796.         h_sync_offset = mode->hsync_start - mode->hdisplay;
  797.         v_sync_offset = mode->vsync_start - mode->vdisplay;
  798.  
  799.         mode_clock = mode->clock;
  800.         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  801.         mode_clock /= 10;
  802.         dtd->part1.clock = mode_clock;
  803.  
  804.         dtd->part1.h_active = width & 0xff;
  805.         dtd->part1.h_blank = h_blank_len & 0xff;
  806.         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  807.                 ((h_blank_len >> 8) & 0xf);
  808.         dtd->part1.v_active = height & 0xff;
  809.         dtd->part1.v_blank = v_blank_len & 0xff;
  810.         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  811.                 ((v_blank_len >> 8) & 0xf);
  812.  
  813.         dtd->part2.h_sync_off = h_sync_offset & 0xff;
  814.         dtd->part2.h_sync_width = h_sync_len & 0xff;
  815.         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  816.                 (v_sync_len & 0xf);
  817.         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  818.                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  819.                 ((v_sync_len & 0x30) >> 4);
  820.  
  821.         dtd->part2.dtd_flags = 0x18;
  822.         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  823.                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  824.         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  825.                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  826.         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  827.                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  828.  
  829.         dtd->part2.sdvo_flags = 0;
  830.         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  831.         dtd->part2.reserved = 0;
  832. }
  833.  
  834. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  835.                                          const struct intel_sdvo_dtd *dtd)
  836. {
  837.         mode->hdisplay = dtd->part1.h_active;
  838.         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  839.         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  840.         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  841.         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  842.         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  843.         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  844.         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  845.  
  846.         mode->vdisplay = dtd->part1.v_active;
  847.         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  848.         mode->vsync_start = mode->vdisplay;
  849.         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  850.         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  851.         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  852.         mode->vsync_end = mode->vsync_start +
  853.                 (dtd->part2.v_sync_off_width & 0xf);
  854.         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  855.         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  856.         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  857.  
  858.         mode->clock = dtd->part1.clock * 10;
  859.  
  860.         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  861.         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  862.                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
  863.         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  864.                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
  865.         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  866.                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
  867. }
  868.  
  869. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  870. {
  871.         struct intel_sdvo_encode encode;
  872.  
  873.         BUILD_BUG_ON(sizeof(encode) != 2);
  874.         return intel_sdvo_get_value(intel_sdvo,
  875.                                   SDVO_CMD_GET_SUPP_ENCODE,
  876.                                   &encode, sizeof(encode));
  877. }
  878.  
  879. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  880.                                   uint8_t mode)
  881. {
  882.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  883. }
  884.  
  885. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  886.                                        uint8_t mode)
  887. {
  888.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  889. }
  890.  
  891. #if 0
  892. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  893. {
  894.         int i, j;
  895.         uint8_t set_buf_index[2];
  896.         uint8_t av_split;
  897.         uint8_t buf_size;
  898.         uint8_t buf[48];
  899.         uint8_t *pos;
  900.  
  901.         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  902.  
  903.         for (i = 0; i <= av_split; i++) {
  904.                 set_buf_index[0] = i; set_buf_index[1] = 0;
  905.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  906.                                      set_buf_index, 2);
  907.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  908.                 intel_sdvo_read_response(encoder, &buf_size, 1);
  909.  
  910.                 pos = buf;
  911.                 for (j = 0; j <= buf_size; j += 8) {
  912.                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  913.                                              NULL, 0);
  914.                         intel_sdvo_read_response(encoder, pos, 8);
  915.                         pos += 8;
  916.                 }
  917.         }
  918. }
  919. #endif
  920.  
  921. static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
  922.                                        unsigned if_index, uint8_t tx_rate,
  923.                                        uint8_t *data, unsigned length)
  924. {
  925.         uint8_t set_buf_index[2] = { if_index, 0 };
  926.         uint8_t hbuf_size, tmp[8];
  927.         int i;
  928.  
  929.         if (!intel_sdvo_set_value(intel_sdvo,
  930.                                   SDVO_CMD_SET_HBUF_INDEX,
  931.                                   set_buf_index, 2))
  932.                 return false;
  933.  
  934.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
  935.                                   &hbuf_size, 1))
  936.                 return false;
  937.  
  938.         /* Buffer size is 0 based, hooray! */
  939.         hbuf_size++;
  940.  
  941.         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
  942.                       if_index, length, hbuf_size);
  943.  
  944.         for (i = 0; i < hbuf_size; i += 8) {
  945.                 memset(tmp, 0, 8);
  946.                 if (i < length)
  947.                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
  948.  
  949.                 if (!intel_sdvo_set_value(intel_sdvo,
  950.                                           SDVO_CMD_SET_HBUF_DATA,
  951.                                           tmp, 8))
  952.                         return false;
  953.         }
  954.  
  955.         return intel_sdvo_set_value(intel_sdvo,
  956.                                     SDVO_CMD_SET_HBUF_TXRATE,
  957.                                     &tx_rate, 1);
  958. }
  959.  
  960. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
  961.                                          const struct drm_display_mode *adjusted_mode)
  962. {
  963.         struct dip_infoframe avi_if = {
  964.                 .type = DIP_TYPE_AVI,
  965.                 .ver = DIP_VERSION_AVI,
  966.                 .len = DIP_LEN_AVI,
  967.         };
  968.         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  969.  
  970.         if (intel_sdvo->rgb_quant_range_selectable) {
  971.                 if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
  972.                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
  973.                 else
  974.                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
  975.         }
  976.  
  977.         intel_dip_infoframe_csum(&avi_if);
  978.  
  979.         /* sdvo spec says that the ecc is handled by the hw, and it looks like
  980.          * we must not send the ecc field, either. */
  981.         memcpy(sdvo_data, &avi_if, 3);
  982.         sdvo_data[3] = avi_if.checksum;
  983.         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  984.  
  985.         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
  986.                                           SDVO_HBUF_TX_VSYNC,
  987.                                           sdvo_data, sizeof(sdvo_data));
  988. }
  989.  
  990. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  991. {
  992.         struct intel_sdvo_tv_format format;
  993.         uint32_t format_map;
  994.  
  995.         format_map = 1 << intel_sdvo->tv_format_index;
  996.         memset(&format, 0, sizeof(format));
  997.         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  998.  
  999.         BUILD_BUG_ON(sizeof(format) != 6);
  1000.         return intel_sdvo_set_value(intel_sdvo,
  1001.                                     SDVO_CMD_SET_TV_FORMAT,
  1002.                                     &format, sizeof(format));
  1003. }
  1004.  
  1005. static bool
  1006. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  1007.                                         const struct drm_display_mode *mode)
  1008. {
  1009.         struct intel_sdvo_dtd output_dtd;
  1010.  
  1011.         if (!intel_sdvo_set_target_output(intel_sdvo,
  1012.                                           intel_sdvo->attached_output))
  1013.                 return false;
  1014.  
  1015.         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  1016.         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  1017.                 return false;
  1018.  
  1019.         return true;
  1020. }
  1021.  
  1022. /* Asks the sdvo controller for the preferred input mode given the output mode.
  1023.  * Unfortunately we have to set up the full output mode to do that. */
  1024. static bool
  1025. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  1026.                                     const struct drm_display_mode *mode,
  1027.                                         struct drm_display_mode *adjusted_mode)
  1028. {
  1029.         struct intel_sdvo_dtd input_dtd;
  1030.  
  1031.         /* Reset the input timing to the screen. Assume always input 0. */
  1032.         if (!intel_sdvo_set_target_input(intel_sdvo))
  1033.                 return false;
  1034.  
  1035.         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  1036.                                                       mode->clock / 10,
  1037.                                                       mode->hdisplay,
  1038.                                                       mode->vdisplay))
  1039.                 return false;
  1040.  
  1041.         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  1042.                                                    &input_dtd))
  1043.                 return false;
  1044.  
  1045.         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  1046.         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
  1047.  
  1048.         return true;
  1049. }
  1050.  
  1051. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  1052.                                   const struct drm_display_mode *mode,
  1053.                                   struct drm_display_mode *adjusted_mode)
  1054. {
  1055.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1056.         int multiplier;
  1057.  
  1058.         /* We need to construct preferred input timings based on our
  1059.          * output timings.  To do that, we have to set the output
  1060.          * timings, even though this isn't really the right place in
  1061.          * the sequence to do it. Oh well.
  1062.          */
  1063.         if (intel_sdvo->is_tv) {
  1064.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  1065.                         return false;
  1066.  
  1067.                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  1068.                                                              mode,
  1069.                                                              adjusted_mode);
  1070.         } else if (intel_sdvo->is_lvds) {
  1071.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  1072.                                                              intel_sdvo->sdvo_lvds_fixed_mode))
  1073.                         return false;
  1074.  
  1075.                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  1076.                                                              mode,
  1077.                                                              adjusted_mode);
  1078.         }
  1079.  
  1080.         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
  1081.          * SDVO device will factor out the multiplier during mode_set.
  1082.          */
  1083.         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  1084.         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  1085.  
  1086.         if (intel_sdvo->color_range_auto) {
  1087.                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
  1088.                 if (intel_sdvo->has_hdmi_monitor &&
  1089.                     drm_match_cea_mode(adjusted_mode) > 1)
  1090.                         intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
  1091.                 else
  1092.                         intel_sdvo->color_range = 0;
  1093.         }
  1094.  
  1095.         if (intel_sdvo->color_range)
  1096.                 adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
  1097.  
  1098.         return true;
  1099. }
  1100.  
  1101. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  1102.                                 struct drm_display_mode *mode,
  1103.                                 struct drm_display_mode *adjusted_mode)
  1104. {
  1105.         struct drm_device *dev = encoder->dev;
  1106.         struct drm_i915_private *dev_priv = dev->dev_private;
  1107.         struct drm_crtc *crtc = encoder->crtc;
  1108.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  1109.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1110.         u32 sdvox;
  1111.         struct intel_sdvo_in_out_map in_out;
  1112.         struct intel_sdvo_dtd input_dtd, output_dtd;
  1113.         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  1114.         int rate;
  1115.  
  1116.         if (!mode)
  1117.                 return;
  1118.  
  1119.         /* First, set the input mapping for the first input to our controlled
  1120.          * output. This is only correct if we're a single-input device, in
  1121.          * which case the first input is the output from the appropriate SDVO
  1122.          * channel on the motherboard.  In a two-input device, the first input
  1123.          * will be SDVOB and the second SDVOC.
  1124.          */
  1125.         in_out.in0 = intel_sdvo->attached_output;
  1126.         in_out.in1 = 0;
  1127.  
  1128.         intel_sdvo_set_value(intel_sdvo,
  1129.                              SDVO_CMD_SET_IN_OUT_MAP,
  1130.                              &in_out, sizeof(in_out));
  1131.  
  1132.         /* Set the output timings to the screen */
  1133.         if (!intel_sdvo_set_target_output(intel_sdvo,
  1134.                                           intel_sdvo->attached_output))
  1135.                 return;
  1136.  
  1137.         /* lvds has a special fixed output timing. */
  1138.         if (intel_sdvo->is_lvds)
  1139.                 intel_sdvo_get_dtd_from_mode(&output_dtd,
  1140.                                              intel_sdvo->sdvo_lvds_fixed_mode);
  1141.         else
  1142.                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  1143.         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  1144.                 DRM_INFO("Setting output timings on %s failed\n",
  1145.                          SDVO_NAME(intel_sdvo));
  1146.  
  1147.         /* Set the input timing to the screen. Assume always input 0. */
  1148.         if (!intel_sdvo_set_target_input(intel_sdvo))
  1149.                 return;
  1150.  
  1151.         if (intel_sdvo->has_hdmi_monitor) {
  1152.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  1153.                 intel_sdvo_set_colorimetry(intel_sdvo,
  1154.                                            SDVO_COLORIMETRY_RGB256);
  1155.                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
  1156.         } else
  1157.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  1158.  
  1159.         if (intel_sdvo->is_tv &&
  1160.             !intel_sdvo_set_tv_format(intel_sdvo))
  1161.                 return;
  1162.  
  1163.         /* We have tried to get input timing in mode_fixup, and filled into
  1164.          * adjusted_mode.
  1165.          */
  1166.         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  1167.         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
  1168.                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
  1169.         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  1170.                 DRM_INFO("Setting input timings on %s failed\n",
  1171.                          SDVO_NAME(intel_sdvo));
  1172.  
  1173.         switch (pixel_multiplier) {
  1174.         default:
  1175.         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  1176.         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  1177.         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  1178.         }
  1179.         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  1180.                 return;
  1181.  
  1182.         /* Set the SDVO control regs. */
  1183.         if (INTEL_INFO(dev)->gen >= 4) {
  1184.                 /* The real mode polarity is set by the SDVO commands, using
  1185.                  * struct intel_sdvo_dtd. */
  1186.                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  1187.                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
  1188.                         sdvox |= intel_sdvo->color_range;
  1189.                 if (INTEL_INFO(dev)->gen < 5)
  1190.                         sdvox |= SDVO_BORDER_ENABLE;
  1191.         } else {
  1192.                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
  1193.                 switch (intel_sdvo->sdvo_reg) {
  1194.                 case SDVOB:
  1195.                         sdvox &= SDVOB_PRESERVE_MASK;
  1196.                         break;
  1197.                 case SDVOC:
  1198.                         sdvox &= SDVOC_PRESERVE_MASK;
  1199.                         break;
  1200.                 }
  1201.                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  1202.         }
  1203.  
  1204.         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  1205.                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  1206.         else
  1207.                 sdvox |= TRANSCODER(intel_crtc->pipe);
  1208.  
  1209.         if (intel_sdvo->has_hdmi_audio)
  1210.                 sdvox |= SDVO_AUDIO_ENABLE;
  1211.  
  1212.         if (INTEL_INFO(dev)->gen >= 4) {
  1213.                 /* done in crtc_mode_set as the dpll_md reg must be written early */
  1214.         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  1215.                 /* done in crtc_mode_set as it lives inside the dpll register */
  1216.         } else {
  1217.                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  1218.         }
  1219.  
  1220.         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  1221.             INTEL_INFO(dev)->gen < 5)
  1222.                 sdvox |= SDVO_STALL_SELECT;
  1223.         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1224. }
  1225.  
  1226. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  1227. {
  1228.         struct intel_sdvo_connector *intel_sdvo_connector =
  1229.                 to_intel_sdvo_connector(&connector->base);
  1230.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1231.         u16 active_outputs;
  1232.  
  1233.         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1234.  
  1235.         if (active_outputs & intel_sdvo_connector->output_flag)
  1236.                 return true;
  1237.         else
  1238.                 return false;
  1239. }
  1240.  
  1241. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1242.                                     enum pipe *pipe)
  1243. {
  1244.         struct drm_device *dev = encoder->base.dev;
  1245.         struct drm_i915_private *dev_priv = dev->dev_private;
  1246.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1247.         u32 tmp;
  1248.  
  1249.         tmp = I915_READ(intel_sdvo->sdvo_reg);
  1250.  
  1251.         if (!(tmp & SDVO_ENABLE))
  1252.                 return false;
  1253.  
  1254.         if (HAS_PCH_CPT(dev))
  1255.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  1256.         else
  1257.                 *pipe = PORT_TO_PIPE(tmp);
  1258.  
  1259.         return true;
  1260. }
  1261.  
  1262. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1263. {
  1264.         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1265.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1266.         u32 temp;
  1267.  
  1268.                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1269.                 if (0)
  1270.                 intel_sdvo_set_encoder_power_state(intel_sdvo,
  1271.                                                    DRM_MODE_DPMS_OFF);
  1272.  
  1273.                         temp = I915_READ(intel_sdvo->sdvo_reg);
  1274.                         if ((temp & SDVO_ENABLE) != 0) {
  1275.                 /* HW workaround for IBX, we need to move the port to
  1276.                  * transcoder A before disabling it. */
  1277.                 if (HAS_PCH_IBX(encoder->base.dev)) {
  1278.                         struct drm_crtc *crtc = encoder->base.crtc;
  1279.                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1280.  
  1281.                         if (temp & SDVO_PIPE_B_SELECT) {
  1282.                                 temp &= ~SDVO_PIPE_B_SELECT;
  1283.                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1284.                                 POSTING_READ(intel_sdvo->sdvo_reg);
  1285.  
  1286.                                 /* Again we need to write this twice. */
  1287.                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1288.                                 POSTING_READ(intel_sdvo->sdvo_reg);
  1289.  
  1290.                                 /* Transcoder selection bits only update
  1291.                                  * effectively on vblank. */
  1292.                                 if (crtc)
  1293.                                         intel_wait_for_vblank(encoder->base.dev, pipe);
  1294.                                 else
  1295.                                         msleep(50);
  1296.                         }
  1297.                 }
  1298.  
  1299.                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1300.                         }
  1301. }
  1302.  
  1303. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1304. {
  1305.         struct drm_device *dev = encoder->base.dev;
  1306.         struct drm_i915_private *dev_priv = dev->dev_private;
  1307.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1308.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1309.         u32 temp;
  1310.                 bool input1, input2;
  1311.                 int i;
  1312.                 u8 status;
  1313.  
  1314.                 temp = I915_READ(intel_sdvo->sdvo_reg);
  1315.         if ((temp & SDVO_ENABLE) == 0) {
  1316.                 /* HW workaround for IBX, we need to move the port
  1317.                  * to transcoder A before disabling it. */
  1318.                 if (HAS_PCH_IBX(dev)) {
  1319.                         struct drm_crtc *crtc = encoder->base.crtc;
  1320.                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1321.  
  1322.                         /* Restore the transcoder select bit. */
  1323.                         if (pipe == PIPE_B)
  1324.                                 temp |= SDVO_PIPE_B_SELECT;
  1325.                 }
  1326.  
  1327.                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1328.         }
  1329.                 for (i = 0; i < 2; i++)
  1330.                         intel_wait_for_vblank(dev, intel_crtc->pipe);
  1331.  
  1332.                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1333.                 /* Warn if the device reported failure to sync.
  1334.                  * A lot of SDVO devices fail to notify of sync, but it's
  1335.                  * a given it the status is a success, we succeeded.
  1336.                  */
  1337.                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1338.                         DRM_DEBUG_KMS("First %s output reported failure to "
  1339.                                         "sync\n", SDVO_NAME(intel_sdvo));
  1340.                 }
  1341.  
  1342.                 if (0)
  1343.                 intel_sdvo_set_encoder_power_state(intel_sdvo,
  1344.                                                    DRM_MODE_DPMS_ON);
  1345.         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1346. }
  1347.  
  1348. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1349. {
  1350.         struct drm_crtc *crtc;
  1351.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1352.  
  1353.         /* dvo supports only 2 dpms states. */
  1354.         if (mode != DRM_MODE_DPMS_ON)
  1355.                 mode = DRM_MODE_DPMS_OFF;
  1356.  
  1357.         if (mode == connector->dpms)
  1358.                 return;
  1359.  
  1360.         connector->dpms = mode;
  1361.  
  1362.         /* Only need to change hw state when actually enabled */
  1363.         crtc = intel_sdvo->base.base.crtc;
  1364.         if (!crtc) {
  1365.                 intel_sdvo->base.connectors_active = false;
  1366.                 return;
  1367.         }
  1368.  
  1369.         if (mode != DRM_MODE_DPMS_ON) {
  1370.                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1371.                 if (0)
  1372.                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1373.  
  1374.                 intel_sdvo->base.connectors_active = false;
  1375.  
  1376.                 intel_crtc_update_dpms(crtc);
  1377.         } else {
  1378.                 intel_sdvo->base.connectors_active = true;
  1379.  
  1380.                 intel_crtc_update_dpms(crtc);
  1381.  
  1382.                 if (0)
  1383.                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1384.                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1385.         }
  1386.  
  1387.         intel_modeset_check_state(connector->dev);
  1388. }
  1389.  
  1390. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1391.                                  struct drm_display_mode *mode)
  1392. {
  1393.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1394.  
  1395.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1396.                 return MODE_NO_DBLESCAN;
  1397.  
  1398.         if (intel_sdvo->pixel_clock_min > mode->clock)
  1399.                 return MODE_CLOCK_LOW;
  1400.  
  1401.         if (intel_sdvo->pixel_clock_max < mode->clock)
  1402.                 return MODE_CLOCK_HIGH;
  1403.  
  1404.         if (intel_sdvo->is_lvds) {
  1405.                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1406.                         return MODE_PANEL;
  1407.  
  1408.                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1409.                         return MODE_PANEL;
  1410.         }
  1411.  
  1412.         return MODE_OK;
  1413. }
  1414.  
  1415. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1416. {
  1417.         BUILD_BUG_ON(sizeof(*caps) != 8);
  1418.         if (!intel_sdvo_get_value(intel_sdvo,
  1419.                                   SDVO_CMD_GET_DEVICE_CAPS,
  1420.                                   caps, sizeof(*caps)))
  1421.                 return false;
  1422.  
  1423.         DRM_DEBUG_KMS("SDVO capabilities:\n"
  1424.                       "  vendor_id: %d\n"
  1425.                       "  device_id: %d\n"
  1426.                       "  device_rev_id: %d\n"
  1427.                       "  sdvo_version_major: %d\n"
  1428.                       "  sdvo_version_minor: %d\n"
  1429.                       "  sdvo_inputs_mask: %d\n"
  1430.                       "  smooth_scaling: %d\n"
  1431.                       "  sharp_scaling: %d\n"
  1432.                       "  up_scaling: %d\n"
  1433.                       "  down_scaling: %d\n"
  1434.                       "  stall_support: %d\n"
  1435.                       "  output_flags: %d\n",
  1436.                       caps->vendor_id,
  1437.                       caps->device_id,
  1438.                       caps->device_rev_id,
  1439.                       caps->sdvo_version_major,
  1440.                       caps->sdvo_version_minor,
  1441.                       caps->sdvo_inputs_mask,
  1442.                       caps->smooth_scaling,
  1443.                       caps->sharp_scaling,
  1444.                       caps->up_scaling,
  1445.                       caps->down_scaling,
  1446.                       caps->stall_support,
  1447.                       caps->output_flags);
  1448.  
  1449.         return true;
  1450. }
  1451.  
  1452. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1453. {
  1454.         struct drm_device *dev = intel_sdvo->base.base.dev;
  1455.         uint16_t hotplug;
  1456.  
  1457.         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1458.          * on the line. */
  1459.         if (IS_I945G(dev) || IS_I945GM(dev))
  1460.                 return 0;
  1461.  
  1462.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1463.                                         &hotplug, sizeof(hotplug)))
  1464.                 return 0;
  1465.  
  1466.         return hotplug;
  1467. }
  1468.  
  1469. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1470. {
  1471.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1472.  
  1473.         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1474.                         &intel_sdvo->hotplug_active, 2);
  1475. }
  1476.  
  1477. static bool
  1478. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1479. {
  1480.         /* Is there more than one type of output? */
  1481.         return hweight16(intel_sdvo->caps.output_flags) > 1;
  1482. }
  1483.  
  1484. static struct edid *
  1485. intel_sdvo_get_edid(struct drm_connector *connector)
  1486. {
  1487.         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1488.         return drm_get_edid(connector, &sdvo->ddc);
  1489. }
  1490.  
  1491. /* Mac mini hack -- use the same DDC as the analog connector */
  1492. static struct edid *
  1493. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1494. {
  1495.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1496.  
  1497.         return drm_get_edid(connector,
  1498.                             intel_gmbus_get_adapter(dev_priv,
  1499.                                                     dev_priv->crt_ddc_pin));
  1500. }
  1501.  
  1502. static enum drm_connector_status
  1503. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1504. {
  1505.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1506.         enum drm_connector_status status;
  1507.         struct edid *edid;
  1508.  
  1509.         edid = intel_sdvo_get_edid(connector);
  1510.  
  1511.         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1512.                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1513.  
  1514.                 /*
  1515.                  * Don't use the 1 as the argument of DDC bus switch to get
  1516.                  * the EDID. It is used for SDVO SPD ROM.
  1517.                  */
  1518.                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1519.                         intel_sdvo->ddc_bus = ddc;
  1520.                         edid = intel_sdvo_get_edid(connector);
  1521.                         if (edid)
  1522.                                 break;
  1523.                 }
  1524.                 /*
  1525.                  * If we found the EDID on the other bus,
  1526.                  * assume that is the correct DDC bus.
  1527.                  */
  1528.                 if (edid == NULL)
  1529.                         intel_sdvo->ddc_bus = saved_ddc;
  1530.         }
  1531.  
  1532.         /*
  1533.          * When there is no edid and no monitor is connected with VGA
  1534.          * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1535.          */
  1536.         if (edid == NULL)
  1537.                 edid = intel_sdvo_get_analog_edid(connector);
  1538.  
  1539.         status = connector_status_unknown;
  1540.         if (edid != NULL) {
  1541.                 /* DDC bus is shared, match EDID to connector type */
  1542.                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1543.                         status = connector_status_connected;
  1544.                         if (intel_sdvo->is_hdmi) {
  1545.                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1546.                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1547.                                 intel_sdvo->rgb_quant_range_selectable =
  1548.                                         drm_rgb_quant_range_selectable(edid);
  1549.                         }
  1550.                 } else
  1551.                         status = connector_status_disconnected;
  1552.                 kfree(edid);
  1553.         }
  1554.  
  1555.         if (status == connector_status_connected) {
  1556.                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1557.                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1558.                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1559.         }
  1560.  
  1561.         return status;
  1562. }
  1563.  
  1564. static bool
  1565. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1566.                                   struct edid *edid)
  1567. {
  1568.         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1569.         bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1570.  
  1571.         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1572.                       connector_is_digital, monitor_is_digital);
  1573.         return connector_is_digital == monitor_is_digital;
  1574. }
  1575.  
  1576. static enum drm_connector_status
  1577. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1578. {
  1579.         uint16_t response;
  1580.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1581.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1582.         enum drm_connector_status ret;
  1583.  
  1584.         if (!intel_sdvo_get_value(intel_sdvo,
  1585.                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
  1586.                                   &response, 2))
  1587.                 return connector_status_unknown;
  1588.  
  1589.         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1590.                       response & 0xff, response >> 8,
  1591.                       intel_sdvo_connector->output_flag);
  1592.  
  1593.         if (response == 0)
  1594.                 return connector_status_disconnected;
  1595.  
  1596.         intel_sdvo->attached_output = response;
  1597.  
  1598.         intel_sdvo->has_hdmi_monitor = false;
  1599.         intel_sdvo->has_hdmi_audio = false;
  1600.         intel_sdvo->rgb_quant_range_selectable = false;
  1601.  
  1602.         if ((intel_sdvo_connector->output_flag & response) == 0)
  1603.                 ret = connector_status_disconnected;
  1604.         else if (IS_TMDS(intel_sdvo_connector))
  1605.                 ret = intel_sdvo_tmds_sink_detect(connector);
  1606.         else {
  1607.                 struct edid *edid;
  1608.  
  1609.                 /* if we have an edid check it matches the connection */
  1610.                 edid = intel_sdvo_get_edid(connector);
  1611.                 if (edid == NULL)
  1612.                         edid = intel_sdvo_get_analog_edid(connector);
  1613.                 if (edid != NULL) {
  1614.                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1615.                                                               edid))
  1616.                                 ret = connector_status_connected;
  1617.                         else
  1618.                                 ret = connector_status_disconnected;
  1619.  
  1620.                         kfree(edid);
  1621.                 } else
  1622.                         ret = connector_status_connected;
  1623.         }
  1624.  
  1625.         /* May update encoder flag for like clock for SDVO TV, etc.*/
  1626.         if (ret == connector_status_connected) {
  1627.                 intel_sdvo->is_tv = false;
  1628.                 intel_sdvo->is_lvds = false;
  1629.                 intel_sdvo->base.needs_tv_clock = false;
  1630.  
  1631.                 if (response & SDVO_TV_MASK) {
  1632.                         intel_sdvo->is_tv = true;
  1633.                         intel_sdvo->base.needs_tv_clock = true;
  1634.                 }
  1635.                 if (response & SDVO_LVDS_MASK)
  1636.                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1637.         }
  1638.  
  1639.         return ret;
  1640. }
  1641.  
  1642. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1643. {
  1644.         struct edid *edid;
  1645.  
  1646.         /* set the bus switch and get the modes */
  1647.         edid = intel_sdvo_get_edid(connector);
  1648.  
  1649.         /*
  1650.          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
  1651.          * link between analog and digital outputs. So, if the regular SDVO
  1652.          * DDC fails, check to see if the analog output is disconnected, in
  1653.          * which case we'll look there for the digital DDC data.
  1654.          */
  1655.         if (edid == NULL)
  1656.                 edid = intel_sdvo_get_analog_edid(connector);
  1657.  
  1658.         if (edid != NULL) {
  1659.                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1660.                                                       edid)) {
  1661.                         drm_mode_connector_update_edid_property(connector, edid);
  1662.                         drm_add_edid_modes(connector, edid);
  1663.                 }
  1664.  
  1665.                 kfree(edid);
  1666.         }
  1667. }
  1668.  
  1669. /*
  1670.  * Set of SDVO TV modes.
  1671.  * Note!  This is in reply order (see loop in get_tv_modes).
  1672.  * XXX: all 60Hz refresh?
  1673.  */
  1674. static const struct drm_display_mode sdvo_tv_modes[] = {
  1675.         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1676.                    416, 0, 200, 201, 232, 233, 0,
  1677.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1678.         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1679.                    416, 0, 240, 241, 272, 273, 0,
  1680.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1681.         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1682.                    496, 0, 300, 301, 332, 333, 0,
  1683.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1684.         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1685.                    736, 0, 350, 351, 382, 383, 0,
  1686.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1687.         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1688.                    736, 0, 400, 401, 432, 433, 0,
  1689.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1690.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1691.                    736, 0, 480, 481, 512, 513, 0,
  1692.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1693.         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1694.                    800, 0, 480, 481, 512, 513, 0,
  1695.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1696.         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1697.                    800, 0, 576, 577, 608, 609, 0,
  1698.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1699.         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1700.                    816, 0, 350, 351, 382, 383, 0,
  1701.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1702.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1703.                    816, 0, 400, 401, 432, 433, 0,
  1704.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1705.         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1706.                    816, 0, 480, 481, 512, 513, 0,
  1707.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1708.         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1709.                    816, 0, 540, 541, 572, 573, 0,
  1710.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1711.         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1712.                    816, 0, 576, 577, 608, 609, 0,
  1713.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1714.         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1715.                    864, 0, 576, 577, 608, 609, 0,
  1716.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1717.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1718.                    896, 0, 600, 601, 632, 633, 0,
  1719.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1720.         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1721.                    928, 0, 624, 625, 656, 657, 0,
  1722.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1723.         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1724.                    1016, 0, 766, 767, 798, 799, 0,
  1725.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1726.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1727.                    1120, 0, 768, 769, 800, 801, 0,
  1728.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1729.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1730.                    1376, 0, 1024, 1025, 1056, 1057, 0,
  1731.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1732. };
  1733.  
  1734. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1735. {
  1736.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1737.         struct intel_sdvo_sdtv_resolution_request tv_res;
  1738.         uint32_t reply = 0, format_map = 0;
  1739.         int i;
  1740.  
  1741.         /* Read the list of supported input resolutions for the selected TV
  1742.          * format.
  1743.          */
  1744.         format_map = 1 << intel_sdvo->tv_format_index;
  1745.         memcpy(&tv_res, &format_map,
  1746.                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1747.  
  1748.         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1749.                 return;
  1750.  
  1751.         BUILD_BUG_ON(sizeof(tv_res) != 3);
  1752.         if (!intel_sdvo_write_cmd(intel_sdvo,
  1753.                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1754.                                   &tv_res, sizeof(tv_res)))
  1755.                 return;
  1756.         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1757.                 return;
  1758.  
  1759.         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1760.                 if (reply & (1 << i)) {
  1761.                         struct drm_display_mode *nmode;
  1762.                         nmode = drm_mode_duplicate(connector->dev,
  1763.                                                    &sdvo_tv_modes[i]);
  1764.                         if (nmode)
  1765.                                 drm_mode_probed_add(connector, nmode);
  1766.                 }
  1767. }
  1768.  
  1769. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1770. {
  1771.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1772.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1773.         struct drm_display_mode *newmode;
  1774.  
  1775.         /*
  1776.          * Attempt to get the mode list from DDC.
  1777.          * Assume that the preferred modes are
  1778.          * arranged in priority order.
  1779.          */
  1780.         intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1781.         if (list_empty(&connector->probed_modes) == false)
  1782.                 goto end;
  1783.  
  1784.         /* Fetch modes from VBT */
  1785.         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1786.                 newmode = drm_mode_duplicate(connector->dev,
  1787.                                              dev_priv->sdvo_lvds_vbt_mode);
  1788.                 if (newmode != NULL) {
  1789.                         /* Guarantee the mode is preferred */
  1790.                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1791.                                          DRM_MODE_TYPE_DRIVER);
  1792.                         drm_mode_probed_add(connector, newmode);
  1793.                 }
  1794.         }
  1795.  
  1796. end:
  1797.         list_for_each_entry(newmode, &connector->probed_modes, head) {
  1798.                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1799.                         intel_sdvo->sdvo_lvds_fixed_mode =
  1800.                                 drm_mode_duplicate(connector->dev, newmode);
  1801.  
  1802.                         intel_sdvo->is_lvds = true;
  1803.                         break;
  1804.                 }
  1805.         }
  1806.  
  1807. }
  1808.  
  1809. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1810. {
  1811.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1812.  
  1813.         if (IS_TV(intel_sdvo_connector))
  1814.                 intel_sdvo_get_tv_modes(connector);
  1815.         else if (IS_LVDS(intel_sdvo_connector))
  1816.                 intel_sdvo_get_lvds_modes(connector);
  1817.         else
  1818.                 intel_sdvo_get_ddc_modes(connector);
  1819.  
  1820.         return !list_empty(&connector->probed_modes);
  1821. }
  1822.  
  1823. static void
  1824. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1825. {
  1826.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1827.         struct drm_device *dev = connector->dev;
  1828.  
  1829.         if (intel_sdvo_connector->left)
  1830.                 drm_property_destroy(dev, intel_sdvo_connector->left);
  1831.         if (intel_sdvo_connector->right)
  1832.                 drm_property_destroy(dev, intel_sdvo_connector->right);
  1833.         if (intel_sdvo_connector->top)
  1834.                 drm_property_destroy(dev, intel_sdvo_connector->top);
  1835.         if (intel_sdvo_connector->bottom)
  1836.                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1837.         if (intel_sdvo_connector->hpos)
  1838.                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1839.         if (intel_sdvo_connector->vpos)
  1840.                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1841.         if (intel_sdvo_connector->saturation)
  1842.                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1843.         if (intel_sdvo_connector->contrast)
  1844.                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1845.         if (intel_sdvo_connector->hue)
  1846.                 drm_property_destroy(dev, intel_sdvo_connector->hue);
  1847.         if (intel_sdvo_connector->sharpness)
  1848.                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1849.         if (intel_sdvo_connector->flicker_filter)
  1850.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1851.         if (intel_sdvo_connector->flicker_filter_2d)
  1852.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1853.         if (intel_sdvo_connector->flicker_filter_adaptive)
  1854.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1855.         if (intel_sdvo_connector->tv_luma_filter)
  1856.                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1857.         if (intel_sdvo_connector->tv_chroma_filter)
  1858.                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1859.         if (intel_sdvo_connector->dot_crawl)
  1860.                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1861.         if (intel_sdvo_connector->brightness)
  1862.                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1863. }
  1864.  
  1865. static void intel_sdvo_destroy(struct drm_connector *connector)
  1866. {
  1867.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1868.  
  1869.         if (intel_sdvo_connector->tv_format)
  1870.                 drm_property_destroy(connector->dev,
  1871.                                      intel_sdvo_connector->tv_format);
  1872.  
  1873.         intel_sdvo_destroy_enhance_property(connector);
  1874.         drm_sysfs_connector_remove(connector);
  1875.         drm_connector_cleanup(connector);
  1876.         kfree(intel_sdvo_connector);
  1877. }
  1878.  
  1879. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1880. {
  1881.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1882.         struct edid *edid;
  1883.         bool has_audio = false;
  1884.  
  1885.         if (!intel_sdvo->is_hdmi)
  1886.                 return false;
  1887.  
  1888.         edid = intel_sdvo_get_edid(connector);
  1889.         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1890.                 has_audio = drm_detect_monitor_audio(edid);
  1891.         kfree(edid);
  1892.  
  1893.         return has_audio;
  1894. }
  1895.  
  1896. static int
  1897. intel_sdvo_set_property(struct drm_connector *connector,
  1898.                         struct drm_property *property,
  1899.                         uint64_t val)
  1900. {
  1901.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1902.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1903.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1904.         uint16_t temp_value;
  1905.         uint8_t cmd;
  1906.         int ret;
  1907.  
  1908.         ret = drm_object_property_set_value(&connector->base, property, val);
  1909.         if (ret)
  1910.                 return ret;
  1911.  
  1912.         if (property == dev_priv->force_audio_property) {
  1913.                 int i = val;
  1914.                 bool has_audio;
  1915.  
  1916.                 if (i == intel_sdvo_connector->force_audio)
  1917.                         return 0;
  1918.  
  1919.                 intel_sdvo_connector->force_audio = i;
  1920.  
  1921.                 if (i == HDMI_AUDIO_AUTO)
  1922.                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1923.                 else
  1924.                         has_audio = (i == HDMI_AUDIO_ON);
  1925.  
  1926.                 if (has_audio == intel_sdvo->has_hdmi_audio)
  1927.                         return 0;
  1928.  
  1929.                 intel_sdvo->has_hdmi_audio = has_audio;
  1930.                 goto done;
  1931.         }
  1932.  
  1933.         if (property == dev_priv->broadcast_rgb_property) {
  1934.                 switch (val) {
  1935.                 case INTEL_BROADCAST_RGB_AUTO:
  1936.                         intel_sdvo->color_range_auto = true;
  1937.                         break;
  1938.                 case INTEL_BROADCAST_RGB_FULL:
  1939.                         intel_sdvo->color_range_auto = false;
  1940.                         intel_sdvo->color_range = 0;
  1941.                         break;
  1942.                 case INTEL_BROADCAST_RGB_LIMITED:
  1943.                         intel_sdvo->color_range_auto = false;
  1944.                         intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
  1945.                         break;
  1946.                 default:
  1947.                         return -EINVAL;
  1948.                 }
  1949.                 goto done;
  1950.         }
  1951.  
  1952. #define CHECK_PROPERTY(name, NAME) \
  1953.         if (intel_sdvo_connector->name == property) { \
  1954.                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1955.                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1956.                 cmd = SDVO_CMD_SET_##NAME; \
  1957.                 intel_sdvo_connector->cur_##name = temp_value; \
  1958.                 goto set_value; \
  1959.         }
  1960.  
  1961.         if (property == intel_sdvo_connector->tv_format) {
  1962.                 if (val >= TV_FORMAT_NUM)
  1963.                         return -EINVAL;
  1964.  
  1965.                 if (intel_sdvo->tv_format_index ==
  1966.                     intel_sdvo_connector->tv_format_supported[val])
  1967.                         return 0;
  1968.  
  1969.                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1970.                 goto done;
  1971.         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1972.                 temp_value = val;
  1973.                 if (intel_sdvo_connector->left == property) {
  1974.                         drm_object_property_set_value(&connector->base,
  1975.                                                          intel_sdvo_connector->right, val);
  1976.                         if (intel_sdvo_connector->left_margin == temp_value)
  1977.                                 return 0;
  1978.  
  1979.                         intel_sdvo_connector->left_margin = temp_value;
  1980.                         intel_sdvo_connector->right_margin = temp_value;
  1981.                         temp_value = intel_sdvo_connector->max_hscan -
  1982.                                 intel_sdvo_connector->left_margin;
  1983.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  1984.                         goto set_value;
  1985.                 } else if (intel_sdvo_connector->right == property) {
  1986.                         drm_object_property_set_value(&connector->base,
  1987.                                                          intel_sdvo_connector->left, val);
  1988.                         if (intel_sdvo_connector->right_margin == temp_value)
  1989.                                 return 0;
  1990.  
  1991.                         intel_sdvo_connector->left_margin = temp_value;
  1992.                         intel_sdvo_connector->right_margin = temp_value;
  1993.                         temp_value = intel_sdvo_connector->max_hscan -
  1994.                                 intel_sdvo_connector->left_margin;
  1995.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  1996.                         goto set_value;
  1997.                 } else if (intel_sdvo_connector->top == property) {
  1998.                         drm_object_property_set_value(&connector->base,
  1999.                                                          intel_sdvo_connector->bottom, val);
  2000.                         if (intel_sdvo_connector->top_margin == temp_value)
  2001.                                 return 0;
  2002.  
  2003.                         intel_sdvo_connector->top_margin = temp_value;
  2004.                         intel_sdvo_connector->bottom_margin = temp_value;
  2005.                         temp_value = intel_sdvo_connector->max_vscan -
  2006.                                 intel_sdvo_connector->top_margin;
  2007.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  2008.                         goto set_value;
  2009.                 } else if (intel_sdvo_connector->bottom == property) {
  2010.                         drm_object_property_set_value(&connector->base,
  2011.                                                          intel_sdvo_connector->top, val);
  2012.                         if (intel_sdvo_connector->bottom_margin == temp_value)
  2013.                                 return 0;
  2014.  
  2015.                         intel_sdvo_connector->top_margin = temp_value;
  2016.                         intel_sdvo_connector->bottom_margin = temp_value;
  2017.                         temp_value = intel_sdvo_connector->max_vscan -
  2018.                                 intel_sdvo_connector->top_margin;
  2019.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  2020.                         goto set_value;
  2021.                 }
  2022.                 CHECK_PROPERTY(hpos, HPOS)
  2023.                 CHECK_PROPERTY(vpos, VPOS)
  2024.                 CHECK_PROPERTY(saturation, SATURATION)
  2025.                 CHECK_PROPERTY(contrast, CONTRAST)
  2026.                 CHECK_PROPERTY(hue, HUE)
  2027.                 CHECK_PROPERTY(brightness, BRIGHTNESS)
  2028.                 CHECK_PROPERTY(sharpness, SHARPNESS)
  2029.                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  2030.                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  2031.                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  2032.                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  2033.                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  2034.                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  2035.         }
  2036.  
  2037.         return -EINVAL; /* unknown property */
  2038.  
  2039. set_value:
  2040.         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  2041.                 return -EIO;
  2042.  
  2043.  
  2044. done:
  2045.         if (intel_sdvo->base.base.crtc)
  2046.                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
  2047.  
  2048.         return 0;
  2049. #undef CHECK_PROPERTY
  2050. }
  2051.  
  2052. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  2053.         .mode_fixup = intel_sdvo_mode_fixup,
  2054.         .mode_set = intel_sdvo_mode_set,
  2055. };
  2056.  
  2057. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  2058.         .dpms = intel_sdvo_dpms,
  2059.         .detect = intel_sdvo_detect,
  2060.         .fill_modes = drm_helper_probe_single_connector_modes,
  2061.         .set_property = intel_sdvo_set_property,
  2062.         .destroy = intel_sdvo_destroy,
  2063. };
  2064.  
  2065. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  2066.         .get_modes = intel_sdvo_get_modes,
  2067.         .mode_valid = intel_sdvo_mode_valid,
  2068.         .best_encoder = intel_best_encoder,
  2069. };
  2070.  
  2071. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  2072. {
  2073.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  2074.  
  2075.         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  2076.                 drm_mode_destroy(encoder->dev,
  2077.                                  intel_sdvo->sdvo_lvds_fixed_mode);
  2078.  
  2079.         i2c_del_adapter(&intel_sdvo->ddc);
  2080.         intel_encoder_destroy(encoder);
  2081. }
  2082.  
  2083. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  2084.         .destroy = intel_sdvo_enc_destroy,
  2085. };
  2086.  
  2087. static void
  2088. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  2089. {
  2090.         uint16_t mask = 0;
  2091.         unsigned int num_bits;
  2092.  
  2093.         /* Make a mask of outputs less than or equal to our own priority in the
  2094.          * list.
  2095.          */
  2096.         switch (sdvo->controlled_output) {
  2097.         case SDVO_OUTPUT_LVDS1:
  2098.                 mask |= SDVO_OUTPUT_LVDS1;
  2099.         case SDVO_OUTPUT_LVDS0:
  2100.                 mask |= SDVO_OUTPUT_LVDS0;
  2101.         case SDVO_OUTPUT_TMDS1:
  2102.                 mask |= SDVO_OUTPUT_TMDS1;
  2103.         case SDVO_OUTPUT_TMDS0:
  2104.                 mask |= SDVO_OUTPUT_TMDS0;
  2105.         case SDVO_OUTPUT_RGB1:
  2106.                 mask |= SDVO_OUTPUT_RGB1;
  2107.         case SDVO_OUTPUT_RGB0:
  2108.                 mask |= SDVO_OUTPUT_RGB0;
  2109.                 break;
  2110.         }
  2111.  
  2112.         /* Count bits to find what number we are in the priority list. */
  2113.         mask &= sdvo->caps.output_flags;
  2114.         num_bits = hweight16(mask);
  2115.         /* If more than 3 outputs, default to DDC bus 3 for now. */
  2116.         if (num_bits > 3)
  2117.                 num_bits = 3;
  2118.  
  2119.         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  2120.         sdvo->ddc_bus = 1 << num_bits;
  2121. }
  2122.  
  2123. /**
  2124.  * Choose the appropriate DDC bus for control bus switch command for this
  2125.  * SDVO output based on the controlled output.
  2126.  *
  2127.  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  2128.  * outputs, then LVDS outputs.
  2129.  */
  2130. static void
  2131. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  2132.                           struct intel_sdvo *sdvo, u32 reg)
  2133. {
  2134.         struct sdvo_device_mapping *mapping;
  2135.  
  2136.         if (sdvo->is_sdvob)
  2137.                 mapping = &(dev_priv->sdvo_mappings[0]);
  2138.         else
  2139.                 mapping = &(dev_priv->sdvo_mappings[1]);
  2140.  
  2141.         if (mapping->initialized)
  2142.                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  2143.         else
  2144.                 intel_sdvo_guess_ddc_bus(sdvo);
  2145. }
  2146.  
  2147. static void
  2148. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  2149.                           struct intel_sdvo *sdvo, u32 reg)
  2150. {
  2151.         struct sdvo_device_mapping *mapping;
  2152.         u8 pin;
  2153.  
  2154.         if (sdvo->is_sdvob)
  2155.                 mapping = &dev_priv->sdvo_mappings[0];
  2156.         else
  2157.                 mapping = &dev_priv->sdvo_mappings[1];
  2158.  
  2159.         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
  2160.                 pin = mapping->i2c_pin;
  2161.         else
  2162.         pin = GMBUS_PORT_DPB;
  2163.  
  2164.                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  2165.  
  2166.         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
  2167.          * our code totally fails once we start using gmbus. Hence fall back to
  2168.          * bit banging for now. */
  2169.                 intel_gmbus_force_bit(sdvo->i2c, true);
  2170. }
  2171.  
  2172. /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
  2173. static void
  2174. intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
  2175. {
  2176.         intel_gmbus_force_bit(sdvo->i2c, false);
  2177. }
  2178.  
  2179. static bool
  2180. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  2181. {
  2182.         return intel_sdvo_check_supp_encode(intel_sdvo);
  2183. }
  2184.  
  2185. static u8
  2186. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  2187. {
  2188.         struct drm_i915_private *dev_priv = dev->dev_private;
  2189.         struct sdvo_device_mapping *my_mapping, *other_mapping;
  2190.  
  2191.         if (sdvo->is_sdvob) {
  2192.                 my_mapping = &dev_priv->sdvo_mappings[0];
  2193.                 other_mapping = &dev_priv->sdvo_mappings[1];
  2194.         } else {
  2195.                 my_mapping = &dev_priv->sdvo_mappings[1];
  2196.                 other_mapping = &dev_priv->sdvo_mappings[0];
  2197.         }
  2198.  
  2199.         /* If the BIOS described our SDVO device, take advantage of it. */
  2200.         if (my_mapping->slave_addr)
  2201.                 return my_mapping->slave_addr;
  2202.  
  2203.         /* If the BIOS only described a different SDVO device, use the
  2204.          * address that it isn't using.
  2205.          */
  2206.         if (other_mapping->slave_addr) {
  2207.                 if (other_mapping->slave_addr == 0x70)
  2208.                         return 0x72;
  2209.                 else
  2210.                         return 0x70;
  2211.         }
  2212.  
  2213.         /* No SDVO device info is found for another DVO port,
  2214.          * so use mapping assumption we had before BIOS parsing.
  2215.          */
  2216.         if (sdvo->is_sdvob)
  2217.                 return 0x70;
  2218.         else
  2219.                 return 0x72;
  2220. }
  2221.  
  2222. static void
  2223. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  2224.                           struct intel_sdvo *encoder)
  2225. {
  2226.         drm_connector_init(encoder->base.base.dev,
  2227.                            &connector->base.base,
  2228.                            &intel_sdvo_connector_funcs,
  2229.                            connector->base.base.connector_type);
  2230.  
  2231.         drm_connector_helper_add(&connector->base.base,
  2232.                                  &intel_sdvo_connector_helper_funcs);
  2233.  
  2234.         connector->base.base.interlace_allowed = 1;
  2235.         connector->base.base.doublescan_allowed = 0;
  2236.         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  2237.         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  2238.  
  2239.         intel_connector_attach_encoder(&connector->base, &encoder->base);
  2240.         drm_sysfs_connector_add(&connector->base.base);
  2241. }
  2242.  
  2243. static void
  2244. intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
  2245.                                struct intel_sdvo_connector *connector)
  2246. {
  2247.         struct drm_device *dev = connector->base.base.dev;
  2248.  
  2249.         intel_attach_force_audio_property(&connector->base.base);
  2250.         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
  2251.                 intel_attach_broadcast_rgb_property(&connector->base.base);
  2252.                 intel_sdvo->color_range_auto = true;
  2253.         }
  2254. }
  2255.  
  2256. static bool
  2257. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  2258. {
  2259.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2260.         struct drm_connector *connector;
  2261.         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  2262.         struct intel_connector *intel_connector;
  2263.         struct intel_sdvo_connector *intel_sdvo_connector;
  2264.  
  2265.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2266.         if (!intel_sdvo_connector)
  2267.                 return false;
  2268.  
  2269.         if (device == 0) {
  2270.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  2271.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  2272.         } else if (device == 1) {
  2273.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  2274.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  2275.         }
  2276.  
  2277.         intel_connector = &intel_sdvo_connector->base;
  2278.         connector = &intel_connector->base;
  2279.         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  2280.                 intel_sdvo_connector->output_flag) {
  2281.                 connector->polled = DRM_CONNECTOR_POLL_HPD;
  2282.                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  2283.                 /* Some SDVO devices have one-shot hotplug interrupts.
  2284.                  * Ensure that they get re-enabled when an interrupt happens.
  2285.                  */
  2286.                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  2287.                 intel_sdvo_enable_hotplug(intel_encoder);
  2288.         } else {
  2289.                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  2290.         }
  2291.         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  2292.         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  2293.  
  2294.         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  2295.                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  2296.                 intel_sdvo->is_hdmi = true;
  2297.         }
  2298.  
  2299.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2300.         if (intel_sdvo->is_hdmi)
  2301.                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
  2302.  
  2303.         return true;
  2304. }
  2305.  
  2306. static bool
  2307. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  2308. {
  2309.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2310.         struct drm_connector *connector;
  2311.         struct intel_connector *intel_connector;
  2312.         struct intel_sdvo_connector *intel_sdvo_connector;
  2313.  
  2314.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2315.         if (!intel_sdvo_connector)
  2316.                 return false;
  2317.  
  2318.         intel_connector = &intel_sdvo_connector->base;
  2319.         connector = &intel_connector->base;
  2320.         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  2321.         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  2322.  
  2323.         intel_sdvo->controlled_output |= type;
  2324.         intel_sdvo_connector->output_flag = type;
  2325.  
  2326.         intel_sdvo->is_tv = true;
  2327.         intel_sdvo->base.needs_tv_clock = true;
  2328.  
  2329.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2330.  
  2331.         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  2332.                 goto err;
  2333.  
  2334.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2335.                 goto err;
  2336.  
  2337.         return true;
  2338.  
  2339. err:
  2340.         intel_sdvo_destroy(connector);
  2341.         return false;
  2342. }
  2343.  
  2344. static bool
  2345. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  2346. {
  2347.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2348.         struct drm_connector *connector;
  2349.         struct intel_connector *intel_connector;
  2350.         struct intel_sdvo_connector *intel_sdvo_connector;
  2351.  
  2352.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2353.         if (!intel_sdvo_connector)
  2354.                 return false;
  2355.  
  2356.         intel_connector = &intel_sdvo_connector->base;
  2357.         connector = &intel_connector->base;
  2358.         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  2359.         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  2360.         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  2361.  
  2362.         if (device == 0) {
  2363.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  2364.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  2365.         } else if (device == 1) {
  2366.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  2367.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  2368.         }
  2369.  
  2370.         intel_sdvo_connector_init(intel_sdvo_connector,
  2371.                                   intel_sdvo);
  2372.         return true;
  2373. }
  2374.  
  2375. static bool
  2376. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  2377. {
  2378.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2379.         struct drm_connector *connector;
  2380.         struct intel_connector *intel_connector;
  2381.         struct intel_sdvo_connector *intel_sdvo_connector;
  2382.  
  2383.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2384.         if (!intel_sdvo_connector)
  2385.                 return false;
  2386.  
  2387.         intel_connector = &intel_sdvo_connector->base;
  2388.         connector = &intel_connector->base;
  2389.         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  2390.         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  2391.  
  2392.         if (device == 0) {
  2393.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  2394.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  2395.         } else if (device == 1) {
  2396.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  2397.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  2398.         }
  2399.  
  2400.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2401.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2402.                 goto err;
  2403.  
  2404.         return true;
  2405.  
  2406. err:
  2407.         intel_sdvo_destroy(connector);
  2408.         return false;
  2409. }
  2410.  
  2411. static bool
  2412. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  2413. {
  2414.         intel_sdvo->is_tv = false;
  2415.         intel_sdvo->base.needs_tv_clock = false;
  2416.         intel_sdvo->is_lvds = false;
  2417.  
  2418.         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  2419.  
  2420.         if (flags & SDVO_OUTPUT_TMDS0)
  2421.                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  2422.                         return false;
  2423.  
  2424.         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  2425.                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  2426.                         return false;
  2427.  
  2428.         /* TV has no XXX1 function block */
  2429.         if (flags & SDVO_OUTPUT_SVID0)
  2430.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  2431.                         return false;
  2432.  
  2433.         if (flags & SDVO_OUTPUT_CVBS0)
  2434.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  2435.                         return false;
  2436.  
  2437.         if (flags & SDVO_OUTPUT_YPRPB0)
  2438.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  2439.                         return false;
  2440.  
  2441.         if (flags & SDVO_OUTPUT_RGB0)
  2442.                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
  2443.                         return false;
  2444.  
  2445.         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  2446.                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
  2447.                         return false;
  2448.  
  2449.         if (flags & SDVO_OUTPUT_LVDS0)
  2450.                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  2451.                         return false;
  2452.  
  2453.         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  2454.                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  2455.                         return false;
  2456.  
  2457.         if ((flags & SDVO_OUTPUT_MASK) == 0) {
  2458.                 unsigned char bytes[2];
  2459.  
  2460.                 intel_sdvo->controlled_output = 0;
  2461.                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2462.                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2463.                               SDVO_NAME(intel_sdvo),
  2464.                               bytes[0], bytes[1]);
  2465.                 return false;
  2466.         }
  2467.         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2468.  
  2469.         return true;
  2470. }
  2471.  
  2472. static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
  2473. {
  2474.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2475.         struct drm_connector *connector, *tmp;
  2476.  
  2477.         list_for_each_entry_safe(connector, tmp,
  2478.                                  &dev->mode_config.connector_list, head) {
  2479.                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
  2480.                         intel_sdvo_destroy(connector);
  2481.         }
  2482. }
  2483.  
  2484. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2485.                                           struct intel_sdvo_connector *intel_sdvo_connector,
  2486.                                           int type)
  2487. {
  2488.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2489.         struct intel_sdvo_tv_format format;
  2490.         uint32_t format_map, i;
  2491.  
  2492.         if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2493.                 return false;
  2494.  
  2495.         BUILD_BUG_ON(sizeof(format) != 6);
  2496.         if (!intel_sdvo_get_value(intel_sdvo,
  2497.                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2498.                                   &format, sizeof(format)))
  2499.                 return false;
  2500.  
  2501.         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2502.  
  2503.         if (format_map == 0)
  2504.                 return false;
  2505.  
  2506.         intel_sdvo_connector->format_supported_num = 0;
  2507.         for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2508.                 if (format_map & (1 << i))
  2509.                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2510.  
  2511.  
  2512.         intel_sdvo_connector->tv_format =
  2513.                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2514.                                             "mode", intel_sdvo_connector->format_supported_num);
  2515.         if (!intel_sdvo_connector->tv_format)
  2516.                 return false;
  2517.  
  2518.         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2519.                 drm_property_add_enum(
  2520.                                 intel_sdvo_connector->tv_format, i,
  2521.                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2522.  
  2523.         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2524.         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
  2525.                                       intel_sdvo_connector->tv_format, 0);
  2526.         return true;
  2527.  
  2528. }
  2529.  
  2530. #define ENHANCEMENT(name, NAME) do { \
  2531.         if (enhancements.name) { \
  2532.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2533.                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2534.                         return false; \
  2535.                 intel_sdvo_connector->max_##name = data_value[0]; \
  2536.                 intel_sdvo_connector->cur_##name = response; \
  2537.                 intel_sdvo_connector->name = \
  2538.                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2539.                 if (!intel_sdvo_connector->name) return false; \
  2540.                 drm_object_attach_property(&connector->base, \
  2541.                                               intel_sdvo_connector->name, \
  2542.                                               intel_sdvo_connector->cur_##name); \
  2543.                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2544.                               data_value[0], data_value[1], response); \
  2545.         } \
  2546. } while (0)
  2547.  
  2548. static bool
  2549. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2550.                                       struct intel_sdvo_connector *intel_sdvo_connector,
  2551.                                       struct intel_sdvo_enhancements_reply enhancements)
  2552. {
  2553.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2554.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2555.         uint16_t response, data_value[2];
  2556.  
  2557.         /* when horizontal overscan is supported, Add the left/right  property */
  2558.         if (enhancements.overscan_h) {
  2559.                 if (!intel_sdvo_get_value(intel_sdvo,
  2560.                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
  2561.                                           &data_value, 4))
  2562.                         return false;
  2563.  
  2564.                 if (!intel_sdvo_get_value(intel_sdvo,
  2565.                                           SDVO_CMD_GET_OVERSCAN_H,
  2566.                                           &response, 2))
  2567.                         return false;
  2568.  
  2569.                 intel_sdvo_connector->max_hscan = data_value[0];
  2570.                 intel_sdvo_connector->left_margin = data_value[0] - response;
  2571.                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2572.                 intel_sdvo_connector->left =
  2573.                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2574.                 if (!intel_sdvo_connector->left)
  2575.                         return false;
  2576.  
  2577.                 drm_object_attach_property(&connector->base,
  2578.                                               intel_sdvo_connector->left,
  2579.                                               intel_sdvo_connector->left_margin);
  2580.  
  2581.                 intel_sdvo_connector->right =
  2582.                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2583.                 if (!intel_sdvo_connector->right)
  2584.                         return false;
  2585.  
  2586.                 drm_object_attach_property(&connector->base,
  2587.                                               intel_sdvo_connector->right,
  2588.                                               intel_sdvo_connector->right_margin);
  2589.                 DRM_DEBUG_KMS("h_overscan: max %d, "
  2590.                               "default %d, current %d\n",
  2591.                               data_value[0], data_value[1], response);
  2592.         }
  2593.  
  2594.         if (enhancements.overscan_v) {
  2595.                 if (!intel_sdvo_get_value(intel_sdvo,
  2596.                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
  2597.                                           &data_value, 4))
  2598.                         return false;
  2599.  
  2600.                 if (!intel_sdvo_get_value(intel_sdvo,
  2601.                                           SDVO_CMD_GET_OVERSCAN_V,
  2602.                                           &response, 2))
  2603.                         return false;
  2604.  
  2605.                 intel_sdvo_connector->max_vscan = data_value[0];
  2606.                 intel_sdvo_connector->top_margin = data_value[0] - response;
  2607.                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2608.                 intel_sdvo_connector->top =
  2609.                         drm_property_create_range(dev, 0,
  2610.                                             "top_margin", 0, data_value[0]);
  2611.                 if (!intel_sdvo_connector->top)
  2612.                         return false;
  2613.  
  2614.                 drm_object_attach_property(&connector->base,
  2615.                                               intel_sdvo_connector->top,
  2616.                                               intel_sdvo_connector->top_margin);
  2617.  
  2618.                 intel_sdvo_connector->bottom =
  2619.                         drm_property_create_range(dev, 0,
  2620.                                             "bottom_margin", 0, data_value[0]);
  2621.                 if (!intel_sdvo_connector->bottom)
  2622.                         return false;
  2623.  
  2624.                 drm_object_attach_property(&connector->base,
  2625.                                               intel_sdvo_connector->bottom,
  2626.                                               intel_sdvo_connector->bottom_margin);
  2627.                 DRM_DEBUG_KMS("v_overscan: max %d, "
  2628.                               "default %d, current %d\n",
  2629.                               data_value[0], data_value[1], response);
  2630.         }
  2631.  
  2632.         ENHANCEMENT(hpos, HPOS);
  2633.         ENHANCEMENT(vpos, VPOS);
  2634.         ENHANCEMENT(saturation, SATURATION);
  2635.         ENHANCEMENT(contrast, CONTRAST);
  2636.         ENHANCEMENT(hue, HUE);
  2637.         ENHANCEMENT(sharpness, SHARPNESS);
  2638.         ENHANCEMENT(brightness, BRIGHTNESS);
  2639.         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2640.         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2641.         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2642.         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2643.         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2644.  
  2645.         if (enhancements.dot_crawl) {
  2646.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2647.                         return false;
  2648.  
  2649.                 intel_sdvo_connector->max_dot_crawl = 1;
  2650.                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2651.                 intel_sdvo_connector->dot_crawl =
  2652.                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2653.                 if (!intel_sdvo_connector->dot_crawl)
  2654.                         return false;
  2655.  
  2656.                 drm_object_attach_property(&connector->base,
  2657.                                               intel_sdvo_connector->dot_crawl,
  2658.                                               intel_sdvo_connector->cur_dot_crawl);
  2659.                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2660.         }
  2661.  
  2662.         return true;
  2663. }
  2664.  
  2665. static bool
  2666. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2667.                                         struct intel_sdvo_connector *intel_sdvo_connector,
  2668.                                         struct intel_sdvo_enhancements_reply enhancements)
  2669. {
  2670.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2671.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2672.         uint16_t response, data_value[2];
  2673.  
  2674.         ENHANCEMENT(brightness, BRIGHTNESS);
  2675.  
  2676.         return true;
  2677. }
  2678. #undef ENHANCEMENT
  2679.  
  2680. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2681.                                                struct intel_sdvo_connector *intel_sdvo_connector)
  2682. {
  2683.         union {
  2684.                 struct intel_sdvo_enhancements_reply reply;
  2685.                 uint16_t response;
  2686.         } enhancements;
  2687.  
  2688.         BUILD_BUG_ON(sizeof(enhancements) != 2);
  2689.  
  2690.         enhancements.response = 0;
  2691.         intel_sdvo_get_value(intel_sdvo,
  2692.                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2693.                              &enhancements, sizeof(enhancements));
  2694.         if (enhancements.response == 0) {
  2695.                 DRM_DEBUG_KMS("No enhancement is supported\n");
  2696.                 return true;
  2697.         }
  2698.  
  2699.         if (IS_TV(intel_sdvo_connector))
  2700.                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2701.         else if (IS_LVDS(intel_sdvo_connector))
  2702.                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2703.         else
  2704.                 return true;
  2705. }
  2706.  
  2707. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2708.                                      struct i2c_msg *msgs,
  2709.                                      int num)
  2710. {
  2711.         struct intel_sdvo *sdvo = adapter->algo_data;
  2712.  
  2713.         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2714.                 return -EIO;
  2715.  
  2716.         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2717. }
  2718.  
  2719. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2720. {
  2721.         struct intel_sdvo *sdvo = adapter->algo_data;
  2722.         return sdvo->i2c->algo->functionality(sdvo->i2c);
  2723. }
  2724.  
  2725. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2726.         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
  2727.         .functionality  = intel_sdvo_ddc_proxy_func
  2728. };
  2729.  
  2730. static bool
  2731. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2732.                           struct drm_device *dev)
  2733. {
  2734.         sdvo->ddc.owner = THIS_MODULE;
  2735.         sdvo->ddc.class = I2C_CLASS_DDC;
  2736.         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2737.         sdvo->ddc.dev.parent = &dev->pdev->dev;
  2738.         sdvo->ddc.algo_data = sdvo;
  2739.         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2740.  
  2741.         return i2c_add_adapter(&sdvo->ddc) == 0;
  2742. }
  2743.  
  2744. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2745. {
  2746.     struct drm_i915_private *dev_priv = dev->dev_private;
  2747.     struct intel_encoder *intel_encoder;
  2748.     struct intel_sdvo *intel_sdvo;
  2749.         u32 hotplug_mask;
  2750.     int i;
  2751.  
  2752.     intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2753.     if (!intel_sdvo)
  2754.         return false;
  2755.  
  2756.     intel_sdvo->sdvo_reg = sdvo_reg;
  2757.         intel_sdvo->is_sdvob = is_sdvob;
  2758.         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2759.     intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2760.         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
  2761.                 goto err_i2c_bus;
  2762.  
  2763.     /* encoder type will be decided later */
  2764.     intel_encoder = &intel_sdvo->base;
  2765.     intel_encoder->type = INTEL_OUTPUT_SDVO;
  2766.     drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2767.  
  2768.     /* Read the regs to test if we can talk to the device */
  2769.     for (i = 0; i < 0x40; i++) {
  2770.         u8 byte;
  2771.  
  2772.         if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2773.                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2774.                                       SDVO_NAME(intel_sdvo));
  2775.             goto err;
  2776.         }
  2777.     }
  2778.  
  2779.         hotplug_mask = 0;
  2780.         if (IS_G4X(dev)) {
  2781.                 hotplug_mask = intel_sdvo->is_sdvob ?
  2782.                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2783.         } else if (IS_GEN4(dev)) {
  2784.                 hotplug_mask = intel_sdvo->is_sdvob ?
  2785.                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2786.         } else {
  2787.                 hotplug_mask = intel_sdvo->is_sdvob ?
  2788.                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2789.         }
  2790.  
  2791.     drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2792.  
  2793.         intel_encoder->disable = intel_disable_sdvo;
  2794.         intel_encoder->enable = intel_enable_sdvo;
  2795.         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2796.  
  2797.     /* In default case sdvo lvds is false */
  2798.     if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2799.         goto err;
  2800.  
  2801.     if (intel_sdvo_output_setup(intel_sdvo,
  2802.                     intel_sdvo->caps.output_flags) != true) {
  2803.                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2804.                               SDVO_NAME(intel_sdvo));
  2805.                 /* Output_setup can leave behind connectors! */
  2806.                 goto err_output;
  2807.     }
  2808.  
  2809.         /*
  2810.          * Cloning SDVO with anything is often impossible, since the SDVO
  2811.          * encoder can request a special input timing mode. And even if that's
  2812.          * not the case we have evidence that cloning a plain unscaled mode with
  2813.          * VGA doesn't really work. Furthermore the cloning flags are way too
  2814.          * simplistic anyway to express such constraints, so just give up on
  2815.          * cloning for SDVO encoders.
  2816.          */
  2817.         intel_sdvo->base.cloneable = false;
  2818.  
  2819.         /* Only enable the hotplug irq if we need it, to work around noisy
  2820.          * hotplug lines.
  2821.          */
  2822.         if (intel_sdvo->hotplug_active)
  2823.                 dev_priv->hotplug_supported_mask |= hotplug_mask;
  2824.  
  2825.     intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2826.  
  2827.     /* Set the input timing to the screen. Assume always input 0. */
  2828.     if (!intel_sdvo_set_target_input(intel_sdvo))
  2829.                 goto err_output;
  2830.  
  2831.     if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2832.                             &intel_sdvo->pixel_clock_min,
  2833.                             &intel_sdvo->pixel_clock_max))
  2834.                 goto err_output;
  2835.  
  2836.     DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2837.             "clock range %dMHz - %dMHz, "
  2838.             "input 1: %c, input 2: %c, "
  2839.             "output 1: %c, output 2: %c\n",
  2840.             SDVO_NAME(intel_sdvo),
  2841.             intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2842.             intel_sdvo->caps.device_rev_id,
  2843.             intel_sdvo->pixel_clock_min / 1000,
  2844.             intel_sdvo->pixel_clock_max / 1000,
  2845.             (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2846.             (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2847.             /* check currently supported outputs */
  2848.             intel_sdvo->caps.output_flags &
  2849.             (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2850.             intel_sdvo->caps.output_flags &
  2851.             (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2852.     return true;
  2853.  
  2854. err_output:
  2855.         intel_sdvo_output_cleanup(intel_sdvo);
  2856.  
  2857. err:
  2858.     drm_encoder_cleanup(&intel_encoder->base);
  2859.         i2c_del_adapter(&intel_sdvo->ddc);
  2860. err_i2c_bus:
  2861.         intel_sdvo_unselect_i2c_bus(intel_sdvo);
  2862.     kfree(intel_sdvo);
  2863.  
  2864.     return false;
  2865. }
  2866.