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  1. /*
  2.  * Copyright © 2006-2010 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  *      Chris Wilson <chris@chris-wilson.co.uk>
  29.  */
  30.  
  31. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32.  
  33. #include <linux/kernel.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/pwm.h>
  36. #include "intel_drv.h"
  37.  
  38. #define CRC_PMIC_PWM_PERIOD_NS  21333
  39.  
  40. void
  41. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  42.                        struct drm_display_mode *adjusted_mode)
  43. {
  44.         drm_mode_copy(adjusted_mode, fixed_mode);
  45.  
  46.         drm_mode_set_crtcinfo(adjusted_mode, 0);
  47. }
  48.  
  49. /**
  50.  * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  51.  * @dev: drm device
  52.  * @fixed_mode : panel native mode
  53.  * @connector: LVDS/eDP connector
  54.  *
  55.  * Return downclock_avail
  56.  * Find the reduced downclock for LVDS/eDP in EDID.
  57.  */
  58. struct drm_display_mode *
  59. intel_find_panel_downclock(struct drm_device *dev,
  60.                         struct drm_display_mode *fixed_mode,
  61.                         struct drm_connector *connector)
  62. {
  63.         struct drm_display_mode *scan, *tmp_mode;
  64.         int temp_downclock;
  65.  
  66.         temp_downclock = fixed_mode->clock;
  67.         tmp_mode = NULL;
  68.  
  69.         list_for_each_entry(scan, &connector->probed_modes, head) {
  70.                 /*
  71.                  * If one mode has the same resolution with the fixed_panel
  72.                  * mode while they have the different refresh rate, it means
  73.                  * that the reduced downclock is found. In such
  74.                  * case we can set the different FPx0/1 to dynamically select
  75.                  * between low and high frequency.
  76.                  */
  77.                 if (scan->hdisplay == fixed_mode->hdisplay &&
  78.                     scan->hsync_start == fixed_mode->hsync_start &&
  79.                     scan->hsync_end == fixed_mode->hsync_end &&
  80.                     scan->htotal == fixed_mode->htotal &&
  81.                     scan->vdisplay == fixed_mode->vdisplay &&
  82.                     scan->vsync_start == fixed_mode->vsync_start &&
  83.                     scan->vsync_end == fixed_mode->vsync_end &&
  84.                     scan->vtotal == fixed_mode->vtotal) {
  85.                         if (scan->clock < temp_downclock) {
  86.                                 /*
  87.                                  * The downclock is already found. But we
  88.                                  * expect to find the lower downclock.
  89.                                  */
  90.                                 temp_downclock = scan->clock;
  91.                                 tmp_mode = scan;
  92.                         }
  93.                 }
  94.         }
  95.  
  96.         if (temp_downclock < fixed_mode->clock)
  97.                 return drm_mode_duplicate(dev, tmp_mode);
  98.         else
  99.                 return NULL;
  100. }
  101.  
  102. /* adjusted_mode has been preset to be the panel's fixed mode */
  103. void
  104. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  105.                         struct intel_crtc_state *pipe_config,
  106.                         int fitting_mode)
  107. {
  108.         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  109.         int x = 0, y = 0, width = 0, height = 0;
  110.  
  111.         /* Native modes don't need fitting */
  112.         if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  113.             adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  114.                 goto done;
  115.  
  116.         switch (fitting_mode) {
  117.         case DRM_MODE_SCALE_CENTER:
  118.                 width = pipe_config->pipe_src_w;
  119.                 height = pipe_config->pipe_src_h;
  120.                 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
  121.                 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
  122.                 break;
  123.  
  124.         case DRM_MODE_SCALE_ASPECT:
  125.                 /* Scale but preserve the aspect ratio */
  126.                 {
  127.                         u32 scaled_width = adjusted_mode->crtc_hdisplay
  128.                                 * pipe_config->pipe_src_h;
  129.                         u32 scaled_height = pipe_config->pipe_src_w
  130.                                 * adjusted_mode->crtc_vdisplay;
  131.                         if (scaled_width > scaled_height) { /* pillar */
  132.                                 width = scaled_height / pipe_config->pipe_src_h;
  133.                                 if (width & 1)
  134.                                         width++;
  135.                                 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  136.                                 y = 0;
  137.                                 height = adjusted_mode->crtc_vdisplay;
  138.                         } else if (scaled_width < scaled_height) { /* letter */
  139.                                 height = scaled_width / pipe_config->pipe_src_w;
  140.                                 if (height & 1)
  141.                                     height++;
  142.                                 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  143.                                 x = 0;
  144.                                 width = adjusted_mode->crtc_hdisplay;
  145.                         } else {
  146.                                 x = y = 0;
  147.                                 width = adjusted_mode->crtc_hdisplay;
  148.                                 height = adjusted_mode->crtc_vdisplay;
  149.                         }
  150.                 }
  151.                 break;
  152.  
  153.         case DRM_MODE_SCALE_FULLSCREEN:
  154.                 x = y = 0;
  155.                 width = adjusted_mode->crtc_hdisplay;
  156.                 height = adjusted_mode->crtc_vdisplay;
  157.                 break;
  158.  
  159.         default:
  160.                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  161.                 return;
  162.         }
  163.  
  164. done:
  165.         pipe_config->pch_pfit.pos = (x << 16) | y;
  166.         pipe_config->pch_pfit.size = (width << 16) | height;
  167.         pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  168. }
  169.  
  170. static void
  171. centre_horizontally(struct drm_display_mode *adjusted_mode,
  172.                     int width)
  173. {
  174.         u32 border, sync_pos, blank_width, sync_width;
  175.  
  176.         /* keep the hsync and hblank widths constant */
  177.         sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
  178.         blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
  179.         sync_pos = (blank_width - sync_width + 1) / 2;
  180.  
  181.         border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  182.         border += border & 1; /* make the border even */
  183.  
  184.         adjusted_mode->crtc_hdisplay = width;
  185.         adjusted_mode->crtc_hblank_start = width + border;
  186.         adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
  187.  
  188.         adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
  189.         adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
  190. }
  191.  
  192. static void
  193. centre_vertically(struct drm_display_mode *adjusted_mode,
  194.                   int height)
  195. {
  196.         u32 border, sync_pos, blank_width, sync_width;
  197.  
  198.         /* keep the vsync and vblank widths constant */
  199.         sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
  200.         blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
  201.         sync_pos = (blank_width - sync_width + 1) / 2;
  202.  
  203.         border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  204.  
  205.         adjusted_mode->crtc_vdisplay = height;
  206.         adjusted_mode->crtc_vblank_start = height + border;
  207.         adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
  208.  
  209.         adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
  210.         adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
  211. }
  212.  
  213. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  214. {
  215.         /*
  216.          * Floating point operation is not supported. So the FACTOR
  217.          * is defined, which can avoid the floating point computation
  218.          * when calculating the panel ratio.
  219.          */
  220. #define ACCURACY 12
  221. #define FACTOR (1 << ACCURACY)
  222.         u32 ratio = source * FACTOR / target;
  223.         return (FACTOR * ratio + FACTOR/2) / FACTOR;
  224. }
  225.  
  226. static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
  227.                               u32 *pfit_control)
  228. {
  229.         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  230.         u32 scaled_width = adjusted_mode->crtc_hdisplay *
  231.                 pipe_config->pipe_src_h;
  232.         u32 scaled_height = pipe_config->pipe_src_w *
  233.                 adjusted_mode->crtc_vdisplay;
  234.  
  235.         /* 965+ is easy, it does everything in hw */
  236.         if (scaled_width > scaled_height)
  237.                 *pfit_control |= PFIT_ENABLE |
  238.                         PFIT_SCALING_PILLAR;
  239.         else if (scaled_width < scaled_height)
  240.                 *pfit_control |= PFIT_ENABLE |
  241.                         PFIT_SCALING_LETTER;
  242.         else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
  243.                 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  244. }
  245.  
  246. static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
  247.                               u32 *pfit_control, u32 *pfit_pgm_ratios,
  248.                               u32 *border)
  249. {
  250.         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  251.         u32 scaled_width = adjusted_mode->crtc_hdisplay *
  252.                 pipe_config->pipe_src_h;
  253.         u32 scaled_height = pipe_config->pipe_src_w *
  254.                 adjusted_mode->crtc_vdisplay;
  255.         u32 bits;
  256.  
  257.         /*
  258.          * For earlier chips we have to calculate the scaling
  259.          * ratio by hand and program it into the
  260.          * PFIT_PGM_RATIO register
  261.          */
  262.         if (scaled_width > scaled_height) { /* pillar */
  263.                 centre_horizontally(adjusted_mode,
  264.                                     scaled_height /
  265.                                     pipe_config->pipe_src_h);
  266.  
  267.                 *border = LVDS_BORDER_ENABLE;
  268.                 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
  269.                         bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  270.                                                     adjusted_mode->crtc_vdisplay);
  271.  
  272.                         *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  273.                                              bits << PFIT_VERT_SCALE_SHIFT);
  274.                         *pfit_control |= (PFIT_ENABLE |
  275.                                           VERT_INTERP_BILINEAR |
  276.                                           HORIZ_INTERP_BILINEAR);
  277.                 }
  278.         } else if (scaled_width < scaled_height) { /* letter */
  279.                 centre_vertically(adjusted_mode,
  280.                                   scaled_width /
  281.                                   pipe_config->pipe_src_w);
  282.  
  283.                 *border = LVDS_BORDER_ENABLE;
  284.                 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  285.                         bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  286.                                                     adjusted_mode->crtc_hdisplay);
  287.  
  288.                         *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  289.                                              bits << PFIT_VERT_SCALE_SHIFT);
  290.                         *pfit_control |= (PFIT_ENABLE |
  291.                                           VERT_INTERP_BILINEAR |
  292.                                           HORIZ_INTERP_BILINEAR);
  293.                 }
  294.         } else {
  295.                 /* Aspects match, Let hw scale both directions */
  296.                 *pfit_control |= (PFIT_ENABLE |
  297.                                   VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  298.                                   VERT_INTERP_BILINEAR |
  299.                                   HORIZ_INTERP_BILINEAR);
  300.         }
  301. }
  302.  
  303. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  304.                               struct intel_crtc_state *pipe_config,
  305.                               int fitting_mode)
  306. {
  307.         struct drm_device *dev = intel_crtc->base.dev;
  308.         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  309.         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  310.  
  311.         /* Native modes don't need fitting */
  312.         if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  313.             adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  314.                 goto out;
  315.  
  316.         switch (fitting_mode) {
  317.         case DRM_MODE_SCALE_CENTER:
  318.                 /*
  319.                  * For centered modes, we have to calculate border widths &
  320.                  * heights and modify the values programmed into the CRTC.
  321.                  */
  322.                 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  323.                 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  324.                 border = LVDS_BORDER_ENABLE;
  325.                 break;
  326.         case DRM_MODE_SCALE_ASPECT:
  327.                 /* Scale but preserve the aspect ratio */
  328.                 if (INTEL_INFO(dev)->gen >= 4)
  329.                         i965_scale_aspect(pipe_config, &pfit_control);
  330.                 else
  331.                         i9xx_scale_aspect(pipe_config, &pfit_control,
  332.                                           &pfit_pgm_ratios, &border);
  333.                 break;
  334.         case DRM_MODE_SCALE_FULLSCREEN:
  335.                 /*
  336.                  * Full scaling, even if it changes the aspect ratio.
  337.                  * Fortunately this is all done for us in hw.
  338.                  */
  339.                 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
  340.                     pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  341.                         pfit_control |= PFIT_ENABLE;
  342.                         if (INTEL_INFO(dev)->gen >= 4)
  343.                                 pfit_control |= PFIT_SCALING_AUTO;
  344.                         else
  345.                                 pfit_control |= (VERT_AUTO_SCALE |
  346.                                                  VERT_INTERP_BILINEAR |
  347.                                                  HORIZ_AUTO_SCALE |
  348.                                                  HORIZ_INTERP_BILINEAR);
  349.                 }
  350.                 break;
  351.         default:
  352.                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  353.                 return;
  354.         }
  355.  
  356.         /* 965+ wants fuzzy fitting */
  357.         /* FIXME: handle multiple panels by failing gracefully */
  358.         if (INTEL_INFO(dev)->gen >= 4)
  359.                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  360.                                  PFIT_FILTER_FUZZY);
  361.  
  362. out:
  363.         if ((pfit_control & PFIT_ENABLE) == 0) {
  364.                 pfit_control = 0;
  365.                 pfit_pgm_ratios = 0;
  366.         }
  367.  
  368.         /* Make sure pre-965 set dither correctly for 18bpp panels. */
  369.         if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
  370.                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  371.  
  372.         pipe_config->gmch_pfit.control = pfit_control;
  373.         pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  374.         pipe_config->gmch_pfit.lvds_border_bits = border;
  375. }
  376.  
  377. enum drm_connector_status
  378. intel_panel_detect(struct drm_device *dev)
  379. {
  380.         struct drm_i915_private *dev_priv = dev->dev_private;
  381.  
  382.         /* Assume that the BIOS does not lie through the OpRegion... */
  383.         if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
  384.                 return *dev_priv->opregion.lid_state & 0x1 ?
  385.                         connector_status_connected :
  386.                         connector_status_disconnected;
  387.         }
  388.  
  389.         switch (i915.panel_ignore_lid) {
  390.         case -2:
  391.                 return connector_status_connected;
  392.         case -1:
  393.                 return connector_status_disconnected;
  394.         default:
  395.                 return connector_status_unknown;
  396.         }
  397. }
  398.  
  399. /**
  400.  * scale - scale values from one range to another
  401.  *
  402.  * @source_val: value in range [@source_min..@source_max]
  403.  *
  404.  * Return @source_val in range [@source_min..@source_max] scaled to range
  405.  * [@target_min..@target_max].
  406.  */
  407. static uint32_t scale(uint32_t source_val,
  408.                       uint32_t source_min, uint32_t source_max,
  409.                       uint32_t target_min, uint32_t target_max)
  410. {
  411.         uint64_t target_val;
  412.  
  413.         WARN_ON(source_min > source_max);
  414.         WARN_ON(target_min > target_max);
  415.  
  416.         /* defensive */
  417.         source_val = clamp(source_val, source_min, source_max);
  418.  
  419.         /* avoid overflows */
  420.         target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
  421.                         (target_max - target_min), source_max - source_min);
  422.         target_val += target_min;
  423.  
  424.         return target_val;
  425. }
  426.  
  427. /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
  428. static inline u32 scale_user_to_hw(struct intel_connector *connector,
  429.                                    u32 user_level, u32 user_max)
  430. {
  431.         struct intel_panel *panel = &connector->panel;
  432.  
  433.         return scale(user_level, 0, user_max,
  434.                      panel->backlight.min, panel->backlight.max);
  435. }
  436.  
  437. /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
  438.  * to [hw_min..hw_max]. */
  439. static inline u32 clamp_user_to_hw(struct intel_connector *connector,
  440.                                    u32 user_level, u32 user_max)
  441. {
  442.         struct intel_panel *panel = &connector->panel;
  443.         u32 hw_level;
  444.  
  445.         hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
  446.         hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
  447.  
  448.         return hw_level;
  449. }
  450.  
  451. /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
  452. static inline u32 scale_hw_to_user(struct intel_connector *connector,
  453.                                    u32 hw_level, u32 user_max)
  454. {
  455.         struct intel_panel *panel = &connector->panel;
  456.  
  457.         return scale(hw_level, panel->backlight.min, panel->backlight.max,
  458.                      0, user_max);
  459. }
  460.  
  461. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  462.                                           u32 val)
  463. {
  464.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  465.         struct intel_panel *panel = &connector->panel;
  466.  
  467.         WARN_ON(panel->backlight.max == 0);
  468.  
  469.         if (i915.invert_brightness < 0)
  470.                 return val;
  471.  
  472.         if (i915.invert_brightness > 0 ||
  473.             dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  474.                 return panel->backlight.max - val;
  475.         }
  476.  
  477.         return val;
  478. }
  479.  
  480. static u32 lpt_get_backlight(struct intel_connector *connector)
  481. {
  482.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  483.  
  484.         return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  485. }
  486.  
  487. static u32 pch_get_backlight(struct intel_connector *connector)
  488. {
  489.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  490.  
  491.         return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  492. }
  493.  
  494. static u32 i9xx_get_backlight(struct intel_connector *connector)
  495. {
  496.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  497.         struct intel_panel *panel = &connector->panel;
  498.         u32 val;
  499.  
  500.         val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  501.         if (INTEL_INFO(dev_priv)->gen < 4)
  502.                 val >>= 1;
  503.  
  504.         if (panel->backlight.combination_mode) {
  505.                 u8 lbpc;
  506.  
  507.                 pci_read_config_byte(dev_priv->dev->pdev, PCI_LBPC, &lbpc);
  508.                 val *= lbpc;
  509.         }
  510.  
  511.         return val;
  512. }
  513.  
  514. static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
  515. {
  516.         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  517.                 return 0;
  518.  
  519.         return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  520. }
  521.  
  522. static u32 vlv_get_backlight(struct intel_connector *connector)
  523. {
  524.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  525.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  526.  
  527.         return _vlv_get_backlight(dev_priv, pipe);
  528. }
  529.  
  530. static u32 bxt_get_backlight(struct intel_connector *connector)
  531. {
  532.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  533.         struct intel_panel *panel = &connector->panel;
  534.  
  535.         return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
  536. }
  537.  
  538. static u32 pwm_get_backlight(struct intel_connector *connector)
  539. {
  540.         struct intel_panel *panel = &connector->panel;
  541.         int duty_ns;
  542.  
  543.         duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
  544.         return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
  545. }
  546.  
  547. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  548. {
  549.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  550.         struct intel_panel *panel = &connector->panel;
  551.         u32 val = 0;
  552.  
  553.         mutex_lock(&dev_priv->backlight_lock);
  554.  
  555.         if (panel->backlight.enabled) {
  556.                 val = panel->backlight.get(connector);
  557.                 val = intel_panel_compute_brightness(connector, val);
  558.         }
  559.  
  560.         mutex_unlock(&dev_priv->backlight_lock);
  561.  
  562.         DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  563.         return val;
  564. }
  565.  
  566. static void lpt_set_backlight(struct intel_connector *connector, u32 level)
  567. {
  568.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  569.         u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  570.         I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  571. }
  572.  
  573. static void pch_set_backlight(struct intel_connector *connector, u32 level)
  574. {
  575.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  576.         u32 tmp;
  577.  
  578.         tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  579.         I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  580. }
  581.  
  582. static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
  583. {
  584.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  585.         struct intel_panel *panel = &connector->panel;
  586.         u32 tmp, mask;
  587.  
  588.         WARN_ON(panel->backlight.max == 0);
  589.  
  590.         if (panel->backlight.combination_mode) {
  591.                 u8 lbpc;
  592.  
  593.                 lbpc = level * 0xfe / panel->backlight.max + 1;
  594.                 level /= lbpc;
  595.                 pci_write_config_byte(dev_priv->dev->pdev, PCI_LBPC, lbpc);
  596.         }
  597.  
  598.         if (IS_GEN4(dev_priv)) {
  599.                 mask = BACKLIGHT_DUTY_CYCLE_MASK;
  600.         } else {
  601.                 level <<= 1;
  602.                 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  603.         }
  604.  
  605.         tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  606.         I915_WRITE(BLC_PWM_CTL, tmp | level);
  607. }
  608.  
  609. static void vlv_set_backlight(struct intel_connector *connector, u32 level)
  610. {
  611.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  612.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  613.         u32 tmp;
  614.  
  615.         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  616.                 return;
  617.  
  618.         tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  619.         I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  620. }
  621.  
  622. static void bxt_set_backlight(struct intel_connector *connector, u32 level)
  623. {
  624.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  625.         struct intel_panel *panel = &connector->panel;
  626.  
  627.         I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
  628. }
  629.  
  630. static void pwm_set_backlight(struct intel_connector *connector, u32 level)
  631. {
  632.         struct intel_panel *panel = &connector->panel;
  633.         int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
  634.  
  635.         pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
  636. }
  637.  
  638. static void
  639. intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
  640. {
  641.         struct intel_panel *panel = &connector->panel;
  642.  
  643.         DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  644.  
  645.         level = intel_panel_compute_brightness(connector, level);
  646.         panel->backlight.set(connector, level);
  647. }
  648.  
  649. /* set backlight brightness to level in range [0..max], scaling wrt hw min */
  650. static void intel_panel_set_backlight(struct intel_connector *connector,
  651.                                       u32 user_level, u32 user_max)
  652. {
  653.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  654.         struct intel_panel *panel = &connector->panel;
  655.         u32 hw_level;
  656.  
  657.         if (!panel->backlight.present)
  658.                 return;
  659.  
  660.         mutex_lock(&dev_priv->backlight_lock);
  661.  
  662.         WARN_ON(panel->backlight.max == 0);
  663.  
  664.         hw_level = scale_user_to_hw(connector, user_level, user_max);
  665.         panel->backlight.level = hw_level;
  666.  
  667.         if (panel->backlight.enabled)
  668.                 intel_panel_actually_set_backlight(connector, hw_level);
  669.  
  670.         mutex_unlock(&dev_priv->backlight_lock);
  671. }
  672.  
  673. /* set backlight brightness to level in range [0..max], assuming hw min is
  674.  * respected.
  675.  */
  676. void intel_panel_set_backlight_acpi(struct intel_connector *connector,
  677.                                     u32 user_level, u32 user_max)
  678. {
  679.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  680.         struct intel_panel *panel = &connector->panel;
  681.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  682.         u32 hw_level;
  683.  
  684.         /*
  685.          * INVALID_PIPE may occur during driver init because
  686.          * connection_mutex isn't held across the entire backlight
  687.          * setup + modeset readout, and the BIOS can issue the
  688.          * requests at any time.
  689.          */
  690.         if (!panel->backlight.present || pipe == INVALID_PIPE)
  691.                 return;
  692.  
  693.         mutex_lock(&dev_priv->backlight_lock);
  694.  
  695.         WARN_ON(panel->backlight.max == 0);
  696.  
  697.         hw_level = clamp_user_to_hw(connector, user_level, user_max);
  698.         panel->backlight.level = hw_level;
  699.  
  700.  
  701.         if (panel->backlight.enabled)
  702.                 intel_panel_actually_set_backlight(connector, hw_level);
  703.  
  704.         mutex_unlock(&dev_priv->backlight_lock);
  705. }
  706.  
  707. static void lpt_disable_backlight(struct intel_connector *connector)
  708. {
  709.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  710.         u32 tmp;
  711.  
  712.         intel_panel_actually_set_backlight(connector, 0);
  713.  
  714.         /*
  715.          * Although we don't support or enable CPU PWM with LPT/SPT based
  716.          * systems, it may have been enabled prior to loading the
  717.          * driver. Disable to avoid warnings on LCPLL disable.
  718.          *
  719.          * This needs rework if we need to add support for CPU PWM on PCH split
  720.          * platforms.
  721.          */
  722.         tmp = I915_READ(BLC_PWM_CPU_CTL2);
  723.         if (tmp & BLM_PWM_ENABLE) {
  724.                 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
  725.                 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  726.         }
  727.  
  728.         tmp = I915_READ(BLC_PWM_PCH_CTL1);
  729.         I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  730. }
  731.  
  732. static void pch_disable_backlight(struct intel_connector *connector)
  733. {
  734.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  735.         u32 tmp;
  736.  
  737.         intel_panel_actually_set_backlight(connector, 0);
  738.  
  739.         tmp = I915_READ(BLC_PWM_CPU_CTL2);
  740.         I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  741.  
  742.         tmp = I915_READ(BLC_PWM_PCH_CTL1);
  743.         I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  744. }
  745.  
  746. static void i9xx_disable_backlight(struct intel_connector *connector)
  747. {
  748.         intel_panel_actually_set_backlight(connector, 0);
  749. }
  750.  
  751. static void i965_disable_backlight(struct intel_connector *connector)
  752. {
  753.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  754.         u32 tmp;
  755.  
  756.         intel_panel_actually_set_backlight(connector, 0);
  757.  
  758.         tmp = I915_READ(BLC_PWM_CTL2);
  759.         I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  760. }
  761.  
  762. static void vlv_disable_backlight(struct intel_connector *connector)
  763. {
  764.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  765.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  766.         u32 tmp;
  767.  
  768.         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  769.                 return;
  770.  
  771.         intel_panel_actually_set_backlight(connector, 0);
  772.  
  773.         tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  774.         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  775. }
  776.  
  777. static void bxt_disable_backlight(struct intel_connector *connector)
  778. {
  779.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  780.         struct intel_panel *panel = &connector->panel;
  781.         u32 tmp, val;
  782.  
  783.         intel_panel_actually_set_backlight(connector, 0);
  784.  
  785.         tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  786.         I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  787.                         tmp & ~BXT_BLC_PWM_ENABLE);
  788.  
  789.         if (panel->backlight.controller == 1) {
  790.                 val = I915_READ(UTIL_PIN_CTL);
  791.                 val &= ~UTIL_PIN_ENABLE;
  792.                 I915_WRITE(UTIL_PIN_CTL, val);
  793.         }
  794. }
  795.  
  796. static void pwm_disable_backlight(struct intel_connector *connector)
  797. {
  798.         struct intel_panel *panel = &connector->panel;
  799.  
  800.         /* Disable the backlight */
  801.         pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
  802.         usleep_range(2000, 3000);
  803.         pwm_disable(panel->backlight.pwm);
  804. }
  805.  
  806. void intel_panel_disable_backlight(struct intel_connector *connector)
  807. {
  808.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  809.         struct intel_panel *panel = &connector->panel;
  810.  
  811.         if (!panel->backlight.present)
  812.                 return;
  813.  
  814.         /*
  815.          * Do not disable backlight on the vga_switcheroo path. When switching
  816.          * away from i915, the other client may depend on i915 to handle the
  817.          * backlight. This will leave the backlight on unnecessarily when
  818.          * another client is not activated.
  819.          */
  820.         if (dev_priv->dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  821.                 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  822.                 return;
  823.         }
  824.  
  825.         mutex_lock(&dev_priv->backlight_lock);
  826.  
  827.         panel->backlight.enabled = false;
  828.         panel->backlight.disable(connector);
  829.  
  830.         mutex_unlock(&dev_priv->backlight_lock);
  831. }
  832.  
  833. static void lpt_enable_backlight(struct intel_connector *connector)
  834. {
  835.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  836.         struct intel_panel *panel = &connector->panel;
  837.         u32 pch_ctl1, pch_ctl2;
  838.  
  839.         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  840.         if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  841.                 DRM_DEBUG_KMS("pch backlight already enabled\n");
  842.                 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  843.                 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  844.         }
  845.  
  846.         pch_ctl2 = panel->backlight.max << 16;
  847.         I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  848.  
  849.         pch_ctl1 = 0;
  850.         if (panel->backlight.active_low_pwm)
  851.                 pch_ctl1 |= BLM_PCH_POLARITY;
  852.  
  853.         /* After LPT, override is the default. */
  854.         if (HAS_PCH_LPT(dev_priv))
  855.                 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  856.  
  857.         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  858.         POSTING_READ(BLC_PWM_PCH_CTL1);
  859.         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  860.  
  861.         /* This won't stick until the above enable. */
  862.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  863. }
  864.  
  865. static void pch_enable_backlight(struct intel_connector *connector)
  866. {
  867.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  868.         struct intel_panel *panel = &connector->panel;
  869.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  870.         enum transcoder cpu_transcoder =
  871.                 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
  872.         u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  873.  
  874.         cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  875.         if (cpu_ctl2 & BLM_PWM_ENABLE) {
  876.                 DRM_DEBUG_KMS("cpu backlight already enabled\n");
  877.                 cpu_ctl2 &= ~BLM_PWM_ENABLE;
  878.                 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  879.         }
  880.  
  881.         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  882.         if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  883.                 DRM_DEBUG_KMS("pch backlight already enabled\n");
  884.                 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  885.                 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  886.         }
  887.  
  888.         if (cpu_transcoder == TRANSCODER_EDP)
  889.                 cpu_ctl2 = BLM_TRANSCODER_EDP;
  890.         else
  891.                 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  892.         I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  893.         POSTING_READ(BLC_PWM_CPU_CTL2);
  894.         I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  895.  
  896.         /* This won't stick until the above enable. */
  897.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  898.  
  899.         pch_ctl2 = panel->backlight.max << 16;
  900.         I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  901.  
  902.         pch_ctl1 = 0;
  903.         if (panel->backlight.active_low_pwm)
  904.                 pch_ctl1 |= BLM_PCH_POLARITY;
  905.  
  906.         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  907.         POSTING_READ(BLC_PWM_PCH_CTL1);
  908.         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  909. }
  910.  
  911. static void i9xx_enable_backlight(struct intel_connector *connector)
  912. {
  913.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  914.         struct intel_panel *panel = &connector->panel;
  915.         u32 ctl, freq;
  916.  
  917.         ctl = I915_READ(BLC_PWM_CTL);
  918.         if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  919.                 DRM_DEBUG_KMS("backlight already enabled\n");
  920.                 I915_WRITE(BLC_PWM_CTL, 0);
  921.         }
  922.  
  923.         freq = panel->backlight.max;
  924.         if (panel->backlight.combination_mode)
  925.                 freq /= 0xff;
  926.  
  927.         ctl = freq << 17;
  928.         if (panel->backlight.combination_mode)
  929.                 ctl |= BLM_LEGACY_MODE;
  930.         if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
  931.                 ctl |= BLM_POLARITY_PNV;
  932.  
  933.         I915_WRITE(BLC_PWM_CTL, ctl);
  934.         POSTING_READ(BLC_PWM_CTL);
  935.  
  936.         /* XXX: combine this into above write? */
  937.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  938.  
  939.         /*
  940.          * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
  941.          * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
  942.          * that has backlight.
  943.          */
  944.         if (IS_GEN2(dev_priv))
  945.                 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
  946. }
  947.  
  948. static void i965_enable_backlight(struct intel_connector *connector)
  949. {
  950.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  951.         struct intel_panel *panel = &connector->panel;
  952.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  953.         u32 ctl, ctl2, freq;
  954.  
  955.         ctl2 = I915_READ(BLC_PWM_CTL2);
  956.         if (ctl2 & BLM_PWM_ENABLE) {
  957.                 DRM_DEBUG_KMS("backlight already enabled\n");
  958.                 ctl2 &= ~BLM_PWM_ENABLE;
  959.                 I915_WRITE(BLC_PWM_CTL2, ctl2);
  960.         }
  961.  
  962.         freq = panel->backlight.max;
  963.         if (panel->backlight.combination_mode)
  964.                 freq /= 0xff;
  965.  
  966.         ctl = freq << 16;
  967.         I915_WRITE(BLC_PWM_CTL, ctl);
  968.  
  969.         ctl2 = BLM_PIPE(pipe);
  970.         if (panel->backlight.combination_mode)
  971.                 ctl2 |= BLM_COMBINATION_MODE;
  972.         if (panel->backlight.active_low_pwm)
  973.                 ctl2 |= BLM_POLARITY_I965;
  974.         I915_WRITE(BLC_PWM_CTL2, ctl2);
  975.         POSTING_READ(BLC_PWM_CTL2);
  976.         I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  977.  
  978.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  979. }
  980.  
  981. static void vlv_enable_backlight(struct intel_connector *connector)
  982. {
  983.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  984.         struct intel_panel *panel = &connector->panel;
  985.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  986.         u32 ctl, ctl2;
  987.  
  988.         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  989.                 return;
  990.  
  991.         ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  992.         if (ctl2 & BLM_PWM_ENABLE) {
  993.                 DRM_DEBUG_KMS("backlight already enabled\n");
  994.                 ctl2 &= ~BLM_PWM_ENABLE;
  995.                 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  996.         }
  997.  
  998.         ctl = panel->backlight.max << 16;
  999.         I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  1000.  
  1001.         /* XXX: combine this into above write? */
  1002.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  1003.  
  1004.         ctl2 = 0;
  1005.         if (panel->backlight.active_low_pwm)
  1006.                 ctl2 |= BLM_POLARITY_I965;
  1007.         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  1008.         POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  1009.         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  1010. }
  1011.  
  1012. static void bxt_enable_backlight(struct intel_connector *connector)
  1013. {
  1014.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1015.         struct intel_panel *panel = &connector->panel;
  1016.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  1017.         u32 pwm_ctl, val;
  1018.  
  1019.         /* To use 2nd set of backlight registers, utility pin has to be
  1020.          * enabled with PWM mode.
  1021.          * The field should only be changed when the utility pin is disabled
  1022.          */
  1023.         if (panel->backlight.controller == 1) {
  1024.                 val = I915_READ(UTIL_PIN_CTL);
  1025.                 if (val & UTIL_PIN_ENABLE) {
  1026.                         DRM_DEBUG_KMS("util pin already enabled\n");
  1027.                         val &= ~UTIL_PIN_ENABLE;
  1028.                         I915_WRITE(UTIL_PIN_CTL, val);
  1029.                 }
  1030.  
  1031.                 val = 0;
  1032.                 if (panel->backlight.util_pin_active_low)
  1033.                         val |= UTIL_PIN_POLARITY;
  1034.                 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
  1035.                                 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
  1036.         }
  1037.  
  1038.         pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1039.         if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  1040.                 DRM_DEBUG_KMS("backlight already enabled\n");
  1041.                 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  1042.                 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  1043.                                 pwm_ctl);
  1044.         }
  1045.  
  1046.         I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  1047.                         panel->backlight.max);
  1048.  
  1049.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  1050.  
  1051.         pwm_ctl = 0;
  1052.         if (panel->backlight.active_low_pwm)
  1053.                 pwm_ctl |= BXT_BLC_PWM_POLARITY;
  1054.  
  1055.         I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  1056.         POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1057.         I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  1058.                         pwm_ctl | BXT_BLC_PWM_ENABLE);
  1059. }
  1060.  
  1061. static void pwm_enable_backlight(struct intel_connector *connector)
  1062. {
  1063.         struct intel_panel *panel = &connector->panel;
  1064.  
  1065.         pwm_enable(panel->backlight.pwm);
  1066.         intel_panel_actually_set_backlight(connector, panel->backlight.level);
  1067. }
  1068.  
  1069. void intel_panel_enable_backlight(struct intel_connector *connector)
  1070. {
  1071.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1072.         struct intel_panel *panel = &connector->panel;
  1073.         enum pipe pipe = intel_get_pipe_from_connector(connector);
  1074.  
  1075.         if (!panel->backlight.present)
  1076.                 return;
  1077.  
  1078.         DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  1079.  
  1080.         mutex_lock(&dev_priv->backlight_lock);
  1081.  
  1082.         WARN_ON(panel->backlight.max == 0);
  1083.  
  1084.         if (panel->backlight.level <= panel->backlight.min) {
  1085.                 panel->backlight.level = panel->backlight.max;
  1086.         }
  1087.  
  1088.         panel->backlight.enable(connector);
  1089.         panel->backlight.enabled = true;
  1090.  
  1091.         mutex_unlock(&dev_priv->backlight_lock);
  1092. }
  1093.  
  1094. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  1095. static int intel_backlight_device_update_status(struct backlight_device *bd)
  1096. {
  1097.         struct intel_connector *connector = bl_get_data(bd);
  1098.         struct intel_panel *panel = &connector->panel;
  1099.         struct drm_device *dev = connector->base.dev;
  1100.  
  1101.         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  1102.         DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  1103.                       bd->props.brightness, bd->props.max_brightness);
  1104.         intel_panel_set_backlight(connector, bd->props.brightness,
  1105.                                   bd->props.max_brightness);
  1106.  
  1107.         /*
  1108.          * Allow flipping bl_power as a sub-state of enabled. Sadly the
  1109.          * backlight class device does not make it easy to to differentiate
  1110.          * between callbacks for brightness and bl_power, so our backlight_power
  1111.          * callback needs to take this into account.
  1112.          */
  1113.         if (panel->backlight.enabled) {
  1114.                 if (panel->backlight.power) {
  1115.                         bool enable = bd->props.power == FB_BLANK_UNBLANK &&
  1116.                                 bd->props.brightness != 0;
  1117.                         panel->backlight.power(connector, enable);
  1118.                 }
  1119.         } else {
  1120.                 bd->props.power = FB_BLANK_POWERDOWN;
  1121.         }
  1122.  
  1123.         drm_modeset_unlock(&dev->mode_config.connection_mutex);
  1124.         return 0;
  1125. }
  1126.  
  1127. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  1128. {
  1129.         struct intel_connector *connector = bl_get_data(bd);
  1130.         struct drm_device *dev = connector->base.dev;
  1131.         struct drm_i915_private *dev_priv = dev->dev_private;
  1132.         u32 hw_level;
  1133.         int ret;
  1134.  
  1135.         intel_runtime_pm_get(dev_priv);
  1136.         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  1137.  
  1138.         hw_level = intel_panel_get_backlight(connector);
  1139.         ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
  1140.  
  1141.         drm_modeset_unlock(&dev->mode_config.connection_mutex);
  1142.         intel_runtime_pm_put(dev_priv);
  1143.  
  1144.         return ret;
  1145. }
  1146.  
  1147. static const struct backlight_ops intel_backlight_device_ops = {
  1148.         .update_status = intel_backlight_device_update_status,
  1149.         .get_brightness = intel_backlight_device_get_brightness,
  1150. };
  1151.  
  1152. static int intel_backlight_device_register(struct intel_connector *connector)
  1153. {
  1154.         struct intel_panel *panel = &connector->panel;
  1155.         struct backlight_properties props;
  1156.  
  1157.         if (WARN_ON(panel->backlight.device))
  1158.                 return -ENODEV;
  1159.  
  1160.         if (!panel->backlight.present)
  1161.                 return 0;
  1162.  
  1163.         WARN_ON(panel->backlight.max == 0);
  1164.  
  1165.         memset(&props, 0, sizeof(props));
  1166.         props.type = BACKLIGHT_RAW;
  1167.  
  1168.         /*
  1169.          * Note: Everything should work even if the backlight device max
  1170.          * presented to the userspace is arbitrarily chosen.
  1171.          */
  1172.         props.max_brightness = panel->backlight.max;
  1173.         props.brightness = scale_hw_to_user(connector,
  1174.                                             panel->backlight.level,
  1175.                                             props.max_brightness);
  1176.  
  1177.         if (panel->backlight.enabled)
  1178.                 props.power = FB_BLANK_UNBLANK;
  1179.         else
  1180.                 props.power = FB_BLANK_POWERDOWN;
  1181.  
  1182.         /*
  1183.          * Note: using the same name independent of the connector prevents
  1184.          * registration of multiple backlight devices in the driver.
  1185.          */
  1186.         panel->backlight.device =
  1187.                 backlight_device_register("intel_backlight",
  1188.                                           connector->base.kdev,
  1189.                                           connector,
  1190.                                           &intel_backlight_device_ops, &props);
  1191.  
  1192.         if (IS_ERR(panel->backlight.device)) {
  1193.                 DRM_ERROR("Failed to register backlight: %ld\n",
  1194.                           PTR_ERR(panel->backlight.device));
  1195.                 panel->backlight.device = NULL;
  1196.                 return -ENODEV;
  1197.         }
  1198.  
  1199.         DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
  1200.                       connector->base.name);
  1201.  
  1202.         return 0;
  1203. }
  1204.  
  1205. static void intel_backlight_device_unregister(struct intel_connector *connector)
  1206. {
  1207.         struct intel_panel *panel = &connector->panel;
  1208.  
  1209.         if (panel->backlight.device) {
  1210.                 backlight_device_unregister(panel->backlight.device);
  1211.                 panel->backlight.device = NULL;
  1212.         }
  1213. }
  1214. #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1215. static int intel_backlight_device_register(struct intel_connector *connector)
  1216. {
  1217.         return 0;
  1218. }
  1219. static void intel_backlight_device_unregister(struct intel_connector *connector)
  1220. {
  1221. }
  1222. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1223.  
  1224. /*
  1225.  * BXT: PWM clock frequency = 19.2 MHz.
  1226.  */
  1227. static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1228. {
  1229.         return KHz(19200) / pwm_freq_hz;
  1230. }
  1231.  
  1232. /*
  1233.  * SPT: This value represents the period of the PWM stream in clock periods
  1234.  * multiplied by 16 (default increment) or 128 (alternate increment selected in
  1235.  * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
  1236.  */
  1237. static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1238. {
  1239.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1240.         u32 mul, clock;
  1241.  
  1242.         if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
  1243.                 mul = 128;
  1244.         else
  1245.                 mul = 16;
  1246.  
  1247.         clock = MHz(24);
  1248.  
  1249.         return clock / (pwm_freq_hz * mul);
  1250. }
  1251.  
  1252. /*
  1253.  * LPT: This value represents the period of the PWM stream in clock periods
  1254.  * multiplied by 128 (default increment) or 16 (alternate increment, selected in
  1255.  * LPT SOUTH_CHICKEN2 register bit 5).
  1256.  */
  1257. static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1258. {
  1259.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1260.         u32 mul, clock;
  1261.  
  1262.         if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
  1263.                 mul = 16;
  1264.         else
  1265.                 mul = 128;
  1266.  
  1267.         if (HAS_PCH_LPT_H(dev_priv))
  1268.                 clock = MHz(135); /* LPT:H */
  1269.         else
  1270.                 clock = MHz(24); /* LPT:LP */
  1271.  
  1272.         return clock / (pwm_freq_hz * mul);
  1273. }
  1274.  
  1275. /*
  1276.  * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
  1277.  * display raw clocks multiplied by 128.
  1278.  */
  1279. static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1280. {
  1281.         struct drm_device *dev = connector->base.dev;
  1282.         int clock = MHz(intel_pch_rawclk(dev));
  1283.  
  1284.         return clock / (pwm_freq_hz * 128);
  1285. }
  1286.  
  1287. /*
  1288.  * Gen2: This field determines the number of time base events (display core
  1289.  * clock frequency/32) in total for a complete cycle of modulated backlight
  1290.  * control.
  1291.  *
  1292.  * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
  1293.  * divided by 32.
  1294.  */
  1295. static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1296. {
  1297.         struct drm_device *dev = connector->base.dev;
  1298.         struct drm_i915_private *dev_priv = dev->dev_private;
  1299.         int clock;
  1300.  
  1301.         if (IS_PINEVIEW(dev))
  1302.                 clock = MHz(intel_hrawclk(dev));
  1303.         else
  1304.                 clock = 1000 * dev_priv->cdclk_freq;
  1305.  
  1306.         return clock / (pwm_freq_hz * 32);
  1307. }
  1308.  
  1309. /*
  1310.  * Gen4: This value represents the period of the PWM stream in display core
  1311.  * clocks ([DevCTG] HRAW clocks) multiplied by 128.
  1312.  *
  1313.  */
  1314. static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1315. {
  1316.         struct drm_device *dev = connector->base.dev;
  1317.         struct drm_i915_private *dev_priv = dev->dev_private;
  1318.         int clock;
  1319.  
  1320.         if (IS_G4X(dev_priv))
  1321.                 clock = MHz(intel_hrawclk(dev));
  1322.         else
  1323.                 clock = 1000 * dev_priv->cdclk_freq;
  1324.  
  1325.         return clock / (pwm_freq_hz * 128);
  1326. }
  1327.  
  1328. /*
  1329.  * VLV: This value represents the period of the PWM stream in display core
  1330.  * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
  1331.  * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
  1332.  */
  1333. static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1334. {
  1335.         struct drm_device *dev = connector->base.dev;
  1336.         struct drm_i915_private *dev_priv = dev->dev_private;
  1337.         int clock;
  1338.  
  1339.         if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
  1340.                 if (IS_CHERRYVIEW(dev))
  1341.                         return KHz(19200) / (pwm_freq_hz * 16);
  1342.                 else
  1343.                         return MHz(25) / (pwm_freq_hz * 16);
  1344.         } else {
  1345.                 clock = intel_hrawclk(dev);
  1346.                 return MHz(clock) / (pwm_freq_hz * 128);
  1347.         }
  1348. }
  1349.  
  1350. static u32 get_backlight_max_vbt(struct intel_connector *connector)
  1351. {
  1352.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1353.         struct intel_panel *panel = &connector->panel;
  1354.         u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
  1355.         u32 pwm;
  1356.  
  1357.         if (!panel->backlight.hz_to_pwm) {
  1358.                 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
  1359.                 return 0;
  1360.         }
  1361.  
  1362.         if (pwm_freq_hz) {
  1363.                 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
  1364.                               pwm_freq_hz);
  1365.         } else {
  1366.                 pwm_freq_hz = 200;
  1367.                 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
  1368.                               pwm_freq_hz);
  1369.         }
  1370.  
  1371.         pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
  1372.         if (!pwm) {
  1373.                 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
  1374.                 return 0;
  1375.         }
  1376.  
  1377.         return pwm;
  1378. }
  1379.  
  1380. /*
  1381.  * Note: The setup hooks can't assume pipe is set!
  1382.  */
  1383. static u32 get_backlight_min_vbt(struct intel_connector *connector)
  1384. {
  1385.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1386.         struct intel_panel *panel = &connector->panel;
  1387.         int min;
  1388.  
  1389.         WARN_ON(panel->backlight.max == 0);
  1390.  
  1391.         /*
  1392.          * XXX: If the vbt value is 255, it makes min equal to max, which leads
  1393.          * to problems. There are such machines out there. Either our
  1394.          * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
  1395.          * against this by letting the minimum be at most (arbitrarily chosen)
  1396.          * 25% of the max.
  1397.          */
  1398.         min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
  1399.         if (min != dev_priv->vbt.backlight.min_brightness) {
  1400.                 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
  1401.                               dev_priv->vbt.backlight.min_brightness, min);
  1402.         }
  1403.  
  1404.         /* vbt value is a coefficient in range [0..255] */
  1405.         return scale(min, 0, 255, 0, panel->backlight.max);
  1406. }
  1407.  
  1408. static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1409. {
  1410.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1411.         struct intel_panel *panel = &connector->panel;
  1412.         u32 pch_ctl1, pch_ctl2, val;
  1413.  
  1414.         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1415.         panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1416.  
  1417.         pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1418.         panel->backlight.max = pch_ctl2 >> 16;
  1419.  
  1420.         if (!panel->backlight.max)
  1421.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1422.  
  1423.         if (!panel->backlight.max)
  1424.                 return -ENODEV;
  1425.  
  1426.         panel->backlight.min = get_backlight_min_vbt(connector);
  1427.  
  1428.         val = lpt_get_backlight(connector);
  1429.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1430.  
  1431.         panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
  1432.                 panel->backlight.level != 0;
  1433.  
  1434.         return 0;
  1435. }
  1436.  
  1437. static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1438. {
  1439.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1440.         struct intel_panel *panel = &connector->panel;
  1441.         u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  1442.  
  1443.         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1444.         panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1445.  
  1446.         pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1447.         panel->backlight.max = pch_ctl2 >> 16;
  1448.  
  1449.         if (!panel->backlight.max)
  1450.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1451.  
  1452.         if (!panel->backlight.max)
  1453.                 return -ENODEV;
  1454.  
  1455.         panel->backlight.min = get_backlight_min_vbt(connector);
  1456.  
  1457.         val = pch_get_backlight(connector);
  1458.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1459.  
  1460.         cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  1461.         panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  1462.                 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
  1463.  
  1464.         return 0;
  1465. }
  1466.  
  1467. static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1468. {
  1469.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1470.         struct intel_panel *panel = &connector->panel;
  1471.         u32 ctl, val;
  1472.  
  1473.         ctl = I915_READ(BLC_PWM_CTL);
  1474.  
  1475.         if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
  1476.                 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  1477.  
  1478.         if (IS_PINEVIEW(dev_priv))
  1479.                 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  1480.  
  1481.         panel->backlight.max = ctl >> 17;
  1482.  
  1483.         if (!panel->backlight.max) {
  1484.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1485.                 panel->backlight.max >>= 1;
  1486.         }
  1487.  
  1488.         if (!panel->backlight.max)
  1489.                 return -ENODEV;
  1490.  
  1491.         if (panel->backlight.combination_mode)
  1492.                 panel->backlight.max *= 0xff;
  1493.  
  1494.         panel->backlight.min = get_backlight_min_vbt(connector);
  1495.  
  1496.         val = i9xx_get_backlight(connector);
  1497.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1498.  
  1499.         panel->backlight.enabled = panel->backlight.level != 0;
  1500.  
  1501.         return 0;
  1502. }
  1503.  
  1504. static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1505. {
  1506.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1507.         struct intel_panel *panel = &connector->panel;
  1508.         u32 ctl, ctl2, val;
  1509.  
  1510.         ctl2 = I915_READ(BLC_PWM_CTL2);
  1511.         panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  1512.         panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1513.  
  1514.         ctl = I915_READ(BLC_PWM_CTL);
  1515.         panel->backlight.max = ctl >> 16;
  1516.  
  1517.         if (!panel->backlight.max)
  1518.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1519.  
  1520.         if (!panel->backlight.max)
  1521.                 return -ENODEV;
  1522.  
  1523.         if (panel->backlight.combination_mode)
  1524.                 panel->backlight.max *= 0xff;
  1525.  
  1526.         panel->backlight.min = get_backlight_min_vbt(connector);
  1527.  
  1528.         val = i9xx_get_backlight(connector);
  1529.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1530.  
  1531.         panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  1532.                 panel->backlight.level != 0;
  1533.  
  1534.         return 0;
  1535. }
  1536.  
  1537. static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
  1538. {
  1539.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1540.         struct intel_panel *panel = &connector->panel;
  1541.         u32 ctl, ctl2, val;
  1542.  
  1543.         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  1544.                 return -ENODEV;
  1545.  
  1546.         ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  1547.         panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1548.  
  1549.         ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
  1550.         panel->backlight.max = ctl >> 16;
  1551.  
  1552.         if (!panel->backlight.max)
  1553.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1554.  
  1555.         if (!panel->backlight.max)
  1556.                 return -ENODEV;
  1557.  
  1558.         panel->backlight.min = get_backlight_min_vbt(connector);
  1559.  
  1560.         val = _vlv_get_backlight(dev_priv, pipe);
  1561.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1562.  
  1563.         panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
  1564.                 panel->backlight.level != 0;
  1565.  
  1566.         return 0;
  1567. }
  1568.  
  1569. static int
  1570. bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1571. {
  1572.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1573.         struct intel_panel *panel = &connector->panel;
  1574.         u32 pwm_ctl, val;
  1575.  
  1576.         /*
  1577.          * For BXT hard coding the Backlight controller to 0.
  1578.          * TODO : Read the controller value from VBT and generalize
  1579.          */
  1580.         panel->backlight.controller = 0;
  1581.  
  1582.         pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1583.  
  1584.         /* Keeping the check if controller 1 is to be programmed.
  1585.          * This will come into affect once the VBT parsing
  1586.          * is fixed for controller selection, and controller 1 is used
  1587.          * for a prticular display configuration.
  1588.          */
  1589.         if (panel->backlight.controller == 1) {
  1590.                 val = I915_READ(UTIL_PIN_CTL);
  1591.                 panel->backlight.util_pin_active_low =
  1592.                                         val & UTIL_PIN_POLARITY;
  1593.         }
  1594.  
  1595.         panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1596.         panel->backlight.max =
  1597.                 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1598.  
  1599.         if (!panel->backlight.max)
  1600.                 panel->backlight.max = get_backlight_max_vbt(connector);
  1601.  
  1602.         if (!panel->backlight.max)
  1603.                 return -ENODEV;
  1604.  
  1605.         val = bxt_get_backlight(connector);
  1606.         panel->backlight.level = intel_panel_compute_brightness(connector, val);
  1607.  
  1608.         panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
  1609.                 panel->backlight.level != 0;
  1610.  
  1611.         return 0;
  1612. }
  1613.  
  1614. static int pwm_setup_backlight(struct intel_connector *connector,
  1615.                                enum pipe pipe)
  1616. {
  1617.         struct drm_device *dev = connector->base.dev;
  1618.         struct intel_panel *panel = &connector->panel;
  1619.         int retval;
  1620.  
  1621.         /* Get the PWM chip for backlight control */
  1622.         panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
  1623.         if (IS_ERR(panel->backlight.pwm)) {
  1624.                 DRM_ERROR("Failed to own the pwm chip\n");
  1625.                 panel->backlight.pwm = NULL;
  1626.                 return -ENODEV;
  1627.         }
  1628.  
  1629.         retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
  1630.                             CRC_PMIC_PWM_PERIOD_NS);
  1631.         if (retval < 0) {
  1632.                 DRM_ERROR("Failed to configure the pwm chip\n");
  1633.                 pwm_put(panel->backlight.pwm);
  1634.                 panel->backlight.pwm = NULL;
  1635.                 return retval;
  1636.         }
  1637.  
  1638.         panel->backlight.min = 0; /* 0% */
  1639.         panel->backlight.max = 100; /* 100% */
  1640.         panel->backlight.level = DIV_ROUND_UP(
  1641.                                  pwm_get_duty_cycle(panel->backlight.pwm) * 100,
  1642.                                  CRC_PMIC_PWM_PERIOD_NS);
  1643.         panel->backlight.enabled = panel->backlight.level != 0;
  1644.  
  1645.         return 0;
  1646. }
  1647.  
  1648. int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
  1649. {
  1650.         struct drm_i915_private *dev_priv = to_i915(connector->dev);
  1651.         struct intel_connector *intel_connector = to_intel_connector(connector);
  1652.         struct intel_panel *panel = &intel_connector->panel;
  1653.         int ret;
  1654.  
  1655.         if (!dev_priv->vbt.backlight.present) {
  1656.                 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  1657.                         DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  1658.                 } else {
  1659.                         DRM_DEBUG_KMS("no backlight present per VBT\n");
  1660.                         return 0;
  1661.                 }
  1662.         }
  1663.  
  1664.         /* ensure intel_panel has been initialized first */
  1665.         if (WARN_ON(!panel->backlight.setup))
  1666.                 return -ENODEV;
  1667.  
  1668.         /* set level and max in panel struct */
  1669.         mutex_lock(&dev_priv->backlight_lock);
  1670.         ret = panel->backlight.setup(intel_connector, pipe);
  1671.         mutex_unlock(&dev_priv->backlight_lock);
  1672.  
  1673.         if (ret) {
  1674.                 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  1675.                               connector->name);
  1676.                 return ret;
  1677.         }
  1678.  
  1679.         panel->backlight.present = true;
  1680.  
  1681.         DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
  1682.                       connector->name,
  1683.                       panel->backlight.enabled ? "enabled" : "disabled",
  1684.                       panel->backlight.level, panel->backlight.max);
  1685.  
  1686.         return 0;
  1687. }
  1688.  
  1689. void intel_panel_destroy_backlight(struct drm_connector *connector)
  1690. {
  1691.         struct intel_connector *intel_connector = to_intel_connector(connector);
  1692.         struct intel_panel *panel = &intel_connector->panel;
  1693.  
  1694.         /* dispose of the pwm */
  1695.         if (panel->backlight.pwm)
  1696.                 pwm_put(panel->backlight.pwm);
  1697.  
  1698.         panel->backlight.present = false;
  1699. }
  1700.  
  1701. /* Set up chip specific backlight functions */
  1702. static void
  1703. intel_panel_init_backlight_funcs(struct intel_panel *panel)
  1704. {
  1705.         struct intel_connector *connector =
  1706.                 container_of(panel, struct intel_connector, panel);
  1707.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1708.  
  1709.         if (IS_BROXTON(dev_priv)) {
  1710.                 panel->backlight.setup = bxt_setup_backlight;
  1711.                 panel->backlight.enable = bxt_enable_backlight;
  1712.                 panel->backlight.disable = bxt_disable_backlight;
  1713.                 panel->backlight.set = bxt_set_backlight;
  1714.                 panel->backlight.get = bxt_get_backlight;
  1715.                 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
  1716.         } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv)) {
  1717.                 panel->backlight.setup = lpt_setup_backlight;
  1718.                 panel->backlight.enable = lpt_enable_backlight;
  1719.                 panel->backlight.disable = lpt_disable_backlight;
  1720.                 panel->backlight.set = lpt_set_backlight;
  1721.                 panel->backlight.get = lpt_get_backlight;
  1722.                 if (HAS_PCH_LPT(dev_priv))
  1723.                         panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
  1724.                 else
  1725.                         panel->backlight.hz_to_pwm = spt_hz_to_pwm;
  1726.         } else if (HAS_PCH_SPLIT(dev_priv)) {
  1727.                 panel->backlight.setup = pch_setup_backlight;
  1728.                 panel->backlight.enable = pch_enable_backlight;
  1729.                 panel->backlight.disable = pch_disable_backlight;
  1730.                 panel->backlight.set = pch_set_backlight;
  1731.                 panel->backlight.get = pch_get_backlight;
  1732.                 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
  1733.         } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
  1734.                 if (dev_priv->vbt.has_mipi) {
  1735.                         panel->backlight.setup = pwm_setup_backlight;
  1736.                         panel->backlight.enable = pwm_enable_backlight;
  1737.                         panel->backlight.disable = pwm_disable_backlight;
  1738.                         panel->backlight.set = pwm_set_backlight;
  1739.                         panel->backlight.get = pwm_get_backlight;
  1740.                 } else {
  1741.                         panel->backlight.setup = vlv_setup_backlight;
  1742.                         panel->backlight.enable = vlv_enable_backlight;
  1743.                         panel->backlight.disable = vlv_disable_backlight;
  1744.                         panel->backlight.set = vlv_set_backlight;
  1745.                         panel->backlight.get = vlv_get_backlight;
  1746.                         panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
  1747.                 }
  1748.         } else if (IS_GEN4(dev_priv)) {
  1749.                 panel->backlight.setup = i965_setup_backlight;
  1750.                 panel->backlight.enable = i965_enable_backlight;
  1751.                 panel->backlight.disable = i965_disable_backlight;
  1752.                 panel->backlight.set = i9xx_set_backlight;
  1753.                 panel->backlight.get = i9xx_get_backlight;
  1754.                 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
  1755.         } else {
  1756.                 panel->backlight.setup = i9xx_setup_backlight;
  1757.                 panel->backlight.enable = i9xx_enable_backlight;
  1758.                 panel->backlight.disable = i9xx_disable_backlight;
  1759.                 panel->backlight.set = i9xx_set_backlight;
  1760.                 panel->backlight.get = i9xx_get_backlight;
  1761.                 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
  1762.         }
  1763. }
  1764.  
  1765. int intel_panel_init(struct intel_panel *panel,
  1766.                      struct drm_display_mode *fixed_mode,
  1767.                      struct drm_display_mode *downclock_mode)
  1768. {
  1769.         intel_panel_init_backlight_funcs(panel);
  1770.  
  1771.         panel->fixed_mode = fixed_mode;
  1772.         panel->downclock_mode = downclock_mode;
  1773.  
  1774.         return 0;
  1775. }
  1776.  
  1777. void intel_panel_fini(struct intel_panel *panel)
  1778. {
  1779.         struct intel_connector *intel_connector =
  1780.                 container_of(panel, struct intel_connector, panel);
  1781.  
  1782.         if (panel->fixed_mode)
  1783.                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1784.  
  1785.         if (panel->downclock_mode)
  1786.                 drm_mode_destroy(intel_connector->base.dev,
  1787.                                 panel->downclock_mode);
  1788. }
  1789.  
  1790. void intel_backlight_register(struct drm_device *dev)
  1791. {
  1792.         struct intel_connector *connector;
  1793.  
  1794.         for_each_intel_connector(dev, connector)
  1795.                 intel_backlight_device_register(connector);
  1796. }
  1797.  
  1798. void intel_backlight_unregister(struct drm_device *dev)
  1799. {
  1800.         struct intel_connector *connector;
  1801.  
  1802.         for_each_intel_connector(dev, connector)
  1803.                 intel_backlight_device_unregister(connector);
  1804. }
  1805.