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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. //#include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_crtc.h>
  36. #include <drm/drm_edid.h>
  37. #include "intel_drv.h"
  38. #include <drm/i915_drm.h>
  39. #include "i915_drv.h"
  40. //#include <linux/acpi.h>
  41.  
  42. /* Private structure for the integrated LVDS support */
  43. struct intel_lvds_connector {
  44.         struct intel_connector base;
  45.  
  46. //      struct notifier_block lid_notifier;
  47. };
  48.  
  49. struct intel_lvds_encoder {
  50.         struct intel_encoder base;
  51.  
  52.         bool is_dual_link;
  53.         u32 reg;
  54.  
  55.         struct intel_lvds_connector *attached_connector;
  56. };
  57.  
  58. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  59. {
  60.         return container_of(encoder, struct intel_lvds_encoder, base.base);
  61. }
  62.  
  63. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  64. {
  65.         return container_of(connector, struct intel_lvds_connector, base.base);
  66. }
  67.  
  68. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  69.                                     enum pipe *pipe)
  70. {
  71.         struct drm_device *dev = encoder->base.dev;
  72.         struct drm_i915_private *dev_priv = dev->dev_private;
  73.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  74.         u32 tmp;
  75.  
  76.         tmp = I915_READ(lvds_encoder->reg);
  77.  
  78.         if (!(tmp & LVDS_PORT_EN))
  79.                 return false;
  80.  
  81.         if (HAS_PCH_CPT(dev))
  82.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  83.         else
  84.                 *pipe = PORT_TO_PIPE(tmp);
  85.  
  86.         return true;
  87. }
  88.  
  89. static void intel_lvds_get_config(struct intel_encoder *encoder,
  90.                                   struct intel_crtc_config *pipe_config)
  91. {
  92.         struct drm_device *dev = encoder->base.dev;
  93.         struct drm_i915_private *dev_priv = dev->dev_private;
  94.         u32 lvds_reg, tmp, flags = 0;
  95.         int dotclock;
  96.  
  97.         if (HAS_PCH_SPLIT(dev))
  98.                 lvds_reg = PCH_LVDS;
  99.         else
  100.                 lvds_reg = LVDS;
  101.  
  102.         tmp = I915_READ(lvds_reg);
  103.         if (tmp & LVDS_HSYNC_POLARITY)
  104.                 flags |= DRM_MODE_FLAG_NHSYNC;
  105.         else
  106.                 flags |= DRM_MODE_FLAG_PHSYNC;
  107.         if (tmp & LVDS_VSYNC_POLARITY)
  108.                 flags |= DRM_MODE_FLAG_NVSYNC;
  109.         else
  110.                 flags |= DRM_MODE_FLAG_PVSYNC;
  111.  
  112.         pipe_config->adjusted_mode.flags |= flags;
  113.  
  114.         /* gen2/3 store dither state in pfit control, needs to match */
  115.         if (INTEL_INFO(dev)->gen < 4) {
  116.                 tmp = I915_READ(PFIT_CONTROL);
  117.  
  118.                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  119.         }
  120.  
  121.         dotclock = pipe_config->port_clock;
  122.  
  123.         if (HAS_PCH_SPLIT(dev_priv->dev))
  124.                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
  125.  
  126.         pipe_config->adjusted_mode.crtc_clock = dotclock;
  127. }
  128.  
  129. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  130.  * This is an exception to the general rule that mode_set doesn't turn
  131.  * things on.
  132.  */
  133. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  134. {
  135.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  136.         struct drm_device *dev = encoder->base.dev;
  137.         struct drm_i915_private *dev_priv = dev->dev_private;
  138.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  139.         const struct drm_display_mode *adjusted_mode =
  140.                 &crtc->config.adjusted_mode;
  141.         int pipe = crtc->pipe;
  142.         u32 temp;
  143.  
  144.         if (HAS_PCH_SPLIT(dev)) {
  145.                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
  146.                 assert_shared_dpll_disabled(dev_priv,
  147.                                             intel_crtc_to_shared_dpll(crtc));
  148.         } else {
  149.                 assert_pll_disabled(dev_priv, pipe);
  150.         }
  151.  
  152.         temp = I915_READ(lvds_encoder->reg);
  153.         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  154.  
  155.         if (HAS_PCH_CPT(dev)) {
  156.                 temp &= ~PORT_TRANS_SEL_MASK;
  157.                 temp |= PORT_TRANS_SEL_CPT(pipe);
  158.         } else {
  159.                 if (pipe == 1) {
  160.                         temp |= LVDS_PIPEB_SELECT;
  161.                 } else {
  162.                         temp &= ~LVDS_PIPEB_SELECT;
  163.                 }
  164.         }
  165.  
  166.         /* set the corresponsding LVDS_BORDER bit */
  167.         temp &= ~LVDS_BORDER_ENABLE;
  168.         temp |= crtc->config.gmch_pfit.lvds_border_bits;
  169.         /* Set the B0-B3 data pairs corresponding to whether we're going to
  170.          * set the DPLLs for dual-channel mode or not.
  171.          */
  172.         if (lvds_encoder->is_dual_link)
  173.                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  174.         else
  175.                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  176.  
  177.         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  178.          * appropriately here, but we need to look more thoroughly into how
  179.          * panels behave in the two modes.
  180.          */
  181.  
  182.         /* Set the dithering flag on LVDS as needed, note that there is no
  183.          * special lvds dither control bit on pch-split platforms, dithering is
  184.          * only controlled through the PIPECONF reg. */
  185.         if (INTEL_INFO(dev)->gen == 4) {
  186.                 /* Bspec wording suggests that LVDS port dithering only exists
  187.                  * for 18bpp panels. */
  188.                 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  189.                         temp |= LVDS_ENABLE_DITHER;
  190.                 else
  191.                         temp &= ~LVDS_ENABLE_DITHER;
  192.         }
  193.         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  194.         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  195.                 temp |= LVDS_HSYNC_POLARITY;
  196.         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  197.                 temp |= LVDS_VSYNC_POLARITY;
  198.  
  199.         I915_WRITE(lvds_encoder->reg, temp);
  200. }
  201.  
  202. /**
  203.  * Sets the power state for the panel.
  204.  */
  205. static void intel_enable_lvds(struct intel_encoder *encoder)
  206. {
  207.         struct drm_device *dev = encoder->base.dev;
  208.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  209.         struct intel_connector *intel_connector =
  210.                 &lvds_encoder->attached_connector->base;
  211.         struct drm_i915_private *dev_priv = dev->dev_private;
  212.         u32 ctl_reg, stat_reg;
  213.  
  214.         if (HAS_PCH_SPLIT(dev)) {
  215.                 ctl_reg = PCH_PP_CONTROL;
  216.                 stat_reg = PCH_PP_STATUS;
  217.         } else {
  218.                 ctl_reg = PP_CONTROL;
  219.                 stat_reg = PP_STATUS;
  220.         }
  221.  
  222.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  223.  
  224.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  225.         POSTING_READ(lvds_encoder->reg);
  226.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  227.                 DRM_ERROR("timed out waiting for panel to power on\n");
  228.  
  229.         intel_panel_enable_backlight(intel_connector);
  230. }
  231.  
  232. static void intel_disable_lvds(struct intel_encoder *encoder)
  233. {
  234.         struct drm_device *dev = encoder->base.dev;
  235.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  236.         struct intel_connector *intel_connector =
  237.                 &lvds_encoder->attached_connector->base;
  238.         struct drm_i915_private *dev_priv = dev->dev_private;
  239.         u32 ctl_reg, stat_reg;
  240.  
  241.         if (HAS_PCH_SPLIT(dev)) {
  242.                 ctl_reg = PCH_PP_CONTROL;
  243.                 stat_reg = PCH_PP_STATUS;
  244.         } else {
  245.                 ctl_reg = PP_CONTROL;
  246.                 stat_reg = PP_STATUS;
  247.         }
  248.  
  249.         intel_panel_disable_backlight(intel_connector);
  250.  
  251.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  252.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  253.                 DRM_ERROR("timed out waiting for panel to power off\n");
  254.  
  255.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  256.         POSTING_READ(lvds_encoder->reg);
  257. }
  258.  
  259. static enum drm_mode_status
  260. intel_lvds_mode_valid(struct drm_connector *connector,
  261.                                  struct drm_display_mode *mode)
  262. {
  263.         struct intel_connector *intel_connector = to_intel_connector(connector);
  264.         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  265.  
  266.         if (mode->hdisplay > fixed_mode->hdisplay)
  267.                 return MODE_PANEL;
  268.         if (mode->vdisplay > fixed_mode->vdisplay)
  269.                 return MODE_PANEL;
  270.  
  271.         return MODE_OK;
  272. }
  273.  
  274. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  275.                                       struct intel_crtc_config *pipe_config)
  276. {
  277.         struct drm_device *dev = intel_encoder->base.dev;
  278.         struct drm_i915_private *dev_priv = dev->dev_private;
  279.         struct intel_lvds_encoder *lvds_encoder =
  280.                 to_lvds_encoder(&intel_encoder->base);
  281.         struct intel_connector *intel_connector =
  282.                 &lvds_encoder->attached_connector->base;
  283.         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  284.         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  285.         unsigned int lvds_bpp;
  286.  
  287.         /* Should never happen!! */
  288.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  289.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  290.                 return false;
  291.         }
  292.  
  293.         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  294.             LVDS_A3_POWER_UP)
  295.                 lvds_bpp = 8*3;
  296.         else
  297.                 lvds_bpp = 6*3;
  298.  
  299.         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  300.                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  301.                               pipe_config->pipe_bpp, lvds_bpp);
  302.                 pipe_config->pipe_bpp = lvds_bpp;
  303.         }
  304.  
  305.         /*
  306.          * We have timings from the BIOS for the panel, put them in
  307.          * to the adjusted mode.  The CRTC will be set up for this mode,
  308.          * with the panel scaling set up to source from the H/VDisplay
  309.          * of the original mode.
  310.          */
  311.         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  312.                                adjusted_mode);
  313.  
  314.         if (HAS_PCH_SPLIT(dev)) {
  315.                 pipe_config->has_pch_encoder = true;
  316.  
  317.                 intel_pch_panel_fitting(intel_crtc, pipe_config,
  318.                                         intel_connector->panel.fitting_mode);
  319.         } else {
  320.                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
  321.                                          intel_connector->panel.fitting_mode);
  322.  
  323.         }
  324.  
  325.         /*
  326.          * XXX: It would be nice to support lower refresh rates on the
  327.          * panels to reduce power consumption, and perhaps match the
  328.          * user's requested refresh rate.
  329.          */
  330.  
  331.         return true;
  332. }
  333.  
  334. static void intel_lvds_mode_set(struct intel_encoder *encoder)
  335. {
  336.         /*
  337.          * We don't do anything here, the LVDS port is fully set up in the pre
  338.          * enable hook - the ordering constraints for enabling the lvds port vs.
  339.          * enabling the display pll are too strict.
  340.          */
  341. }
  342.  
  343. /**
  344.  * Detect the LVDS connection.
  345.  *
  346.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  347.  * connected and closed means disconnected.  We also send hotplug events as
  348.  * needed, using lid status notification from the input layer.
  349.  */
  350. static enum drm_connector_status
  351. intel_lvds_detect(struct drm_connector *connector, bool force)
  352. {
  353.         struct drm_device *dev = connector->dev;
  354.         enum drm_connector_status status;
  355.  
  356.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  357.                       connector->base.id, drm_get_connector_name(connector));
  358.  
  359.         status = intel_panel_detect(dev);
  360.         if (status != connector_status_unknown)
  361.                 return status;
  362.  
  363.         return connector_status_connected;
  364. }
  365.  
  366. /**
  367.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  368.  */
  369. static int intel_lvds_get_modes(struct drm_connector *connector)
  370. {
  371.         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  372.         struct drm_device *dev = connector->dev;
  373.         struct drm_display_mode *mode;
  374.  
  375.         /* use cached edid if we have one */
  376.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  377.                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
  378.  
  379.         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  380.         if (mode == NULL)
  381.                 return 0;
  382.  
  383.         drm_mode_probed_add(connector, mode);
  384.         return 1;
  385. }
  386.  
  387. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  388. {
  389.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  390.         return 1;
  391. }
  392.  
  393. /* The GPU hangs up on these systems if modeset is performed on LID open */
  394. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  395.         {
  396.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  397.                 .ident = "Toshiba Tecra A11",
  398.                 .matches = {
  399.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  400.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  401.                 },
  402.         },
  403.  
  404.         { }     /* terminating entry */
  405. };
  406.  
  407. #if 0
  408. /*
  409.  * Lid events. Note the use of 'modeset':
  410.  *  - we set it to MODESET_ON_LID_OPEN on lid close,
  411.  *    and set it to MODESET_DONE on open
  412.  *  - we use it as a "only once" bit (ie we ignore
  413.  *    duplicate events where it was already properly set)
  414.  *  - the suspend/resume paths will set it to
  415.  *    MODESET_SUSPENDED and ignore the lid open event,
  416.  *    because they restore the mode ("lid open").
  417.  */
  418. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  419.                             void *unused)
  420. {
  421.         struct intel_lvds_connector *lvds_connector =
  422.                 container_of(nb, struct intel_lvds_connector, lid_notifier);
  423.         struct drm_connector *connector = &lvds_connector->base.base;
  424.         struct drm_device *dev = connector->dev;
  425.         struct drm_i915_private *dev_priv = dev->dev_private;
  426.  
  427.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  428.                 return NOTIFY_OK;
  429.  
  430.         mutex_lock(&dev_priv->modeset_restore_lock);
  431.         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  432.                 goto exit;
  433.         /*
  434.          * check and update the status of LVDS connector after receiving
  435.          * the LID nofication event.
  436.          */
  437.         connector->status = connector->funcs->detect(connector, false);
  438.  
  439.         /* Don't force modeset on machines where it causes a GPU lockup */
  440.         if (dmi_check_system(intel_no_modeset_on_lid))
  441.                 goto exit;
  442.         if (!acpi_lid_open()) {
  443.                 /* do modeset on next lid open event */
  444.                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  445.                 goto exit;
  446.         }
  447.  
  448.         if (dev_priv->modeset_restore == MODESET_DONE)
  449.                 goto exit;
  450.  
  451.         /*
  452.          * Some old platform's BIOS love to wreak havoc while the lid is closed.
  453.          * We try to detect this here and undo any damage. The split for PCH
  454.          * platforms is rather conservative and a bit arbitrary expect that on
  455.          * those platforms VGA disabling requires actual legacy VGA I/O access,
  456.          * and as part of the cleanup in the hw state restore we also redisable
  457.          * the vga plane.
  458.          */
  459.         if (!HAS_PCH_SPLIT(dev)) {
  460.         drm_modeset_lock_all(dev);
  461.         intel_modeset_setup_hw_state(dev, true);
  462.         drm_modeset_unlock_all(dev);
  463.         }
  464.  
  465.         dev_priv->modeset_restore = MODESET_DONE;
  466.  
  467. exit:
  468.         mutex_unlock(&dev_priv->modeset_restore_lock);
  469.         return NOTIFY_OK;
  470. }
  471. #endif
  472.  
  473. /**
  474.  * intel_lvds_destroy - unregister and free LVDS structures
  475.  * @connector: connector to free
  476.  *
  477.  * Unregister the DDC bus for this connector then free the driver private
  478.  * structure.
  479.  */
  480. static void intel_lvds_destroy(struct drm_connector *connector)
  481. {
  482.         struct intel_lvds_connector *lvds_connector =
  483.                 to_lvds_connector(connector);
  484.  
  485.  
  486.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  487.                 kfree(lvds_connector->base.edid);
  488.  
  489.         intel_panel_fini(&lvds_connector->base.panel);
  490.  
  491.         drm_connector_cleanup(connector);
  492.         kfree(connector);
  493. }
  494.  
  495. static int intel_lvds_set_property(struct drm_connector *connector,
  496.                                    struct drm_property *property,
  497.                                    uint64_t value)
  498. {
  499.         struct intel_connector *intel_connector = to_intel_connector(connector);
  500.         struct drm_device *dev = connector->dev;
  501.  
  502.         if (property == dev->mode_config.scaling_mode_property) {
  503.                 struct drm_crtc *crtc;
  504.  
  505.                 if (value == DRM_MODE_SCALE_NONE) {
  506.                         DRM_DEBUG_KMS("no scaling not supported\n");
  507.                         return -EINVAL;
  508.                 }
  509.  
  510.                 if (intel_connector->panel.fitting_mode == value) {
  511.                         /* the LVDS scaling property is not changed */
  512.                         return 0;
  513.                 }
  514.                 intel_connector->panel.fitting_mode = value;
  515.  
  516.                 crtc = intel_attached_encoder(connector)->base.crtc;
  517.                 if (crtc && crtc->enabled) {
  518.                         /*
  519.                          * If the CRTC is enabled, the display will be changed
  520.                          * according to the new panel fitting mode.
  521.                          */
  522.                         intel_crtc_restore_mode(crtc);
  523.                 }
  524.         }
  525.  
  526.         return 0;
  527. }
  528.  
  529. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  530.         .get_modes = intel_lvds_get_modes,
  531.         .mode_valid = intel_lvds_mode_valid,
  532.         .best_encoder = intel_best_encoder,
  533. };
  534.  
  535. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  536.         .dpms = intel_connector_dpms,
  537.         .detect = intel_lvds_detect,
  538.         .fill_modes = drm_helper_probe_single_connector_modes,
  539.         .set_property = intel_lvds_set_property,
  540.         .destroy = intel_lvds_destroy,
  541. };
  542.  
  543. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  544.         .destroy = intel_encoder_destroy,
  545. };
  546.  
  547. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  548. {
  549.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  550.         return 1;
  551. }
  552.  
  553. /* These systems claim to have LVDS, but really don't */
  554. static const struct dmi_system_id intel_no_lvds[] = {
  555.         {
  556.                 .callback = intel_no_lvds_dmi_callback,
  557.                 .ident = "Apple Mac Mini (Core series)",
  558.                 .matches = {
  559.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  560.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  561.                 },
  562.         },
  563.         {
  564.                 .callback = intel_no_lvds_dmi_callback,
  565.                 .ident = "Apple Mac Mini (Core 2 series)",
  566.                 .matches = {
  567.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  568.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  569.                 },
  570.         },
  571.         {
  572.                 .callback = intel_no_lvds_dmi_callback,
  573.                 .ident = "MSI IM-945GSE-A",
  574.                 .matches = {
  575.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  576.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  577.                 },
  578.         },
  579.         {
  580.                 .callback = intel_no_lvds_dmi_callback,
  581.                 .ident = "Dell Studio Hybrid",
  582.                 .matches = {
  583.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  584.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  585.                 },
  586.         },
  587.         {
  588.                 .callback = intel_no_lvds_dmi_callback,
  589.                 .ident = "Dell OptiPlex FX170",
  590.                 .matches = {
  591.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  592.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  593.                 },
  594.         },
  595.         {
  596.                 .callback = intel_no_lvds_dmi_callback,
  597.                 .ident = "AOpen Mini PC",
  598.                 .matches = {
  599.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  600.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  601.                 },
  602.         },
  603.         {
  604.                 .callback = intel_no_lvds_dmi_callback,
  605.                 .ident = "AOpen Mini PC MP915",
  606.                 .matches = {
  607.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  608.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  609.                 },
  610.         },
  611.         {
  612.                 .callback = intel_no_lvds_dmi_callback,
  613.                 .ident = "AOpen i915GMm-HFS",
  614.                 .matches = {
  615.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  616.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  617.                 },
  618.         },
  619.         {
  620.                 .callback = intel_no_lvds_dmi_callback,
  621.                 .ident = "AOpen i45GMx-I",
  622.                 .matches = {
  623.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  624.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  625.                 },
  626.         },
  627.         {
  628.                 .callback = intel_no_lvds_dmi_callback,
  629.                 .ident = "Aopen i945GTt-VFA",
  630.                 .matches = {
  631.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  632.                 },
  633.         },
  634.         {
  635.                 .callback = intel_no_lvds_dmi_callback,
  636.                 .ident = "Clientron U800",
  637.                 .matches = {
  638.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  639.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  640.                 },
  641.         },
  642.         {
  643.                 .callback = intel_no_lvds_dmi_callback,
  644.                 .ident = "Clientron E830",
  645.                 .matches = {
  646.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  647.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  648.                 },
  649.         },
  650.         {
  651.                 .callback = intel_no_lvds_dmi_callback,
  652.                 .ident = "Asus EeeBox PC EB1007",
  653.                 .matches = {
  654.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  655.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  656.                 },
  657.         },
  658.         {
  659.                 .callback = intel_no_lvds_dmi_callback,
  660.                 .ident = "Asus AT5NM10T-I",
  661.                 .matches = {
  662.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  663.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  664.                 },
  665.         },
  666.         {
  667.                 .callback = intel_no_lvds_dmi_callback,
  668.                 .ident = "Hewlett-Packard HP t5740",
  669.                 .matches = {
  670.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  671.                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  672.                 },
  673.         },
  674.         {
  675.                 .callback = intel_no_lvds_dmi_callback,
  676.                 .ident = "Hewlett-Packard t5745",
  677.                 .matches = {
  678.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  679.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  680.                 },
  681.         },
  682.         {
  683.                 .callback = intel_no_lvds_dmi_callback,
  684.                 .ident = "Hewlett-Packard st5747",
  685.                 .matches = {
  686.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  687.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  688.                 },
  689.         },
  690.         {
  691.                 .callback = intel_no_lvds_dmi_callback,
  692.                 .ident = "MSI Wind Box DC500",
  693.                 .matches = {
  694.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  695.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  696.                 },
  697.         },
  698.         {
  699.                 .callback = intel_no_lvds_dmi_callback,
  700.                 .ident = "Gigabyte GA-D525TUD",
  701.                 .matches = {
  702.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  703.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  704.                 },
  705.         },
  706.         {
  707.                 .callback = intel_no_lvds_dmi_callback,
  708.                 .ident = "Supermicro X7SPA-H",
  709.                 .matches = {
  710.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  711.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  712.                 },
  713.         },
  714.         {
  715.                 .callback = intel_no_lvds_dmi_callback,
  716.                 .ident = "Fujitsu Esprimo Q900",
  717.                 .matches = {
  718.                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  719.                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  720.                 },
  721.         },
  722.         {
  723.                 .callback = intel_no_lvds_dmi_callback,
  724.                 .ident = "Intel D410PT",
  725.                 .matches = {
  726.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  727.                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  728.                 },
  729.         },
  730.         {
  731.                 .callback = intel_no_lvds_dmi_callback,
  732.                 .ident = "Intel D425KT",
  733.                 .matches = {
  734.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  735.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  736.                 },
  737.         },
  738.         {
  739.                 .callback = intel_no_lvds_dmi_callback,
  740.                 .ident = "Intel D510MO",
  741.                 .matches = {
  742.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  743.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  744.                 },
  745.         },
  746.         {
  747.                 .callback = intel_no_lvds_dmi_callback,
  748.                 .ident = "Intel D525MW",
  749.                 .matches = {
  750.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  751.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  752.                 },
  753.         },
  754.  
  755.         { }     /* terminating entry */
  756. };
  757.  
  758. /*
  759.  * Enumerate the child dev array parsed from VBT to check whether
  760.  * the LVDS is present.
  761.  * If it is present, return 1.
  762.  * If it is not present, return false.
  763.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  764.  */
  765. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  766.                                    u8 *i2c_pin)
  767. {
  768.         struct drm_i915_private *dev_priv = dev->dev_private;
  769.         int i;
  770.  
  771.         if (!dev_priv->vbt.child_dev_num)
  772.                 return true;
  773.  
  774.         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  775.                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  776.                 struct old_child_dev_config *child = &uchild->old;
  777.  
  778.                 /* If the device type is not LFP, continue.
  779.                  * We have to check both the new identifiers as well as the
  780.                  * old for compatibility with some BIOSes.
  781.                  */
  782.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  783.                     child->device_type != DEVICE_TYPE_LFP)
  784.                         continue;
  785.  
  786.                 if (intel_gmbus_is_port_valid(child->i2c_pin))
  787.                     *i2c_pin = child->i2c_pin;
  788.  
  789.                 /* However, we cannot trust the BIOS writers to populate
  790.                  * the VBT correctly.  Since LVDS requires additional
  791.                  * information from AIM blocks, a non-zero addin offset is
  792.                  * a good indicator that the LVDS is actually present.
  793.                  */
  794.                 if (child->addin_offset)
  795.                         return true;
  796.  
  797.                 /* But even then some BIOS writers perform some black magic
  798.                  * and instantiate the device without reference to any
  799.                  * additional data.  Trust that if the VBT was written into
  800.                  * the OpRegion then they have validated the LVDS's existence.
  801.                  */
  802.                 if (dev_priv->opregion.vbt)
  803.                         return true;
  804.         }
  805.  
  806.         return false;
  807. }
  808.  
  809. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  810. {
  811.         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  812.         return 1;
  813. }
  814.  
  815. static const struct dmi_system_id intel_dual_link_lvds[] = {
  816.         {
  817.                 .callback = intel_dual_link_lvds_callback,
  818.                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  819.                 .matches = {
  820.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  821.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  822.                 },
  823.         },
  824.         { }     /* terminating entry */
  825. };
  826.  
  827. bool intel_is_dual_link_lvds(struct drm_device *dev)
  828. {
  829.         struct intel_encoder *encoder;
  830.         struct intel_lvds_encoder *lvds_encoder;
  831.  
  832.         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  833.                             base.head) {
  834.                 if (encoder->type == INTEL_OUTPUT_LVDS) {
  835.                         lvds_encoder = to_lvds_encoder(&encoder->base);
  836.  
  837.                         return lvds_encoder->is_dual_link;
  838.                 }
  839.         }
  840.  
  841.         return false;
  842. }
  843.  
  844. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  845. {
  846.         struct drm_device *dev = lvds_encoder->base.base.dev;
  847.         unsigned int val;
  848.         struct drm_i915_private *dev_priv = dev->dev_private;
  849.  
  850.         /* use the module option value if specified */
  851.         if (i915_lvds_channel_mode > 0)
  852.                 return i915_lvds_channel_mode == 2;
  853.  
  854. //      if (dmi_check_system(intel_dual_link_lvds))
  855. //              return true;
  856.  
  857.         /* BIOS should set the proper LVDS register value at boot, but
  858.          * in reality, it doesn't set the value when the lid is closed;
  859.          * we need to check "the value to be set" in VBT when LVDS
  860.          * register is uninitialized.
  861.          */
  862.         val = I915_READ(lvds_encoder->reg);
  863.         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  864.                 val = dev_priv->vbt.bios_lvds_val;
  865.  
  866.         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  867. }
  868.  
  869. static bool intel_lvds_supported(struct drm_device *dev)
  870. {
  871.         /* With the introduction of the PCH we gained a dedicated
  872.          * LVDS presence pin, use it. */
  873.         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  874.                 return true;
  875.  
  876.         /* Otherwise LVDS was only attached to mobile products,
  877.          * except for the inglorious 830gm */
  878.         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  879.                 return true;
  880.  
  881.         return false;
  882. }
  883.  
  884. /**
  885.  * intel_lvds_init - setup LVDS connectors on this device
  886.  * @dev: drm device
  887.  *
  888.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  889.  * modes we can display on the LVDS panel (if present).
  890.  */
  891. void intel_lvds_init(struct drm_device *dev)
  892. {
  893.         struct drm_i915_private *dev_priv = dev->dev_private;
  894.         struct intel_lvds_encoder *lvds_encoder;
  895.         struct intel_encoder *intel_encoder;
  896.         struct intel_lvds_connector *lvds_connector;
  897.         struct intel_connector *intel_connector;
  898.         struct drm_connector *connector;
  899.         struct drm_encoder *encoder;
  900.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  901.         struct drm_display_mode *fixed_mode = NULL;
  902.         struct edid *edid;
  903.         struct drm_crtc *crtc;
  904.         u32 lvds;
  905.         int pipe;
  906.         u8 pin;
  907.  
  908.         if (!intel_lvds_supported(dev))
  909.                 return;
  910.  
  911.         /* Skip init on machines we know falsely report LVDS */
  912. //   if (dmi_check_system(intel_no_lvds))
  913. //       return false;
  914.  
  915.         pin = GMBUS_PORT_PANEL;
  916.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  917.                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  918.                 return;
  919.         }
  920.  
  921.         if (HAS_PCH_SPLIT(dev)) {
  922.                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  923.                         return;
  924.                 if (dev_priv->vbt.edp_support) {
  925.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  926.                         return;
  927.                 }
  928.         }
  929.  
  930.         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  931.         if (!lvds_encoder)
  932.                 return;
  933.  
  934.         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  935.         if (!lvds_connector) {
  936.                 kfree(lvds_encoder);
  937.                 return;
  938.         }
  939.  
  940.         lvds_encoder->attached_connector = lvds_connector;
  941.  
  942.         intel_encoder = &lvds_encoder->base;
  943.         encoder = &intel_encoder->base;
  944.         intel_connector = &lvds_connector->base;
  945.         connector = &intel_connector->base;
  946.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  947.                            DRM_MODE_CONNECTOR_LVDS);
  948.  
  949.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  950.                          DRM_MODE_ENCODER_LVDS);
  951.  
  952.         intel_encoder->enable = intel_enable_lvds;
  953.         intel_encoder->pre_enable = intel_pre_enable_lvds;
  954.         intel_encoder->compute_config = intel_lvds_compute_config;
  955.         intel_encoder->mode_set = intel_lvds_mode_set;
  956.         intel_encoder->disable = intel_disable_lvds;
  957.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  958.         intel_encoder->get_config = intel_lvds_get_config;
  959.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  960.  
  961.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  962.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  963.  
  964.         intel_encoder->cloneable = false;
  965.         if (HAS_PCH_SPLIT(dev))
  966.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  967.         else if (IS_GEN4(dev))
  968.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  969.         else
  970.         intel_encoder->crtc_mask = (1 << 1);
  971.  
  972.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  973.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  974.         connector->interlace_allowed = false;
  975.         connector->doublescan_allowed = false;
  976.  
  977.         if (HAS_PCH_SPLIT(dev)) {
  978.                 lvds_encoder->reg = PCH_LVDS;
  979.         } else {
  980.                 lvds_encoder->reg = LVDS;
  981.         }
  982.  
  983.         /* create the scaling mode property */
  984.         drm_mode_create_scaling_mode_property(dev);
  985.         drm_object_attach_property(&connector->base,
  986.                                       dev->mode_config.scaling_mode_property,
  987.                                       DRM_MODE_SCALE_ASPECT);
  988.         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  989.         /*
  990.          * LVDS discovery:
  991.          * 1) check for EDID on DDC
  992.          * 2) check for VBT data
  993.          * 3) check to see if LVDS is already on
  994.          *    if none of the above, no panel
  995.          * 4) make sure lid is open
  996.          *    if closed, act like it's not there for now
  997.          */
  998.  
  999.         /*
  1000.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1001.          * preferred mode is the right one.
  1002.          */
  1003.         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1004.         if (edid) {
  1005.                 if (drm_add_edid_modes(connector, edid)) {
  1006.                         drm_mode_connector_update_edid_property(connector,
  1007.                                                                 edid);
  1008.                 } else {
  1009.                         kfree(edid);
  1010.                         edid = ERR_PTR(-EINVAL);
  1011.                 }
  1012.         } else {
  1013.                 edid = ERR_PTR(-ENOENT);
  1014.         }
  1015.         lvds_connector->base.edid = edid;
  1016.  
  1017.         if (IS_ERR_OR_NULL(edid)) {
  1018.                 /* Didn't get an EDID, so
  1019.                  * Set wide sync ranges so we get all modes
  1020.                  * handed to valid_mode for checking
  1021.                  */
  1022.                 connector->display_info.min_vfreq = 0;
  1023.                 connector->display_info.max_vfreq = 200;
  1024.                 connector->display_info.min_hfreq = 0;
  1025.                 connector->display_info.max_hfreq = 200;
  1026.         }
  1027.  
  1028.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1029.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1030.                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1031.                         drm_mode_debug_printmodeline(scan);
  1032.  
  1033.                         fixed_mode = drm_mode_duplicate(dev, scan);
  1034.                         if (fixed_mode) {
  1035.                                 intel_connector->panel.downclock_mode =
  1036.                                         intel_find_panel_downclock(dev,
  1037.                                         fixed_mode, connector);
  1038.                                 if (intel_connector->panel.downclock_mode !=
  1039.                                         NULL && i915_lvds_downclock) {
  1040.                                         /* We found the downclock for LVDS. */
  1041.                                         dev_priv->lvds_downclock_avail = true;
  1042.                                         dev_priv->lvds_downclock =
  1043.                                                 intel_connector->panel.
  1044.                                                 downclock_mode->clock;
  1045.                                         DRM_DEBUG_KMS("LVDS downclock is found"
  1046.                                         " in EDID. Normal clock %dKhz, "
  1047.                                         "downclock %dKhz\n",
  1048.                                         fixed_mode->clock,
  1049.                                         dev_priv->lvds_downclock);
  1050.                                 }
  1051.                         goto out;
  1052.                 }
  1053.         }
  1054.         }
  1055.  
  1056.         /* Failed to get EDID, what about VBT? */
  1057.         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  1058.                 DRM_DEBUG_KMS("using mode from VBT: ");
  1059.                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  1060.  
  1061.                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  1062.                 if (fixed_mode) {
  1063.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1064.                         goto out;
  1065.                 }
  1066.         }
  1067.  
  1068.         /*
  1069.          * If we didn't get EDID, try checking if the panel is already turned
  1070.          * on.  If so, assume that whatever is currently programmed is the
  1071.          * correct mode.
  1072.          */
  1073.  
  1074.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1075.         if (HAS_PCH_SPLIT(dev))
  1076.                 goto failed;
  1077.  
  1078.         lvds = I915_READ(LVDS);
  1079.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1080.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1081.  
  1082.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1083.                 fixed_mode = intel_crtc_mode_get(dev, crtc);
  1084.                 if (fixed_mode) {
  1085.                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1086.                         drm_mode_debug_printmodeline(fixed_mode);
  1087.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1088.                         goto out;
  1089.                 }
  1090.         }
  1091.  
  1092.         /* If we still don't have a mode after all that, give up. */
  1093.         if (!fixed_mode)
  1094.                 goto failed;
  1095.  
  1096. out:
  1097.         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1098.         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1099.                       lvds_encoder->is_dual_link ? "dual" : "single");
  1100.  
  1101.                 /*
  1102.                  * Unlock registers and just
  1103.                  * leave them unlocked
  1104.                  */
  1105.         if (HAS_PCH_SPLIT(dev)) {
  1106.                 I915_WRITE(PCH_PP_CONTROL,
  1107.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1108.         } else {
  1109.                 I915_WRITE(PP_CONTROL,
  1110.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1111.         }
  1112. //   dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  1113. //   if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  1114. //       DRM_DEBUG_KMS("lid notifier registration failed\n");
  1115.  //      dev_priv->lid_notifier.notifier_call = NULL;
  1116. //   }
  1117.         drm_sysfs_connector_add(connector);
  1118.  
  1119.         intel_panel_init(&intel_connector->panel, fixed_mode);
  1120.         intel_panel_setup_backlight(connector);
  1121.  
  1122.         return;
  1123.  
  1124. failed:
  1125.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1126.         drm_connector_cleanup(connector);
  1127.         drm_encoder_cleanup(encoder);
  1128.         if (fixed_mode)
  1129.                 drm_mode_destroy(dev, fixed_mode);
  1130.         kfree(lvds_encoder);
  1131.         kfree(lvds_connector);
  1132.         return;
  1133. }
  1134.