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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. //#include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_crtc.h>
  36. #include <drm/drm_edid.h>
  37. #include "intel_drv.h"
  38. #include <drm/i915_drm.h>
  39. #include "i915_drv.h"
  40. //#include <linux/acpi.h>
  41.  
  42. /* Private structure for the integrated LVDS support */
  43. struct intel_lvds_connector {
  44.         struct intel_connector base;
  45.  
  46. //      struct notifier_block lid_notifier;
  47. };
  48.  
  49. struct intel_lvds_encoder {
  50.         struct intel_encoder base;
  51.  
  52.         u32 pfit_control;
  53.         u32 pfit_pgm_ratios;
  54.         bool is_dual_link;
  55.         u32 reg;
  56.  
  57.         struct intel_lvds_connector *attached_connector;
  58. };
  59.  
  60. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  61. {
  62.         return container_of(encoder, struct intel_lvds_encoder, base.base);
  63. }
  64.  
  65. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  66. {
  67.         return container_of(connector, struct intel_lvds_connector, base.base);
  68. }
  69.  
  70. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  71.                                     enum pipe *pipe)
  72. {
  73.         struct drm_device *dev = encoder->base.dev;
  74.         struct drm_i915_private *dev_priv = dev->dev_private;
  75.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  76.         u32 tmp;
  77.  
  78.         tmp = I915_READ(lvds_encoder->reg);
  79.  
  80.         if (!(tmp & LVDS_PORT_EN))
  81.                 return false;
  82.  
  83.         if (HAS_PCH_CPT(dev))
  84.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  85.         else
  86.                 *pipe = PORT_TO_PIPE(tmp);
  87.  
  88.         return true;
  89. }
  90.  
  91. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  92.  * This is an exception to the general rule that mode_set doesn't turn
  93.  * things on.
  94.  */
  95. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  96. {
  97.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  98.         struct drm_device *dev = encoder->base.dev;
  99.         struct drm_i915_private *dev_priv = dev->dev_private;
  100.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  101.         struct drm_display_mode *fixed_mode =
  102.                 lvds_encoder->attached_connector->base.panel.fixed_mode;
  103.         int pipe = intel_crtc->pipe;
  104.         u32 temp;
  105.  
  106.         temp = I915_READ(lvds_encoder->reg);
  107.         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  108.  
  109.         if (HAS_PCH_CPT(dev)) {
  110.                 temp &= ~PORT_TRANS_SEL_MASK;
  111.                 temp |= PORT_TRANS_SEL_CPT(pipe);
  112.         } else {
  113.                 if (pipe == 1) {
  114.                         temp |= LVDS_PIPEB_SELECT;
  115.                 } else {
  116.                         temp &= ~LVDS_PIPEB_SELECT;
  117.                 }
  118.         }
  119.  
  120.         /* set the corresponsding LVDS_BORDER bit */
  121.         temp |= dev_priv->lvds_border_bits;
  122.         /* Set the B0-B3 data pairs corresponding to whether we're going to
  123.          * set the DPLLs for dual-channel mode or not.
  124.          */
  125.         if (lvds_encoder->is_dual_link)
  126.                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  127.         else
  128.                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  129.  
  130.         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  131.          * appropriately here, but we need to look more thoroughly into how
  132.          * panels behave in the two modes.
  133.          */
  134.  
  135.         /* Set the dithering flag on LVDS as needed, note that there is no
  136.          * special lvds dither control bit on pch-split platforms, dithering is
  137.          * only controlled through the PIPECONF reg. */
  138.         if (INTEL_INFO(dev)->gen == 4) {
  139.                 if (dev_priv->lvds_dither)
  140.                         temp |= LVDS_ENABLE_DITHER;
  141.                 else
  142.                         temp &= ~LVDS_ENABLE_DITHER;
  143.         }
  144.         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  145.         if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  146.                 temp |= LVDS_HSYNC_POLARITY;
  147.         if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  148.                 temp |= LVDS_VSYNC_POLARITY;
  149.  
  150.         I915_WRITE(lvds_encoder->reg, temp);
  151. }
  152.  
  153. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  154. {
  155.         struct drm_device *dev = encoder->base.dev;
  156.         struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base);
  157.         struct drm_i915_private *dev_priv = dev->dev_private;
  158.  
  159.         if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
  160.                 return;
  161.  
  162.         /*
  163.          * Enable automatic panel scaling so that non-native modes
  164.          * fill the screen.  The panel fitter should only be
  165.          * adjusted whilst the pipe is disabled, according to
  166.          * register description and PRM.
  167.          */
  168.         DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  169.                       enc->pfit_control,
  170.                       enc->pfit_pgm_ratios);
  171.  
  172.         I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios);
  173.         I915_WRITE(PFIT_CONTROL, enc->pfit_control);
  174. }
  175.  
  176. /**
  177.  * Sets the power state for the panel.
  178.  */
  179. static void intel_enable_lvds(struct intel_encoder *encoder)
  180. {
  181.         struct drm_device *dev = encoder->base.dev;
  182.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  183.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  184.         struct drm_i915_private *dev_priv = dev->dev_private;
  185.         u32 ctl_reg, stat_reg;
  186.  
  187.         if (HAS_PCH_SPLIT(dev)) {
  188.                 ctl_reg = PCH_PP_CONTROL;
  189.                 stat_reg = PCH_PP_STATUS;
  190.         } else {
  191.                 ctl_reg = PP_CONTROL;
  192.                 stat_reg = PP_STATUS;
  193.         }
  194.  
  195.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  196.  
  197.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  198.         POSTING_READ(lvds_encoder->reg);
  199.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  200.                 DRM_ERROR("timed out waiting for panel to power on\n");
  201.  
  202.         intel_panel_enable_backlight(dev, intel_crtc->pipe);
  203. }
  204.  
  205. static void intel_disable_lvds(struct intel_encoder *encoder)
  206. {
  207.         struct drm_device *dev = encoder->base.dev;
  208.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  209.         struct drm_i915_private *dev_priv = dev->dev_private;
  210.         u32 ctl_reg, stat_reg;
  211.  
  212.         if (HAS_PCH_SPLIT(dev)) {
  213.                 ctl_reg = PCH_PP_CONTROL;
  214.                 stat_reg = PCH_PP_STATUS;
  215.         } else {
  216.                 ctl_reg = PP_CONTROL;
  217.                 stat_reg = PP_STATUS;
  218.         }
  219.  
  220.         intel_panel_disable_backlight(dev);
  221.  
  222.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  223.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  224.                 DRM_ERROR("timed out waiting for panel to power off\n");
  225.  
  226.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  227.         POSTING_READ(lvds_encoder->reg);
  228. }
  229.  
  230. static int intel_lvds_mode_valid(struct drm_connector *connector,
  231.                                  struct drm_display_mode *mode)
  232. {
  233.         struct intel_connector *intel_connector = to_intel_connector(connector);
  234.         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  235.  
  236.         if (mode->hdisplay > fixed_mode->hdisplay)
  237.                 return MODE_PANEL;
  238.         if (mode->vdisplay > fixed_mode->vdisplay)
  239.                 return MODE_PANEL;
  240.  
  241.         return MODE_OK;
  242. }
  243.  
  244. static void
  245. centre_horizontally(struct drm_display_mode *mode,
  246.                     int width)
  247. {
  248.         u32 border, sync_pos, blank_width, sync_width;
  249.  
  250.         /* keep the hsync and hblank widths constant */
  251.         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  252.         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  253.         sync_pos = (blank_width - sync_width + 1) / 2;
  254.  
  255.         border = (mode->hdisplay - width + 1) / 2;
  256.         border += border & 1; /* make the border even */
  257.  
  258.         mode->crtc_hdisplay = width;
  259.         mode->crtc_hblank_start = width + border;
  260.         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  261.  
  262.         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  263.         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  264. }
  265.  
  266. static void
  267. centre_vertically(struct drm_display_mode *mode,
  268.                   int height)
  269. {
  270.         u32 border, sync_pos, blank_width, sync_width;
  271.  
  272.         /* keep the vsync and vblank widths constant */
  273.         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  274.         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  275.         sync_pos = (blank_width - sync_width + 1) / 2;
  276.  
  277.         border = (mode->vdisplay - height + 1) / 2;
  278.  
  279.         mode->crtc_vdisplay = height;
  280.         mode->crtc_vblank_start = height + border;
  281.         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  282.  
  283.         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  284.         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  285. }
  286.  
  287. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  288. {
  289.         /*
  290.          * Floating point operation is not supported. So the FACTOR
  291.          * is defined, which can avoid the floating point computation
  292.          * when calculating the panel ratio.
  293.          */
  294. #define ACCURACY 12
  295. #define FACTOR (1 << ACCURACY)
  296.         u32 ratio = source * FACTOR / target;
  297.         return (FACTOR * ratio + FACTOR/2) / FACTOR;
  298. }
  299.  
  300. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  301.                                       struct intel_crtc_config *pipe_config)
  302. {
  303.         struct drm_device *dev = intel_encoder->base.dev;
  304.         struct drm_i915_private *dev_priv = dev->dev_private;
  305.         struct intel_lvds_encoder *lvds_encoder =
  306.                 to_lvds_encoder(&intel_encoder->base);
  307.         struct intel_connector *intel_connector =
  308.                 &lvds_encoder->attached_connector->base;
  309.         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  310.         struct drm_display_mode *mode = &pipe_config->requested_mode;
  311.         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  312.         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  313.         unsigned int lvds_bpp;
  314.         int pipe;
  315.  
  316.         /* Should never happen!! */
  317.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  318.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  319.                 return false;
  320.         }
  321.  
  322.         if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  323.                         return false;
  324.  
  325.         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  326.             LVDS_A3_POWER_UP)
  327.                 lvds_bpp = 8*3;
  328.         else
  329.                 lvds_bpp = 6*3;
  330.  
  331.         if (lvds_bpp != pipe_config->pipe_bpp) {
  332.                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  333.                               pipe_config->pipe_bpp, lvds_bpp);
  334.                 pipe_config->pipe_bpp = lvds_bpp;
  335.         }
  336.         /*
  337.          * We have timings from the BIOS for the panel, put them in
  338.          * to the adjusted mode.  The CRTC will be set up for this mode,
  339.          * with the panel scaling set up to source from the H/VDisplay
  340.          * of the original mode.
  341.          */
  342.         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  343.                                adjusted_mode);
  344.  
  345.         if (HAS_PCH_SPLIT(dev)) {
  346.                 pipe_config->has_pch_encoder = true;
  347.  
  348.                 intel_pch_panel_fitting(dev,
  349.                                         intel_connector->panel.fitting_mode,
  350.                                         mode, adjusted_mode);
  351.                 return true;
  352.         }
  353.  
  354.         /* Native modes don't need fitting */
  355.         if (adjusted_mode->hdisplay == mode->hdisplay &&
  356.             adjusted_mode->vdisplay == mode->vdisplay)
  357.                 goto out;
  358.  
  359.         /* 965+ wants fuzzy fitting */
  360.         if (INTEL_INFO(dev)->gen >= 4)
  361.                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  362.                                  PFIT_FILTER_FUZZY);
  363.  
  364.         /*
  365.          * Enable automatic panel scaling for non-native modes so that they fill
  366.          * the screen.  Should be enabled before the pipe is enabled, according
  367.          * to register description and PRM.
  368.          * Change the value here to see the borders for debugging
  369.          */
  370.         for_each_pipe(pipe)
  371.                 I915_WRITE(BCLRPAT(pipe), 0);
  372.  
  373.         drm_mode_set_crtcinfo(adjusted_mode, 0);
  374.         pipe_config->timings_set = true;
  375.  
  376.         switch (intel_connector->panel.fitting_mode) {
  377.         case DRM_MODE_SCALE_CENTER:
  378.                 /*
  379.                  * For centered modes, we have to calculate border widths &
  380.                  * heights and modify the values programmed into the CRTC.
  381.                  */
  382.                 centre_horizontally(adjusted_mode, mode->hdisplay);
  383.                 centre_vertically(adjusted_mode, mode->vdisplay);
  384.                 border = LVDS_BORDER_ENABLE;
  385.                 break;
  386.  
  387.         case DRM_MODE_SCALE_ASPECT:
  388.                 /* Scale but preserve the aspect ratio */
  389.                 if (INTEL_INFO(dev)->gen >= 4) {
  390.                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  391.                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  392.  
  393.                         /* 965+ is easy, it does everything in hw */
  394.                         if (scaled_width > scaled_height)
  395.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  396.                         else if (scaled_width < scaled_height)
  397.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  398.                         else if (adjusted_mode->hdisplay != mode->hdisplay)
  399.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  400.                 } else {
  401.                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  402.                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  403.                         /*
  404.                          * For earlier chips we have to calculate the scaling
  405.                          * ratio by hand and program it into the
  406.                          * PFIT_PGM_RATIO register
  407.                          */
  408.                         if (scaled_width > scaled_height) { /* pillar */
  409.                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  410.  
  411.                                 border = LVDS_BORDER_ENABLE;
  412.                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
  413.                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  414.                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  415.                                                             bits << PFIT_VERT_SCALE_SHIFT);
  416.                                         pfit_control |= (PFIT_ENABLE |
  417.                                                          VERT_INTERP_BILINEAR |
  418.                                                          HORIZ_INTERP_BILINEAR);
  419.                                 }
  420.                         } else if (scaled_width < scaled_height) { /* letter */
  421.                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  422.  
  423.                                 border = LVDS_BORDER_ENABLE;
  424.                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
  425.                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  426.                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  427.                                                             bits << PFIT_VERT_SCALE_SHIFT);
  428.                                         pfit_control |= (PFIT_ENABLE |
  429.                                                          VERT_INTERP_BILINEAR |
  430.                                                          HORIZ_INTERP_BILINEAR);
  431.                                 }
  432.                         } else
  433.                                 /* Aspects match, Let hw scale both directions */
  434.                                 pfit_control |= (PFIT_ENABLE |
  435.                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  436.                                                  VERT_INTERP_BILINEAR |
  437.                                                  HORIZ_INTERP_BILINEAR);
  438.                 }
  439.                 break;
  440.  
  441.         case DRM_MODE_SCALE_FULLSCREEN:
  442.                 /*
  443.                  * Full scaling, even if it changes the aspect ratio.
  444.                  * Fortunately this is all done for us in hw.
  445.                  */
  446.                 if (mode->vdisplay != adjusted_mode->vdisplay ||
  447.                     mode->hdisplay != adjusted_mode->hdisplay) {
  448.                         pfit_control |= PFIT_ENABLE;
  449.                         if (INTEL_INFO(dev)->gen >= 4)
  450.                                 pfit_control |= PFIT_SCALING_AUTO;
  451.                         else
  452.                                 pfit_control |= (VERT_AUTO_SCALE |
  453.                                                  VERT_INTERP_BILINEAR |
  454.                                                  HORIZ_AUTO_SCALE |
  455.                                                  HORIZ_INTERP_BILINEAR);
  456.                 }
  457.                 break;
  458.  
  459.         default:
  460.                 break;
  461.         }
  462.  
  463. out:
  464.         /* If not enabling scaling, be consistent and always use 0. */
  465.         if ((pfit_control & PFIT_ENABLE) == 0) {
  466.                 pfit_control = 0;
  467.                 pfit_pgm_ratios = 0;
  468.         }
  469.  
  470.         /* Make sure pre-965 set dither correctly */
  471.         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  472.                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  473.  
  474.         if (pfit_control != lvds_encoder->pfit_control ||
  475.             pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  476.                 lvds_encoder->pfit_control = pfit_control;
  477.                 lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  478.         }
  479.         dev_priv->lvds_border_bits = border;
  480.  
  481.         /*
  482.          * XXX: It would be nice to support lower refresh rates on the
  483.          * panels to reduce power consumption, and perhaps match the
  484.          * user's requested refresh rate.
  485.          */
  486.  
  487.         return true;
  488. }
  489.  
  490. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  491.                                 struct drm_display_mode *mode,
  492.                                 struct drm_display_mode *adjusted_mode)
  493. {
  494.         /*
  495.          * The LVDS pin pair will already have been turned on in the
  496.          * intel_crtc_mode_set since it has a large impact on the DPLL
  497.          * settings.
  498.          */
  499. }
  500.  
  501. /**
  502.  * Detect the LVDS connection.
  503.  *
  504.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  505.  * connected and closed means disconnected.  We also send hotplug events as
  506.  * needed, using lid status notification from the input layer.
  507.  */
  508. static enum drm_connector_status
  509. intel_lvds_detect(struct drm_connector *connector, bool force)
  510. {
  511.         struct drm_device *dev = connector->dev;
  512.         enum drm_connector_status status;
  513.  
  514.         status = intel_panel_detect(dev);
  515.         if (status != connector_status_unknown)
  516.                 return status;
  517.  
  518.         return connector_status_connected;
  519. }
  520.  
  521. /**
  522.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  523.  */
  524. static int intel_lvds_get_modes(struct drm_connector *connector)
  525. {
  526.         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  527.         struct drm_device *dev = connector->dev;
  528.         struct drm_display_mode *mode;
  529.  
  530.         /* use cached edid if we have one */
  531.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  532.                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
  533.  
  534.         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  535.         if (mode == NULL)
  536.                 return 0;
  537.  
  538.         drm_mode_probed_add(connector, mode);
  539.         return 1;
  540. }
  541.  
  542. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  543. {
  544.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  545.         return 1;
  546. }
  547.  
  548. /* The GPU hangs up on these systems if modeset is performed on LID open */
  549. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  550.         {
  551.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  552.                 .ident = "Toshiba Tecra A11",
  553.                 .matches = {
  554.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  555.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  556.                 },
  557.         },
  558.  
  559.         { }     /* terminating entry */
  560. };
  561.  
  562. #if 0
  563. /*
  564.  * Lid events. Note the use of 'modeset':
  565.  *  - we set it to MODESET_ON_LID_OPEN on lid close,
  566.  *    and set it to MODESET_DONE on open
  567.  *  - we use it as a "only once" bit (ie we ignore
  568.  *    duplicate events where it was already properly set)
  569.  *  - the suspend/resume paths will set it to
  570.  *    MODESET_SUSPENDED and ignore the lid open event,
  571.  *    because they restore the mode ("lid open").
  572.  */
  573. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  574.                             void *unused)
  575. {
  576.         struct intel_lvds_connector *lvds_connector =
  577.                 container_of(nb, struct intel_lvds_connector, lid_notifier);
  578.         struct drm_connector *connector = &lvds_connector->base.base;
  579.         struct drm_device *dev = connector->dev;
  580.         struct drm_i915_private *dev_priv = dev->dev_private;
  581.  
  582.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  583.                 return NOTIFY_OK;
  584.  
  585.         mutex_lock(&dev_priv->modeset_restore_lock);
  586.         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  587.                 goto exit;
  588.         /*
  589.          * check and update the status of LVDS connector after receiving
  590.          * the LID nofication event.
  591.          */
  592.         connector->status = connector->funcs->detect(connector, false);
  593.  
  594.         /* Don't force modeset on machines where it causes a GPU lockup */
  595.         if (dmi_check_system(intel_no_modeset_on_lid))
  596.                 goto exit;
  597.         if (!acpi_lid_open()) {
  598.                 /* do modeset on next lid open event */
  599.                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  600.                 goto exit;
  601.         }
  602.  
  603.         if (dev_priv->modeset_restore == MODESET_DONE)
  604.                 goto exit;
  605.  
  606.         drm_modeset_lock_all(dev);
  607.         intel_modeset_setup_hw_state(dev, true);
  608.         drm_modeset_unlock_all(dev);
  609.  
  610.         dev_priv->modeset_restore = MODESET_DONE;
  611.  
  612. exit:
  613.         mutex_unlock(&dev_priv->modeset_restore_lock);
  614.         return NOTIFY_OK;
  615. }
  616. #endif
  617.  
  618. /**
  619.  * intel_lvds_destroy - unregister and free LVDS structures
  620.  * @connector: connector to free
  621.  *
  622.  * Unregister the DDC bus for this connector then free the driver private
  623.  * structure.
  624.  */
  625. static void intel_lvds_destroy(struct drm_connector *connector)
  626. {
  627.         struct intel_lvds_connector *lvds_connector =
  628.                 to_lvds_connector(connector);
  629.  
  630.  
  631.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  632.                 kfree(lvds_connector->base.edid);
  633.  
  634.         intel_panel_fini(&lvds_connector->base.panel);
  635.  
  636.         drm_sysfs_connector_remove(connector);
  637.         drm_connector_cleanup(connector);
  638.         kfree(connector);
  639. }
  640.  
  641. static int intel_lvds_set_property(struct drm_connector *connector,
  642.                                    struct drm_property *property,
  643.                                    uint64_t value)
  644. {
  645.         struct intel_connector *intel_connector = to_intel_connector(connector);
  646.         struct drm_device *dev = connector->dev;
  647.  
  648.         if (property == dev->mode_config.scaling_mode_property) {
  649.                 struct drm_crtc *crtc;
  650.  
  651.                 if (value == DRM_MODE_SCALE_NONE) {
  652.                         DRM_DEBUG_KMS("no scaling not supported\n");
  653.                         return -EINVAL;
  654.                 }
  655.  
  656.                 if (intel_connector->panel.fitting_mode == value) {
  657.                         /* the LVDS scaling property is not changed */
  658.                         return 0;
  659.                 }
  660.                 intel_connector->panel.fitting_mode = value;
  661.  
  662.                 crtc = intel_attached_encoder(connector)->base.crtc;
  663.                 if (crtc && crtc->enabled) {
  664.                         /*
  665.                          * If the CRTC is enabled, the display will be changed
  666.                          * according to the new panel fitting mode.
  667.                          */
  668.                         intel_crtc_restore_mode(crtc);
  669.                 }
  670.         }
  671.  
  672.         return 0;
  673. }
  674.  
  675. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  676.         .mode_set = intel_lvds_mode_set,
  677. };
  678.  
  679. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  680.         .get_modes = intel_lvds_get_modes,
  681.         .mode_valid = intel_lvds_mode_valid,
  682.         .best_encoder = intel_best_encoder,
  683. };
  684.  
  685. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  686.         .dpms = intel_connector_dpms,
  687.         .detect = intel_lvds_detect,
  688.         .fill_modes = drm_helper_probe_single_connector_modes,
  689.         .set_property = intel_lvds_set_property,
  690.         .destroy = intel_lvds_destroy,
  691. };
  692.  
  693. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  694.         .destroy = intel_encoder_destroy,
  695. };
  696.  
  697. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  698. {
  699.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  700.         return 1;
  701. }
  702.  
  703. /* These systems claim to have LVDS, but really don't */
  704. static const struct dmi_system_id intel_no_lvds[] = {
  705.         {
  706.                 .callback = intel_no_lvds_dmi_callback,
  707.                 .ident = "Apple Mac Mini (Core series)",
  708.                 .matches = {
  709.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  710.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  711.                 },
  712.         },
  713.         {
  714.                 .callback = intel_no_lvds_dmi_callback,
  715.                 .ident = "Apple Mac Mini (Core 2 series)",
  716.                 .matches = {
  717.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  718.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  719.                 },
  720.         },
  721.         {
  722.                 .callback = intel_no_lvds_dmi_callback,
  723.                 .ident = "MSI IM-945GSE-A",
  724.                 .matches = {
  725.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  726.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  727.                 },
  728.         },
  729.         {
  730.                 .callback = intel_no_lvds_dmi_callback,
  731.                 .ident = "Dell Studio Hybrid",
  732.                 .matches = {
  733.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  734.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  735.                 },
  736.         },
  737.         {
  738.                 .callback = intel_no_lvds_dmi_callback,
  739.                 .ident = "Dell OptiPlex FX170",
  740.                 .matches = {
  741.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  742.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  743.                 },
  744.         },
  745.         {
  746.                 .callback = intel_no_lvds_dmi_callback,
  747.                 .ident = "AOpen Mini PC",
  748.                 .matches = {
  749.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  750.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  751.                 },
  752.         },
  753.         {
  754.                 .callback = intel_no_lvds_dmi_callback,
  755.                 .ident = "AOpen Mini PC MP915",
  756.                 .matches = {
  757.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  758.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  759.                 },
  760.         },
  761.         {
  762.                 .callback = intel_no_lvds_dmi_callback,
  763.                 .ident = "AOpen i915GMm-HFS",
  764.                 .matches = {
  765.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  766.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  767.                 },
  768.         },
  769.         {
  770.                 .callback = intel_no_lvds_dmi_callback,
  771.                 .ident = "AOpen i45GMx-I",
  772.                 .matches = {
  773.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  774.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  775.                 },
  776.         },
  777.         {
  778.                 .callback = intel_no_lvds_dmi_callback,
  779.                 .ident = "Aopen i945GTt-VFA",
  780.                 .matches = {
  781.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  782.                 },
  783.         },
  784.         {
  785.                 .callback = intel_no_lvds_dmi_callback,
  786.                 .ident = "Clientron U800",
  787.                 .matches = {
  788.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  789.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  790.                 },
  791.         },
  792.         {
  793.                 .callback = intel_no_lvds_dmi_callback,
  794.                 .ident = "Clientron E830",
  795.                 .matches = {
  796.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  797.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  798.                 },
  799.         },
  800.         {
  801.                 .callback = intel_no_lvds_dmi_callback,
  802.                 .ident = "Asus EeeBox PC EB1007",
  803.                 .matches = {
  804.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  805.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  806.                 },
  807.         },
  808.         {
  809.                 .callback = intel_no_lvds_dmi_callback,
  810.                 .ident = "Asus AT5NM10T-I",
  811.                 .matches = {
  812.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  813.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  814.                 },
  815.         },
  816.         {
  817.                 .callback = intel_no_lvds_dmi_callback,
  818.                 .ident = "Hewlett-Packard HP t5740",
  819.                 .matches = {
  820.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  821.                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  822.                 },
  823.         },
  824.         {
  825.                 .callback = intel_no_lvds_dmi_callback,
  826.                 .ident = "Hewlett-Packard t5745",
  827.                 .matches = {
  828.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  829.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  830.                 },
  831.         },
  832.         {
  833.                 .callback = intel_no_lvds_dmi_callback,
  834.                 .ident = "Hewlett-Packard st5747",
  835.                 .matches = {
  836.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  837.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  838.                 },
  839.         },
  840.         {
  841.                 .callback = intel_no_lvds_dmi_callback,
  842.                 .ident = "MSI Wind Box DC500",
  843.                 .matches = {
  844.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  845.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  846.                 },
  847.         },
  848.         {
  849.                 .callback = intel_no_lvds_dmi_callback,
  850.                 .ident = "Gigabyte GA-D525TUD",
  851.                 .matches = {
  852.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  853.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  854.                 },
  855.         },
  856.         {
  857.                 .callback = intel_no_lvds_dmi_callback,
  858.                 .ident = "Supermicro X7SPA-H",
  859.                 .matches = {
  860.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  861.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  862.                 },
  863.         },
  864.         {
  865.                 .callback = intel_no_lvds_dmi_callback,
  866.                 .ident = "Fujitsu Esprimo Q900",
  867.                 .matches = {
  868.                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  869.                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  870.                 },
  871.         },
  872.  
  873.         { }     /* terminating entry */
  874. };
  875.  
  876. /**
  877.  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  878.  * @dev: drm device
  879.  * @connector: LVDS connector
  880.  *
  881.  * Find the reduced downclock for LVDS in EDID.
  882.  */
  883. static void intel_find_lvds_downclock(struct drm_device *dev,
  884.                                       struct drm_display_mode *fixed_mode,
  885.                                       struct drm_connector *connector)
  886. {
  887.         struct drm_i915_private *dev_priv = dev->dev_private;
  888.         struct drm_display_mode *scan;
  889.         int temp_downclock;
  890.  
  891.         temp_downclock = fixed_mode->clock;
  892.         list_for_each_entry(scan, &connector->probed_modes, head) {
  893.                 /*
  894.                  * If one mode has the same resolution with the fixed_panel
  895.                  * mode while they have the different refresh rate, it means
  896.                  * that the reduced downclock is found for the LVDS. In such
  897.                  * case we can set the different FPx0/1 to dynamically select
  898.                  * between low and high frequency.
  899.                  */
  900.                 if (scan->hdisplay == fixed_mode->hdisplay &&
  901.                     scan->hsync_start == fixed_mode->hsync_start &&
  902.                     scan->hsync_end == fixed_mode->hsync_end &&
  903.                     scan->htotal == fixed_mode->htotal &&
  904.                     scan->vdisplay == fixed_mode->vdisplay &&
  905.                     scan->vsync_start == fixed_mode->vsync_start &&
  906.                     scan->vsync_end == fixed_mode->vsync_end &&
  907.                     scan->vtotal == fixed_mode->vtotal) {
  908.                         if (scan->clock < temp_downclock) {
  909.                                 /*
  910.                                  * The downclock is already found. But we
  911.                                  * expect to find the lower downclock.
  912.                                  */
  913.                                 temp_downclock = scan->clock;
  914.                         }
  915.                 }
  916.         }
  917.         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  918.                 /* We found the downclock for LVDS. */
  919.                 dev_priv->lvds_downclock_avail = 1;
  920.                 dev_priv->lvds_downclock = temp_downclock;
  921.                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  922.                               "Normal clock %dKhz, downclock %dKhz\n",
  923.                               fixed_mode->clock, temp_downclock);
  924.         }
  925. }
  926.  
  927. /*
  928.  * Enumerate the child dev array parsed from VBT to check whether
  929.  * the LVDS is present.
  930.  * If it is present, return 1.
  931.  * If it is not present, return false.
  932.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  933.  */
  934. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  935.                                    u8 *i2c_pin)
  936. {
  937.         struct drm_i915_private *dev_priv = dev->dev_private;
  938.         int i;
  939.  
  940.         if (!dev_priv->child_dev_num)
  941.                 return true;
  942.  
  943.         for (i = 0; i < dev_priv->child_dev_num; i++) {
  944.                 struct child_device_config *child = dev_priv->child_dev + i;
  945.  
  946.                 /* If the device type is not LFP, continue.
  947.                  * We have to check both the new identifiers as well as the
  948.                  * old for compatibility with some BIOSes.
  949.                  */
  950.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  951.                     child->device_type != DEVICE_TYPE_LFP)
  952.                         continue;
  953.  
  954.                 if (intel_gmbus_is_port_valid(child->i2c_pin))
  955.                     *i2c_pin = child->i2c_pin;
  956.  
  957.                 /* However, we cannot trust the BIOS writers to populate
  958.                  * the VBT correctly.  Since LVDS requires additional
  959.                  * information from AIM blocks, a non-zero addin offset is
  960.                  * a good indicator that the LVDS is actually present.
  961.                  */
  962.                 if (child->addin_offset)
  963.                         return true;
  964.  
  965.                 /* But even then some BIOS writers perform some black magic
  966.                  * and instantiate the device without reference to any
  967.                  * additional data.  Trust that if the VBT was written into
  968.                  * the OpRegion then they have validated the LVDS's existence.
  969.                  */
  970.                 if (dev_priv->opregion.vbt)
  971.                         return true;
  972.         }
  973.  
  974.         return false;
  975. }
  976.  
  977. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  978. {
  979.         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  980.         return 1;
  981. }
  982. bool intel_is_dual_link_lvds(struct drm_device *dev)
  983. {
  984.         struct intel_encoder *encoder;
  985.         struct intel_lvds_encoder *lvds_encoder;
  986.  
  987.         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  988.                             base.head) {
  989.                 if (encoder->type == INTEL_OUTPUT_LVDS) {
  990.                         lvds_encoder = to_lvds_encoder(&encoder->base);
  991.  
  992.                         return lvds_encoder->is_dual_link;
  993.                 }
  994.         }
  995.  
  996.         return false;
  997. }
  998.  
  999. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  1000. {
  1001.         struct drm_device *dev = lvds_encoder->base.base.dev;
  1002.         unsigned int val;
  1003.         struct drm_i915_private *dev_priv = dev->dev_private;
  1004.  
  1005.         /* use the module option value if specified */
  1006.         if (i915_lvds_channel_mode > 0)
  1007.                 return i915_lvds_channel_mode == 2;
  1008.  
  1009. //      if (dmi_check_system(intel_dual_link_lvds))
  1010. //              return true;
  1011.  
  1012.         /* BIOS should set the proper LVDS register value at boot, but
  1013.          * in reality, it doesn't set the value when the lid is closed;
  1014.          * we need to check "the value to be set" in VBT when LVDS
  1015.          * register is uninitialized.
  1016.          */
  1017.         val = I915_READ(lvds_encoder->reg);
  1018.         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  1019.                 val = dev_priv->bios_lvds_val;
  1020.  
  1021.         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  1022. }
  1023.  
  1024. static bool intel_lvds_supported(struct drm_device *dev)
  1025. {
  1026.         /* With the introduction of the PCH we gained a dedicated
  1027.          * LVDS presence pin, use it. */
  1028.         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  1029.                 return true;
  1030.  
  1031.         /* Otherwise LVDS was only attached to mobile products,
  1032.          * except for the inglorious 830gm */
  1033.         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  1034.                 return true;
  1035.  
  1036.         return false;
  1037. }
  1038.  
  1039. /**
  1040.  * intel_lvds_init - setup LVDS connectors on this device
  1041.  * @dev: drm device
  1042.  *
  1043.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  1044.  * modes we can display on the LVDS panel (if present).
  1045.  */
  1046. bool intel_lvds_init(struct drm_device *dev)
  1047. {
  1048.         struct drm_i915_private *dev_priv = dev->dev_private;
  1049.         struct intel_lvds_encoder *lvds_encoder;
  1050.         struct intel_encoder *intel_encoder;
  1051.         struct intel_lvds_connector *lvds_connector;
  1052.         struct intel_connector *intel_connector;
  1053.         struct drm_connector *connector;
  1054.         struct drm_encoder *encoder;
  1055.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  1056.         struct drm_display_mode *fixed_mode = NULL;
  1057.         struct edid *edid;
  1058.         struct drm_crtc *crtc;
  1059.         u32 lvds;
  1060.         int pipe;
  1061.         u8 pin;
  1062.  
  1063.         if (!intel_lvds_supported(dev))
  1064.                 return false;
  1065.  
  1066.         /* Skip init on machines we know falsely report LVDS */
  1067. //   if (dmi_check_system(intel_no_lvds))
  1068. //       return false;
  1069.  
  1070.         pin = GMBUS_PORT_PANEL;
  1071.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  1072.                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  1073.                 return false;
  1074.         }
  1075.  
  1076.         if (HAS_PCH_SPLIT(dev)) {
  1077.                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  1078.                         return false;
  1079.                 if (dev_priv->edp.support) {
  1080.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  1081.                         return false;
  1082.                 }
  1083.         }
  1084.  
  1085.         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  1086.         if (!lvds_encoder)
  1087.                 return false;
  1088.  
  1089.         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  1090.         if (!lvds_connector) {
  1091.                 kfree(lvds_encoder);
  1092.                 return false;
  1093.         }
  1094.  
  1095.         lvds_encoder->attached_connector = lvds_connector;
  1096.  
  1097.         if (!HAS_PCH_SPLIT(dev)) {
  1098.                 lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  1099.         }
  1100.  
  1101.         intel_encoder = &lvds_encoder->base;
  1102.         encoder = &intel_encoder->base;
  1103.         intel_connector = &lvds_connector->base;
  1104.         connector = &intel_connector->base;
  1105.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  1106.                            DRM_MODE_CONNECTOR_LVDS);
  1107.  
  1108.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  1109.                          DRM_MODE_ENCODER_LVDS);
  1110.  
  1111.         intel_encoder->enable = intel_enable_lvds;
  1112.         intel_encoder->pre_enable = intel_pre_enable_lvds;
  1113.         intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  1114.         intel_encoder->compute_config = intel_lvds_compute_config;
  1115.         intel_encoder->disable = intel_disable_lvds;
  1116.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  1117.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  1118.  
  1119.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  1120.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  1121.  
  1122.         intel_encoder->cloneable = false;
  1123.         if (HAS_PCH_SPLIT(dev))
  1124.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  1125.         else if (IS_GEN4(dev))
  1126.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  1127.         else
  1128.         intel_encoder->crtc_mask = (1 << 1);
  1129.  
  1130.         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  1131.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  1132.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  1133.         connector->interlace_allowed = false;
  1134.         connector->doublescan_allowed = false;
  1135.  
  1136.         if (HAS_PCH_SPLIT(dev)) {
  1137.                 lvds_encoder->reg = PCH_LVDS;
  1138.         } else {
  1139.                 lvds_encoder->reg = LVDS;
  1140.         }
  1141.  
  1142.         /* create the scaling mode property */
  1143.         drm_mode_create_scaling_mode_property(dev);
  1144.         drm_object_attach_property(&connector->base,
  1145.                                       dev->mode_config.scaling_mode_property,
  1146.                                       DRM_MODE_SCALE_ASPECT);
  1147.         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  1148.         /*
  1149.          * LVDS discovery:
  1150.          * 1) check for EDID on DDC
  1151.          * 2) check for VBT data
  1152.          * 3) check to see if LVDS is already on
  1153.          *    if none of the above, no panel
  1154.          * 4) make sure lid is open
  1155.          *    if closed, act like it's not there for now
  1156.          */
  1157.  
  1158.         /*
  1159.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1160.          * preferred mode is the right one.
  1161.          */
  1162.         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1163.         if (edid) {
  1164.                 if (drm_add_edid_modes(connector, edid)) {
  1165.                         drm_mode_connector_update_edid_property(connector,
  1166.                                                                 edid);
  1167.                 } else {
  1168.                         kfree(edid);
  1169.                         edid = ERR_PTR(-EINVAL);
  1170.                 }
  1171.         } else {
  1172.                 edid = ERR_PTR(-ENOENT);
  1173.         }
  1174.         lvds_connector->base.edid = edid;
  1175.  
  1176.         if (IS_ERR_OR_NULL(edid)) {
  1177.                 /* Didn't get an EDID, so
  1178.                  * Set wide sync ranges so we get all modes
  1179.                  * handed to valid_mode for checking
  1180.                  */
  1181.                 connector->display_info.min_vfreq = 0;
  1182.                 connector->display_info.max_vfreq = 200;
  1183.                 connector->display_info.min_hfreq = 0;
  1184.                 connector->display_info.max_hfreq = 200;
  1185.         }
  1186.  
  1187.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1188.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1189.                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1190.                         drm_mode_debug_printmodeline(scan);
  1191.  
  1192.                         fixed_mode = drm_mode_duplicate(dev, scan);
  1193.                         if (fixed_mode) {
  1194.                                 intel_find_lvds_downclock(dev, fixed_mode,
  1195.                                                   connector);
  1196.                         goto out;
  1197.                 }
  1198.         }
  1199.         }
  1200.  
  1201.         /* Failed to get EDID, what about VBT? */
  1202.         if (dev_priv->lfp_lvds_vbt_mode) {
  1203.                 DRM_DEBUG_KMS("using mode from VBT: ");
  1204.                 drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  1205.  
  1206.                 fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  1207.                 if (fixed_mode) {
  1208.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1209.                         goto out;
  1210.                 }
  1211.         }
  1212.  
  1213.         /*
  1214.          * If we didn't get EDID, try checking if the panel is already turned
  1215.          * on.  If so, assume that whatever is currently programmed is the
  1216.          * correct mode.
  1217.          */
  1218.  
  1219.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1220.         if (HAS_PCH_SPLIT(dev))
  1221.                 goto failed;
  1222.  
  1223.         lvds = I915_READ(LVDS);
  1224.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1225.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1226.  
  1227.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1228.                 fixed_mode = intel_crtc_mode_get(dev, crtc);
  1229.                 if (fixed_mode) {
  1230.                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1231.                         drm_mode_debug_printmodeline(fixed_mode);
  1232.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1233.                         goto out;
  1234.                 }
  1235.         }
  1236.  
  1237.         /* If we still don't have a mode after all that, give up. */
  1238.         if (!fixed_mode)
  1239.                 goto failed;
  1240.  
  1241. out:
  1242.         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1243.         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1244.                       lvds_encoder->is_dual_link ? "dual" : "single");
  1245.  
  1246.                 /*
  1247.                  * Unlock registers and just
  1248.                  * leave them unlocked
  1249.                  */
  1250.         if (HAS_PCH_SPLIT(dev)) {
  1251.                 I915_WRITE(PCH_PP_CONTROL,
  1252.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1253.         } else {
  1254.                 I915_WRITE(PP_CONTROL,
  1255.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1256.         }
  1257. //   dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  1258. //   if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  1259. //       DRM_DEBUG_KMS("lid notifier registration failed\n");
  1260.  //      dev_priv->lid_notifier.notifier_call = NULL;
  1261. //   }
  1262.         drm_sysfs_connector_add(connector);
  1263.  
  1264.         intel_panel_init(&intel_connector->panel, fixed_mode);
  1265.         intel_panel_setup_backlight(connector);
  1266.  
  1267.         return true;
  1268.  
  1269. failed:
  1270.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1271.         drm_connector_cleanup(connector);
  1272.         drm_encoder_cleanup(encoder);
  1273.         if (fixed_mode)
  1274.                 drm_mode_destroy(dev, fixed_mode);
  1275.         kfree(lvds_encoder);
  1276.         kfree(lvds_connector);
  1277.         return false;
  1278. }
  1279.