Subversion Repositories Kolibri OS

Rev

Rev 5354 | Rev 6937 | Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. #include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_atomic_helper.h>
  36. #include <drm/drm_crtc.h>
  37. #include <drm/drm_edid.h>
  38. #include "intel_drv.h"
  39. #include <drm/i915_drm.h>
  40. #include "i915_drv.h"
  41. //#include <linux/acpi.h>
  42.  
  43. /* Private structure for the integrated LVDS support */
  44. struct intel_lvds_connector {
  45.         struct intel_connector base;
  46.  
  47. //      struct notifier_block lid_notifier;
  48. };
  49.  
  50. struct intel_lvds_encoder {
  51.         struct intel_encoder base;
  52.  
  53.         bool is_dual_link;
  54.         u32 reg;
  55.         u32 a3_power;
  56.  
  57.         struct intel_lvds_connector *attached_connector;
  58. };
  59.  
  60. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  61. {
  62.         return container_of(encoder, struct intel_lvds_encoder, base.base);
  63. }
  64.  
  65. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  66. {
  67.         return container_of(connector, struct intel_lvds_connector, base.base);
  68. }
  69.  
  70. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  71.                                     enum pipe *pipe)
  72. {
  73.         struct drm_device *dev = encoder->base.dev;
  74.         struct drm_i915_private *dev_priv = dev->dev_private;
  75.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  76.         enum intel_display_power_domain power_domain;
  77.         u32 tmp;
  78.  
  79.         power_domain = intel_display_port_power_domain(encoder);
  80.         if (!intel_display_power_is_enabled(dev_priv, power_domain))
  81.                 return false;
  82.  
  83.         tmp = I915_READ(lvds_encoder->reg);
  84.  
  85.         if (!(tmp & LVDS_PORT_EN))
  86.                 return false;
  87.  
  88.         if (HAS_PCH_CPT(dev))
  89.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  90.         else
  91.                 *pipe = PORT_TO_PIPE(tmp);
  92.  
  93.         return true;
  94. }
  95.  
  96. static void intel_lvds_get_config(struct intel_encoder *encoder,
  97.                                   struct intel_crtc_state *pipe_config)
  98. {
  99.         struct drm_device *dev = encoder->base.dev;
  100.         struct drm_i915_private *dev_priv = dev->dev_private;
  101.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  102.         u32 tmp, flags = 0;
  103.         int dotclock;
  104.  
  105.         tmp = I915_READ(lvds_encoder->reg);
  106.         if (tmp & LVDS_HSYNC_POLARITY)
  107.                 flags |= DRM_MODE_FLAG_NHSYNC;
  108.         else
  109.                 flags |= DRM_MODE_FLAG_PHSYNC;
  110.         if (tmp & LVDS_VSYNC_POLARITY)
  111.                 flags |= DRM_MODE_FLAG_NVSYNC;
  112.         else
  113.                 flags |= DRM_MODE_FLAG_PVSYNC;
  114.  
  115.         pipe_config->base.adjusted_mode.flags |= flags;
  116.  
  117.         /* gen2/3 store dither state in pfit control, needs to match */
  118.         if (INTEL_INFO(dev)->gen < 4) {
  119.                 tmp = I915_READ(PFIT_CONTROL);
  120.  
  121.                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  122.         }
  123.  
  124.         dotclock = pipe_config->port_clock;
  125.  
  126.         if (HAS_PCH_SPLIT(dev_priv->dev))
  127.                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
  128.  
  129.         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
  130. }
  131.  
  132. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  133. {
  134.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  135.         struct drm_device *dev = encoder->base.dev;
  136.         struct drm_i915_private *dev_priv = dev->dev_private;
  137.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  138.         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
  139.         int pipe = crtc->pipe;
  140.         u32 temp;
  141.  
  142.         if (HAS_PCH_SPLIT(dev)) {
  143.                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
  144.                 assert_shared_dpll_disabled(dev_priv,
  145.                                             intel_crtc_to_shared_dpll(crtc));
  146.         } else {
  147.                 assert_pll_disabled(dev_priv, pipe);
  148.         }
  149.  
  150.         temp = I915_READ(lvds_encoder->reg);
  151.         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  152.  
  153.         if (HAS_PCH_CPT(dev)) {
  154.                 temp &= ~PORT_TRANS_SEL_MASK;
  155.                 temp |= PORT_TRANS_SEL_CPT(pipe);
  156.         } else {
  157.                 if (pipe == 1) {
  158.                         temp |= LVDS_PIPEB_SELECT;
  159.                 } else {
  160.                         temp &= ~LVDS_PIPEB_SELECT;
  161.                 }
  162.         }
  163.  
  164.         /* set the corresponsding LVDS_BORDER bit */
  165.         temp &= ~LVDS_BORDER_ENABLE;
  166.         temp |= crtc->config->gmch_pfit.lvds_border_bits;
  167.         /* Set the B0-B3 data pairs corresponding to whether we're going to
  168.          * set the DPLLs for dual-channel mode or not.
  169.          */
  170.         if (lvds_encoder->is_dual_link)
  171.                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  172.         else
  173.                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  174.  
  175.         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  176.          * appropriately here, but we need to look more thoroughly into how
  177.          * panels behave in the two modes. For now, let's just maintain the
  178.          * value we got from the BIOS.
  179.          */
  180.          temp &= ~LVDS_A3_POWER_MASK;
  181.          temp |= lvds_encoder->a3_power;
  182.  
  183.         /* Set the dithering flag on LVDS as needed, note that there is no
  184.          * special lvds dither control bit on pch-split platforms, dithering is
  185.          * only controlled through the PIPECONF reg. */
  186.         if (INTEL_INFO(dev)->gen == 4) {
  187.                 /* Bspec wording suggests that LVDS port dithering only exists
  188.                  * for 18bpp panels. */
  189.                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
  190.                         temp |= LVDS_ENABLE_DITHER;
  191.                 else
  192.                         temp &= ~LVDS_ENABLE_DITHER;
  193.         }
  194.         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  195.         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  196.                 temp |= LVDS_HSYNC_POLARITY;
  197.         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  198.                 temp |= LVDS_VSYNC_POLARITY;
  199.  
  200.         I915_WRITE(lvds_encoder->reg, temp);
  201. }
  202.  
  203. /**
  204.  * Sets the power state for the panel.
  205.  */
  206. static void intel_enable_lvds(struct intel_encoder *encoder)
  207. {
  208.         struct drm_device *dev = encoder->base.dev;
  209.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  210.         struct intel_connector *intel_connector =
  211.                 &lvds_encoder->attached_connector->base;
  212.         struct drm_i915_private *dev_priv = dev->dev_private;
  213.         u32 ctl_reg, stat_reg;
  214.  
  215.         if (HAS_PCH_SPLIT(dev)) {
  216.                 ctl_reg = PCH_PP_CONTROL;
  217.                 stat_reg = PCH_PP_STATUS;
  218.         } else {
  219.                 ctl_reg = PP_CONTROL;
  220.                 stat_reg = PP_STATUS;
  221.         }
  222.  
  223.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  224.  
  225.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  226.         POSTING_READ(lvds_encoder->reg);
  227.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  228.                 DRM_ERROR("timed out waiting for panel to power on\n");
  229.  
  230.         intel_panel_enable_backlight(intel_connector);
  231. }
  232.  
  233. static void intel_disable_lvds(struct intel_encoder *encoder)
  234. {
  235.         struct drm_device *dev = encoder->base.dev;
  236.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  237.         struct drm_i915_private *dev_priv = dev->dev_private;
  238.         u32 ctl_reg, stat_reg;
  239.  
  240.         if (HAS_PCH_SPLIT(dev)) {
  241.                 ctl_reg = PCH_PP_CONTROL;
  242.                 stat_reg = PCH_PP_STATUS;
  243.         } else {
  244.                 ctl_reg = PP_CONTROL;
  245.                 stat_reg = PP_STATUS;
  246.         }
  247.  
  248.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  249.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  250.                 DRM_ERROR("timed out waiting for panel to power off\n");
  251.  
  252.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  253.         POSTING_READ(lvds_encoder->reg);
  254. }
  255.  
  256. static void gmch_disable_lvds(struct intel_encoder *encoder)
  257. {
  258.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  259.         struct intel_connector *intel_connector =
  260.                 &lvds_encoder->attached_connector->base;
  261.  
  262.         intel_panel_disable_backlight(intel_connector);
  263.  
  264.         intel_disable_lvds(encoder);
  265. }
  266.  
  267. static void pch_disable_lvds(struct intel_encoder *encoder)
  268. {
  269.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  270.         struct intel_connector *intel_connector =
  271.                 &lvds_encoder->attached_connector->base;
  272.  
  273.         intel_panel_disable_backlight(intel_connector);
  274. }
  275.  
  276. static void pch_post_disable_lvds(struct intel_encoder *encoder)
  277. {
  278.         intel_disable_lvds(encoder);
  279. }
  280.  
  281. static enum drm_mode_status
  282. intel_lvds_mode_valid(struct drm_connector *connector,
  283.                       struct drm_display_mode *mode)
  284. {
  285.         struct intel_connector *intel_connector = to_intel_connector(connector);
  286.         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  287.         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
  288.  
  289.         if (mode->hdisplay > fixed_mode->hdisplay)
  290.                 return MODE_PANEL;
  291.         if (mode->vdisplay > fixed_mode->vdisplay)
  292.                 return MODE_PANEL;
  293.         if (fixed_mode->clock > max_pixclk)
  294.                 return MODE_CLOCK_HIGH;
  295.  
  296.         return MODE_OK;
  297. }
  298.  
  299. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  300.                                       struct intel_crtc_state *pipe_config)
  301. {
  302.         struct drm_device *dev = intel_encoder->base.dev;
  303.         struct intel_lvds_encoder *lvds_encoder =
  304.                 to_lvds_encoder(&intel_encoder->base);
  305.         struct intel_connector *intel_connector =
  306.                 &lvds_encoder->attached_connector->base;
  307.         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  308.         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
  309.         unsigned int lvds_bpp;
  310.  
  311.         /* Should never happen!! */
  312.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  313.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  314.                 return false;
  315.         }
  316.  
  317.         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
  318.                 lvds_bpp = 8*3;
  319.         else
  320.                 lvds_bpp = 6*3;
  321.  
  322.         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  323.                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  324.                               pipe_config->pipe_bpp, lvds_bpp);
  325.                 pipe_config->pipe_bpp = lvds_bpp;
  326.         }
  327.  
  328.         /*
  329.          * We have timings from the BIOS for the panel, put them in
  330.          * to the adjusted mode.  The CRTC will be set up for this mode,
  331.          * with the panel scaling set up to source from the H/VDisplay
  332.          * of the original mode.
  333.          */
  334.         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  335.                                adjusted_mode);
  336.  
  337.         if (HAS_PCH_SPLIT(dev)) {
  338.                 pipe_config->has_pch_encoder = true;
  339.  
  340.                 intel_pch_panel_fitting(intel_crtc, pipe_config,
  341.                                         intel_connector->panel.fitting_mode);
  342.         } else {
  343.                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
  344.                                          intel_connector->panel.fitting_mode);
  345.  
  346.         }
  347.  
  348.         /*
  349.          * XXX: It would be nice to support lower refresh rates on the
  350.          * panels to reduce power consumption, and perhaps match the
  351.          * user's requested refresh rate.
  352.          */
  353.  
  354.         return true;
  355. }
  356.  
  357. /**
  358.  * Detect the LVDS connection.
  359.  *
  360.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  361.  * connected and closed means disconnected.  We also send hotplug events as
  362.  * needed, using lid status notification from the input layer.
  363.  */
  364. static enum drm_connector_status
  365. intel_lvds_detect(struct drm_connector *connector, bool force)
  366. {
  367.         struct drm_device *dev = connector->dev;
  368.         enum drm_connector_status status;
  369.  
  370.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  371.                       connector->base.id, connector->name);
  372.  
  373.         status = intel_panel_detect(dev);
  374.         if (status != connector_status_unknown)
  375.                 return status;
  376.  
  377.         return connector_status_connected;
  378. }
  379.  
  380. /**
  381.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  382.  */
  383. static int intel_lvds_get_modes(struct drm_connector *connector)
  384. {
  385.         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  386.         struct drm_device *dev = connector->dev;
  387.         struct drm_display_mode *mode;
  388.  
  389.         /* use cached edid if we have one */
  390.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  391.                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
  392.  
  393.         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  394.         if (mode == NULL)
  395.                 return 0;
  396.  
  397.         drm_mode_probed_add(connector, mode);
  398.         return 1;
  399. }
  400.  
  401. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  402. {
  403.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  404.         return 1;
  405. }
  406.  
  407. /* The GPU hangs up on these systems if modeset is performed on LID open */
  408. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  409.         {
  410.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  411.                 .ident = "Toshiba Tecra A11",
  412.                 .matches = {
  413.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  414.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  415.                 },
  416.         },
  417.  
  418.         { }     /* terminating entry */
  419. };
  420.  
  421. #if 0
  422. /*
  423.  * Lid events. Note the use of 'modeset':
  424.  *  - we set it to MODESET_ON_LID_OPEN on lid close,
  425.  *    and set it to MODESET_DONE on open
  426.  *  - we use it as a "only once" bit (ie we ignore
  427.  *    duplicate events where it was already properly set)
  428.  *  - the suspend/resume paths will set it to
  429.  *    MODESET_SUSPENDED and ignore the lid open event,
  430.  *    because they restore the mode ("lid open").
  431.  */
  432. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  433.                             void *unused)
  434. {
  435.         struct intel_lvds_connector *lvds_connector =
  436.                 container_of(nb, struct intel_lvds_connector, lid_notifier);
  437.         struct drm_connector *connector = &lvds_connector->base.base;
  438.         struct drm_device *dev = connector->dev;
  439.         struct drm_i915_private *dev_priv = dev->dev_private;
  440.  
  441.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  442.                 return NOTIFY_OK;
  443.  
  444.         mutex_lock(&dev_priv->modeset_restore_lock);
  445.         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  446.                 goto exit;
  447.         /*
  448.          * check and update the status of LVDS connector after receiving
  449.          * the LID nofication event.
  450.          */
  451.         connector->status = connector->funcs->detect(connector, false);
  452.  
  453.         /* Don't force modeset on machines where it causes a GPU lockup */
  454.         if (dmi_check_system(intel_no_modeset_on_lid))
  455.                 goto exit;
  456.         if (!acpi_lid_open()) {
  457.                 /* do modeset on next lid open event */
  458.                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  459.                 goto exit;
  460.         }
  461.  
  462.         if (dev_priv->modeset_restore == MODESET_DONE)
  463.                 goto exit;
  464.  
  465.         /*
  466.          * Some old platform's BIOS love to wreak havoc while the lid is closed.
  467.          * We try to detect this here and undo any damage. The split for PCH
  468.          * platforms is rather conservative and a bit arbitrary expect that on
  469.          * those platforms VGA disabling requires actual legacy VGA I/O access,
  470.          * and as part of the cleanup in the hw state restore we also redisable
  471.          * the vga plane.
  472.          */
  473.         if (!HAS_PCH_SPLIT(dev)) {
  474.                 drm_modeset_lock_all(dev);
  475.                 intel_display_resume(dev);
  476.                 drm_modeset_unlock_all(dev);
  477.         }
  478.  
  479.         dev_priv->modeset_restore = MODESET_DONE;
  480.  
  481. exit:
  482.         mutex_unlock(&dev_priv->modeset_restore_lock);
  483.         return NOTIFY_OK;
  484. }
  485. #endif
  486.  
  487. /**
  488.  * intel_lvds_destroy - unregister and free LVDS structures
  489.  * @connector: connector to free
  490.  *
  491.  * Unregister the DDC bus for this connector then free the driver private
  492.  * structure.
  493.  */
  494. static void intel_lvds_destroy(struct drm_connector *connector)
  495. {
  496.         struct intel_lvds_connector *lvds_connector =
  497.                 to_lvds_connector(connector);
  498.  
  499.  
  500.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  501.                 kfree(lvds_connector->base.edid);
  502.  
  503.         intel_panel_fini(&lvds_connector->base.panel);
  504.  
  505.         drm_connector_cleanup(connector);
  506.         kfree(connector);
  507. }
  508.  
  509. static int intel_lvds_set_property(struct drm_connector *connector,
  510.                                    struct drm_property *property,
  511.                                    uint64_t value)
  512. {
  513.         struct intel_connector *intel_connector = to_intel_connector(connector);
  514.         struct drm_device *dev = connector->dev;
  515.  
  516.         if (property == dev->mode_config.scaling_mode_property) {
  517.                 struct drm_crtc *crtc;
  518.  
  519.                 if (value == DRM_MODE_SCALE_NONE) {
  520.                         DRM_DEBUG_KMS("no scaling not supported\n");
  521.                         return -EINVAL;
  522.                 }
  523.  
  524.                 if (intel_connector->panel.fitting_mode == value) {
  525.                         /* the LVDS scaling property is not changed */
  526.                         return 0;
  527.                 }
  528.                 intel_connector->panel.fitting_mode = value;
  529.  
  530.                 crtc = intel_attached_encoder(connector)->base.crtc;
  531.                 if (crtc && crtc->state->enable) {
  532.                         /*
  533.                          * If the CRTC is enabled, the display will be changed
  534.                          * according to the new panel fitting mode.
  535.                          */
  536.                         intel_crtc_restore_mode(crtc);
  537.                 }
  538.         }
  539.  
  540.         return 0;
  541. }
  542.  
  543. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  544.         .get_modes = intel_lvds_get_modes,
  545.         .mode_valid = intel_lvds_mode_valid,
  546.         .best_encoder = intel_best_encoder,
  547. };
  548.  
  549. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  550.         .dpms = drm_atomic_helper_connector_dpms,
  551.         .detect = intel_lvds_detect,
  552.         .fill_modes = drm_helper_probe_single_connector_modes,
  553.         .set_property = intel_lvds_set_property,
  554.         .atomic_get_property = intel_connector_atomic_get_property,
  555.         .destroy = intel_lvds_destroy,
  556.         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  557.         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  558. };
  559.  
  560. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  561.         .destroy = intel_encoder_destroy,
  562. };
  563.  
  564. static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  565. {
  566.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  567.         return 1;
  568. }
  569.  
  570. /* These systems claim to have LVDS, but really don't */
  571. static const struct dmi_system_id intel_no_lvds[] = {
  572.         {
  573.                 .callback = intel_no_lvds_dmi_callback,
  574.                 .ident = "Apple Mac Mini (Core series)",
  575.                 .matches = {
  576.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  577.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  578.                 },
  579.         },
  580.         {
  581.                 .callback = intel_no_lvds_dmi_callback,
  582.                 .ident = "Apple Mac Mini (Core 2 series)",
  583.                 .matches = {
  584.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  585.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  586.                 },
  587.         },
  588.         {
  589.                 .callback = intel_no_lvds_dmi_callback,
  590.                 .ident = "MSI IM-945GSE-A",
  591.                 .matches = {
  592.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  593.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  594.                 },
  595.         },
  596.         {
  597.                 .callback = intel_no_lvds_dmi_callback,
  598.                 .ident = "Dell Studio Hybrid",
  599.                 .matches = {
  600.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  601.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  602.                 },
  603.         },
  604.         {
  605.                 .callback = intel_no_lvds_dmi_callback,
  606.                 .ident = "Dell OptiPlex FX170",
  607.                 .matches = {
  608.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  609.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  610.                 },
  611.         },
  612.         {
  613.                 .callback = intel_no_lvds_dmi_callback,
  614.                 .ident = "AOpen Mini PC",
  615.                 .matches = {
  616.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  617.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  618.                 },
  619.         },
  620.         {
  621.                 .callback = intel_no_lvds_dmi_callback,
  622.                 .ident = "AOpen Mini PC MP915",
  623.                 .matches = {
  624.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  625.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  626.                 },
  627.         },
  628.         {
  629.                 .callback = intel_no_lvds_dmi_callback,
  630.                 .ident = "AOpen i915GMm-HFS",
  631.                 .matches = {
  632.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  633.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  634.                 },
  635.         },
  636.         {
  637.                 .callback = intel_no_lvds_dmi_callback,
  638.                 .ident = "AOpen i45GMx-I",
  639.                 .matches = {
  640.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  641.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  642.                 },
  643.         },
  644.         {
  645.                 .callback = intel_no_lvds_dmi_callback,
  646.                 .ident = "Aopen i945GTt-VFA",
  647.                 .matches = {
  648.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  649.                 },
  650.         },
  651.         {
  652.                 .callback = intel_no_lvds_dmi_callback,
  653.                 .ident = "Clientron U800",
  654.                 .matches = {
  655.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  656.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  657.                 },
  658.         },
  659.         {
  660.                 .callback = intel_no_lvds_dmi_callback,
  661.                 .ident = "Clientron E830",
  662.                 .matches = {
  663.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  664.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  665.                 },
  666.         },
  667.         {
  668.                 .callback = intel_no_lvds_dmi_callback,
  669.                 .ident = "Asus EeeBox PC EB1007",
  670.                 .matches = {
  671.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  672.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  673.                 },
  674.         },
  675.         {
  676.                 .callback = intel_no_lvds_dmi_callback,
  677.                 .ident = "Asus AT5NM10T-I",
  678.                 .matches = {
  679.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  680.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  681.                 },
  682.         },
  683.         {
  684.                 .callback = intel_no_lvds_dmi_callback,
  685.                 .ident = "Hewlett-Packard HP t5740",
  686.                 .matches = {
  687.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  688.                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  689.                 },
  690.         },
  691.         {
  692.                 .callback = intel_no_lvds_dmi_callback,
  693.                 .ident = "Hewlett-Packard t5745",
  694.                 .matches = {
  695.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  696.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  697.                 },
  698.         },
  699.         {
  700.                 .callback = intel_no_lvds_dmi_callback,
  701.                 .ident = "Hewlett-Packard st5747",
  702.                 .matches = {
  703.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  704.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  705.                 },
  706.         },
  707.         {
  708.                 .callback = intel_no_lvds_dmi_callback,
  709.                 .ident = "MSI Wind Box DC500",
  710.                 .matches = {
  711.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  712.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  713.                 },
  714.         },
  715.         {
  716.                 .callback = intel_no_lvds_dmi_callback,
  717.                 .ident = "Gigabyte GA-D525TUD",
  718.                 .matches = {
  719.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  720.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  721.                 },
  722.         },
  723.         {
  724.                 .callback = intel_no_lvds_dmi_callback,
  725.                 .ident = "Supermicro X7SPA-H",
  726.                 .matches = {
  727.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  728.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  729.                 },
  730.         },
  731.         {
  732.                 .callback = intel_no_lvds_dmi_callback,
  733.                 .ident = "Fujitsu Esprimo Q900",
  734.                 .matches = {
  735.                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  736.                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  737.                 },
  738.         },
  739.         {
  740.                 .callback = intel_no_lvds_dmi_callback,
  741.                 .ident = "Intel D410PT",
  742.                 .matches = {
  743.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  744.                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  745.                 },
  746.         },
  747.         {
  748.                 .callback = intel_no_lvds_dmi_callback,
  749.                 .ident = "Intel D425KT",
  750.                 .matches = {
  751.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  752.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  753.                 },
  754.         },
  755.         {
  756.                 .callback = intel_no_lvds_dmi_callback,
  757.                 .ident = "Intel D510MO",
  758.                 .matches = {
  759.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  760.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  761.                 },
  762.         },
  763.         {
  764.                 .callback = intel_no_lvds_dmi_callback,
  765.                 .ident = "Intel D525MW",
  766.                 .matches = {
  767.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  768.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  769.                 },
  770.         },
  771.  
  772.         { }     /* terminating entry */
  773. };
  774.  
  775. /*
  776.  * Enumerate the child dev array parsed from VBT to check whether
  777.  * the LVDS is present.
  778.  * If it is present, return 1.
  779.  * If it is not present, return false.
  780.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  781.  */
  782. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  783.                                    u8 *i2c_pin)
  784. {
  785.         struct drm_i915_private *dev_priv = dev->dev_private;
  786.         int i;
  787.  
  788.         if (!dev_priv->vbt.child_dev_num)
  789.                 return true;
  790.  
  791.         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  792.                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  793.                 struct old_child_dev_config *child = &uchild->old;
  794.  
  795.                 /* If the device type is not LFP, continue.
  796.                  * We have to check both the new identifiers as well as the
  797.                  * old for compatibility with some BIOSes.
  798.                  */
  799.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  800.                     child->device_type != DEVICE_TYPE_LFP)
  801.                         continue;
  802.  
  803.                 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
  804.                         *i2c_pin = child->i2c_pin;
  805.  
  806.                 /* However, we cannot trust the BIOS writers to populate
  807.                  * the VBT correctly.  Since LVDS requires additional
  808.                  * information from AIM blocks, a non-zero addin offset is
  809.                  * a good indicator that the LVDS is actually present.
  810.                  */
  811.                 if (child->addin_offset)
  812.                         return true;
  813.  
  814.                 /* But even then some BIOS writers perform some black magic
  815.                  * and instantiate the device without reference to any
  816.                  * additional data.  Trust that if the VBT was written into
  817.                  * the OpRegion then they have validated the LVDS's existence.
  818.                  */
  819.                 if (dev_priv->opregion.vbt)
  820.                         return true;
  821.         }
  822.  
  823.         return false;
  824. }
  825.  
  826. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  827. {
  828.         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  829.         return 1;
  830. }
  831.  
  832. static const struct dmi_system_id intel_dual_link_lvds[] = {
  833.         {
  834.                 .callback = intel_dual_link_lvds_callback,
  835.                 .ident = "Apple MacBook Pro 15\" (2010)",
  836.                 .matches = {
  837.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  838.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
  839.                 },
  840.         },
  841.         {
  842.                 .callback = intel_dual_link_lvds_callback,
  843.                 .ident = "Apple MacBook Pro 15\" (2011)",
  844.                 .matches = {
  845.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  846.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  847.                 },
  848.         },
  849.         {
  850.                 .callback = intel_dual_link_lvds_callback,
  851.                 .ident = "Apple MacBook Pro 15\" (2012)",
  852.                 .matches = {
  853.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  854.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
  855.                 },
  856.         },
  857.         { }     /* terminating entry */
  858. };
  859.  
  860. bool intel_is_dual_link_lvds(struct drm_device *dev)
  861. {
  862.         struct intel_encoder *encoder;
  863.         struct intel_lvds_encoder *lvds_encoder;
  864.  
  865.         for_each_intel_encoder(dev, encoder) {
  866.                 if (encoder->type == INTEL_OUTPUT_LVDS) {
  867.                         lvds_encoder = to_lvds_encoder(&encoder->base);
  868.  
  869.                         return lvds_encoder->is_dual_link;
  870.                 }
  871.         }
  872.  
  873.         return false;
  874. }
  875.  
  876. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  877. {
  878.         struct drm_device *dev = lvds_encoder->base.base.dev;
  879.         unsigned int val;
  880.         struct drm_i915_private *dev_priv = dev->dev_private;
  881.  
  882.         /* use the module option value if specified */
  883.         if (i915.lvds_channel_mode > 0)
  884.                 return i915.lvds_channel_mode == 2;
  885.  
  886.         /* single channel LVDS is limited to 112 MHz */
  887.         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
  888.             > 112999)
  889.                 return true;
  890.  
  891.         if (dmi_check_system(intel_dual_link_lvds))
  892.                 return true;
  893.  
  894.         /* BIOS should set the proper LVDS register value at boot, but
  895.          * in reality, it doesn't set the value when the lid is closed;
  896.          * we need to check "the value to be set" in VBT when LVDS
  897.          * register is uninitialized.
  898.          */
  899.         val = I915_READ(lvds_encoder->reg);
  900.         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  901.                 val = dev_priv->vbt.bios_lvds_val;
  902.  
  903.         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  904. }
  905.  
  906. static bool intel_lvds_supported(struct drm_device *dev)
  907. {
  908.         /* With the introduction of the PCH we gained a dedicated
  909.          * LVDS presence pin, use it. */
  910.         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  911.                 return true;
  912.  
  913.         /* Otherwise LVDS was only attached to mobile products,
  914.          * except for the inglorious 830gm */
  915.         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  916.                 return true;
  917.  
  918.         return false;
  919. }
  920.  
  921. /**
  922.  * intel_lvds_init - setup LVDS connectors on this device
  923.  * @dev: drm device
  924.  *
  925.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  926.  * modes we can display on the LVDS panel (if present).
  927.  */
  928. void intel_lvds_init(struct drm_device *dev)
  929. {
  930.         struct drm_i915_private *dev_priv = dev->dev_private;
  931.         struct intel_lvds_encoder *lvds_encoder;
  932.         struct intel_encoder *intel_encoder;
  933.         struct intel_lvds_connector *lvds_connector;
  934.         struct intel_connector *intel_connector;
  935.         struct drm_connector *connector;
  936.         struct drm_encoder *encoder;
  937.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  938.         struct drm_display_mode *fixed_mode = NULL;
  939.         struct drm_display_mode *downclock_mode = NULL;
  940.         struct edid *edid;
  941.         struct drm_crtc *crtc;
  942.         u32 lvds_reg;
  943.         u32 lvds;
  944.         int pipe;
  945.         u8 pin;
  946.  
  947.         /*
  948.          * Unlock registers and just leave them unlocked. Do this before
  949.          * checking quirk lists to avoid bogus WARNINGs.
  950.          */
  951.         if (HAS_PCH_SPLIT(dev)) {
  952.                 I915_WRITE(PCH_PP_CONTROL,
  953.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  954.         } else if (INTEL_INFO(dev_priv)->gen < 5) {
  955.                 I915_WRITE(PP_CONTROL,
  956.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  957.         }
  958.         if (!intel_lvds_supported(dev))
  959.                 return;
  960.  
  961.         /* Skip init on machines we know falsely report LVDS */
  962.         if (dmi_check_system(intel_no_lvds))
  963.                 return;
  964.  
  965.         if (HAS_PCH_SPLIT(dev))
  966.                 lvds_reg = PCH_LVDS;
  967.         else
  968.                 lvds_reg = LVDS;
  969.  
  970.         lvds = I915_READ(lvds_reg);
  971.  
  972.         if (HAS_PCH_SPLIT(dev)) {
  973.                 if ((lvds & LVDS_DETECTED) == 0)
  974.                         return;
  975.                 if (dev_priv->vbt.edp_support) {
  976.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  977.                         return;
  978.                 }
  979.         }
  980.  
  981.         pin = GMBUS_PIN_PANEL;
  982.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  983.                 if ((lvds & LVDS_PORT_EN) == 0) {
  984.                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  985.                         return;
  986.                 }
  987.                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
  988.         }
  989.  
  990.          /* Set the Panel Power On/Off timings if uninitialized. */
  991.         if (INTEL_INFO(dev_priv)->gen < 5 &&
  992.             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
  993.                 /* Set T2 to 40ms and T5 to 200ms */
  994.                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  995.  
  996.                 /* Set T3 to 35ms and Tx to 200ms */
  997.                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  998.  
  999.                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
  1000.         }
  1001.  
  1002.         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  1003.         if (!lvds_encoder)
  1004.                 return;
  1005.  
  1006.         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  1007.         if (!lvds_connector) {
  1008.                 kfree(lvds_encoder);
  1009.                 return;
  1010.         }
  1011.  
  1012.         if (intel_connector_init(&lvds_connector->base) < 0) {
  1013.                 kfree(lvds_connector);
  1014.                 kfree(lvds_encoder);
  1015.                 return;
  1016.         }
  1017.  
  1018.         lvds_encoder->attached_connector = lvds_connector;
  1019.  
  1020.         intel_encoder = &lvds_encoder->base;
  1021.         encoder = &intel_encoder->base;
  1022.         intel_connector = &lvds_connector->base;
  1023.         connector = &intel_connector->base;
  1024.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  1025.                            DRM_MODE_CONNECTOR_LVDS);
  1026.  
  1027.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  1028.                          DRM_MODE_ENCODER_LVDS);
  1029.  
  1030.         intel_encoder->enable = intel_enable_lvds;
  1031.         intel_encoder->pre_enable = intel_pre_enable_lvds;
  1032.         intel_encoder->compute_config = intel_lvds_compute_config;
  1033.         if (HAS_PCH_SPLIT(dev_priv)) {
  1034.                 intel_encoder->disable = pch_disable_lvds;
  1035.                 intel_encoder->post_disable = pch_post_disable_lvds;
  1036.         } else {
  1037.                 intel_encoder->disable = gmch_disable_lvds;
  1038.         }
  1039.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  1040.         intel_encoder->get_config = intel_lvds_get_config;
  1041.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  1042.         intel_connector->unregister = intel_connector_unregister;
  1043.  
  1044.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  1045.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  1046.  
  1047.         intel_encoder->cloneable = 0;
  1048.         if (HAS_PCH_SPLIT(dev))
  1049.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  1050.         else if (IS_GEN4(dev))
  1051.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  1052.         else
  1053.                 intel_encoder->crtc_mask = (1 << 1);
  1054.  
  1055.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  1056.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  1057.         connector->interlace_allowed = false;
  1058.         connector->doublescan_allowed = false;
  1059.  
  1060.         lvds_encoder->reg = lvds_reg;
  1061.  
  1062.         /* create the scaling mode property */
  1063.         drm_mode_create_scaling_mode_property(dev);
  1064.         drm_object_attach_property(&connector->base,
  1065.                                       dev->mode_config.scaling_mode_property,
  1066.                                       DRM_MODE_SCALE_ASPECT);
  1067.         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  1068.         /*
  1069.          * LVDS discovery:
  1070.          * 1) check for EDID on DDC
  1071.          * 2) check for VBT data
  1072.          * 3) check to see if LVDS is already on
  1073.          *    if none of the above, no panel
  1074.          * 4) make sure lid is open
  1075.          *    if closed, act like it's not there for now
  1076.          */
  1077.  
  1078.         /*
  1079.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1080.          * preferred mode is the right one.
  1081.          */
  1082.         mutex_lock(&dev->mode_config.mutex);
  1083.         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1084.         if (edid) {
  1085.                 if (drm_add_edid_modes(connector, edid)) {
  1086.                         drm_mode_connector_update_edid_property(connector,
  1087.                                                                 edid);
  1088.                 } else {
  1089.                         kfree(edid);
  1090.                         edid = ERR_PTR(-EINVAL);
  1091.                 }
  1092.         } else {
  1093.                 edid = ERR_PTR(-ENOENT);
  1094.         }
  1095.         lvds_connector->base.edid = edid;
  1096.  
  1097.         if (IS_ERR_OR_NULL(edid)) {
  1098.                 /* Didn't get an EDID, so
  1099.                  * Set wide sync ranges so we get all modes
  1100.                  * handed to valid_mode for checking
  1101.                  */
  1102.                 connector->display_info.min_vfreq = 0;
  1103.                 connector->display_info.max_vfreq = 200;
  1104.                 connector->display_info.min_hfreq = 0;
  1105.                 connector->display_info.max_hfreq = 200;
  1106.         }
  1107.  
  1108.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1109.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1110.                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1111.                         drm_mode_debug_printmodeline(scan);
  1112.  
  1113.                         fixed_mode = drm_mode_duplicate(dev, scan);
  1114.                         if (fixed_mode)
  1115.                                 goto out;
  1116.                 }
  1117.         }
  1118.  
  1119.         /* Failed to get EDID, what about VBT? */
  1120.         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  1121.                 DRM_DEBUG_KMS("using mode from VBT: ");
  1122.                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  1123.  
  1124.                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  1125.                 if (fixed_mode) {
  1126.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1127.                         goto out;
  1128.                 }
  1129.         }
  1130.  
  1131.         /*
  1132.          * If we didn't get EDID, try checking if the panel is already turned
  1133.          * on.  If so, assume that whatever is currently programmed is the
  1134.          * correct mode.
  1135.          */
  1136.  
  1137.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1138.         if (HAS_PCH_SPLIT(dev))
  1139.                 goto failed;
  1140.  
  1141.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1142.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1143.  
  1144.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1145.                 fixed_mode = intel_crtc_mode_get(dev, crtc);
  1146.                 if (fixed_mode) {
  1147.                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1148.                         drm_mode_debug_printmodeline(fixed_mode);
  1149.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1150.                         goto out;
  1151.                 }
  1152.         }
  1153.  
  1154.         /* If we still don't have a mode after all that, give up. */
  1155.         if (!fixed_mode)
  1156.                 goto failed;
  1157.  
  1158. out:
  1159.         mutex_unlock(&dev->mode_config.mutex);
  1160.  
  1161.         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
  1162.  
  1163.         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1164.         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1165.                       lvds_encoder->is_dual_link ? "dual" : "single");
  1166.  
  1167.         lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
  1168.                                  LVDS_A3_POWER_MASK;
  1169.  
  1170.         drm_connector_register(connector);
  1171.  
  1172.         intel_panel_setup_backlight(connector, INVALID_PIPE);
  1173.  
  1174.         return;
  1175.  
  1176. failed:
  1177.         mutex_unlock(&dev->mode_config.mutex);
  1178.  
  1179.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1180.         drm_connector_cleanup(connector);
  1181.         drm_encoder_cleanup(encoder);
  1182.         kfree(lvds_encoder);
  1183.         kfree(lvds_connector);
  1184.         return;
  1185. }
  1186.