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  1. /*
  2.  * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3.  * Copyright © 2006-2009 Intel Corporation
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Jesse Barnes <jesse.barnes@intel.com>
  27.  */
  28.  
  29. #include <linux/i2c.h>
  30. #include <linux/slab.h>
  31. //#include <linux/delay.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39.  
  40. struct intel_hdmi {
  41.         struct intel_encoder base;
  42.         u32 sdvox_reg;
  43.         int ddc_bus;
  44.         uint32_t color_range;
  45.         bool has_hdmi_sink;
  46.         bool has_audio;
  47.         int force_audio;
  48.         void (*write_infoframe)(struct drm_encoder *encoder,
  49.                                 struct dip_infoframe *frame);
  50. };
  51.  
  52. static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
  53. {
  54.         return container_of(encoder, struct intel_hdmi, base.base);
  55. }
  56.  
  57. static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
  58. {
  59.         return container_of(intel_attached_encoder(connector),
  60.                             struct intel_hdmi, base);
  61. }
  62.  
  63. void intel_dip_infoframe_csum(struct dip_infoframe *frame)
  64. {
  65.         uint8_t *data = (uint8_t *)frame;
  66.         uint8_t sum = 0;
  67.         unsigned i;
  68.  
  69.         frame->checksum = 0;
  70.         frame->ecc = 0;
  71.  
  72.         /* Header isn't part of the checksum */
  73.         for (i = 5; i < frame->len; i++)
  74.                 sum += data[i];
  75.  
  76.         frame->checksum = 0x100 - sum;
  77. }
  78.  
  79. static u32 intel_infoframe_index(struct dip_infoframe *frame)
  80. {
  81.         u32 flags = 0;
  82.  
  83.         switch (frame->type) {
  84.         case DIP_TYPE_AVI:
  85.                 flags |= VIDEO_DIP_SELECT_AVI;
  86.                 break;
  87.         case DIP_TYPE_SPD:
  88.                 flags |= VIDEO_DIP_SELECT_SPD;
  89.                 break;
  90.         default:
  91.                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
  92.                 break;
  93.         }
  94.  
  95.         return flags;
  96. }
  97.  
  98. static u32 intel_infoframe_flags(struct dip_infoframe *frame)
  99. {
  100.         u32 flags = 0;
  101.  
  102.         switch (frame->type) {
  103.         case DIP_TYPE_AVI:
  104.                 flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC;
  105.                 break;
  106.         case DIP_TYPE_SPD:
  107.                 flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_2VSYNC;
  108.                 break;
  109.         default:
  110.                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
  111.                 break;
  112.         }
  113.  
  114.         return flags;
  115. }
  116.  
  117. static void i9xx_write_infoframe(struct drm_encoder *encoder,
  118.                                  struct dip_infoframe *frame)
  119. {
  120.         uint32_t *data = (uint32_t *)frame;
  121.         struct drm_device *dev = encoder->dev;
  122.         struct drm_i915_private *dev_priv = dev->dev_private;
  123.         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  124.         u32 port, flags, val = I915_READ(VIDEO_DIP_CTL);
  125.         unsigned i, len = DIP_HEADER_SIZE + frame->len;
  126.  
  127.  
  128.         /* XXX first guess at handling video port, is this corrent? */
  129.         if (intel_hdmi->sdvox_reg == SDVOB)
  130.                 port = VIDEO_DIP_PORT_B;
  131.         else if (intel_hdmi->sdvox_reg == SDVOC)
  132.                 port = VIDEO_DIP_PORT_C;
  133.         else
  134.                 return;
  135.  
  136.         flags = intel_infoframe_index(frame);
  137.  
  138.         val &= ~VIDEO_DIP_SELECT_MASK;
  139.  
  140.         I915_WRITE(VIDEO_DIP_CTL, val | port | flags);
  141.  
  142.         for (i = 0; i < len; i += 4) {
  143.                 I915_WRITE(VIDEO_DIP_DATA, *data);
  144.                 data++;
  145.         }
  146.  
  147.         flags |= intel_infoframe_flags(frame);
  148.  
  149.         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
  150. }
  151.  
  152. static void ironlake_write_infoframe(struct drm_encoder *encoder,
  153.                                      struct dip_infoframe *frame)
  154. {
  155.         uint32_t *data = (uint32_t *)frame;
  156.         struct drm_device *dev = encoder->dev;
  157.         struct drm_i915_private *dev_priv = dev->dev_private;
  158.         struct drm_crtc *crtc = encoder->crtc;
  159.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  160.         int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
  161.         unsigned i, len = DIP_HEADER_SIZE + frame->len;
  162.         u32 flags, val = I915_READ(reg);
  163.  
  164.         intel_wait_for_vblank(dev, intel_crtc->pipe);
  165.  
  166.         flags = intel_infoframe_index(frame);
  167.  
  168.         val &= ~VIDEO_DIP_SELECT_MASK;
  169.  
  170.         I915_WRITE(reg, val | flags);
  171.  
  172.         for (i = 0; i < len; i += 4) {
  173.                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
  174.                 data++;
  175.         }
  176.  
  177.         flags |= intel_infoframe_flags(frame);
  178.  
  179.         I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);
  180. }
  181. static void intel_set_infoframe(struct drm_encoder *encoder,
  182.                                 struct dip_infoframe *frame)
  183. {
  184.         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  185.  
  186.         if (!intel_hdmi->has_hdmi_sink)
  187.                 return;
  188.  
  189.         intel_dip_infoframe_csum(frame);
  190.         intel_hdmi->write_infoframe(encoder, frame);
  191. }
  192.  
  193. static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
  194. {
  195.         struct dip_infoframe avi_if = {
  196.                 .type = DIP_TYPE_AVI,
  197.                 .ver = DIP_VERSION_AVI,
  198.                 .len = DIP_LEN_AVI,
  199.         };
  200.  
  201.         intel_set_infoframe(encoder, &avi_if);
  202. }
  203.  
  204. static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
  205. {
  206.         struct dip_infoframe spd_if;
  207.  
  208.         memset(&spd_if, 0, sizeof(spd_if));
  209.         spd_if.type = DIP_TYPE_SPD;
  210.         spd_if.ver = DIP_VERSION_SPD;
  211.         spd_if.len = DIP_LEN_SPD;
  212.         strcpy(spd_if.body.spd.vn, "Intel");
  213.         strcpy(spd_if.body.spd.pd, "Integrated gfx");
  214.         spd_if.body.spd.sdi = DIP_SPD_PC;
  215.  
  216.         intel_set_infoframe(encoder, &spd_if);
  217. }
  218.  
  219. static void intel_hdmi_mode_set(struct drm_encoder *encoder,
  220.                                 struct drm_display_mode *mode,
  221.                                 struct drm_display_mode *adjusted_mode)
  222. {
  223.         struct drm_device *dev = encoder->dev;
  224.         struct drm_i915_private *dev_priv = dev->dev_private;
  225.         struct drm_crtc *crtc = encoder->crtc;
  226.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  227.         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  228.         u32 sdvox;
  229.  
  230.         sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
  231.         if (!HAS_PCH_SPLIT(dev))
  232.                 sdvox |= intel_hdmi->color_range;
  233.         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  234.                 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
  235.         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  236.                 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
  237.  
  238.         if (intel_crtc->bpp > 24)
  239.                 sdvox |= COLOR_FORMAT_12bpc;
  240.         else
  241.                 sdvox |= COLOR_FORMAT_8bpc;
  242.  
  243.         /* Required on CPT */
  244.         if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
  245.                 sdvox |= HDMI_MODE_SELECT;
  246.  
  247.         if (intel_hdmi->has_audio) {
  248.                 sdvox |= SDVO_AUDIO_ENABLE;
  249.                 sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
  250.         }
  251.  
  252.         if (intel_crtc->pipe == 1) {
  253.                 if (HAS_PCH_CPT(dev))
  254.                         sdvox |= PORT_TRANS_B_SEL_CPT;
  255.                 else
  256.                         sdvox |= SDVO_PIPE_B_SELECT;
  257.         }
  258.  
  259.         I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
  260.         POSTING_READ(intel_hdmi->sdvox_reg);
  261.  
  262.         intel_hdmi_set_avi_infoframe(encoder);
  263.         intel_hdmi_set_spd_infoframe(encoder);
  264. }
  265.  
  266. static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
  267. {
  268.         struct drm_device *dev = encoder->dev;
  269.         struct drm_i915_private *dev_priv = dev->dev_private;
  270.         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  271.         u32 temp;
  272.  
  273.         temp = I915_READ(intel_hdmi->sdvox_reg);
  274.  
  275.         /* HW workaround, need to toggle enable bit off and on for 12bpc, but
  276.          * we do this anyway which shows more stable in testing.
  277.          */
  278.         if (HAS_PCH_SPLIT(dev)) {
  279.                 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
  280.                 POSTING_READ(intel_hdmi->sdvox_reg);
  281.         }
  282.  
  283.         if (mode != DRM_MODE_DPMS_ON) {
  284.                 temp &= ~SDVO_ENABLE;
  285.         } else {
  286.                 temp |= SDVO_ENABLE;
  287.         }
  288.  
  289.         I915_WRITE(intel_hdmi->sdvox_reg, temp);
  290.         POSTING_READ(intel_hdmi->sdvox_reg);
  291.  
  292.         /* HW workaround, need to write this twice for issue that may result
  293.          * in first write getting masked.
  294.          */
  295.         if (HAS_PCH_SPLIT(dev)) {
  296.                 I915_WRITE(intel_hdmi->sdvox_reg, temp);
  297.                 POSTING_READ(intel_hdmi->sdvox_reg);
  298.         }
  299. }
  300.  
  301. static int intel_hdmi_mode_valid(struct drm_connector *connector,
  302.                                  struct drm_display_mode *mode)
  303. {
  304.         if (mode->clock > 165000)
  305.                 return MODE_CLOCK_HIGH;
  306.         if (mode->clock < 20000)
  307.                 return MODE_CLOCK_LOW;
  308.  
  309.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  310.                 return MODE_NO_DBLESCAN;
  311.  
  312.         return MODE_OK;
  313. }
  314.  
  315. static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
  316.                                   struct drm_display_mode *mode,
  317.                                   struct drm_display_mode *adjusted_mode)
  318. {
  319.         return true;
  320. }
  321.  
  322. static enum drm_connector_status
  323. intel_hdmi_detect(struct drm_connector *connector, bool force)
  324. {
  325.         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  326.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  327.         struct edid *edid;
  328.         enum drm_connector_status status = connector_status_disconnected;
  329.  
  330.         intel_hdmi->has_hdmi_sink = false;
  331.         intel_hdmi->has_audio = false;
  332.         edid = drm_get_edid(connector,
  333.                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  334.  
  335.         if (edid) {
  336.                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  337.                         status = connector_status_connected;
  338.                         intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
  339.                         intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
  340.                 }
  341.                 connector->display_info.raw_edid = NULL;
  342.                 kfree(edid);
  343.         }
  344.  
  345.         if (status == connector_status_connected) {
  346.                 if (intel_hdmi->force_audio)
  347.                         intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
  348.         }
  349.  
  350.         return status;
  351. }
  352.  
  353. static int intel_hdmi_get_modes(struct drm_connector *connector)
  354. {
  355.         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  356.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  357.  
  358.         /* We should parse the EDID data and find out if it's an HDMI sink so
  359.          * we can send audio to it.
  360.          */
  361.  
  362.         return intel_ddc_get_modes(connector,
  363.                                    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  364. }
  365.  
  366. static bool
  367. intel_hdmi_detect_audio(struct drm_connector *connector)
  368. {
  369.         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  370.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  371.         struct edid *edid;
  372.         bool has_audio = false;
  373.  
  374.         edid = drm_get_edid(connector,
  375.                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
  376.         if (edid) {
  377.                 if (edid->input & DRM_EDID_INPUT_DIGITAL)
  378.                         has_audio = drm_detect_monitor_audio(edid);
  379.  
  380.                 connector->display_info.raw_edid = NULL;
  381.                 kfree(edid);
  382.         }
  383.  
  384.         return has_audio;
  385. }
  386.  
  387. static int
  388. intel_hdmi_set_property(struct drm_connector *connector,
  389.                       struct drm_property *property,
  390.                       uint64_t val)
  391. {
  392.         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
  393.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  394.         int ret;
  395.  
  396.         ret = drm_connector_property_set_value(connector, property, val);
  397.         if (ret)
  398.                 return ret;
  399. #if 0
  400.         if (property == dev_priv->force_audio_property) {
  401.                 int i = val;
  402.                 bool has_audio;
  403.  
  404.                 if (i == intel_hdmi->force_audio)
  405.                         return 0;
  406.  
  407.                 intel_hdmi->force_audio = i;
  408.  
  409.                 if (i == 0)
  410.                         has_audio = intel_hdmi_detect_audio(connector);
  411.                 else
  412.                         has_audio = i > 0;
  413.  
  414.                 if (has_audio == intel_hdmi->has_audio)
  415.                         return 0;
  416.  
  417.                 intel_hdmi->has_audio = has_audio;
  418.                 goto done;
  419.         }
  420.  
  421.         if (property == dev_priv->broadcast_rgb_property) {
  422.                 if (val == !!intel_hdmi->color_range)
  423.                         return 0;
  424.  
  425.                 intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  426.                 goto done;
  427.         }
  428. #endif
  429.         return -EINVAL;
  430.  
  431. done:
  432.         if (intel_hdmi->base.base.crtc) {
  433.                 struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
  434.                 drm_crtc_helper_set_mode(crtc, &crtc->mode,
  435.                                          crtc->x, crtc->y,
  436.                                          crtc->fb);
  437.         }
  438.  
  439.         return 0;
  440. }
  441.  
  442. static void intel_hdmi_destroy(struct drm_connector *connector)
  443. {
  444.         drm_sysfs_connector_remove(connector);
  445.         drm_connector_cleanup(connector);
  446.         kfree(connector);
  447. }
  448.  
  449. static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
  450.         .dpms = intel_hdmi_dpms,
  451.         .mode_fixup = intel_hdmi_mode_fixup,
  452.         .prepare = intel_encoder_prepare,
  453.         .mode_set = intel_hdmi_mode_set,
  454.         .commit = intel_encoder_commit,
  455. };
  456.  
  457. static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
  458.         .dpms = drm_helper_connector_dpms,
  459.         .detect = intel_hdmi_detect,
  460.         .fill_modes = drm_helper_probe_single_connector_modes,
  461.         .set_property = intel_hdmi_set_property,
  462.         .destroy = intel_hdmi_destroy,
  463. };
  464.  
  465. static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
  466.         .get_modes = intel_hdmi_get_modes,
  467.         .mode_valid = intel_hdmi_mode_valid,
  468.         .best_encoder = intel_best_encoder,
  469. };
  470.  
  471. static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
  472.         .destroy = intel_encoder_destroy,
  473. };
  474.  
  475. static void
  476. intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
  477. {
  478.         intel_attach_force_audio_property(connector);
  479.         intel_attach_broadcast_rgb_property(connector);
  480. }
  481.  
  482. void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
  483. {
  484.         struct drm_i915_private *dev_priv = dev->dev_private;
  485.         struct drm_connector *connector;
  486.         struct intel_encoder *intel_encoder;
  487.         struct intel_connector *intel_connector;
  488.         struct intel_hdmi *intel_hdmi;
  489.  
  490.         intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
  491.         if (!intel_hdmi)
  492.                 return;
  493.  
  494.         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  495.         if (!intel_connector) {
  496.                 kfree(intel_hdmi);
  497.                 return;
  498.         }
  499.  
  500.         intel_encoder = &intel_hdmi->base;
  501.         drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
  502.                          DRM_MODE_ENCODER_TMDS);
  503.  
  504.         connector = &intel_connector->base;
  505.         drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
  506.                            DRM_MODE_CONNECTOR_HDMIA);
  507.         drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
  508.  
  509.         intel_encoder->type = INTEL_OUTPUT_HDMI;
  510.  
  511.         connector->polled = DRM_CONNECTOR_POLL_HPD;
  512.         connector->interlace_allowed = 0;
  513.         connector->doublescan_allowed = 0;
  514.         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  515.  
  516.         /* Set up the DDC bus. */
  517.         if (sdvox_reg == SDVOB) {
  518.                 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
  519.                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
  520.                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
  521.         } else if (sdvox_reg == SDVOC) {
  522.                 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
  523.                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
  524.                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
  525.         } else if (sdvox_reg == HDMIB) {
  526.                 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
  527.                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
  528.                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
  529.         } else if (sdvox_reg == HDMIC) {
  530.                 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
  531.                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
  532.                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
  533.         } else if (sdvox_reg == HDMID) {
  534.                 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
  535.                 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
  536.                 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
  537.         }
  538.  
  539.         intel_hdmi->sdvox_reg = sdvox_reg;
  540.  
  541.         if (!HAS_PCH_SPLIT(dev))
  542.                 intel_hdmi->write_infoframe = i9xx_write_infoframe;
  543.         else
  544.                 intel_hdmi->write_infoframe = ironlake_write_infoframe;
  545.  
  546.         drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
  547.  
  548.         intel_hdmi_add_properties(intel_hdmi, connector);
  549.  
  550.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  551.         drm_sysfs_connector_add(connector);
  552.  
  553.         /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
  554.          * 0xd.  Failure to do so will result in spurious interrupts being
  555.          * generated on the port when a cable is not attached.
  556.          */
  557.         if (IS_G4X(dev) && !IS_GM45(dev)) {
  558.                 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
  559.                 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
  560.         }
  561. }
  562.