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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8.  * and/or sell copies of the Software, and to permit persons to whom the
  9.  * Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21.  * DEALINGS IN THE SOFTWARE.
  22.  *
  23.  * Authors:
  24.  *      Eric Anholt <eric@anholt.net>
  25.  */
  26.  
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include <drm/drm_crtc_helper.h>
  32. #include <drm/drm_edid.h>
  33. #include "intel_drv.h"
  34. #include <drm/i915_drm.h>
  35. #include "i915_drv.h"
  36.  
  37. /* Here's the desired hotplug mode */
  38. #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  39.                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  40.                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  41.                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  42.                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  43.                            ADPA_CRT_HOTPLUG_ENABLE)
  44.  
  45. struct intel_crt {
  46.         struct intel_encoder base;
  47.         /* DPMS state is stored in the connector, which we need in the
  48.          * encoder's enable/disable callbacks */
  49.         struct intel_connector *connector;
  50.         bool force_hotplug_required;
  51.         u32 adpa_reg;
  52. };
  53.  
  54. static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  55. {
  56.         return container_of(intel_attached_encoder(connector),
  57.                             struct intel_crt, base);
  58. }
  59.  
  60. static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  61. {
  62.         return container_of(encoder, struct intel_crt, base);
  63. }
  64.  
  65. static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66.                                    enum pipe *pipe)
  67. {
  68.         struct drm_device *dev = encoder->base.dev;
  69.         struct drm_i915_private *dev_priv = dev->dev_private;
  70.         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71.         u32 tmp;
  72.  
  73.         tmp = I915_READ(crt->adpa_reg);
  74.  
  75.         if (!(tmp & ADPA_DAC_ENABLE))
  76.                 return false;
  77.  
  78.         if (HAS_PCH_CPT(dev))
  79.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  80.         else
  81.                 *pipe = PORT_TO_PIPE(tmp);
  82.  
  83.         return true;
  84. }
  85.  
  86. /* Note: The caller is required to filter out dpms modes not supported by the
  87.  * platform. */
  88. static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  89. {
  90.         struct drm_device *dev = encoder->base.dev;
  91.         struct drm_i915_private *dev_priv = dev->dev_private;
  92.         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  93.         u32 temp;
  94.  
  95.         temp = I915_READ(crt->adpa_reg);
  96.         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  97.         temp &= ~ADPA_DAC_ENABLE;
  98.  
  99.         switch (mode) {
  100.         case DRM_MODE_DPMS_ON:
  101.                 temp |= ADPA_DAC_ENABLE;
  102.                 break;
  103.         case DRM_MODE_DPMS_STANDBY:
  104.                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  105.                 break;
  106.         case DRM_MODE_DPMS_SUSPEND:
  107.                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  108.                 break;
  109.         case DRM_MODE_DPMS_OFF:
  110.                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  111.                 break;
  112.         }
  113.  
  114.         I915_WRITE(crt->adpa_reg, temp);
  115. }
  116.  
  117. static void intel_disable_crt(struct intel_encoder *encoder)
  118. {
  119.         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
  120. }
  121.  
  122. static void intel_enable_crt(struct intel_encoder *encoder)
  123. {
  124.         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  125.  
  126.         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
  127. }
  128.  
  129.  
  130. static void intel_crt_dpms(struct drm_connector *connector, int mode)
  131. {
  132.         struct drm_device *dev = connector->dev;
  133.         struct intel_encoder *encoder = intel_attached_encoder(connector);
  134.         struct drm_crtc *crtc;
  135.         int old_dpms;
  136.  
  137.         /* PCH platforms and VLV only support on/off. */
  138.         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
  139.                 mode = DRM_MODE_DPMS_OFF;
  140.  
  141.         if (mode == connector->dpms)
  142.                 return;
  143.  
  144.         old_dpms = connector->dpms;
  145.         connector->dpms = mode;
  146.  
  147.         /* Only need to change hw state when actually enabled */
  148.         crtc = encoder->base.crtc;
  149.         if (!crtc) {
  150.                 encoder->connectors_active = false;
  151.                 return;
  152.         }
  153.  
  154.         /* We need the pipe to run for anything but OFF. */
  155.         if (mode == DRM_MODE_DPMS_OFF)
  156.                 encoder->connectors_active = false;
  157.         else
  158.                 encoder->connectors_active = true;
  159.  
  160.         if (mode < old_dpms) {
  161.                 /* From off to on, enable the pipe first. */
  162.                 intel_crtc_update_dpms(crtc);
  163.  
  164.                 intel_crt_set_dpms(encoder, mode);
  165.         } else {
  166.                 intel_crt_set_dpms(encoder, mode);
  167.  
  168.                 intel_crtc_update_dpms(crtc);
  169.         }
  170.  
  171.         intel_modeset_check_state(connector->dev);
  172. }
  173.  
  174. static int intel_crt_mode_valid(struct drm_connector *connector,
  175.                                 struct drm_display_mode *mode)
  176. {
  177.         struct drm_device *dev = connector->dev;
  178.  
  179.         int max_clock = 0;
  180.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  181.                 return MODE_NO_DBLESCAN;
  182.  
  183.         if (mode->clock < 25000)
  184.                 return MODE_CLOCK_LOW;
  185.  
  186.         if (IS_GEN2(dev))
  187.                 max_clock = 350000;
  188.         else
  189.                 max_clock = 400000;
  190.         if (mode->clock > max_clock)
  191.                 return MODE_CLOCK_HIGH;
  192.  
  193.         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
  194.         if (HAS_PCH_LPT(dev) &&
  195.             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
  196.                 return MODE_CLOCK_HIGH;
  197.  
  198.         return MODE_OK;
  199. }
  200.  
  201. static bool intel_crt_compute_config(struct intel_encoder *encoder,
  202.                                      struct intel_crtc_config *pipe_config)
  203. {
  204.         struct drm_device *dev = encoder->base.dev;
  205.  
  206.         if (HAS_PCH_SPLIT(dev))
  207.                 pipe_config->has_pch_encoder = true;
  208.  
  209.         return true;
  210. }
  211.  
  212. static void intel_crt_mode_set(struct drm_encoder *encoder,
  213.                                struct drm_display_mode *mode,
  214.                                struct drm_display_mode *adjusted_mode)
  215. {
  216.  
  217.         struct drm_device *dev = encoder->dev;
  218.         struct drm_crtc *crtc = encoder->crtc;
  219.         struct intel_crt *crt =
  220.                 intel_encoder_to_crt(to_intel_encoder(encoder));
  221.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  222.         struct drm_i915_private *dev_priv = dev->dev_private;
  223.         u32 adpa;
  224.  
  225.         if (HAS_PCH_SPLIT(dev))
  226.         adpa = ADPA_HOTPLUG_BITS;
  227.         else
  228.                 adpa = 0;
  229.  
  230.         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  231.                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  232.         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  233.                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  234.  
  235.         /* For CPT allow 3 pipe config, for others just use A or B */
  236.         if (HAS_PCH_LPT(dev))
  237.                 ; /* Those bits don't exist here */
  238.         else if (HAS_PCH_CPT(dev))
  239.                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
  240.         else if (intel_crtc->pipe == 0)
  241.                         adpa |= ADPA_PIPE_A_SELECT;
  242.                 else
  243.                         adpa |= ADPA_PIPE_B_SELECT;
  244.  
  245.         if (!HAS_PCH_SPLIT(dev))
  246.                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
  247.  
  248.         I915_WRITE(crt->adpa_reg, adpa);
  249. }
  250.  
  251. static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
  252. {
  253.         struct drm_device *dev = connector->dev;
  254.         struct intel_crt *crt = intel_attached_crt(connector);
  255.         struct drm_i915_private *dev_priv = dev->dev_private;
  256.         u32 adpa;
  257.         bool ret;
  258.  
  259.         /* The first time through, trigger an explicit detection cycle */
  260.         if (crt->force_hotplug_required) {
  261.                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
  262.                 u32 save_adpa;
  263.  
  264.                 crt->force_hotplug_required = 0;
  265.  
  266.                 save_adpa = adpa = I915_READ(crt->adpa_reg);
  267.                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  268.  
  269.                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  270.                 if (turn_off_dac)
  271.                         adpa &= ~ADPA_DAC_ENABLE;
  272.  
  273.                 I915_WRITE(crt->adpa_reg, adpa);
  274.  
  275.                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  276.                              1000))
  277.                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  278.  
  279.                 if (turn_off_dac) {
  280.                         I915_WRITE(crt->adpa_reg, save_adpa);
  281.                         POSTING_READ(crt->adpa_reg);
  282.                 }
  283.         }
  284.  
  285.         /* Check the status to see if both blue and green are on now */
  286.         adpa = I915_READ(crt->adpa_reg);
  287.         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  288.                 ret = true;
  289.         else
  290.                 ret = false;
  291.         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
  292.  
  293.         return ret;
  294. }
  295.  
  296. static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
  297. {
  298.         struct drm_device *dev = connector->dev;
  299.         struct intel_crt *crt = intel_attached_crt(connector);
  300.         struct drm_i915_private *dev_priv = dev->dev_private;
  301.         u32 adpa;
  302.         bool ret;
  303.         u32 save_adpa;
  304.  
  305.         save_adpa = adpa = I915_READ(crt->adpa_reg);
  306.         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  307.  
  308.         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  309.  
  310.         I915_WRITE(crt->adpa_reg, adpa);
  311.  
  312.         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  313.                      1000)) {
  314.                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  315.                 I915_WRITE(crt->adpa_reg, save_adpa);
  316.         }
  317.  
  318.         /* Check the status to see if both blue and green are on now */
  319.         adpa = I915_READ(crt->adpa_reg);
  320.         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  321.                 ret = true;
  322.         else
  323.                 ret = false;
  324.  
  325.         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
  326.  
  327.         /* FIXME: debug force function and remove */
  328.         ret = true;
  329.  
  330.         return ret;
  331. }
  332.  
  333. /**
  334.  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  335.  *
  336.  * Not for i915G/i915GM
  337.  *
  338.  * \return true if CRT is connected.
  339.  * \return false if CRT is disconnected.
  340.  */
  341. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  342. {
  343.         struct drm_device *dev = connector->dev;
  344.         struct drm_i915_private *dev_priv = dev->dev_private;
  345.         u32 hotplug_en, orig, stat;
  346.         bool ret = false;
  347.         int i, tries = 0;
  348.  
  349.         if (HAS_PCH_SPLIT(dev))
  350.                 return intel_ironlake_crt_detect_hotplug(connector);
  351.  
  352.         if (IS_VALLEYVIEW(dev))
  353.                 return valleyview_crt_detect_hotplug(connector);
  354.  
  355.         /*
  356.          * On 4 series desktop, CRT detect sequence need to be done twice
  357.          * to get a reliable result.
  358.          */
  359.  
  360.         if (IS_G4X(dev) && !IS_GM45(dev))
  361.                 tries = 2;
  362.         else
  363.                 tries = 1;
  364.         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
  365.         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  366.  
  367.         for (i = 0; i < tries ; i++) {
  368.                 /* turn on the FORCE_DETECT */
  369.                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  370.                 /* wait for FORCE_DETECT to go off */
  371.                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
  372.                               CRT_HOTPLUG_FORCE_DETECT) == 0,
  373.                              1000))
  374.                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
  375.         }
  376.  
  377.         stat = I915_READ(PORT_HOTPLUG_STAT);
  378.         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
  379.                 ret = true;
  380.  
  381.         /* clear the interrupt we just generated, if any */
  382.         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  383.  
  384.         /* and put the bits back */
  385.         I915_WRITE(PORT_HOTPLUG_EN, orig);
  386.  
  387.         return ret;
  388. }
  389.  
  390. static struct edid *intel_crt_get_edid(struct drm_connector *connector,
  391.                                 struct i2c_adapter *i2c)
  392. {
  393.         struct edid *edid;
  394.  
  395.         edid = drm_get_edid(connector, i2c);
  396.  
  397.         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
  398.                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
  399.                 intel_gmbus_force_bit(i2c, true);
  400.                 edid = drm_get_edid(connector, i2c);
  401.                 intel_gmbus_force_bit(i2c, false);
  402.         }
  403.  
  404.         return edid;
  405. }
  406.  
  407. /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
  408. static int intel_crt_ddc_get_modes(struct drm_connector *connector,
  409.                                 struct i2c_adapter *adapter)
  410. {
  411.         struct edid *edid;
  412.         int ret;
  413.  
  414.         edid = intel_crt_get_edid(connector, adapter);
  415.         if (!edid)
  416.                 return 0;
  417.  
  418.         ret = intel_connector_update_modes(connector, edid);
  419.         kfree(edid);
  420.  
  421.         return ret;
  422. }
  423.  
  424. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  425. {
  426.         struct intel_crt *crt = intel_attached_crt(connector);
  427.         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
  428.         struct edid *edid;
  429.         struct i2c_adapter *i2c;
  430.  
  431.         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
  432.  
  433.         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  434.         edid = intel_crt_get_edid(connector, i2c);
  435.  
  436.         if (edid) {
  437.                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
  438.  
  439.                 /*
  440.                  * This may be a DVI-I connector with a shared DDC
  441.                  * link between analog and digital outputs, so we
  442.                  * have to check the EDID input spec of the attached device.
  443.                  */
  444.                 if (!is_digital) {
  445.                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
  446.                         return true;
  447.                 }
  448.  
  449.                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
  450.                 } else {
  451.                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
  452.                 }
  453.  
  454.         kfree(edid);
  455.  
  456.         return false;
  457. }
  458.  
  459. static enum drm_connector_status
  460. intel_crt_load_detect(struct intel_crt *crt)
  461. {
  462.         struct drm_device *dev = crt->base.base.dev;
  463.         struct drm_i915_private *dev_priv = dev->dev_private;
  464.         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
  465.         uint32_t save_bclrpat;
  466.         uint32_t save_vtotal;
  467.         uint32_t vtotal, vactive;
  468.         uint32_t vsample;
  469.         uint32_t vblank, vblank_start, vblank_end;
  470.         uint32_t dsl;
  471.         uint32_t bclrpat_reg;
  472.         uint32_t vtotal_reg;
  473.         uint32_t vblank_reg;
  474.         uint32_t vsync_reg;
  475.         uint32_t pipeconf_reg;
  476.         uint32_t pipe_dsl_reg;
  477.         uint8_t st00;
  478.         enum drm_connector_status status;
  479.  
  480.         DRM_DEBUG_KMS("starting load-detect on CRT\n");
  481.  
  482.         bclrpat_reg = BCLRPAT(pipe);
  483.         vtotal_reg = VTOTAL(pipe);
  484.         vblank_reg = VBLANK(pipe);
  485.         vsync_reg = VSYNC(pipe);
  486.         pipeconf_reg = PIPECONF(pipe);
  487.         pipe_dsl_reg = PIPEDSL(pipe);
  488.  
  489.         save_bclrpat = I915_READ(bclrpat_reg);
  490.         save_vtotal = I915_READ(vtotal_reg);
  491.         vblank = I915_READ(vblank_reg);
  492.  
  493.         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
  494.         vactive = (save_vtotal & 0x7ff) + 1;
  495.  
  496.         vblank_start = (vblank & 0xfff) + 1;
  497.         vblank_end = ((vblank >> 16) & 0xfff) + 1;
  498.  
  499.         /* Set the border color to purple. */
  500.         I915_WRITE(bclrpat_reg, 0x500050);
  501.  
  502.         if (!IS_GEN2(dev)) {
  503.                 uint32_t pipeconf = I915_READ(pipeconf_reg);
  504.                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
  505.                 POSTING_READ(pipeconf_reg);
  506.                 /* Wait for next Vblank to substitue
  507.                  * border color for Color info */
  508.                 intel_wait_for_vblank(dev, pipe);
  509.                 st00 = I915_READ8(VGA_MSR_WRITE);
  510.                 status = ((st00 & (1 << 4)) != 0) ?
  511.                         connector_status_connected :
  512.                         connector_status_disconnected;
  513.  
  514.                 I915_WRITE(pipeconf_reg, pipeconf);
  515.         } else {
  516.                 bool restore_vblank = false;
  517.                 int count, detect;
  518.  
  519.                 /*
  520.                 * If there isn't any border, add some.
  521.                 * Yes, this will flicker
  522.                 */
  523.                 if (vblank_start <= vactive && vblank_end >= vtotal) {
  524.                         uint32_t vsync = I915_READ(vsync_reg);
  525.                         uint32_t vsync_start = (vsync & 0xffff) + 1;
  526.  
  527.                         vblank_start = vsync_start;
  528.                         I915_WRITE(vblank_reg,
  529.                                    (vblank_start - 1) |
  530.                                    ((vblank_end - 1) << 16));
  531.                         restore_vblank = true;
  532.                 }
  533.                 /* sample in the vertical border, selecting the larger one */
  534.                 if (vblank_start - vactive >= vtotal - vblank_end)
  535.                         vsample = (vblank_start + vactive) >> 1;
  536.                 else
  537.                         vsample = (vtotal + vblank_end) >> 1;
  538.  
  539.                 /*
  540.                  * Wait for the border to be displayed
  541.                  */
  542.                 while (I915_READ(pipe_dsl_reg) >= vactive)
  543.                         ;
  544.                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
  545.                         ;
  546.                 /*
  547.                  * Watch ST00 for an entire scanline
  548.                  */
  549.                 detect = 0;
  550.                 count = 0;
  551.                 do {
  552.                         count++;
  553.                         /* Read the ST00 VGA status register */
  554.                         st00 = I915_READ8(VGA_MSR_WRITE);
  555.                         if (st00 & (1 << 4))
  556.                                 detect++;
  557.                 } while ((I915_READ(pipe_dsl_reg) == dsl));
  558.  
  559.                 /* restore vblank if necessary */
  560.                 if (restore_vblank)
  561.                         I915_WRITE(vblank_reg, vblank);
  562.                 /*
  563.                  * If more than 3/4 of the scanline detected a monitor,
  564.                  * then it is assumed to be present. This works even on i830,
  565.                  * where there isn't any way to force the border color across
  566.                  * the screen
  567.                  */
  568.                 status = detect * 4 > count * 3 ?
  569.                          connector_status_connected :
  570.                          connector_status_disconnected;
  571.         }
  572.  
  573.         /* Restore previous settings */
  574.         I915_WRITE(bclrpat_reg, save_bclrpat);
  575.  
  576.         return status;
  577. }
  578.  
  579. static enum drm_connector_status
  580. intel_crt_detect(struct drm_connector *connector, bool force)
  581. {
  582.         struct drm_device *dev = connector->dev;
  583.         struct intel_crt *crt = intel_attached_crt(connector);
  584.         enum drm_connector_status status;
  585.         struct intel_load_detect_pipe tmp;
  586.  
  587.         if (I915_HAS_HOTPLUG(dev)) {
  588.                 /* We can not rely on the HPD pin always being correctly wired
  589.                  * up, for example many KVM do not pass it through, and so
  590.                  * only trust an assertion that the monitor is connected.
  591.                  */
  592.                 if (intel_crt_detect_hotplug(connector)) {
  593.                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
  594.                         return connector_status_connected;
  595.                 } else
  596.                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
  597.         }
  598.  
  599.         if (intel_crt_detect_ddc(connector))
  600.                 return connector_status_connected;
  601.  
  602.         /* Load detection is broken on HPD capable machines. Whoever wants a
  603.          * broken monitor (without edid) to work behind a broken kvm (that fails
  604.          * to have the right resistors for HP detection) needs to fix this up.
  605.          * For now just bail out. */
  606.         if (I915_HAS_HOTPLUG(dev))
  607.                 return connector_status_disconnected;
  608.  
  609.         if (!force)
  610.                 return connector->status;
  611.  
  612.         /* for pre-945g platforms use load detect */
  613.         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
  614.                         if (intel_crt_detect_ddc(connector))
  615.                                 status = connector_status_connected;
  616.                         else
  617.                                 status = intel_crt_load_detect(crt);
  618.                 intel_release_load_detect_pipe(connector, &tmp);
  619.                 } else
  620.                         status = connector_status_unknown;
  621.  
  622.         return status;
  623. }
  624.  
  625. static void intel_crt_destroy(struct drm_connector *connector)
  626. {
  627.         drm_sysfs_connector_remove(connector);
  628.         drm_connector_cleanup(connector);
  629.         kfree(connector);
  630. }
  631.  
  632. static int intel_crt_get_modes(struct drm_connector *connector)
  633. {
  634.         struct drm_device *dev = connector->dev;
  635.         struct drm_i915_private *dev_priv = dev->dev_private;
  636.         int ret;
  637.         struct i2c_adapter *i2c;
  638.  
  639.         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  640.         ret = intel_crt_ddc_get_modes(connector, i2c);
  641.         if (ret || !IS_G4X(dev))
  642.                 return ret;
  643.  
  644.         /* Try to probe digital port for output in DVI-I -> VGA mode. */
  645.         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  646.         return intel_crt_ddc_get_modes(connector, i2c);
  647. }
  648.  
  649. static int intel_crt_set_property(struct drm_connector *connector,
  650.                                   struct drm_property *property,
  651.                                   uint64_t value)
  652. {
  653.         return 0;
  654. }
  655.  
  656. static void intel_crt_reset(struct drm_connector *connector)
  657. {
  658.         struct drm_device *dev = connector->dev;
  659.         struct drm_i915_private *dev_priv = dev->dev_private;
  660.         struct intel_crt *crt = intel_attached_crt(connector);
  661.  
  662.         if (HAS_PCH_SPLIT(dev)) {
  663.                 u32 adpa;
  664.  
  665.                 adpa = I915_READ(crt->adpa_reg);
  666.                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
  667.                 adpa |= ADPA_HOTPLUG_BITS;
  668.                 I915_WRITE(crt->adpa_reg, adpa);
  669.                 POSTING_READ(crt->adpa_reg);
  670.  
  671.                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
  672.                 crt->force_hotplug_required = 1;
  673.         }
  674.  
  675. }
  676.  
  677. /*
  678.  * Routines for controlling stuff on the analog port
  679.  */
  680.  
  681. static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
  682.         .mode_set = intel_crt_mode_set,
  683. };
  684.  
  685. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  686.         .reset = intel_crt_reset,
  687.         .dpms = intel_crt_dpms,
  688.         .detect = intel_crt_detect,
  689.         .fill_modes = drm_helper_probe_single_connector_modes,
  690.         .destroy = intel_crt_destroy,
  691.         .set_property = intel_crt_set_property,
  692. };
  693.  
  694. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  695.         .mode_valid = intel_crt_mode_valid,
  696.         .get_modes = intel_crt_get_modes,
  697.         .best_encoder = intel_best_encoder,
  698. };
  699.  
  700. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  701.         .destroy = intel_encoder_destroy,
  702. };
  703.  
  704. void intel_crt_init(struct drm_device *dev)
  705. {
  706.         struct drm_connector *connector;
  707.         struct intel_crt *crt;
  708.         struct intel_connector *intel_connector;
  709.         struct drm_i915_private *dev_priv = dev->dev_private;
  710.  
  711.         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
  712.         if (!crt)
  713.                 return;
  714.  
  715.         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  716.         if (!intel_connector) {
  717.                 kfree(crt);
  718.                 return;
  719.         }
  720.  
  721.         connector = &intel_connector->base;
  722.         crt->connector = intel_connector;
  723.         drm_connector_init(dev, &intel_connector->base,
  724.                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  725.  
  726.         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
  727.                          DRM_MODE_ENCODER_DAC);
  728.  
  729.         intel_connector_attach_encoder(intel_connector, &crt->base);
  730.  
  731.         crt->base.type = INTEL_OUTPUT_ANALOG;
  732.         crt->base.cloneable = true;
  733.         if (IS_I830(dev))
  734.                 crt->base.crtc_mask = (1 << 0);
  735.         else
  736.                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  737.  
  738.         if (IS_GEN2(dev))
  739.                 connector->interlace_allowed = 0;
  740.         else
  741.         connector->interlace_allowed = 1;
  742.         connector->doublescan_allowed = 0;
  743.  
  744.         if (HAS_PCH_SPLIT(dev))
  745.                 crt->adpa_reg = PCH_ADPA;
  746.         else if (IS_VALLEYVIEW(dev))
  747.                 crt->adpa_reg = VLV_ADPA;
  748.         else
  749.                 crt->adpa_reg = ADPA;
  750.  
  751.         crt->base.compute_config = intel_crt_compute_config;
  752.         crt->base.disable = intel_disable_crt;
  753.         crt->base.enable = intel_enable_crt;
  754.         if (I915_HAS_HOTPLUG(dev))
  755.                 crt->base.hpd_pin = HPD_CRT;
  756.         if (HAS_DDI(dev))
  757.                 crt->base.get_hw_state = intel_ddi_get_hw_state;
  758.         else
  759.         crt->base.get_hw_state = intel_crt_get_hw_state;
  760.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  761.  
  762.         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
  763.         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  764.  
  765.         drm_sysfs_connector_add(connector);
  766.  
  767.         if (!I915_HAS_HOTPLUG(dev))
  768.                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  769.  
  770.         /*
  771.          * Configure the automatic hotplug detection stuff
  772.          */
  773.         crt->force_hotplug_required = 0;
  774.  
  775.         /*
  776.          * TODO: find a proper way to discover whether we need to set the the
  777.          * polarity and link reversal bits or not, instead of relying on the
  778.          * BIOS.
  779.          */
  780.         if (HAS_PCH_LPT(dev)) {
  781.                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
  782.                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
  783.  
  784.                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
  785.         }
  786. }
  787.