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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8.  * and/or sell copies of the Software, and to permit persons to whom the
  9.  * Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21.  * DEALINGS IN THE SOFTWARE.
  22.  *
  23.  * Authors:
  24.  *      Eric Anholt <eric@anholt.net>
  25.  */
  26.  
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "drm_crtc.h"
  32. #include "drm_crtc_helper.h"
  33. #include "drm_edid.h"
  34. #include "intel_drv.h"
  35. #include "i915_drm.h"
  36. #include "i915_drv.h"
  37.  
  38. /* Here's the desired hotplug mode */
  39. #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40.                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41.                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42.                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43.                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44.                            ADPA_CRT_HOTPLUG_ENABLE)
  45.  
  46. struct intel_crt {
  47.         struct intel_encoder base;
  48.         bool force_hotplug_required;
  49. };
  50.  
  51. static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  52. {
  53.         return container_of(intel_attached_encoder(connector),
  54.                             struct intel_crt, base);
  55. }
  56.  
  57. static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  58. {
  59.         struct drm_device *dev = encoder->dev;
  60.         struct drm_i915_private *dev_priv = dev->dev_private;
  61.         u32 temp, reg;
  62.  
  63.         if (HAS_PCH_SPLIT(dev))
  64.                 reg = PCH_ADPA;
  65.         else
  66.                 reg = ADPA;
  67.  
  68.         temp = I915_READ(reg);
  69.         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  70.         temp &= ~ADPA_DAC_ENABLE;
  71.  
  72.         switch (mode) {
  73.         case DRM_MODE_DPMS_ON:
  74.                 temp |= ADPA_DAC_ENABLE;
  75.                 break;
  76.         case DRM_MODE_DPMS_STANDBY:
  77.                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  78.                 break;
  79.         case DRM_MODE_DPMS_SUSPEND:
  80.                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  81.                 break;
  82.         case DRM_MODE_DPMS_OFF:
  83.                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  84.                 break;
  85.         }
  86.  
  87.         I915_WRITE(reg, temp);
  88. }
  89.  
  90. static int intel_crt_mode_valid(struct drm_connector *connector,
  91.                                 struct drm_display_mode *mode)
  92. {
  93.         struct drm_device *dev = connector->dev;
  94.  
  95.         int max_clock = 0;
  96.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  97.                 return MODE_NO_DBLESCAN;
  98.  
  99.         if (mode->clock < 25000)
  100.                 return MODE_CLOCK_LOW;
  101.  
  102.         if (IS_GEN2(dev))
  103.                 max_clock = 350000;
  104.         else
  105.                 max_clock = 400000;
  106.         if (mode->clock > max_clock)
  107.                 return MODE_CLOCK_HIGH;
  108.  
  109.         return MODE_OK;
  110. }
  111.  
  112. static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  113.                                  struct drm_display_mode *mode,
  114.                                  struct drm_display_mode *adjusted_mode)
  115. {
  116.         return true;
  117. }
  118.  
  119. static void intel_crt_mode_set(struct drm_encoder *encoder,
  120.                                struct drm_display_mode *mode,
  121.                                struct drm_display_mode *adjusted_mode)
  122. {
  123.  
  124.         struct drm_device *dev = encoder->dev;
  125.         struct drm_crtc *crtc = encoder->crtc;
  126.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  127.         struct drm_i915_private *dev_priv = dev->dev_private;
  128.         int dpll_md_reg;
  129.         u32 adpa, dpll_md;
  130.         u32 adpa_reg;
  131.  
  132.         dpll_md_reg = DPLL_MD(intel_crtc->pipe);
  133.  
  134.         if (HAS_PCH_SPLIT(dev))
  135.                 adpa_reg = PCH_ADPA;
  136.         else
  137.                 adpa_reg = ADPA;
  138.  
  139.         /*
  140.          * Disable separate mode multiplier used when cloning SDVO to CRT
  141.          * XXX this needs to be adjusted when we really are cloning
  142.          */
  143.         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
  144.                 dpll_md = I915_READ(dpll_md_reg);
  145.                 I915_WRITE(dpll_md_reg,
  146.                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  147.         }
  148.  
  149.         adpa = ADPA_HOTPLUG_BITS;
  150.         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  151.                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  152.         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  153.                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  154.  
  155.         /* For CPT allow 3 pipe config, for others just use A or B */
  156.                 if (HAS_PCH_CPT(dev))
  157.                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
  158.         else if (intel_crtc->pipe == 0)
  159.                         adpa |= ADPA_PIPE_A_SELECT;
  160.                 else
  161.                         adpa |= ADPA_PIPE_B_SELECT;
  162.  
  163.         if (!HAS_PCH_SPLIT(dev))
  164.                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
  165.  
  166.         I915_WRITE(adpa_reg, adpa);
  167. }
  168.  
  169. static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
  170. {
  171.         struct drm_device *dev = connector->dev;
  172.         struct intel_crt *crt = intel_attached_crt(connector);
  173.         struct drm_i915_private *dev_priv = dev->dev_private;
  174.         u32 adpa;
  175.         bool ret;
  176.  
  177.         /* The first time through, trigger an explicit detection cycle */
  178.         if (crt->force_hotplug_required) {
  179.                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
  180.                 u32 save_adpa;
  181.  
  182.                 crt->force_hotplug_required = 0;
  183.  
  184.                 save_adpa = adpa = I915_READ(PCH_ADPA);
  185.                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  186.  
  187.                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  188.                 if (turn_off_dac)
  189.                         adpa &= ~ADPA_DAC_ENABLE;
  190.  
  191.                 I915_WRITE(PCH_ADPA, adpa);
  192.  
  193.                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  194.                              1000))
  195.                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  196.  
  197.                 if (turn_off_dac) {
  198.                         I915_WRITE(PCH_ADPA, save_adpa);
  199.                         POSTING_READ(PCH_ADPA);
  200.                 }
  201.         }
  202.  
  203.         /* Check the status to see if both blue and green are on now */
  204.         adpa = I915_READ(PCH_ADPA);
  205.         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  206.                 ret = true;
  207.         else
  208.                 ret = false;
  209.         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
  210.  
  211.         return ret;
  212. }
  213.  
  214. /**
  215.  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  216.  *
  217.  * Not for i915G/i915GM
  218.  *
  219.  * \return true if CRT is connected.
  220.  * \return false if CRT is disconnected.
  221.  */
  222. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  223. {
  224.         struct drm_device *dev = connector->dev;
  225.         struct drm_i915_private *dev_priv = dev->dev_private;
  226.         u32 hotplug_en, orig, stat;
  227.         bool ret = false;
  228.         int i, tries = 0;
  229.  
  230.         if (HAS_PCH_SPLIT(dev))
  231.                 return intel_ironlake_crt_detect_hotplug(connector);
  232.  
  233.         /*
  234.          * On 4 series desktop, CRT detect sequence need to be done twice
  235.          * to get a reliable result.
  236.          */
  237.  
  238.         if (IS_G4X(dev) && !IS_GM45(dev))
  239.                 tries = 2;
  240.         else
  241.                 tries = 1;
  242.         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
  243.         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  244.  
  245.         for (i = 0; i < tries ; i++) {
  246.                 /* turn on the FORCE_DETECT */
  247.                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  248.                 /* wait for FORCE_DETECT to go off */
  249.                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
  250.                               CRT_HOTPLUG_FORCE_DETECT) == 0,
  251.                              1000))
  252.                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
  253.         }
  254.  
  255.         stat = I915_READ(PORT_HOTPLUG_STAT);
  256.         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
  257.                 ret = true;
  258.  
  259.         /* clear the interrupt we just generated, if any */
  260.         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  261.  
  262.         /* and put the bits back */
  263.         I915_WRITE(PORT_HOTPLUG_EN, orig);
  264.  
  265.         return ret;
  266. }
  267.  
  268. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  269. {
  270.         struct intel_crt *crt = intel_attached_crt(connector);
  271.         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
  272.  
  273.         /* CRT should always be at 0, but check anyway */
  274.         if (crt->base.type != INTEL_OUTPUT_ANALOG)
  275.                 return false;
  276.  
  277.         if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
  278.                 struct edid *edid;
  279.                 bool is_digital = false;
  280.  
  281.                 edid = drm_get_edid(connector,
  282.                         &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  283.                 /*
  284.                  * This may be a DVI-I connector with a shared DDC
  285.                  * link between analog and digital outputs, so we
  286.                  * have to check the EDID input spec of the attached device.
  287.                  *
  288.                  * On the other hand, what should we do if it is a broken EDID?
  289.                  */
  290.                 if (edid != NULL) {
  291.                         is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
  292.                         connector->display_info.raw_edid = NULL;
  293.                         kfree(edid);
  294.                 }
  295.  
  296.                 if (!is_digital) {
  297.                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
  298.                         return true;
  299.                 } else {
  300.                         DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
  301.                 }
  302.         }
  303.  
  304.         return false;
  305. }
  306.  
  307. static enum drm_connector_status
  308. intel_crt_load_detect(struct intel_crt *crt)
  309. {
  310.         struct drm_device *dev = crt->base.base.dev;
  311.         struct drm_i915_private *dev_priv = dev->dev_private;
  312.         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
  313.         uint32_t save_bclrpat;
  314.         uint32_t save_vtotal;
  315.         uint32_t vtotal, vactive;
  316.         uint32_t vsample;
  317.         uint32_t vblank, vblank_start, vblank_end;
  318.         uint32_t dsl;
  319.         uint32_t bclrpat_reg;
  320.         uint32_t vtotal_reg;
  321.         uint32_t vblank_reg;
  322.         uint32_t vsync_reg;
  323.         uint32_t pipeconf_reg;
  324.         uint32_t pipe_dsl_reg;
  325.         uint8_t st00;
  326.         enum drm_connector_status status;
  327.  
  328.         DRM_DEBUG_KMS("starting load-detect on CRT\n");
  329.  
  330.         bclrpat_reg = BCLRPAT(pipe);
  331.         vtotal_reg = VTOTAL(pipe);
  332.         vblank_reg = VBLANK(pipe);
  333.         vsync_reg = VSYNC(pipe);
  334.         pipeconf_reg = PIPECONF(pipe);
  335.         pipe_dsl_reg = PIPEDSL(pipe);
  336.  
  337.         save_bclrpat = I915_READ(bclrpat_reg);
  338.         save_vtotal = I915_READ(vtotal_reg);
  339.         vblank = I915_READ(vblank_reg);
  340.  
  341.         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
  342.         vactive = (save_vtotal & 0x7ff) + 1;
  343.  
  344.         vblank_start = (vblank & 0xfff) + 1;
  345.         vblank_end = ((vblank >> 16) & 0xfff) + 1;
  346.  
  347.         /* Set the border color to purple. */
  348.         I915_WRITE(bclrpat_reg, 0x500050);
  349.  
  350.         if (!IS_GEN2(dev)) {
  351.                 uint32_t pipeconf = I915_READ(pipeconf_reg);
  352.                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
  353.                 POSTING_READ(pipeconf_reg);
  354.                 /* Wait for next Vblank to substitue
  355.                  * border color for Color info */
  356.                 intel_wait_for_vblank(dev, pipe);
  357.                 st00 = I915_READ8(VGA_MSR_WRITE);
  358.                 status = ((st00 & (1 << 4)) != 0) ?
  359.                         connector_status_connected :
  360.                         connector_status_disconnected;
  361.  
  362.                 I915_WRITE(pipeconf_reg, pipeconf);
  363.         } else {
  364.                 bool restore_vblank = false;
  365.                 int count, detect;
  366.  
  367.                 /*
  368.                 * If there isn't any border, add some.
  369.                 * Yes, this will flicker
  370.                 */
  371.                 if (vblank_start <= vactive && vblank_end >= vtotal) {
  372.                         uint32_t vsync = I915_READ(vsync_reg);
  373.                         uint32_t vsync_start = (vsync & 0xffff) + 1;
  374.  
  375.                         vblank_start = vsync_start;
  376.                         I915_WRITE(vblank_reg,
  377.                                    (vblank_start - 1) |
  378.                                    ((vblank_end - 1) << 16));
  379.                         restore_vblank = true;
  380.                 }
  381.                 /* sample in the vertical border, selecting the larger one */
  382.                 if (vblank_start - vactive >= vtotal - vblank_end)
  383.                         vsample = (vblank_start + vactive) >> 1;
  384.                 else
  385.                         vsample = (vtotal + vblank_end) >> 1;
  386.  
  387.                 /*
  388.                  * Wait for the border to be displayed
  389.                  */
  390.                 while (I915_READ(pipe_dsl_reg) >= vactive)
  391.                         ;
  392.                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
  393.                         ;
  394.                 /*
  395.                  * Watch ST00 for an entire scanline
  396.                  */
  397.                 detect = 0;
  398.                 count = 0;
  399.                 do {
  400.                         count++;
  401.                         /* Read the ST00 VGA status register */
  402.                         st00 = I915_READ8(VGA_MSR_WRITE);
  403.                         if (st00 & (1 << 4))
  404.                                 detect++;
  405.                 } while ((I915_READ(pipe_dsl_reg) == dsl));
  406.  
  407.                 /* restore vblank if necessary */
  408.                 if (restore_vblank)
  409.                         I915_WRITE(vblank_reg, vblank);
  410.                 /*
  411.                  * If more than 3/4 of the scanline detected a monitor,
  412.                  * then it is assumed to be present. This works even on i830,
  413.                  * where there isn't any way to force the border color across
  414.                  * the screen
  415.                  */
  416.                 status = detect * 4 > count * 3 ?
  417.                          connector_status_connected :
  418.                          connector_status_disconnected;
  419.         }
  420.  
  421.         /* Restore previous settings */
  422.         I915_WRITE(bclrpat_reg, save_bclrpat);
  423.  
  424.         return status;
  425. }
  426.  
  427. static enum drm_connector_status
  428. intel_crt_detect(struct drm_connector *connector, bool force)
  429. {
  430.         struct drm_device *dev = connector->dev;
  431.         struct intel_crt *crt = intel_attached_crt(connector);
  432.         struct drm_crtc *crtc;
  433.         enum drm_connector_status status;
  434.  
  435.         if (I915_HAS_HOTPLUG(dev)) {
  436.                 if (intel_crt_detect_hotplug(connector)) {
  437.                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
  438.                         return connector_status_connected;
  439.                 } else {
  440.                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
  441.                         return connector_status_disconnected;
  442.                 }
  443.         }
  444.  
  445.         if (intel_crt_detect_ddc(connector))
  446.                 return connector_status_connected;
  447.  
  448.         if (!force)
  449.                 return connector->status;
  450.  
  451.         /* for pre-945g platforms use load detect */
  452.         crtc = crt->base.base.crtc;
  453.         if (crtc && crtc->enabled) {
  454.                 status = intel_crt_load_detect(crt);
  455.         } else {
  456.                 struct intel_load_detect_pipe tmp;
  457.  
  458.                 if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
  459.                                                &tmp)) {
  460.                         if (intel_crt_detect_ddc(connector))
  461.                                 status = connector_status_connected;
  462.                         else
  463.                                 status = intel_crt_load_detect(crt);
  464.                         intel_release_load_detect_pipe(&crt->base, connector,
  465.                                                        &tmp);
  466.                 } else
  467.                         status = connector_status_unknown;
  468.         }
  469.  
  470.         return status;
  471. }
  472.  
  473. static void intel_crt_destroy(struct drm_connector *connector)
  474. {
  475.         drm_sysfs_connector_remove(connector);
  476.         drm_connector_cleanup(connector);
  477.         kfree(connector);
  478. }
  479.  
  480. static int intel_crt_get_modes(struct drm_connector *connector)
  481. {
  482.         struct drm_device *dev = connector->dev;
  483.         struct drm_i915_private *dev_priv = dev->dev_private;
  484.         int ret;
  485.  
  486.         ret = intel_ddc_get_modes(connector,
  487.                                  &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  488.         if (ret || !IS_G4X(dev))
  489.                 return ret;
  490.  
  491.         /* Try to probe digital port for output in DVI-I -> VGA mode. */
  492.         return intel_ddc_get_modes(connector,
  493.                                    &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
  494. }
  495.  
  496. static int intel_crt_set_property(struct drm_connector *connector,
  497.                                   struct drm_property *property,
  498.                                   uint64_t value)
  499. {
  500.         return 0;
  501. }
  502.  
  503. static void intel_crt_reset(struct drm_connector *connector)
  504. {
  505.         struct drm_device *dev = connector->dev;
  506.         struct intel_crt *crt = intel_attached_crt(connector);
  507.  
  508.         if (HAS_PCH_SPLIT(dev))
  509.                 crt->force_hotplug_required = 1;
  510. }
  511.  
  512. /*
  513.  * Routines for controlling stuff on the analog port
  514.  */
  515.  
  516. static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
  517.         .dpms = intel_crt_dpms,
  518.         .mode_fixup = intel_crt_mode_fixup,
  519.         .prepare = intel_encoder_prepare,
  520.         .commit = intel_encoder_commit,
  521.         .mode_set = intel_crt_mode_set,
  522. };
  523.  
  524. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  525.         .reset = intel_crt_reset,
  526.         .dpms = drm_helper_connector_dpms,
  527.         .detect = intel_crt_detect,
  528.         .fill_modes = drm_helper_probe_single_connector_modes,
  529.         .destroy = intel_crt_destroy,
  530.         .set_property = intel_crt_set_property,
  531. };
  532.  
  533. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  534.         .mode_valid = intel_crt_mode_valid,
  535.         .get_modes = intel_crt_get_modes,
  536.         .best_encoder = intel_best_encoder,
  537. };
  538.  
  539. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  540.         .destroy = intel_encoder_destroy,
  541. };
  542.  
  543. void intel_crt_init(struct drm_device *dev)
  544. {
  545.         struct drm_connector *connector;
  546.         struct intel_crt *crt;
  547.         struct intel_connector *intel_connector;
  548.         struct drm_i915_private *dev_priv = dev->dev_private;
  549.  
  550.         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
  551.         if (!crt)
  552.                 return;
  553.  
  554.         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  555.         if (!intel_connector) {
  556.                 kfree(crt);
  557.                 return;
  558.         }
  559.  
  560.         connector = &intel_connector->base;
  561.         drm_connector_init(dev, &intel_connector->base,
  562.                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  563.  
  564.         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
  565.                          DRM_MODE_ENCODER_DAC);
  566.  
  567.         intel_connector_attach_encoder(intel_connector, &crt->base);
  568.  
  569.         crt->base.type = INTEL_OUTPUT_ANALOG;
  570.         crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
  571.                                 1 << INTEL_ANALOG_CLONE_BIT |
  572.                                 1 << INTEL_SDVO_LVDS_CLONE_BIT);
  573.         crt->base.crtc_mask = (1 << 0) | (1 << 1);
  574.         connector->interlace_allowed = 1;
  575.         connector->doublescan_allowed = 0;
  576.  
  577.         drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
  578.         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  579.  
  580.         drm_sysfs_connector_add(connector);
  581.  
  582.         if (I915_HAS_HOTPLUG(dev))
  583.                 connector->polled = DRM_CONNECTOR_POLL_HPD;
  584.         else
  585.                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  586.  
  587.         /*
  588.          * Configure the automatic hotplug detection stuff
  589.          */
  590.         crt->force_hotplug_required = 0;
  591.         if (HAS_PCH_SPLIT(dev)) {
  592.                 u32 adpa;
  593.  
  594.                 adpa = I915_READ(PCH_ADPA);
  595.                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
  596.                 adpa |= ADPA_HOTPLUG_BITS;
  597.                 I915_WRITE(PCH_ADPA, adpa);
  598.                 POSTING_READ(PCH_ADPA);
  599.  
  600.                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
  601.                 crt->force_hotplug_required = 1;
  602.         }
  603.  
  604.         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
  605. }
  606.